main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. static void __ath_cancel_work(struct ath_softc *sc)
  180. {
  181. cancel_work_sync(&sc->paprd_work);
  182. cancel_work_sync(&sc->hw_check_work);
  183. cancel_delayed_work_sync(&sc->tx_complete_work);
  184. cancel_delayed_work_sync(&sc->hw_pll_work);
  185. }
  186. static void ath_cancel_work(struct ath_softc *sc)
  187. {
  188. __ath_cancel_work(sc);
  189. cancel_work_sync(&sc->hw_reset_work);
  190. }
  191. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  192. {
  193. struct ath_hw *ah = sc->sc_ah;
  194. struct ath_common *common = ath9k_hw_common(ah);
  195. bool ret;
  196. ieee80211_stop_queues(sc->hw);
  197. sc->hw_busy_count = 0;
  198. del_timer_sync(&common->ani.timer);
  199. ath9k_debug_samp_bb_mac(sc);
  200. ath9k_hw_disable_interrupts(ah);
  201. ret = ath_drain_all_txq(sc, retry_tx);
  202. if (!ath_stoprecv(sc))
  203. ret = false;
  204. if (!flush) {
  205. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  206. ath_rx_tasklet(sc, 0, true);
  207. ath_rx_tasklet(sc, 0, false);
  208. } else {
  209. ath_flushrecv(sc);
  210. }
  211. return ret;
  212. }
  213. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  214. {
  215. struct ath_hw *ah = sc->sc_ah;
  216. struct ath_common *common = ath9k_hw_common(ah);
  217. if (ath_startrecv(sc) != 0) {
  218. ath_err(common, "Unable to restart recv logic\n");
  219. return false;
  220. }
  221. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  222. sc->config.txpowlimit, &sc->curtxpow);
  223. ath9k_hw_set_interrupts(ah, ah->imask);
  224. ath9k_hw_enable_interrupts(ah);
  225. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  226. if (sc->sc_flags & SC_OP_BEACONS)
  227. ath_set_beacon(sc);
  228. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  229. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  230. if (!common->disable_ani)
  231. ath_start_ani(common);
  232. }
  233. if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
  234. struct ath_hw_antcomb_conf div_ant_conf;
  235. u8 lna_conf;
  236. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  237. if (sc->ant_rx == 1)
  238. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  239. else
  240. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  241. div_ant_conf.main_lna_conf = lna_conf;
  242. div_ant_conf.alt_lna_conf = lna_conf;
  243. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  244. }
  245. ieee80211_wake_queues(sc->hw);
  246. return true;
  247. }
  248. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  249. bool retry_tx)
  250. {
  251. struct ath_hw *ah = sc->sc_ah;
  252. struct ath_common *common = ath9k_hw_common(ah);
  253. struct ath9k_hw_cal_data *caldata = NULL;
  254. bool fastcc = true;
  255. bool flush = false;
  256. int r;
  257. __ath_cancel_work(sc);
  258. spin_lock_bh(&sc->sc_pcu_lock);
  259. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  260. fastcc = false;
  261. caldata = &sc->caldata;
  262. }
  263. if (!hchan) {
  264. fastcc = false;
  265. flush = true;
  266. hchan = ah->curchan;
  267. }
  268. if (fastcc && !ath9k_hw_check_alive(ah))
  269. fastcc = false;
  270. if (!ath_prepare_reset(sc, retry_tx, flush))
  271. fastcc = false;
  272. ath_dbg(common, ATH_DBG_CONFIG,
  273. "Reset to %u MHz, HT40: %d fastcc: %d\n",
  274. hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
  275. CHANNEL_HT40PLUS)),
  276. fastcc);
  277. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  278. if (r) {
  279. ath_err(common,
  280. "Unable to reset channel, reset status %d\n", r);
  281. goto out;
  282. }
  283. if (!ath_complete_reset(sc, true))
  284. r = -EIO;
  285. out:
  286. spin_unlock_bh(&sc->sc_pcu_lock);
  287. return r;
  288. }
  289. /*
  290. * Set/change channels. If the channel is really being changed, it's done
  291. * by reseting the chip. To accomplish this we must first cleanup any pending
  292. * DMA, then restart stuff.
  293. */
  294. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  295. struct ath9k_channel *hchan)
  296. {
  297. int r;
  298. if (sc->sc_flags & SC_OP_INVALID)
  299. return -EIO;
  300. ath9k_ps_wakeup(sc);
  301. r = ath_reset_internal(sc, hchan, false);
  302. ath9k_ps_restore(sc);
  303. return r;
  304. }
  305. static void ath_paprd_activate(struct ath_softc *sc)
  306. {
  307. struct ath_hw *ah = sc->sc_ah;
  308. struct ath9k_hw_cal_data *caldata = ah->caldata;
  309. int chain;
  310. if (!caldata || !caldata->paprd_done)
  311. return;
  312. ath9k_ps_wakeup(sc);
  313. ar9003_paprd_enable(ah, false);
  314. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  315. if (!(ah->txchainmask & BIT(chain)))
  316. continue;
  317. ar9003_paprd_populate_single_table(ah, caldata, chain);
  318. }
  319. ar9003_paprd_enable(ah, true);
  320. ath9k_ps_restore(sc);
  321. }
  322. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  323. {
  324. struct ieee80211_hw *hw = sc->hw;
  325. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  326. struct ath_hw *ah = sc->sc_ah;
  327. struct ath_common *common = ath9k_hw_common(ah);
  328. struct ath_tx_control txctl;
  329. int time_left;
  330. memset(&txctl, 0, sizeof(txctl));
  331. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  332. memset(tx_info, 0, sizeof(*tx_info));
  333. tx_info->band = hw->conf.channel->band;
  334. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  335. tx_info->control.rates[0].idx = 0;
  336. tx_info->control.rates[0].count = 1;
  337. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  338. tx_info->control.rates[1].idx = -1;
  339. init_completion(&sc->paprd_complete);
  340. txctl.paprd = BIT(chain);
  341. if (ath_tx_start(hw, skb, &txctl) != 0) {
  342. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  343. dev_kfree_skb_any(skb);
  344. return false;
  345. }
  346. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  347. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  348. if (!time_left)
  349. ath_dbg(common, ATH_DBG_CALIBRATE,
  350. "Timeout waiting for paprd training on TX chain %d\n",
  351. chain);
  352. return !!time_left;
  353. }
  354. void ath_paprd_calibrate(struct work_struct *work)
  355. {
  356. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  357. struct ieee80211_hw *hw = sc->hw;
  358. struct ath_hw *ah = sc->sc_ah;
  359. struct ieee80211_hdr *hdr;
  360. struct sk_buff *skb = NULL;
  361. struct ath9k_hw_cal_data *caldata = ah->caldata;
  362. struct ath_common *common = ath9k_hw_common(ah);
  363. int ftype;
  364. int chain_ok = 0;
  365. int chain;
  366. int len = 1800;
  367. if (!caldata)
  368. return;
  369. ath9k_ps_wakeup(sc);
  370. if (ar9003_paprd_init_table(ah) < 0)
  371. goto fail_paprd;
  372. skb = alloc_skb(len, GFP_KERNEL);
  373. if (!skb)
  374. goto fail_paprd;
  375. skb_put(skb, len);
  376. memset(skb->data, 0, len);
  377. hdr = (struct ieee80211_hdr *)skb->data;
  378. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  379. hdr->frame_control = cpu_to_le16(ftype);
  380. hdr->duration_id = cpu_to_le16(10);
  381. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  382. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  383. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  384. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  385. if (!(ah->txchainmask & BIT(chain)))
  386. continue;
  387. chain_ok = 0;
  388. ath_dbg(common, ATH_DBG_CALIBRATE,
  389. "Sending PAPRD frame for thermal measurement "
  390. "on chain %d\n", chain);
  391. if (!ath_paprd_send_frame(sc, skb, chain))
  392. goto fail_paprd;
  393. ar9003_paprd_setup_gain_table(ah, chain);
  394. ath_dbg(common, ATH_DBG_CALIBRATE,
  395. "Sending PAPRD training frame on chain %d\n", chain);
  396. if (!ath_paprd_send_frame(sc, skb, chain))
  397. goto fail_paprd;
  398. if (!ar9003_paprd_is_done(ah)) {
  399. ath_dbg(common, ATH_DBG_CALIBRATE,
  400. "PAPRD not yet done on chain %d\n", chain);
  401. break;
  402. }
  403. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  404. ath_dbg(common, ATH_DBG_CALIBRATE,
  405. "PAPRD create curve failed on chain %d\n",
  406. chain);
  407. break;
  408. }
  409. chain_ok = 1;
  410. }
  411. kfree_skb(skb);
  412. if (chain_ok) {
  413. caldata->paprd_done = true;
  414. ath_paprd_activate(sc);
  415. }
  416. fail_paprd:
  417. ath9k_ps_restore(sc);
  418. }
  419. /*
  420. * This routine performs the periodic noise floor calibration function
  421. * that is used to adjust and optimize the chip performance. This
  422. * takes environmental changes (location, temperature) into account.
  423. * When the task is complete, it reschedules itself depending on the
  424. * appropriate interval that was calculated.
  425. */
  426. void ath_ani_calibrate(unsigned long data)
  427. {
  428. struct ath_softc *sc = (struct ath_softc *)data;
  429. struct ath_hw *ah = sc->sc_ah;
  430. struct ath_common *common = ath9k_hw_common(ah);
  431. bool longcal = false;
  432. bool shortcal = false;
  433. bool aniflag = false;
  434. unsigned int timestamp = jiffies_to_msecs(jiffies);
  435. u32 cal_interval, short_cal_interval, long_cal_interval;
  436. unsigned long flags;
  437. if (ah->caldata && ah->caldata->nfcal_interference)
  438. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  439. else
  440. long_cal_interval = ATH_LONG_CALINTERVAL;
  441. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  442. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  443. /* Only calibrate if awake */
  444. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  445. goto set_timer;
  446. ath9k_ps_wakeup(sc);
  447. /* Long calibration runs independently of short calibration. */
  448. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  449. longcal = true;
  450. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  451. common->ani.longcal_timer = timestamp;
  452. }
  453. /* Short calibration applies only while caldone is false */
  454. if (!common->ani.caldone) {
  455. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  456. shortcal = true;
  457. ath_dbg(common, ATH_DBG_ANI,
  458. "shortcal @%lu\n", jiffies);
  459. common->ani.shortcal_timer = timestamp;
  460. common->ani.resetcal_timer = timestamp;
  461. }
  462. } else {
  463. if ((timestamp - common->ani.resetcal_timer) >=
  464. ATH_RESTART_CALINTERVAL) {
  465. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  466. if (common->ani.caldone)
  467. common->ani.resetcal_timer = timestamp;
  468. }
  469. }
  470. /* Verify whether we must check ANI */
  471. if ((timestamp - common->ani.checkani_timer) >=
  472. ah->config.ani_poll_interval) {
  473. aniflag = true;
  474. common->ani.checkani_timer = timestamp;
  475. }
  476. /* Call ANI routine if necessary */
  477. if (aniflag) {
  478. spin_lock_irqsave(&common->cc_lock, flags);
  479. ath9k_hw_ani_monitor(ah, ah->curchan);
  480. ath_update_survey_stats(sc);
  481. spin_unlock_irqrestore(&common->cc_lock, flags);
  482. }
  483. /* Perform calibration if necessary */
  484. if (longcal || shortcal) {
  485. common->ani.caldone =
  486. ath9k_hw_calibrate(ah, ah->curchan,
  487. ah->rxchainmask, longcal);
  488. }
  489. ath9k_ps_restore(sc);
  490. set_timer:
  491. /*
  492. * Set timer interval based on previous results.
  493. * The interval must be the shortest necessary to satisfy ANI,
  494. * short calibration and long calibration.
  495. */
  496. ath9k_debug_samp_bb_mac(sc);
  497. cal_interval = ATH_LONG_CALINTERVAL;
  498. if (sc->sc_ah->config.enable_ani)
  499. cal_interval = min(cal_interval,
  500. (u32)ah->config.ani_poll_interval);
  501. if (!common->ani.caldone)
  502. cal_interval = min(cal_interval, (u32)short_cal_interval);
  503. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  504. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  505. if (!ah->caldata->paprd_done)
  506. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  507. else if (!ah->paprd_table_write_done)
  508. ath_paprd_activate(sc);
  509. }
  510. }
  511. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  512. {
  513. struct ath_node *an;
  514. an = (struct ath_node *)sta->drv_priv;
  515. #ifdef CONFIG_ATH9K_DEBUGFS
  516. spin_lock(&sc->nodes_lock);
  517. list_add(&an->list, &sc->nodes);
  518. spin_unlock(&sc->nodes_lock);
  519. an->sta = sta;
  520. #endif
  521. if (sc->sc_flags & SC_OP_TXAGGR) {
  522. ath_tx_node_init(sc, an);
  523. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  524. sta->ht_cap.ampdu_factor);
  525. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  526. }
  527. }
  528. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  529. {
  530. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  531. #ifdef CONFIG_ATH9K_DEBUGFS
  532. spin_lock(&sc->nodes_lock);
  533. list_del(&an->list);
  534. spin_unlock(&sc->nodes_lock);
  535. an->sta = NULL;
  536. #endif
  537. if (sc->sc_flags & SC_OP_TXAGGR)
  538. ath_tx_node_cleanup(sc, an);
  539. }
  540. void ath9k_tasklet(unsigned long data)
  541. {
  542. struct ath_softc *sc = (struct ath_softc *)data;
  543. struct ath_hw *ah = sc->sc_ah;
  544. struct ath_common *common = ath9k_hw_common(ah);
  545. u32 status = sc->intrstatus;
  546. u32 rxmask;
  547. if ((status & ATH9K_INT_FATAL) ||
  548. (status & ATH9K_INT_BB_WATCHDOG)) {
  549. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  550. return;
  551. }
  552. ath9k_ps_wakeup(sc);
  553. spin_lock(&sc->sc_pcu_lock);
  554. /*
  555. * Only run the baseband hang check if beacons stop working in AP or
  556. * IBSS mode, because it has a high false positive rate. For station
  557. * mode it should not be necessary, since the upper layers will detect
  558. * this through a beacon miss automatically and the following channel
  559. * change will trigger a hardware reset anyway
  560. */
  561. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  562. !ath9k_hw_check_alive(ah))
  563. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  564. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  565. /*
  566. * TSF sync does not look correct; remain awake to sync with
  567. * the next Beacon.
  568. */
  569. ath_dbg(common, ATH_DBG_PS,
  570. "TSFOOR - Sync with next Beacon\n");
  571. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  572. }
  573. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  574. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  575. ATH9K_INT_RXORN);
  576. else
  577. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  578. if (status & rxmask) {
  579. /* Check for high priority Rx first */
  580. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  581. (status & ATH9K_INT_RXHP))
  582. ath_rx_tasklet(sc, 0, true);
  583. ath_rx_tasklet(sc, 0, false);
  584. }
  585. if (status & ATH9K_INT_TX) {
  586. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  587. ath_tx_edma_tasklet(sc);
  588. else
  589. ath_tx_tasklet(sc);
  590. }
  591. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  592. if (status & ATH9K_INT_GENTIMER)
  593. ath_gen_timer_isr(sc->sc_ah);
  594. /* re-enable hardware interrupt */
  595. ath9k_hw_enable_interrupts(ah);
  596. spin_unlock(&sc->sc_pcu_lock);
  597. ath9k_ps_restore(sc);
  598. }
  599. irqreturn_t ath_isr(int irq, void *dev)
  600. {
  601. #define SCHED_INTR ( \
  602. ATH9K_INT_FATAL | \
  603. ATH9K_INT_BB_WATCHDOG | \
  604. ATH9K_INT_RXORN | \
  605. ATH9K_INT_RXEOL | \
  606. ATH9K_INT_RX | \
  607. ATH9K_INT_RXLP | \
  608. ATH9K_INT_RXHP | \
  609. ATH9K_INT_TX | \
  610. ATH9K_INT_BMISS | \
  611. ATH9K_INT_CST | \
  612. ATH9K_INT_TSFOOR | \
  613. ATH9K_INT_GENTIMER)
  614. struct ath_softc *sc = dev;
  615. struct ath_hw *ah = sc->sc_ah;
  616. struct ath_common *common = ath9k_hw_common(ah);
  617. enum ath9k_int status;
  618. bool sched = false;
  619. /*
  620. * The hardware is not ready/present, don't
  621. * touch anything. Note this can happen early
  622. * on if the IRQ is shared.
  623. */
  624. if (sc->sc_flags & SC_OP_INVALID)
  625. return IRQ_NONE;
  626. /* shared irq, not for us */
  627. if (!ath9k_hw_intrpend(ah))
  628. return IRQ_NONE;
  629. /*
  630. * Figure out the reason(s) for the interrupt. Note
  631. * that the hal returns a pseudo-ISR that may include
  632. * bits we haven't explicitly enabled so we mask the
  633. * value to insure we only process bits we requested.
  634. */
  635. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  636. status &= ah->imask; /* discard unasked-for bits */
  637. /*
  638. * If there are no status bits set, then this interrupt was not
  639. * for me (should have been caught above).
  640. */
  641. if (!status)
  642. return IRQ_NONE;
  643. /* Cache the status */
  644. sc->intrstatus = status;
  645. if (status & SCHED_INTR)
  646. sched = true;
  647. /*
  648. * If a FATAL or RXORN interrupt is received, we have to reset the
  649. * chip immediately.
  650. */
  651. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  652. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  653. goto chip_reset;
  654. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  655. (status & ATH9K_INT_BB_WATCHDOG)) {
  656. spin_lock(&common->cc_lock);
  657. ath_hw_cycle_counters_update(common);
  658. ar9003_hw_bb_watchdog_dbg_info(ah);
  659. spin_unlock(&common->cc_lock);
  660. goto chip_reset;
  661. }
  662. if (status & ATH9K_INT_SWBA)
  663. tasklet_schedule(&sc->bcon_tasklet);
  664. if (status & ATH9K_INT_TXURN)
  665. ath9k_hw_updatetxtriglevel(ah, true);
  666. if (status & ATH9K_INT_RXEOL) {
  667. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  668. ath9k_hw_set_interrupts(ah, ah->imask);
  669. }
  670. if (status & ATH9K_INT_MIB) {
  671. /*
  672. * Disable interrupts until we service the MIB
  673. * interrupt; otherwise it will continue to
  674. * fire.
  675. */
  676. ath9k_hw_disable_interrupts(ah);
  677. /*
  678. * Let the hal handle the event. We assume
  679. * it will clear whatever condition caused
  680. * the interrupt.
  681. */
  682. spin_lock(&common->cc_lock);
  683. ath9k_hw_proc_mib_event(ah);
  684. spin_unlock(&common->cc_lock);
  685. ath9k_hw_enable_interrupts(ah);
  686. }
  687. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  688. if (status & ATH9K_INT_TIM_TIMER) {
  689. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  690. goto chip_reset;
  691. /* Clear RxAbort bit so that we can
  692. * receive frames */
  693. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  694. ath9k_hw_setrxabort(sc->sc_ah, 0);
  695. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  696. }
  697. chip_reset:
  698. ath_debug_stat_interrupt(sc, status);
  699. if (sched) {
  700. /* turn off every interrupt */
  701. ath9k_hw_disable_interrupts(ah);
  702. tasklet_schedule(&sc->intr_tq);
  703. }
  704. return IRQ_HANDLED;
  705. #undef SCHED_INTR
  706. }
  707. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  708. {
  709. struct ath_hw *ah = sc->sc_ah;
  710. struct ath_common *common = ath9k_hw_common(ah);
  711. struct ieee80211_channel *channel = hw->conf.channel;
  712. int r;
  713. ath9k_ps_wakeup(sc);
  714. spin_lock_bh(&sc->sc_pcu_lock);
  715. atomic_set(&ah->intr_ref_cnt, -1);
  716. ath9k_hw_configpcipowersave(ah, false);
  717. if (!ah->curchan)
  718. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  719. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  720. if (r) {
  721. ath_err(common,
  722. "Unable to reset channel (%u MHz), reset status %d\n",
  723. channel->center_freq, r);
  724. }
  725. ath_complete_reset(sc, true);
  726. /* Enable LED */
  727. ath9k_hw_cfg_output(ah, ah->led_pin,
  728. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  729. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  730. spin_unlock_bh(&sc->sc_pcu_lock);
  731. ath9k_ps_restore(sc);
  732. }
  733. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  734. {
  735. struct ath_hw *ah = sc->sc_ah;
  736. struct ieee80211_channel *channel = hw->conf.channel;
  737. int r;
  738. ath9k_ps_wakeup(sc);
  739. ath_cancel_work(sc);
  740. spin_lock_bh(&sc->sc_pcu_lock);
  741. /*
  742. * Keep the LED on when the radio is disabled
  743. * during idle unassociated state.
  744. */
  745. if (!sc->ps_idle) {
  746. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  747. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  748. }
  749. ath_prepare_reset(sc, false, true);
  750. if (!ah->curchan)
  751. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  752. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  753. if (r) {
  754. ath_err(ath9k_hw_common(sc->sc_ah),
  755. "Unable to reset channel (%u MHz), reset status %d\n",
  756. channel->center_freq, r);
  757. }
  758. ath9k_hw_phy_disable(ah);
  759. ath9k_hw_configpcipowersave(ah, true);
  760. spin_unlock_bh(&sc->sc_pcu_lock);
  761. ath9k_ps_restore(sc);
  762. }
  763. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  764. {
  765. int r;
  766. ath9k_ps_wakeup(sc);
  767. r = ath_reset_internal(sc, NULL, retry_tx);
  768. if (retry_tx) {
  769. int i;
  770. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  771. if (ATH_TXQ_SETUP(sc, i)) {
  772. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  773. ath_txq_schedule(sc, &sc->tx.txq[i]);
  774. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  775. }
  776. }
  777. }
  778. ath9k_ps_restore(sc);
  779. return r;
  780. }
  781. void ath_reset_work(struct work_struct *work)
  782. {
  783. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  784. ath_reset(sc, true);
  785. }
  786. void ath_hw_check(struct work_struct *work)
  787. {
  788. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  789. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  790. unsigned long flags;
  791. int busy;
  792. ath9k_ps_wakeup(sc);
  793. if (ath9k_hw_check_alive(sc->sc_ah))
  794. goto out;
  795. spin_lock_irqsave(&common->cc_lock, flags);
  796. busy = ath_update_survey_stats(sc);
  797. spin_unlock_irqrestore(&common->cc_lock, flags);
  798. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  799. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  800. if (busy >= 99) {
  801. if (++sc->hw_busy_count >= 3)
  802. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  803. } else if (busy >= 0)
  804. sc->hw_busy_count = 0;
  805. out:
  806. ath9k_ps_restore(sc);
  807. }
  808. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  809. {
  810. static int count;
  811. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  812. if (pll_sqsum >= 0x40000) {
  813. count++;
  814. if (count == 3) {
  815. /* Rx is hung for more than 500ms. Reset it */
  816. ath_dbg(common, ATH_DBG_RESET,
  817. "Possible RX hang, resetting");
  818. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  819. count = 0;
  820. }
  821. } else
  822. count = 0;
  823. }
  824. void ath_hw_pll_work(struct work_struct *work)
  825. {
  826. struct ath_softc *sc = container_of(work, struct ath_softc,
  827. hw_pll_work.work);
  828. u32 pll_sqsum;
  829. if (AR_SREV_9485(sc->sc_ah)) {
  830. ath9k_ps_wakeup(sc);
  831. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  832. ath9k_ps_restore(sc);
  833. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  834. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  835. }
  836. }
  837. /**********************/
  838. /* mac80211 callbacks */
  839. /**********************/
  840. static int ath9k_start(struct ieee80211_hw *hw)
  841. {
  842. struct ath_softc *sc = hw->priv;
  843. struct ath_hw *ah = sc->sc_ah;
  844. struct ath_common *common = ath9k_hw_common(ah);
  845. struct ieee80211_channel *curchan = hw->conf.channel;
  846. struct ath9k_channel *init_channel;
  847. int r;
  848. ath_dbg(common, ATH_DBG_CONFIG,
  849. "Starting driver with initial channel: %d MHz\n",
  850. curchan->center_freq);
  851. ath9k_ps_wakeup(sc);
  852. mutex_lock(&sc->mutex);
  853. /* setup initial channel */
  854. sc->chan_idx = curchan->hw_value;
  855. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  856. /* Reset SERDES registers */
  857. ath9k_hw_configpcipowersave(ah, false);
  858. /*
  859. * The basic interface to setting the hardware in a good
  860. * state is ``reset''. On return the hardware is known to
  861. * be powered up and with interrupts disabled. This must
  862. * be followed by initialization of the appropriate bits
  863. * and then setup of the interrupt mask.
  864. */
  865. spin_lock_bh(&sc->sc_pcu_lock);
  866. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  867. if (r) {
  868. ath_err(common,
  869. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  870. r, curchan->center_freq);
  871. spin_unlock_bh(&sc->sc_pcu_lock);
  872. goto mutex_unlock;
  873. }
  874. /* Setup our intr mask. */
  875. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  876. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  877. ATH9K_INT_GLOBAL;
  878. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  879. ah->imask |= ATH9K_INT_RXHP |
  880. ATH9K_INT_RXLP |
  881. ATH9K_INT_BB_WATCHDOG;
  882. else
  883. ah->imask |= ATH9K_INT_RX;
  884. ah->imask |= ATH9K_INT_GTT;
  885. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  886. ah->imask |= ATH9K_INT_CST;
  887. sc->sc_flags &= ~SC_OP_INVALID;
  888. sc->sc_ah->is_monitoring = false;
  889. /* Disable BMISS interrupt when we're not associated */
  890. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  891. if (!ath_complete_reset(sc, false)) {
  892. r = -EIO;
  893. spin_unlock_bh(&sc->sc_pcu_lock);
  894. goto mutex_unlock;
  895. }
  896. spin_unlock_bh(&sc->sc_pcu_lock);
  897. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  898. !ah->btcoex_hw.enabled) {
  899. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  900. AR_STOMP_LOW_WLAN_WGHT);
  901. ath9k_hw_btcoex_enable(ah);
  902. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  903. ath9k_btcoex_timer_resume(sc);
  904. }
  905. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  906. common->bus_ops->extn_synch_en(common);
  907. mutex_unlock:
  908. mutex_unlock(&sc->mutex);
  909. ath9k_ps_restore(sc);
  910. return r;
  911. }
  912. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  913. {
  914. struct ath_softc *sc = hw->priv;
  915. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  916. struct ath_tx_control txctl;
  917. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  918. if (sc->ps_enabled) {
  919. /*
  920. * mac80211 does not set PM field for normal data frames, so we
  921. * need to update that based on the current PS mode.
  922. */
  923. if (ieee80211_is_data(hdr->frame_control) &&
  924. !ieee80211_is_nullfunc(hdr->frame_control) &&
  925. !ieee80211_has_pm(hdr->frame_control)) {
  926. ath_dbg(common, ATH_DBG_PS,
  927. "Add PM=1 for a TX frame while in PS mode\n");
  928. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  929. }
  930. }
  931. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  932. /*
  933. * We are using PS-Poll and mac80211 can request TX while in
  934. * power save mode. Need to wake up hardware for the TX to be
  935. * completed and if needed, also for RX of buffered frames.
  936. */
  937. ath9k_ps_wakeup(sc);
  938. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  939. ath9k_hw_setrxabort(sc->sc_ah, 0);
  940. if (ieee80211_is_pspoll(hdr->frame_control)) {
  941. ath_dbg(common, ATH_DBG_PS,
  942. "Sending PS-Poll to pick a buffered frame\n");
  943. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  944. } else {
  945. ath_dbg(common, ATH_DBG_PS,
  946. "Wake up to complete TX\n");
  947. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  948. }
  949. /*
  950. * The actual restore operation will happen only after
  951. * the sc_flags bit is cleared. We are just dropping
  952. * the ps_usecount here.
  953. */
  954. ath9k_ps_restore(sc);
  955. }
  956. memset(&txctl, 0, sizeof(struct ath_tx_control));
  957. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  958. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  959. if (ath_tx_start(hw, skb, &txctl) != 0) {
  960. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  961. goto exit;
  962. }
  963. return;
  964. exit:
  965. dev_kfree_skb_any(skb);
  966. }
  967. static void ath9k_stop(struct ieee80211_hw *hw)
  968. {
  969. struct ath_softc *sc = hw->priv;
  970. struct ath_hw *ah = sc->sc_ah;
  971. struct ath_common *common = ath9k_hw_common(ah);
  972. mutex_lock(&sc->mutex);
  973. ath_cancel_work(sc);
  974. if (sc->sc_flags & SC_OP_INVALID) {
  975. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  976. mutex_unlock(&sc->mutex);
  977. return;
  978. }
  979. /* Ensure HW is awake when we try to shut it down. */
  980. ath9k_ps_wakeup(sc);
  981. if (ah->btcoex_hw.enabled) {
  982. ath9k_hw_btcoex_disable(ah);
  983. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  984. ath9k_btcoex_timer_pause(sc);
  985. }
  986. spin_lock_bh(&sc->sc_pcu_lock);
  987. /* prevent tasklets to enable interrupts once we disable them */
  988. ah->imask &= ~ATH9K_INT_GLOBAL;
  989. /* make sure h/w will not generate any interrupt
  990. * before setting the invalid flag. */
  991. ath9k_hw_disable_interrupts(ah);
  992. if (!(sc->sc_flags & SC_OP_INVALID)) {
  993. ath_drain_all_txq(sc, false);
  994. ath_stoprecv(sc);
  995. ath9k_hw_phy_disable(ah);
  996. } else
  997. sc->rx.rxlink = NULL;
  998. if (sc->rx.frag) {
  999. dev_kfree_skb_any(sc->rx.frag);
  1000. sc->rx.frag = NULL;
  1001. }
  1002. /* disable HAL and put h/w to sleep */
  1003. ath9k_hw_disable(ah);
  1004. spin_unlock_bh(&sc->sc_pcu_lock);
  1005. /* we can now sync irq and kill any running tasklets, since we already
  1006. * disabled interrupts and not holding a spin lock */
  1007. synchronize_irq(sc->irq);
  1008. tasklet_kill(&sc->intr_tq);
  1009. tasklet_kill(&sc->bcon_tasklet);
  1010. ath9k_ps_restore(sc);
  1011. sc->ps_idle = true;
  1012. ath_radio_disable(sc, hw);
  1013. sc->sc_flags |= SC_OP_INVALID;
  1014. mutex_unlock(&sc->mutex);
  1015. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1016. }
  1017. bool ath9k_uses_beacons(int type)
  1018. {
  1019. switch (type) {
  1020. case NL80211_IFTYPE_AP:
  1021. case NL80211_IFTYPE_ADHOC:
  1022. case NL80211_IFTYPE_MESH_POINT:
  1023. return true;
  1024. default:
  1025. return false;
  1026. }
  1027. }
  1028. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1029. struct ieee80211_vif *vif)
  1030. {
  1031. struct ath_vif *avp = (void *)vif->drv_priv;
  1032. ath9k_set_beaconing_status(sc, false);
  1033. ath_beacon_return(sc, avp);
  1034. ath9k_set_beaconing_status(sc, true);
  1035. sc->sc_flags &= ~SC_OP_BEACONS;
  1036. }
  1037. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1038. {
  1039. struct ath9k_vif_iter_data *iter_data = data;
  1040. int i;
  1041. if (iter_data->hw_macaddr)
  1042. for (i = 0; i < ETH_ALEN; i++)
  1043. iter_data->mask[i] &=
  1044. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1045. switch (vif->type) {
  1046. case NL80211_IFTYPE_AP:
  1047. iter_data->naps++;
  1048. break;
  1049. case NL80211_IFTYPE_STATION:
  1050. iter_data->nstations++;
  1051. break;
  1052. case NL80211_IFTYPE_ADHOC:
  1053. iter_data->nadhocs++;
  1054. break;
  1055. case NL80211_IFTYPE_MESH_POINT:
  1056. iter_data->nmeshes++;
  1057. break;
  1058. case NL80211_IFTYPE_WDS:
  1059. iter_data->nwds++;
  1060. break;
  1061. default:
  1062. iter_data->nothers++;
  1063. break;
  1064. }
  1065. }
  1066. /* Called with sc->mutex held. */
  1067. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1068. struct ieee80211_vif *vif,
  1069. struct ath9k_vif_iter_data *iter_data)
  1070. {
  1071. struct ath_softc *sc = hw->priv;
  1072. struct ath_hw *ah = sc->sc_ah;
  1073. struct ath_common *common = ath9k_hw_common(ah);
  1074. /*
  1075. * Use the hardware MAC address as reference, the hardware uses it
  1076. * together with the BSSID mask when matching addresses.
  1077. */
  1078. memset(iter_data, 0, sizeof(*iter_data));
  1079. iter_data->hw_macaddr = common->macaddr;
  1080. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1081. if (vif)
  1082. ath9k_vif_iter(iter_data, vif->addr, vif);
  1083. /* Get list of all active MAC addresses */
  1084. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1085. iter_data);
  1086. }
  1087. /* Called with sc->mutex held. */
  1088. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1089. struct ieee80211_vif *vif)
  1090. {
  1091. struct ath_softc *sc = hw->priv;
  1092. struct ath_hw *ah = sc->sc_ah;
  1093. struct ath_common *common = ath9k_hw_common(ah);
  1094. struct ath9k_vif_iter_data iter_data;
  1095. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1096. /* Set BSSID mask. */
  1097. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1098. ath_hw_setbssidmask(common);
  1099. /* Set op-mode & TSF */
  1100. if (iter_data.naps > 0) {
  1101. ath9k_hw_set_tsfadjust(ah, 1);
  1102. sc->sc_flags |= SC_OP_TSF_RESET;
  1103. ah->opmode = NL80211_IFTYPE_AP;
  1104. } else {
  1105. ath9k_hw_set_tsfadjust(ah, 0);
  1106. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1107. if (iter_data.nmeshes)
  1108. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1109. else if (iter_data.nwds)
  1110. ah->opmode = NL80211_IFTYPE_AP;
  1111. else if (iter_data.nadhocs)
  1112. ah->opmode = NL80211_IFTYPE_ADHOC;
  1113. else
  1114. ah->opmode = NL80211_IFTYPE_STATION;
  1115. }
  1116. /*
  1117. * Enable MIB interrupts when there are hardware phy counters.
  1118. */
  1119. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1120. if (ah->config.enable_ani)
  1121. ah->imask |= ATH9K_INT_MIB;
  1122. ah->imask |= ATH9K_INT_TSFOOR;
  1123. } else {
  1124. ah->imask &= ~ATH9K_INT_MIB;
  1125. ah->imask &= ~ATH9K_INT_TSFOOR;
  1126. }
  1127. ath9k_hw_set_interrupts(ah, ah->imask);
  1128. /* Set up ANI */
  1129. if (iter_data.naps > 0) {
  1130. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1131. if (!common->disable_ani) {
  1132. sc->sc_flags |= SC_OP_ANI_RUN;
  1133. ath_start_ani(common);
  1134. }
  1135. } else {
  1136. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1137. del_timer_sync(&common->ani.timer);
  1138. }
  1139. }
  1140. /* Called with sc->mutex held, vif counts set up properly. */
  1141. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1142. struct ieee80211_vif *vif)
  1143. {
  1144. struct ath_softc *sc = hw->priv;
  1145. ath9k_calculate_summary_state(hw, vif);
  1146. if (ath9k_uses_beacons(vif->type)) {
  1147. int error;
  1148. /* This may fail because upper levels do not have beacons
  1149. * properly configured yet. That's OK, we assume it
  1150. * will be properly configured and then we will be notified
  1151. * in the info_changed method and set up beacons properly
  1152. * there.
  1153. */
  1154. ath9k_set_beaconing_status(sc, false);
  1155. error = ath_beacon_alloc(sc, vif);
  1156. if (!error)
  1157. ath_beacon_config(sc, vif);
  1158. ath9k_set_beaconing_status(sc, true);
  1159. }
  1160. }
  1161. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1162. struct ieee80211_vif *vif)
  1163. {
  1164. struct ath_softc *sc = hw->priv;
  1165. struct ath_hw *ah = sc->sc_ah;
  1166. struct ath_common *common = ath9k_hw_common(ah);
  1167. int ret = 0;
  1168. ath9k_ps_wakeup(sc);
  1169. mutex_lock(&sc->mutex);
  1170. switch (vif->type) {
  1171. case NL80211_IFTYPE_STATION:
  1172. case NL80211_IFTYPE_WDS:
  1173. case NL80211_IFTYPE_ADHOC:
  1174. case NL80211_IFTYPE_AP:
  1175. case NL80211_IFTYPE_MESH_POINT:
  1176. break;
  1177. default:
  1178. ath_err(common, "Interface type %d not yet supported\n",
  1179. vif->type);
  1180. ret = -EOPNOTSUPP;
  1181. goto out;
  1182. }
  1183. if (ath9k_uses_beacons(vif->type)) {
  1184. if (sc->nbcnvifs >= ATH_BCBUF) {
  1185. ath_err(common, "Not enough beacon buffers when adding"
  1186. " new interface of type: %i\n",
  1187. vif->type);
  1188. ret = -ENOBUFS;
  1189. goto out;
  1190. }
  1191. }
  1192. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1193. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1194. sc->nvifs > 0)) {
  1195. ath_err(common, "Cannot create ADHOC interface when other"
  1196. " interfaces already exist.\n");
  1197. ret = -EINVAL;
  1198. goto out;
  1199. }
  1200. ath_dbg(common, ATH_DBG_CONFIG,
  1201. "Attach a VIF of type: %d\n", vif->type);
  1202. sc->nvifs++;
  1203. ath9k_do_vif_add_setup(hw, vif);
  1204. out:
  1205. mutex_unlock(&sc->mutex);
  1206. ath9k_ps_restore(sc);
  1207. return ret;
  1208. }
  1209. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1210. struct ieee80211_vif *vif,
  1211. enum nl80211_iftype new_type,
  1212. bool p2p)
  1213. {
  1214. struct ath_softc *sc = hw->priv;
  1215. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1216. int ret = 0;
  1217. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1218. mutex_lock(&sc->mutex);
  1219. ath9k_ps_wakeup(sc);
  1220. /* See if new interface type is valid. */
  1221. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1222. (sc->nvifs > 1)) {
  1223. ath_err(common, "When using ADHOC, it must be the only"
  1224. " interface.\n");
  1225. ret = -EINVAL;
  1226. goto out;
  1227. }
  1228. if (ath9k_uses_beacons(new_type) &&
  1229. !ath9k_uses_beacons(vif->type)) {
  1230. if (sc->nbcnvifs >= ATH_BCBUF) {
  1231. ath_err(common, "No beacon slot available\n");
  1232. ret = -ENOBUFS;
  1233. goto out;
  1234. }
  1235. }
  1236. /* Clean up old vif stuff */
  1237. if (ath9k_uses_beacons(vif->type))
  1238. ath9k_reclaim_beacon(sc, vif);
  1239. /* Add new settings */
  1240. vif->type = new_type;
  1241. vif->p2p = p2p;
  1242. ath9k_do_vif_add_setup(hw, vif);
  1243. out:
  1244. ath9k_ps_restore(sc);
  1245. mutex_unlock(&sc->mutex);
  1246. return ret;
  1247. }
  1248. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1249. struct ieee80211_vif *vif)
  1250. {
  1251. struct ath_softc *sc = hw->priv;
  1252. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1253. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1254. ath9k_ps_wakeup(sc);
  1255. mutex_lock(&sc->mutex);
  1256. sc->nvifs--;
  1257. /* Reclaim beacon resources */
  1258. if (ath9k_uses_beacons(vif->type))
  1259. ath9k_reclaim_beacon(sc, vif);
  1260. ath9k_calculate_summary_state(hw, NULL);
  1261. mutex_unlock(&sc->mutex);
  1262. ath9k_ps_restore(sc);
  1263. }
  1264. static void ath9k_enable_ps(struct ath_softc *sc)
  1265. {
  1266. struct ath_hw *ah = sc->sc_ah;
  1267. sc->ps_enabled = true;
  1268. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1269. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1270. ah->imask |= ATH9K_INT_TIM_TIMER;
  1271. ath9k_hw_set_interrupts(ah, ah->imask);
  1272. }
  1273. ath9k_hw_setrxabort(ah, 1);
  1274. }
  1275. }
  1276. static void ath9k_disable_ps(struct ath_softc *sc)
  1277. {
  1278. struct ath_hw *ah = sc->sc_ah;
  1279. sc->ps_enabled = false;
  1280. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1281. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1282. ath9k_hw_setrxabort(ah, 0);
  1283. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1284. PS_WAIT_FOR_CAB |
  1285. PS_WAIT_FOR_PSPOLL_DATA |
  1286. PS_WAIT_FOR_TX_ACK);
  1287. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1288. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1289. ath9k_hw_set_interrupts(ah, ah->imask);
  1290. }
  1291. }
  1292. }
  1293. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1294. {
  1295. struct ath_softc *sc = hw->priv;
  1296. struct ath_hw *ah = sc->sc_ah;
  1297. struct ath_common *common = ath9k_hw_common(ah);
  1298. struct ieee80211_conf *conf = &hw->conf;
  1299. bool disable_radio = false;
  1300. mutex_lock(&sc->mutex);
  1301. /*
  1302. * Leave this as the first check because we need to turn on the
  1303. * radio if it was disabled before prior to processing the rest
  1304. * of the changes. Likewise we must only disable the radio towards
  1305. * the end.
  1306. */
  1307. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1308. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1309. if (!sc->ps_idle) {
  1310. ath_radio_enable(sc, hw);
  1311. ath_dbg(common, ATH_DBG_CONFIG,
  1312. "not-idle: enabling radio\n");
  1313. } else {
  1314. disable_radio = true;
  1315. }
  1316. }
  1317. /*
  1318. * We just prepare to enable PS. We have to wait until our AP has
  1319. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1320. * those ACKs and end up retransmitting the same null data frames.
  1321. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1322. */
  1323. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1324. unsigned long flags;
  1325. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1326. if (conf->flags & IEEE80211_CONF_PS)
  1327. ath9k_enable_ps(sc);
  1328. else
  1329. ath9k_disable_ps(sc);
  1330. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1331. }
  1332. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1333. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1334. ath_dbg(common, ATH_DBG_CONFIG,
  1335. "Monitor mode is enabled\n");
  1336. sc->sc_ah->is_monitoring = true;
  1337. } else {
  1338. ath_dbg(common, ATH_DBG_CONFIG,
  1339. "Monitor mode is disabled\n");
  1340. sc->sc_ah->is_monitoring = false;
  1341. }
  1342. }
  1343. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1344. struct ieee80211_channel *curchan = hw->conf.channel;
  1345. struct ath9k_channel old_chan;
  1346. int pos = curchan->hw_value;
  1347. int old_pos = -1;
  1348. unsigned long flags;
  1349. if (ah->curchan)
  1350. old_pos = ah->curchan - &ah->channels[0];
  1351. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1352. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1353. else
  1354. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1355. ath_dbg(common, ATH_DBG_CONFIG,
  1356. "Set channel: %d MHz type: %d\n",
  1357. curchan->center_freq, conf->channel_type);
  1358. /* update survey stats for the old channel before switching */
  1359. spin_lock_irqsave(&common->cc_lock, flags);
  1360. ath_update_survey_stats(sc);
  1361. spin_unlock_irqrestore(&common->cc_lock, flags);
  1362. /*
  1363. * Preserve the current channel values, before updating
  1364. * the same channel
  1365. */
  1366. if (old_pos == pos) {
  1367. memcpy(&old_chan, &sc->sc_ah->channels[pos],
  1368. sizeof(struct ath9k_channel));
  1369. ah->curchan = &old_chan;
  1370. }
  1371. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1372. curchan, conf->channel_type);
  1373. /*
  1374. * If the operating channel changes, change the survey in-use flags
  1375. * along with it.
  1376. * Reset the survey data for the new channel, unless we're switching
  1377. * back to the operating channel from an off-channel operation.
  1378. */
  1379. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1380. sc->cur_survey != &sc->survey[pos]) {
  1381. if (sc->cur_survey)
  1382. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1383. sc->cur_survey = &sc->survey[pos];
  1384. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1385. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1386. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1387. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1388. }
  1389. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1390. ath_err(common, "Unable to set channel\n");
  1391. mutex_unlock(&sc->mutex);
  1392. return -EINVAL;
  1393. }
  1394. /*
  1395. * The most recent snapshot of channel->noisefloor for the old
  1396. * channel is only available after the hardware reset. Copy it to
  1397. * the survey stats now.
  1398. */
  1399. if (old_pos >= 0)
  1400. ath_update_survey_nf(sc, old_pos);
  1401. }
  1402. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1403. ath_dbg(common, ATH_DBG_CONFIG,
  1404. "Set power: %d\n", conf->power_level);
  1405. sc->config.txpowlimit = 2 * conf->power_level;
  1406. ath9k_ps_wakeup(sc);
  1407. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1408. sc->config.txpowlimit, &sc->curtxpow);
  1409. ath9k_ps_restore(sc);
  1410. }
  1411. if (disable_radio) {
  1412. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1413. ath_radio_disable(sc, hw);
  1414. }
  1415. mutex_unlock(&sc->mutex);
  1416. return 0;
  1417. }
  1418. #define SUPPORTED_FILTERS \
  1419. (FIF_PROMISC_IN_BSS | \
  1420. FIF_ALLMULTI | \
  1421. FIF_CONTROL | \
  1422. FIF_PSPOLL | \
  1423. FIF_OTHER_BSS | \
  1424. FIF_BCN_PRBRESP_PROMISC | \
  1425. FIF_PROBE_REQ | \
  1426. FIF_FCSFAIL)
  1427. /* FIXME: sc->sc_full_reset ? */
  1428. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1429. unsigned int changed_flags,
  1430. unsigned int *total_flags,
  1431. u64 multicast)
  1432. {
  1433. struct ath_softc *sc = hw->priv;
  1434. u32 rfilt;
  1435. changed_flags &= SUPPORTED_FILTERS;
  1436. *total_flags &= SUPPORTED_FILTERS;
  1437. sc->rx.rxfilter = *total_flags;
  1438. ath9k_ps_wakeup(sc);
  1439. rfilt = ath_calcrxfilter(sc);
  1440. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1441. ath9k_ps_restore(sc);
  1442. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1443. "Set HW RX filter: 0x%x\n", rfilt);
  1444. }
  1445. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1446. struct ieee80211_vif *vif,
  1447. struct ieee80211_sta *sta)
  1448. {
  1449. struct ath_softc *sc = hw->priv;
  1450. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1451. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1452. struct ieee80211_key_conf ps_key = { };
  1453. ath_node_attach(sc, sta);
  1454. if (vif->type != NL80211_IFTYPE_AP &&
  1455. vif->type != NL80211_IFTYPE_AP_VLAN)
  1456. return 0;
  1457. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1458. return 0;
  1459. }
  1460. static void ath9k_del_ps_key(struct ath_softc *sc,
  1461. struct ieee80211_vif *vif,
  1462. struct ieee80211_sta *sta)
  1463. {
  1464. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1465. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1466. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1467. if (!an->ps_key)
  1468. return;
  1469. ath_key_delete(common, &ps_key);
  1470. }
  1471. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1472. struct ieee80211_vif *vif,
  1473. struct ieee80211_sta *sta)
  1474. {
  1475. struct ath_softc *sc = hw->priv;
  1476. ath9k_del_ps_key(sc, vif, sta);
  1477. ath_node_detach(sc, sta);
  1478. return 0;
  1479. }
  1480. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1481. struct ieee80211_vif *vif,
  1482. enum sta_notify_cmd cmd,
  1483. struct ieee80211_sta *sta)
  1484. {
  1485. struct ath_softc *sc = hw->priv;
  1486. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1487. switch (cmd) {
  1488. case STA_NOTIFY_SLEEP:
  1489. an->sleeping = true;
  1490. if (ath_tx_aggr_sleep(sc, an))
  1491. ieee80211_sta_set_tim(sta);
  1492. break;
  1493. case STA_NOTIFY_AWAKE:
  1494. an->sleeping = false;
  1495. ath_tx_aggr_wakeup(sc, an);
  1496. break;
  1497. }
  1498. }
  1499. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1500. const struct ieee80211_tx_queue_params *params)
  1501. {
  1502. struct ath_softc *sc = hw->priv;
  1503. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1504. struct ath_txq *txq;
  1505. struct ath9k_tx_queue_info qi;
  1506. int ret = 0;
  1507. if (queue >= WME_NUM_AC)
  1508. return 0;
  1509. txq = sc->tx.txq_map[queue];
  1510. ath9k_ps_wakeup(sc);
  1511. mutex_lock(&sc->mutex);
  1512. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1513. qi.tqi_aifs = params->aifs;
  1514. qi.tqi_cwmin = params->cw_min;
  1515. qi.tqi_cwmax = params->cw_max;
  1516. qi.tqi_burstTime = params->txop;
  1517. ath_dbg(common, ATH_DBG_CONFIG,
  1518. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1519. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1520. params->cw_max, params->txop);
  1521. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1522. if (ret)
  1523. ath_err(common, "TXQ Update failed\n");
  1524. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1525. if (queue == WME_AC_BE && !ret)
  1526. ath_beaconq_config(sc);
  1527. mutex_unlock(&sc->mutex);
  1528. ath9k_ps_restore(sc);
  1529. return ret;
  1530. }
  1531. static int ath9k_set_key(struct ieee80211_hw *hw,
  1532. enum set_key_cmd cmd,
  1533. struct ieee80211_vif *vif,
  1534. struct ieee80211_sta *sta,
  1535. struct ieee80211_key_conf *key)
  1536. {
  1537. struct ath_softc *sc = hw->priv;
  1538. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1539. int ret = 0;
  1540. if (ath9k_modparam_nohwcrypt)
  1541. return -ENOSPC;
  1542. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1543. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1544. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1545. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1546. /*
  1547. * For now, disable hw crypto for the RSN IBSS group keys. This
  1548. * could be optimized in the future to use a modified key cache
  1549. * design to support per-STA RX GTK, but until that gets
  1550. * implemented, use of software crypto for group addressed
  1551. * frames is a acceptable to allow RSN IBSS to be used.
  1552. */
  1553. return -EOPNOTSUPP;
  1554. }
  1555. mutex_lock(&sc->mutex);
  1556. ath9k_ps_wakeup(sc);
  1557. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1558. switch (cmd) {
  1559. case SET_KEY:
  1560. if (sta)
  1561. ath9k_del_ps_key(sc, vif, sta);
  1562. ret = ath_key_config(common, vif, sta, key);
  1563. if (ret >= 0) {
  1564. key->hw_key_idx = ret;
  1565. /* push IV and Michael MIC generation to stack */
  1566. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1567. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1568. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1569. if (sc->sc_ah->sw_mgmt_crypto &&
  1570. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1571. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1572. ret = 0;
  1573. }
  1574. break;
  1575. case DISABLE_KEY:
  1576. ath_key_delete(common, key);
  1577. break;
  1578. default:
  1579. ret = -EINVAL;
  1580. }
  1581. ath9k_ps_restore(sc);
  1582. mutex_unlock(&sc->mutex);
  1583. return ret;
  1584. }
  1585. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1586. {
  1587. struct ath_softc *sc = data;
  1588. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1589. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1590. struct ath_vif *avp = (void *)vif->drv_priv;
  1591. /*
  1592. * Skip iteration if primary station vif's bss info
  1593. * was not changed
  1594. */
  1595. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1596. return;
  1597. if (bss_conf->assoc) {
  1598. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1599. avp->primary_sta_vif = true;
  1600. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1601. common->curaid = bss_conf->aid;
  1602. ath9k_hw_write_associd(sc->sc_ah);
  1603. ath_dbg(common, ATH_DBG_CONFIG,
  1604. "Bss Info ASSOC %d, bssid: %pM\n",
  1605. bss_conf->aid, common->curbssid);
  1606. ath_beacon_config(sc, vif);
  1607. /*
  1608. * Request a re-configuration of Beacon related timers
  1609. * on the receipt of the first Beacon frame (i.e.,
  1610. * after time sync with the AP).
  1611. */
  1612. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1613. /* Reset rssi stats */
  1614. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1615. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1616. if (!common->disable_ani) {
  1617. sc->sc_flags |= SC_OP_ANI_RUN;
  1618. ath_start_ani(common);
  1619. }
  1620. }
  1621. }
  1622. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1623. {
  1624. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1625. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1626. struct ath_vif *avp = (void *)vif->drv_priv;
  1627. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1628. return;
  1629. /* Reconfigure bss info */
  1630. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1631. ath_dbg(common, ATH_DBG_CONFIG,
  1632. "Bss Info DISASSOC %d, bssid %pM\n",
  1633. common->curaid, common->curbssid);
  1634. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1635. avp->primary_sta_vif = false;
  1636. memset(common->curbssid, 0, ETH_ALEN);
  1637. common->curaid = 0;
  1638. }
  1639. ieee80211_iterate_active_interfaces_atomic(
  1640. sc->hw, ath9k_bss_iter, sc);
  1641. /*
  1642. * None of station vifs are associated.
  1643. * Clear bssid & aid
  1644. */
  1645. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1646. ath9k_hw_write_associd(sc->sc_ah);
  1647. /* Stop ANI */
  1648. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1649. del_timer_sync(&common->ani.timer);
  1650. }
  1651. }
  1652. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1653. struct ieee80211_vif *vif,
  1654. struct ieee80211_bss_conf *bss_conf,
  1655. u32 changed)
  1656. {
  1657. struct ath_softc *sc = hw->priv;
  1658. struct ath_hw *ah = sc->sc_ah;
  1659. struct ath_common *common = ath9k_hw_common(ah);
  1660. struct ath_vif *avp = (void *)vif->drv_priv;
  1661. int slottime;
  1662. int error;
  1663. ath9k_ps_wakeup(sc);
  1664. mutex_lock(&sc->mutex);
  1665. if (changed & BSS_CHANGED_BSSID) {
  1666. ath9k_config_bss(sc, vif);
  1667. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1668. common->curbssid, common->curaid);
  1669. }
  1670. if (changed & BSS_CHANGED_IBSS) {
  1671. /* There can be only one vif available */
  1672. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1673. common->curaid = bss_conf->aid;
  1674. ath9k_hw_write_associd(sc->sc_ah);
  1675. if (bss_conf->ibss_joined) {
  1676. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1677. if (!common->disable_ani) {
  1678. sc->sc_flags |= SC_OP_ANI_RUN;
  1679. ath_start_ani(common);
  1680. }
  1681. } else {
  1682. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1683. del_timer_sync(&common->ani.timer);
  1684. }
  1685. }
  1686. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1687. if ((changed & BSS_CHANGED_BEACON) ||
  1688. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1689. ath9k_set_beaconing_status(sc, false);
  1690. error = ath_beacon_alloc(sc, vif);
  1691. if (!error)
  1692. ath_beacon_config(sc, vif);
  1693. ath9k_set_beaconing_status(sc, true);
  1694. }
  1695. if (changed & BSS_CHANGED_ERP_SLOT) {
  1696. if (bss_conf->use_short_slot)
  1697. slottime = 9;
  1698. else
  1699. slottime = 20;
  1700. if (vif->type == NL80211_IFTYPE_AP) {
  1701. /*
  1702. * Defer update, so that connected stations can adjust
  1703. * their settings at the same time.
  1704. * See beacon.c for more details
  1705. */
  1706. sc->beacon.slottime = slottime;
  1707. sc->beacon.updateslot = UPDATE;
  1708. } else {
  1709. ah->slottime = slottime;
  1710. ath9k_hw_init_global_settings(ah);
  1711. }
  1712. }
  1713. /* Disable transmission of beacons */
  1714. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1715. !bss_conf->enable_beacon) {
  1716. ath9k_set_beaconing_status(sc, false);
  1717. avp->is_bslot_active = false;
  1718. ath9k_set_beaconing_status(sc, true);
  1719. }
  1720. if (changed & BSS_CHANGED_BEACON_INT) {
  1721. /*
  1722. * In case of AP mode, the HW TSF has to be reset
  1723. * when the beacon interval changes.
  1724. */
  1725. if (vif->type == NL80211_IFTYPE_AP) {
  1726. sc->sc_flags |= SC_OP_TSF_RESET;
  1727. ath9k_set_beaconing_status(sc, false);
  1728. error = ath_beacon_alloc(sc, vif);
  1729. if (!error)
  1730. ath_beacon_config(sc, vif);
  1731. ath9k_set_beaconing_status(sc, true);
  1732. } else
  1733. ath_beacon_config(sc, vif);
  1734. }
  1735. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1736. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1737. bss_conf->use_short_preamble);
  1738. if (bss_conf->use_short_preamble)
  1739. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1740. else
  1741. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1742. }
  1743. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1744. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1745. bss_conf->use_cts_prot);
  1746. if (bss_conf->use_cts_prot &&
  1747. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1748. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1749. else
  1750. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1751. }
  1752. mutex_unlock(&sc->mutex);
  1753. ath9k_ps_restore(sc);
  1754. }
  1755. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1756. {
  1757. struct ath_softc *sc = hw->priv;
  1758. u64 tsf;
  1759. mutex_lock(&sc->mutex);
  1760. ath9k_ps_wakeup(sc);
  1761. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1762. ath9k_ps_restore(sc);
  1763. mutex_unlock(&sc->mutex);
  1764. return tsf;
  1765. }
  1766. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1767. {
  1768. struct ath_softc *sc = hw->priv;
  1769. mutex_lock(&sc->mutex);
  1770. ath9k_ps_wakeup(sc);
  1771. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1772. ath9k_ps_restore(sc);
  1773. mutex_unlock(&sc->mutex);
  1774. }
  1775. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1776. {
  1777. struct ath_softc *sc = hw->priv;
  1778. mutex_lock(&sc->mutex);
  1779. ath9k_ps_wakeup(sc);
  1780. ath9k_hw_reset_tsf(sc->sc_ah);
  1781. ath9k_ps_restore(sc);
  1782. mutex_unlock(&sc->mutex);
  1783. }
  1784. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1785. struct ieee80211_vif *vif,
  1786. enum ieee80211_ampdu_mlme_action action,
  1787. struct ieee80211_sta *sta,
  1788. u16 tid, u16 *ssn, u8 buf_size)
  1789. {
  1790. struct ath_softc *sc = hw->priv;
  1791. int ret = 0;
  1792. local_bh_disable();
  1793. switch (action) {
  1794. case IEEE80211_AMPDU_RX_START:
  1795. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1796. ret = -ENOTSUPP;
  1797. break;
  1798. case IEEE80211_AMPDU_RX_STOP:
  1799. break;
  1800. case IEEE80211_AMPDU_TX_START:
  1801. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1802. return -EOPNOTSUPP;
  1803. ath9k_ps_wakeup(sc);
  1804. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1805. if (!ret)
  1806. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1807. ath9k_ps_restore(sc);
  1808. break;
  1809. case IEEE80211_AMPDU_TX_STOP:
  1810. ath9k_ps_wakeup(sc);
  1811. ath_tx_aggr_stop(sc, sta, tid);
  1812. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1813. ath9k_ps_restore(sc);
  1814. break;
  1815. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1816. ath9k_ps_wakeup(sc);
  1817. ath_tx_aggr_resume(sc, sta, tid);
  1818. ath9k_ps_restore(sc);
  1819. break;
  1820. default:
  1821. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1822. }
  1823. local_bh_enable();
  1824. return ret;
  1825. }
  1826. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1827. struct survey_info *survey)
  1828. {
  1829. struct ath_softc *sc = hw->priv;
  1830. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1831. struct ieee80211_supported_band *sband;
  1832. struct ieee80211_channel *chan;
  1833. unsigned long flags;
  1834. int pos;
  1835. spin_lock_irqsave(&common->cc_lock, flags);
  1836. if (idx == 0)
  1837. ath_update_survey_stats(sc);
  1838. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1839. if (sband && idx >= sband->n_channels) {
  1840. idx -= sband->n_channels;
  1841. sband = NULL;
  1842. }
  1843. if (!sband)
  1844. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1845. if (!sband || idx >= sband->n_channels) {
  1846. spin_unlock_irqrestore(&common->cc_lock, flags);
  1847. return -ENOENT;
  1848. }
  1849. chan = &sband->channels[idx];
  1850. pos = chan->hw_value;
  1851. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1852. survey->channel = chan;
  1853. spin_unlock_irqrestore(&common->cc_lock, flags);
  1854. return 0;
  1855. }
  1856. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1857. {
  1858. struct ath_softc *sc = hw->priv;
  1859. struct ath_hw *ah = sc->sc_ah;
  1860. mutex_lock(&sc->mutex);
  1861. ah->coverage_class = coverage_class;
  1862. ath9k_hw_init_global_settings(ah);
  1863. mutex_unlock(&sc->mutex);
  1864. }
  1865. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1866. {
  1867. struct ath_softc *sc = hw->priv;
  1868. struct ath_hw *ah = sc->sc_ah;
  1869. struct ath_common *common = ath9k_hw_common(ah);
  1870. int timeout = 200; /* ms */
  1871. int i, j;
  1872. bool drain_txq;
  1873. mutex_lock(&sc->mutex);
  1874. cancel_delayed_work_sync(&sc->tx_complete_work);
  1875. if (sc->sc_flags & SC_OP_INVALID) {
  1876. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1877. mutex_unlock(&sc->mutex);
  1878. return;
  1879. }
  1880. if (drop)
  1881. timeout = 1;
  1882. for (j = 0; j < timeout; j++) {
  1883. bool npend = false;
  1884. if (j)
  1885. usleep_range(1000, 2000);
  1886. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1887. if (!ATH_TXQ_SETUP(sc, i))
  1888. continue;
  1889. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1890. if (npend)
  1891. break;
  1892. }
  1893. if (!npend)
  1894. goto out;
  1895. }
  1896. ath9k_ps_wakeup(sc);
  1897. spin_lock_bh(&sc->sc_pcu_lock);
  1898. drain_txq = ath_drain_all_txq(sc, false);
  1899. spin_unlock_bh(&sc->sc_pcu_lock);
  1900. if (!drain_txq)
  1901. ath_reset(sc, false);
  1902. ath9k_ps_restore(sc);
  1903. ieee80211_wake_queues(hw);
  1904. out:
  1905. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1906. mutex_unlock(&sc->mutex);
  1907. }
  1908. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1909. {
  1910. struct ath_softc *sc = hw->priv;
  1911. int i;
  1912. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1913. if (!ATH_TXQ_SETUP(sc, i))
  1914. continue;
  1915. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1916. return true;
  1917. }
  1918. return false;
  1919. }
  1920. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1921. {
  1922. struct ath_softc *sc = hw->priv;
  1923. struct ath_hw *ah = sc->sc_ah;
  1924. struct ieee80211_vif *vif;
  1925. struct ath_vif *avp;
  1926. struct ath_buf *bf;
  1927. struct ath_tx_status ts;
  1928. int status;
  1929. vif = sc->beacon.bslot[0];
  1930. if (!vif)
  1931. return 0;
  1932. avp = (void *)vif->drv_priv;
  1933. if (!avp->is_bslot_active)
  1934. return 0;
  1935. if (!sc->beacon.tx_processed) {
  1936. tasklet_disable(&sc->bcon_tasklet);
  1937. bf = avp->av_bcbuf;
  1938. if (!bf || !bf->bf_mpdu)
  1939. goto skip;
  1940. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1941. if (status == -EINPROGRESS)
  1942. goto skip;
  1943. sc->beacon.tx_processed = true;
  1944. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1945. skip:
  1946. tasklet_enable(&sc->bcon_tasklet);
  1947. }
  1948. return sc->beacon.tx_last;
  1949. }
  1950. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1951. struct ieee80211_low_level_stats *stats)
  1952. {
  1953. struct ath_softc *sc = hw->priv;
  1954. struct ath_hw *ah = sc->sc_ah;
  1955. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1956. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1957. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1958. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1959. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1960. return 0;
  1961. }
  1962. static u32 fill_chainmask(u32 cap, u32 new)
  1963. {
  1964. u32 filled = 0;
  1965. int i;
  1966. for (i = 0; cap && new; i++, cap >>= 1) {
  1967. if (!(cap & BIT(0)))
  1968. continue;
  1969. if (new & BIT(0))
  1970. filled |= BIT(i);
  1971. new >>= 1;
  1972. }
  1973. return filled;
  1974. }
  1975. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1976. {
  1977. struct ath_softc *sc = hw->priv;
  1978. struct ath_hw *ah = sc->sc_ah;
  1979. if (!rx_ant || !tx_ant)
  1980. return -EINVAL;
  1981. sc->ant_rx = rx_ant;
  1982. sc->ant_tx = tx_ant;
  1983. if (ah->caps.rx_chainmask == 1)
  1984. return 0;
  1985. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1986. if (AR_SREV_9100(ah))
  1987. ah->rxchainmask = 0x7;
  1988. else
  1989. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1990. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1991. ath9k_reload_chainmask_settings(sc);
  1992. return 0;
  1993. }
  1994. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1995. {
  1996. struct ath_softc *sc = hw->priv;
  1997. *tx_ant = sc->ant_tx;
  1998. *rx_ant = sc->ant_rx;
  1999. return 0;
  2000. }
  2001. struct ieee80211_ops ath9k_ops = {
  2002. .tx = ath9k_tx,
  2003. .start = ath9k_start,
  2004. .stop = ath9k_stop,
  2005. .add_interface = ath9k_add_interface,
  2006. .change_interface = ath9k_change_interface,
  2007. .remove_interface = ath9k_remove_interface,
  2008. .config = ath9k_config,
  2009. .configure_filter = ath9k_configure_filter,
  2010. .sta_add = ath9k_sta_add,
  2011. .sta_remove = ath9k_sta_remove,
  2012. .sta_notify = ath9k_sta_notify,
  2013. .conf_tx = ath9k_conf_tx,
  2014. .bss_info_changed = ath9k_bss_info_changed,
  2015. .set_key = ath9k_set_key,
  2016. .get_tsf = ath9k_get_tsf,
  2017. .set_tsf = ath9k_set_tsf,
  2018. .reset_tsf = ath9k_reset_tsf,
  2019. .ampdu_action = ath9k_ampdu_action,
  2020. .get_survey = ath9k_get_survey,
  2021. .rfkill_poll = ath9k_rfkill_poll_state,
  2022. .set_coverage_class = ath9k_set_coverage_class,
  2023. .flush = ath9k_flush,
  2024. .tx_frames_pending = ath9k_tx_frames_pending,
  2025. .tx_last_beacon = ath9k_tx_last_beacon,
  2026. .get_stats = ath9k_get_stats,
  2027. .set_antenna = ath9k_set_antenna,
  2028. .get_antenna = ath9k_get_antenna,
  2029. };