ab8500.c 24 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. *
  6. * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
  7. * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
  8. *
  9. * AB8500 peripheral regulators
  10. *
  11. * AB8500 supports the following regulators:
  12. * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/err.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/mfd/abx500.h>
  20. #include <linux/mfd/abx500/ab8500.h>
  21. #include <linux/of.h>
  22. #include <linux/regulator/of_regulator.h>
  23. #include <linux/regulator/driver.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/regulator/ab8500.h>
  26. #include <linux/slab.h>
  27. /**
  28. * struct ab8500_regulator_info - ab8500 regulator information
  29. * @dev: device pointer
  30. * @desc: regulator description
  31. * @regulator_dev: regulator device
  32. * @is_enabled: status of regulator (on/off)
  33. * @load_lp_uA: maximum load in idle (low power) mode
  34. * @update_bank: bank to control on/off
  35. * @update_reg: register to control on/off
  36. * @update_mask: mask to enable/disable and set mode of regulator
  37. * @update_val: bits holding the regulator current mode
  38. * @update_val_idle: bits to enable the regulator in idle (low power) mode
  39. * @update_val_normal: bits to enable the regulator in normal (high power) mode
  40. * @voltage_bank: bank to control regulator voltage
  41. * @voltage_reg: register to control regulator voltage
  42. * @voltage_mask: mask to control regulator voltage
  43. * @voltage_shift: shift to control regulator voltage
  44. */
  45. struct ab8500_regulator_info {
  46. struct device *dev;
  47. struct regulator_desc desc;
  48. struct regulator_dev *regulator;
  49. bool is_enabled;
  50. int load_lp_uA;
  51. u8 update_bank;
  52. u8 update_reg;
  53. u8 update_mask;
  54. u8 update_val;
  55. u8 update_val_idle;
  56. u8 update_val_normal;
  57. u8 voltage_bank;
  58. u8 voltage_reg;
  59. u8 voltage_mask;
  60. u8 voltage_shift;
  61. };
  62. /* voltage tables for the vauxn/vintcore supplies */
  63. static const unsigned int ldo_vauxn_voltages[] = {
  64. 1100000,
  65. 1200000,
  66. 1300000,
  67. 1400000,
  68. 1500000,
  69. 1800000,
  70. 1850000,
  71. 1900000,
  72. 2500000,
  73. 2650000,
  74. 2700000,
  75. 2750000,
  76. 2800000,
  77. 2900000,
  78. 3000000,
  79. 3300000,
  80. };
  81. static const unsigned int ldo_vaux3_voltages[] = {
  82. 1200000,
  83. 1500000,
  84. 1800000,
  85. 2100000,
  86. 2500000,
  87. 2750000,
  88. 2790000,
  89. 2910000,
  90. };
  91. static const unsigned int ldo_vintcore_voltages[] = {
  92. 1200000,
  93. 1225000,
  94. 1250000,
  95. 1275000,
  96. 1300000,
  97. 1325000,
  98. 1350000,
  99. };
  100. static int ab8500_regulator_enable(struct regulator_dev *rdev)
  101. {
  102. int ret;
  103. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  104. if (info == NULL) {
  105. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  106. return -EINVAL;
  107. }
  108. ret = abx500_mask_and_set_register_interruptible(info->dev,
  109. info->update_bank, info->update_reg,
  110. info->update_mask, info->update_val);
  111. if (ret < 0) {
  112. dev_err(rdev_get_dev(rdev),
  113. "couldn't set enable bits for regulator\n");
  114. return ret;
  115. }
  116. info->is_enabled = true;
  117. dev_vdbg(rdev_get_dev(rdev),
  118. "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
  119. info->desc.name, info->update_bank, info->update_reg,
  120. info->update_mask, info->update_val);
  121. return ret;
  122. }
  123. static int ab8500_regulator_disable(struct regulator_dev *rdev)
  124. {
  125. int ret;
  126. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  127. if (info == NULL) {
  128. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  129. return -EINVAL;
  130. }
  131. ret = abx500_mask_and_set_register_interruptible(info->dev,
  132. info->update_bank, info->update_reg,
  133. info->update_mask, 0x0);
  134. if (ret < 0) {
  135. dev_err(rdev_get_dev(rdev),
  136. "couldn't set disable bits for regulator\n");
  137. return ret;
  138. }
  139. info->is_enabled = false;
  140. dev_vdbg(rdev_get_dev(rdev),
  141. "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
  142. info->desc.name, info->update_bank, info->update_reg,
  143. info->update_mask, 0x0);
  144. return ret;
  145. }
  146. static unsigned int ab8500_regulator_get_optimum_mode(
  147. struct regulator_dev *rdev, int input_uV,
  148. int output_uV, int load_uA)
  149. {
  150. unsigned int mode;
  151. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  152. if (info == NULL) {
  153. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  154. return -EINVAL;
  155. }
  156. if (load_uA <= info->load_lp_uA)
  157. mode = REGULATOR_MODE_IDLE;
  158. else
  159. mode = REGULATOR_MODE_NORMAL;
  160. return mode;
  161. }
  162. static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
  163. unsigned int mode)
  164. {
  165. int ret = 0;
  166. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  167. if (info == NULL) {
  168. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  169. return -EINVAL;
  170. }
  171. switch (mode) {
  172. case REGULATOR_MODE_NORMAL:
  173. info->update_val = info->update_val_normal;
  174. break;
  175. case REGULATOR_MODE_IDLE:
  176. info->update_val = info->update_val_idle;
  177. break;
  178. default:
  179. return -EINVAL;
  180. }
  181. if (info->is_enabled) {
  182. ret = abx500_mask_and_set_register_interruptible(info->dev,
  183. info->update_bank, info->update_reg,
  184. info->update_mask, info->update_val);
  185. if (ret < 0)
  186. dev_err(rdev_get_dev(rdev),
  187. "couldn't set regulator mode\n");
  188. dev_vdbg(rdev_get_dev(rdev),
  189. "%s-set_mode (bank, reg, mask, value): "
  190. "0x%x, 0x%x, 0x%x, 0x%x\n",
  191. info->desc.name, info->update_bank, info->update_reg,
  192. info->update_mask, info->update_val);
  193. }
  194. return ret;
  195. }
  196. static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
  197. {
  198. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  199. int ret;
  200. if (info == NULL) {
  201. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  202. return -EINVAL;
  203. }
  204. if (info->update_val == info->update_val_normal)
  205. ret = REGULATOR_MODE_NORMAL;
  206. else if (info->update_val == info->update_val_idle)
  207. ret = REGULATOR_MODE_IDLE;
  208. else
  209. ret = -EINVAL;
  210. return ret;
  211. }
  212. static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
  213. {
  214. int ret;
  215. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  216. u8 regval;
  217. if (info == NULL) {
  218. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  219. return -EINVAL;
  220. }
  221. ret = abx500_get_register_interruptible(info->dev,
  222. info->update_bank, info->update_reg, &regval);
  223. if (ret < 0) {
  224. dev_err(rdev_get_dev(rdev),
  225. "couldn't read 0x%x register\n", info->update_reg);
  226. return ret;
  227. }
  228. dev_vdbg(rdev_get_dev(rdev),
  229. "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
  230. " 0x%x\n",
  231. info->desc.name, info->update_bank, info->update_reg,
  232. info->update_mask, regval);
  233. if (regval & info->update_mask)
  234. info->is_enabled = true;
  235. else
  236. info->is_enabled = false;
  237. return info->is_enabled;
  238. }
  239. static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
  240. {
  241. int ret, val;
  242. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  243. u8 regval;
  244. if (info == NULL) {
  245. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  246. return -EINVAL;
  247. }
  248. ret = abx500_get_register_interruptible(info->dev,
  249. info->voltage_bank, info->voltage_reg, &regval);
  250. if (ret < 0) {
  251. dev_err(rdev_get_dev(rdev),
  252. "couldn't read voltage reg for regulator\n");
  253. return ret;
  254. }
  255. dev_vdbg(rdev_get_dev(rdev),
  256. "%s-get_voltage (bank, reg, mask, shift, value): "
  257. "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
  258. info->desc.name, info->voltage_bank,
  259. info->voltage_reg, info->voltage_mask,
  260. info->voltage_shift, regval);
  261. val = regval & info->voltage_mask;
  262. return val >> info->voltage_shift;
  263. }
  264. static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
  265. unsigned selector)
  266. {
  267. int ret;
  268. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  269. u8 regval;
  270. if (info == NULL) {
  271. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  272. return -EINVAL;
  273. }
  274. /* set the registers for the request */
  275. regval = (u8)selector << info->voltage_shift;
  276. ret = abx500_mask_and_set_register_interruptible(info->dev,
  277. info->voltage_bank, info->voltage_reg,
  278. info->voltage_mask, regval);
  279. if (ret < 0)
  280. dev_err(rdev_get_dev(rdev),
  281. "couldn't set voltage reg for regulator\n");
  282. dev_vdbg(rdev_get_dev(rdev),
  283. "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
  284. " 0x%x\n",
  285. info->desc.name, info->voltage_bank, info->voltage_reg,
  286. info->voltage_mask, regval);
  287. return ret;
  288. }
  289. static struct regulator_ops ab8500_regulator_volt_mode_ops = {
  290. .enable = ab8500_regulator_enable,
  291. .disable = ab8500_regulator_disable,
  292. .is_enabled = ab8500_regulator_is_enabled,
  293. .get_optimum_mode = ab8500_regulator_get_optimum_mode,
  294. .set_mode = ab8500_regulator_set_mode,
  295. .get_mode = ab8500_regulator_get_mode,
  296. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  297. .set_voltage_sel = ab8500_regulator_set_voltage_sel,
  298. .list_voltage = regulator_list_voltage_table,
  299. };
  300. static struct regulator_ops ab8500_regulator_mode_ops = {
  301. .enable = ab8500_regulator_enable,
  302. .disable = ab8500_regulator_disable,
  303. .is_enabled = ab8500_regulator_is_enabled,
  304. .get_optimum_mode = ab8500_regulator_get_optimum_mode,
  305. .set_mode = ab8500_regulator_set_mode,
  306. .get_mode = ab8500_regulator_get_mode,
  307. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  308. .list_voltage = regulator_list_voltage_linear,
  309. };
  310. static struct regulator_ops ab8500_regulator_ops = {
  311. .enable = ab8500_regulator_enable,
  312. .disable = ab8500_regulator_disable,
  313. .is_enabled = ab8500_regulator_is_enabled,
  314. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  315. .list_voltage = regulator_list_voltage_linear,
  316. };
  317. static struct ab8500_regulator_info
  318. ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
  319. /*
  320. * Variable Voltage Regulators
  321. * name, min mV, max mV,
  322. * update bank, reg, mask, enable val
  323. * volt bank, reg, mask
  324. */
  325. [AB8500_LDO_AUX1] = {
  326. .desc = {
  327. .name = "LDO-AUX1",
  328. .ops = &ab8500_regulator_volt_mode_ops,
  329. .type = REGULATOR_VOLTAGE,
  330. .id = AB8500_LDO_AUX1,
  331. .owner = THIS_MODULE,
  332. .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
  333. .volt_table = ldo_vauxn_voltages,
  334. .enable_time = 200,
  335. },
  336. .load_lp_uA = 5000,
  337. .update_bank = 0x04,
  338. .update_reg = 0x09,
  339. .update_mask = 0x03,
  340. .update_val = 0x01,
  341. .update_val_idle = 0x03,
  342. .update_val_normal = 0x01,
  343. .voltage_bank = 0x04,
  344. .voltage_reg = 0x1f,
  345. .voltage_mask = 0x0f,
  346. },
  347. [AB8500_LDO_AUX2] = {
  348. .desc = {
  349. .name = "LDO-AUX2",
  350. .ops = &ab8500_regulator_volt_mode_ops,
  351. .type = REGULATOR_VOLTAGE,
  352. .id = AB8500_LDO_AUX2,
  353. .owner = THIS_MODULE,
  354. .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
  355. .volt_table = ldo_vauxn_voltages,
  356. .enable_time = 200,
  357. },
  358. .load_lp_uA = 5000,
  359. .update_bank = 0x04,
  360. .update_reg = 0x09,
  361. .update_mask = 0x0c,
  362. .update_val = 0x04,
  363. .update_val_idle = 0x0c,
  364. .update_val_normal = 0x04,
  365. .voltage_bank = 0x04,
  366. .voltage_reg = 0x20,
  367. .voltage_mask = 0x0f,
  368. },
  369. [AB8500_LDO_AUX3] = {
  370. .desc = {
  371. .name = "LDO-AUX3",
  372. .ops = &ab8500_regulator_volt_mode_ops,
  373. .type = REGULATOR_VOLTAGE,
  374. .id = AB8500_LDO_AUX3,
  375. .owner = THIS_MODULE,
  376. .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
  377. .volt_table = ldo_vaux3_voltages,
  378. .enable_time = 450,
  379. },
  380. .load_lp_uA = 5000,
  381. .update_bank = 0x04,
  382. .update_reg = 0x0a,
  383. .update_mask = 0x03,
  384. .update_val = 0x01,
  385. .update_val_idle = 0x03,
  386. .update_val_normal = 0x01,
  387. .voltage_bank = 0x04,
  388. .voltage_reg = 0x21,
  389. .voltage_mask = 0x07,
  390. },
  391. [AB8500_LDO_INTCORE] = {
  392. .desc = {
  393. .name = "LDO-INTCORE",
  394. .ops = &ab8500_regulator_volt_mode_ops,
  395. .type = REGULATOR_VOLTAGE,
  396. .id = AB8500_LDO_INTCORE,
  397. .owner = THIS_MODULE,
  398. .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
  399. .volt_table = ldo_vintcore_voltages,
  400. .enable_time = 750,
  401. },
  402. .load_lp_uA = 5000,
  403. .update_bank = 0x03,
  404. .update_reg = 0x80,
  405. .update_mask = 0x44,
  406. .update_val = 0x04,
  407. .update_val_idle = 0x44,
  408. .update_val_normal = 0x04,
  409. .voltage_bank = 0x03,
  410. .voltage_reg = 0x80,
  411. .voltage_mask = 0x38,
  412. .voltage_shift = 3,
  413. },
  414. /*
  415. * Fixed Voltage Regulators
  416. * name, fixed mV,
  417. * update bank, reg, mask, enable val
  418. */
  419. [AB8500_LDO_TVOUT] = {
  420. .desc = {
  421. .name = "LDO-TVOUT",
  422. .ops = &ab8500_regulator_mode_ops,
  423. .type = REGULATOR_VOLTAGE,
  424. .id = AB8500_LDO_TVOUT,
  425. .owner = THIS_MODULE,
  426. .n_voltages = 1,
  427. .min_uV = 2000000,
  428. .enable_time = 10000,
  429. },
  430. .load_lp_uA = 1000,
  431. .update_bank = 0x03,
  432. .update_reg = 0x80,
  433. .update_mask = 0x82,
  434. .update_val = 0x02,
  435. .update_val_idle = 0x82,
  436. .update_val_normal = 0x02,
  437. },
  438. /*
  439. * Regulators with fixed voltage and normal mode
  440. */
  441. [AB8500_LDO_USB] = {
  442. .desc = {
  443. .name = "LDO-USB",
  444. .ops = &ab8500_regulator_ops,
  445. .type = REGULATOR_VOLTAGE,
  446. .id = AB8500_LDO_USB,
  447. .owner = THIS_MODULE,
  448. .n_voltages = 1,
  449. .min_uV = 3300000,
  450. .enable_time = 150,
  451. },
  452. .update_bank = 0x03,
  453. .update_reg = 0x82,
  454. .update_mask = 0x03,
  455. },
  456. [AB8500_LDO_AUDIO] = {
  457. .desc = {
  458. .name = "LDO-AUDIO",
  459. .ops = &ab8500_regulator_ops,
  460. .type = REGULATOR_VOLTAGE,
  461. .id = AB8500_LDO_AUDIO,
  462. .owner = THIS_MODULE,
  463. .n_voltages = 1,
  464. .min_uV = 2000000,
  465. .enable_time = 140,
  466. },
  467. .update_bank = 0x03,
  468. .update_reg = 0x83,
  469. .update_mask = 0x02,
  470. .update_val = 0x02,
  471. },
  472. [AB8500_LDO_ANAMIC1] = {
  473. .desc = {
  474. .name = "LDO-ANAMIC1",
  475. .ops = &ab8500_regulator_ops,
  476. .type = REGULATOR_VOLTAGE,
  477. .id = AB8500_LDO_ANAMIC1,
  478. .owner = THIS_MODULE,
  479. .n_voltages = 1,
  480. .min_uV = 2050000,
  481. .enable_time = 500,
  482. },
  483. .update_bank = 0x03,
  484. .update_reg = 0x83,
  485. .update_mask = 0x08,
  486. .update_val = 0x08,
  487. },
  488. [AB8500_LDO_ANAMIC2] = {
  489. .desc = {
  490. .name = "LDO-ANAMIC2",
  491. .ops = &ab8500_regulator_ops,
  492. .type = REGULATOR_VOLTAGE,
  493. .id = AB8500_LDO_ANAMIC2,
  494. .owner = THIS_MODULE,
  495. .n_voltages = 1,
  496. .min_uV = 2050000,
  497. .enable_time = 500,
  498. },
  499. .update_bank = 0x03,
  500. .update_reg = 0x83,
  501. .update_mask = 0x10,
  502. .update_val = 0x10,
  503. },
  504. [AB8500_LDO_DMIC] = {
  505. .desc = {
  506. .name = "LDO-DMIC",
  507. .ops = &ab8500_regulator_ops,
  508. .type = REGULATOR_VOLTAGE,
  509. .id = AB8500_LDO_DMIC,
  510. .owner = THIS_MODULE,
  511. .n_voltages = 1,
  512. .min_uV = 1800000,
  513. .enable_time = 420,
  514. },
  515. .update_bank = 0x03,
  516. .update_reg = 0x83,
  517. .update_mask = 0x04,
  518. .update_val = 0x04,
  519. },
  520. /*
  521. * Regulators with fixed voltage and normal/idle modes
  522. */
  523. [AB8500_LDO_ANA] = {
  524. .desc = {
  525. .name = "LDO-ANA",
  526. .ops = &ab8500_regulator_mode_ops,
  527. .type = REGULATOR_VOLTAGE,
  528. .id = AB8500_LDO_ANA,
  529. .owner = THIS_MODULE,
  530. .n_voltages = 1,
  531. .min_uV = 1200000,
  532. .enable_time = 140,
  533. },
  534. .load_lp_uA = 1000,
  535. .update_bank = 0x04,
  536. .update_reg = 0x06,
  537. .update_mask = 0x0c,
  538. .update_val = 0x04,
  539. .update_val_idle = 0x0c,
  540. .update_val_normal = 0x04,
  541. },
  542. };
  543. struct ab8500_reg_init {
  544. u8 bank;
  545. u8 addr;
  546. u8 mask;
  547. };
  548. #define REG_INIT(_id, _bank, _addr, _mask) \
  549. [_id] = { \
  550. .bank = _bank, \
  551. .addr = _addr, \
  552. .mask = _mask, \
  553. }
  554. static struct ab8500_reg_init ab8500_reg_init[] = {
  555. /*
  556. * 0x30, VanaRequestCtrl
  557. * 0xc0, VextSupply1RequestCtrl
  558. */
  559. REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
  560. /*
  561. * 0x03, VextSupply2RequestCtrl
  562. * 0x0c, VextSupply3RequestCtrl
  563. * 0x30, Vaux1RequestCtrl
  564. * 0xc0, Vaux2RequestCtrl
  565. */
  566. REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
  567. /*
  568. * 0x03, Vaux3RequestCtrl
  569. * 0x04, SwHPReq
  570. */
  571. REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
  572. /*
  573. * 0x08, VanaSysClkReq1HPValid
  574. * 0x20, Vaux1SysClkReq1HPValid
  575. * 0x40, Vaux2SysClkReq1HPValid
  576. * 0x80, Vaux3SysClkReq1HPValid
  577. */
  578. REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
  579. /*
  580. * 0x10, VextSupply1SysClkReq1HPValid
  581. * 0x20, VextSupply2SysClkReq1HPValid
  582. * 0x40, VextSupply3SysClkReq1HPValid
  583. */
  584. REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
  585. /*
  586. * 0x08, VanaHwHPReq1Valid
  587. * 0x20, Vaux1HwHPReq1Valid
  588. * 0x40, Vaux2HwHPReq1Valid
  589. * 0x80, Vaux3HwHPReq1Valid
  590. */
  591. REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
  592. /*
  593. * 0x01, VextSupply1HwHPReq1Valid
  594. * 0x02, VextSupply2HwHPReq1Valid
  595. * 0x04, VextSupply3HwHPReq1Valid
  596. */
  597. REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
  598. /*
  599. * 0x08, VanaHwHPReq2Valid
  600. * 0x20, Vaux1HwHPReq2Valid
  601. * 0x40, Vaux2HwHPReq2Valid
  602. * 0x80, Vaux3HwHPReq2Valid
  603. */
  604. REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
  605. /*
  606. * 0x01, VextSupply1HwHPReq2Valid
  607. * 0x02, VextSupply2HwHPReq2Valid
  608. * 0x04, VextSupply3HwHPReq2Valid
  609. */
  610. REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
  611. /*
  612. * 0x20, VanaSwHPReqValid
  613. * 0x80, Vaux1SwHPReqValid
  614. */
  615. REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
  616. /*
  617. * 0x01, Vaux2SwHPReqValid
  618. * 0x02, Vaux3SwHPReqValid
  619. * 0x04, VextSupply1SwHPReqValid
  620. * 0x08, VextSupply2SwHPReqValid
  621. * 0x10, VextSupply3SwHPReqValid
  622. */
  623. REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
  624. /*
  625. * 0x02, SysClkReq2Valid1
  626. * 0x04, SysClkReq3Valid1
  627. * 0x08, SysClkReq4Valid1
  628. * 0x10, SysClkReq5Valid1
  629. * 0x20, SysClkReq6Valid1
  630. * 0x40, SysClkReq7Valid1
  631. * 0x80, SysClkReq8Valid1
  632. */
  633. REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
  634. /*
  635. * 0x02, SysClkReq2Valid2
  636. * 0x04, SysClkReq3Valid2
  637. * 0x08, SysClkReq4Valid2
  638. * 0x10, SysClkReq5Valid2
  639. * 0x20, SysClkReq6Valid2
  640. * 0x40, SysClkReq7Valid2
  641. * 0x80, SysClkReq8Valid2
  642. */
  643. REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
  644. /*
  645. * 0x02, VTVoutEna
  646. * 0x04, Vintcore12Ena
  647. * 0x38, Vintcore12Sel
  648. * 0x40, Vintcore12LP
  649. * 0x80, VTVoutLP
  650. */
  651. REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
  652. /*
  653. * 0x02, VaudioEna
  654. * 0x04, VdmicEna
  655. * 0x08, Vamic1Ena
  656. * 0x10, Vamic2Ena
  657. */
  658. REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
  659. /*
  660. * 0x01, Vamic1_dzout
  661. * 0x02, Vamic2_dzout
  662. */
  663. REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
  664. /*
  665. * 0x03, VpllRegu (NOTE! PRCMU register bits)
  666. * 0x0c, VanaRegu
  667. */
  668. REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
  669. /*
  670. * 0x01, VrefDDREna
  671. * 0x02, VrefDDRSleepMode
  672. */
  673. REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
  674. /*
  675. * 0x03, VextSupply1Regu
  676. * 0x0c, VextSupply2Regu
  677. * 0x30, VextSupply3Regu
  678. * 0x40, ExtSupply2Bypass
  679. * 0x80, ExtSupply3Bypass
  680. */
  681. REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
  682. /*
  683. * 0x03, Vaux1Regu
  684. * 0x0c, Vaux2Regu
  685. */
  686. REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
  687. /*
  688. * 0x03, Vaux3Regu
  689. */
  690. REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
  691. /*
  692. * 0x0f, Vaux1Sel
  693. */
  694. REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
  695. /*
  696. * 0x0f, Vaux2Sel
  697. */
  698. REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
  699. /*
  700. * 0x07, Vaux3Sel
  701. */
  702. REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
  703. /*
  704. * 0x01, VextSupply12LP
  705. */
  706. REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
  707. /*
  708. * 0x04, Vaux1Disch
  709. * 0x08, Vaux2Disch
  710. * 0x10, Vaux3Disch
  711. * 0x20, Vintcore12Disch
  712. * 0x40, VTVoutDisch
  713. * 0x80, VaudioDisch
  714. */
  715. REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
  716. /*
  717. * 0x02, VanaDisch
  718. * 0x04, VdmicPullDownEna
  719. * 0x10, VdmicDisch
  720. */
  721. REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
  722. };
  723. static int ab8500_regulator_init_registers(struct platform_device *pdev,
  724. int id, int mask, int value)
  725. {
  726. int err;
  727. BUG_ON(value & ~mask);
  728. BUG_ON(mask & ~ab8500_reg_init[id].mask);
  729. /* initialize register */
  730. err = abx500_mask_and_set_register_interruptible(
  731. &pdev->dev,
  732. ab8500_reg_init[id].bank,
  733. ab8500_reg_init[id].addr,
  734. mask, value);
  735. if (err < 0) {
  736. dev_err(&pdev->dev,
  737. "Failed to initialize 0x%02x, 0x%02x.\n",
  738. ab8500_reg_init[id].bank,
  739. ab8500_reg_init[id].addr);
  740. return err;
  741. }
  742. dev_vdbg(&pdev->dev,
  743. " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
  744. ab8500_reg_init[id].bank,
  745. ab8500_reg_init[id].addr,
  746. mask, value);
  747. return 0;
  748. }
  749. static int ab8500_regulator_register(struct platform_device *pdev,
  750. struct regulator_init_data *init_data,
  751. int id,
  752. struct device_node *np)
  753. {
  754. struct ab8500_regulator_info *info = NULL;
  755. struct regulator_config config = { };
  756. int err;
  757. /* assign per-regulator data */
  758. info = &ab8500_regulator_info[id];
  759. info->dev = &pdev->dev;
  760. config.dev = &pdev->dev;
  761. config.init_data = init_data;
  762. config.driver_data = info;
  763. config.of_node = np;
  764. /* fix for hardware before ab8500v2.0 */
  765. if (abx500_get_chip_id(info->dev) < 0x20) {
  766. if (info->desc.id == AB8500_LDO_AUX3) {
  767. info->desc.n_voltages =
  768. ARRAY_SIZE(ldo_vauxn_voltages);
  769. info->desc.volt_table = ldo_vauxn_voltages;
  770. info->voltage_mask = 0xf;
  771. }
  772. }
  773. /* register regulator with framework */
  774. info->regulator = regulator_register(&info->desc, &config);
  775. if (IS_ERR(info->regulator)) {
  776. err = PTR_ERR(info->regulator);
  777. dev_err(&pdev->dev, "failed to register regulator %s\n",
  778. info->desc.name);
  779. /* when we fail, un-register all earlier regulators */
  780. while (--id >= 0) {
  781. info = &ab8500_regulator_info[id];
  782. regulator_unregister(info->regulator);
  783. }
  784. return err;
  785. }
  786. return 0;
  787. }
  788. static struct of_regulator_match ab8500_regulator_matches[] = {
  789. { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
  790. { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
  791. { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
  792. { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
  793. { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
  794. { .name = "ab8500_ldo_usb", .driver_data = (void *) AB8500_LDO_USB, },
  795. { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
  796. { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
  797. { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
  798. { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
  799. { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
  800. };
  801. static int
  802. ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
  803. {
  804. int err, i;
  805. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  806. err = ab8500_regulator_register(
  807. pdev, ab8500_regulator_matches[i].init_data,
  808. i, ab8500_regulator_matches[i].of_node);
  809. if (err)
  810. return err;
  811. }
  812. return 0;
  813. }
  814. static int ab8500_regulator_probe(struct platform_device *pdev)
  815. {
  816. struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
  817. struct device_node *np = pdev->dev.of_node;
  818. struct ab8500_platform_data *ppdata;
  819. struct ab8500_regulator_platform_data *pdata;
  820. int i, err;
  821. if (np) {
  822. err = of_regulator_match(&pdev->dev, np,
  823. ab8500_regulator_matches,
  824. ARRAY_SIZE(ab8500_regulator_matches));
  825. if (err < 0) {
  826. dev_err(&pdev->dev,
  827. "Error parsing regulator init data: %d\n", err);
  828. return err;
  829. }
  830. err = ab8500_regulator_of_probe(pdev, np);
  831. return err;
  832. }
  833. if (!ab8500) {
  834. dev_err(&pdev->dev, "null mfd parent\n");
  835. return -EINVAL;
  836. }
  837. ppdata = dev_get_platdata(ab8500->dev);
  838. if (!ppdata) {
  839. dev_err(&pdev->dev, "null parent pdata\n");
  840. return -EINVAL;
  841. }
  842. pdata = ppdata->regulator;
  843. if (!pdata) {
  844. dev_err(&pdev->dev, "null pdata\n");
  845. return -EINVAL;
  846. }
  847. /* make sure the platform data has the correct size */
  848. if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
  849. dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
  850. return -EINVAL;
  851. }
  852. /* initialize registers */
  853. for (i = 0; i < pdata->num_reg_init; i++) {
  854. int id, mask, value;
  855. id = pdata->reg_init[i].id;
  856. mask = pdata->reg_init[i].mask;
  857. value = pdata->reg_init[i].value;
  858. /* check for configuration errors */
  859. BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
  860. err = ab8500_regulator_init_registers(pdev, id, mask, value);
  861. if (err < 0)
  862. return err;
  863. }
  864. /* register all regulators */
  865. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  866. err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
  867. if (err < 0)
  868. return err;
  869. }
  870. return 0;
  871. }
  872. static int ab8500_regulator_remove(struct platform_device *pdev)
  873. {
  874. int i;
  875. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  876. struct ab8500_regulator_info *info = NULL;
  877. info = &ab8500_regulator_info[i];
  878. dev_vdbg(rdev_get_dev(info->regulator),
  879. "%s-remove\n", info->desc.name);
  880. regulator_unregister(info->regulator);
  881. }
  882. return 0;
  883. }
  884. static struct platform_driver ab8500_regulator_driver = {
  885. .probe = ab8500_regulator_probe,
  886. .remove = ab8500_regulator_remove,
  887. .driver = {
  888. .name = "ab8500-regulator",
  889. .owner = THIS_MODULE,
  890. },
  891. };
  892. static int __init ab8500_regulator_init(void)
  893. {
  894. int ret;
  895. ret = platform_driver_register(&ab8500_regulator_driver);
  896. if (ret != 0)
  897. pr_err("Failed to register ab8500 regulator: %d\n", ret);
  898. return ret;
  899. }
  900. subsys_initcall(ab8500_regulator_init);
  901. static void __exit ab8500_regulator_exit(void)
  902. {
  903. platform_driver_unregister(&ab8500_regulator_driver);
  904. }
  905. module_exit(ab8500_regulator_exit);
  906. MODULE_LICENSE("GPL v2");
  907. MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
  908. MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
  909. MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
  910. MODULE_ALIAS("platform:ab8500-regulator");