smu.c 25 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrutps off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/config.h>
  21. #include <linux/types.h>
  22. #include <linux/kernel.h>
  23. #include <linux/device.h>
  24. #include <linux/dmapool.h>
  25. #include <linux/bootmem.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/highmem.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/rtc.h>
  31. #include <linux/completion.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/delay.h>
  34. #include <linux/sysdev.h>
  35. #include <linux/poll.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/io.h>
  38. #include <asm/prom.h>
  39. #include <asm/machdep.h>
  40. #include <asm/pmac_feature.h>
  41. #include <asm/smu.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/of_device.h>
  46. #define VERSION "0.6"
  47. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  48. #undef DEBUG_SMU
  49. #ifdef DEBUG_SMU
  50. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  51. #else
  52. #define DPRINTK(fmt, args...) do { } while (0)
  53. #endif
  54. /*
  55. * This is the command buffer passed to the SMU hardware
  56. */
  57. #define SMU_MAX_DATA 254
  58. struct smu_cmd_buf {
  59. u8 cmd;
  60. u8 length;
  61. u8 data[SMU_MAX_DATA];
  62. };
  63. struct smu_device {
  64. spinlock_t lock;
  65. struct device_node *of_node;
  66. struct of_device *of_dev;
  67. int doorbell; /* doorbell gpio */
  68. u32 __iomem *db_buf; /* doorbell buffer */
  69. int db_irq;
  70. int msg;
  71. int msg_irq;
  72. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  73. u32 cmd_buf_abs; /* command buffer absolute */
  74. struct list_head cmd_list;
  75. struct smu_cmd *cmd_cur; /* pending command */
  76. struct list_head cmd_i2c_list;
  77. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  78. struct timer_list i2c_timer;
  79. };
  80. /*
  81. * I don't think there will ever be more than one SMU, so
  82. * for now, just hard code that
  83. */
  84. static struct smu_device *smu;
  85. /*
  86. * SMU driver low level stuff
  87. */
  88. static void smu_start_cmd(void)
  89. {
  90. unsigned long faddr, fend;
  91. struct smu_cmd *cmd;
  92. if (list_empty(&smu->cmd_list))
  93. return;
  94. /* Fetch first command in queue */
  95. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  96. smu->cmd_cur = cmd;
  97. list_del(&cmd->link);
  98. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  99. cmd->data_len);
  100. DPRINTK("SMU: data buffer: %02x %02x %02x %02x ...\n",
  101. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  102. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3]);
  103. /* Fill the SMU command buffer */
  104. smu->cmd_buf->cmd = cmd->cmd;
  105. smu->cmd_buf->length = cmd->data_len;
  106. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  107. /* Flush command and data to RAM */
  108. faddr = (unsigned long)smu->cmd_buf;
  109. fend = faddr + smu->cmd_buf->length + 2;
  110. flush_inval_dcache_range(faddr, fend);
  111. /* This isn't exactly a DMA mapping here, I suspect
  112. * the SMU is actually communicating with us via i2c to the
  113. * northbridge or the CPU to access RAM.
  114. */
  115. writel(smu->cmd_buf_abs, smu->db_buf);
  116. /* Ring the SMU doorbell */
  117. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  118. }
  119. static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs)
  120. {
  121. unsigned long flags;
  122. struct smu_cmd *cmd;
  123. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  124. void *misc = NULL;
  125. u8 gpio;
  126. int rc = 0;
  127. /* SMU completed the command, well, we hope, let's make sure
  128. * of it
  129. */
  130. spin_lock_irqsave(&smu->lock, flags);
  131. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  132. if ((gpio & 7) != 7) {
  133. spin_unlock_irqrestore(&smu->lock, flags);
  134. return IRQ_HANDLED;
  135. }
  136. cmd = smu->cmd_cur;
  137. smu->cmd_cur = NULL;
  138. if (cmd == NULL)
  139. goto bail;
  140. if (rc == 0) {
  141. unsigned long faddr;
  142. int reply_len;
  143. u8 ack;
  144. /* CPU might have brought back the cache line, so we need
  145. * to flush again before peeking at the SMU response. We
  146. * flush the entire buffer for now as we haven't read the
  147. * reply lenght (it's only 2 cache lines anyway)
  148. */
  149. faddr = (unsigned long)smu->cmd_buf;
  150. flush_inval_dcache_range(faddr, faddr + 256);
  151. /* Now check ack */
  152. ack = (~cmd->cmd) & 0xff;
  153. if (ack != smu->cmd_buf->cmd) {
  154. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  155. ack, smu->cmd_buf->cmd);
  156. rc = -EIO;
  157. }
  158. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  159. DPRINTK("SMU: reply len: %d\n", reply_len);
  160. if (reply_len > cmd->reply_len) {
  161. printk(KERN_WARNING "SMU: reply buffer too small,"
  162. "got %d bytes for a %d bytes buffer\n",
  163. reply_len, cmd->reply_len);
  164. reply_len = cmd->reply_len;
  165. }
  166. cmd->reply_len = reply_len;
  167. if (cmd->reply_buf && reply_len)
  168. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  169. }
  170. /* Now complete the command. Write status last in order as we lost
  171. * ownership of the command structure as soon as it's no longer -1
  172. */
  173. done = cmd->done;
  174. misc = cmd->misc;
  175. mb();
  176. cmd->status = rc;
  177. bail:
  178. /* Start next command if any */
  179. smu_start_cmd();
  180. spin_unlock_irqrestore(&smu->lock, flags);
  181. /* Call command completion handler if any */
  182. if (done)
  183. done(cmd, misc);
  184. /* It's an edge interrupt, nothing to do */
  185. return IRQ_HANDLED;
  186. }
  187. static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs)
  188. {
  189. /* I don't quite know what to do with this one, we seem to never
  190. * receive it, so I suspect we have to arm it someway in the SMU
  191. * to start getting events that way.
  192. */
  193. printk(KERN_INFO "SMU: message interrupt !\n");
  194. /* It's an edge interrupt, nothing to do */
  195. return IRQ_HANDLED;
  196. }
  197. /*
  198. * Queued command management.
  199. *
  200. */
  201. int smu_queue_cmd(struct smu_cmd *cmd)
  202. {
  203. unsigned long flags;
  204. if (smu == NULL)
  205. return -ENODEV;
  206. if (cmd->data_len > SMU_MAX_DATA ||
  207. cmd->reply_len > SMU_MAX_DATA)
  208. return -EINVAL;
  209. cmd->status = 1;
  210. spin_lock_irqsave(&smu->lock, flags);
  211. list_add_tail(&cmd->link, &smu->cmd_list);
  212. if (smu->cmd_cur == NULL)
  213. smu_start_cmd();
  214. spin_unlock_irqrestore(&smu->lock, flags);
  215. return 0;
  216. }
  217. EXPORT_SYMBOL(smu_queue_cmd);
  218. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  219. unsigned int data_len,
  220. void (*done)(struct smu_cmd *cmd, void *misc),
  221. void *misc, ...)
  222. {
  223. struct smu_cmd *cmd = &scmd->cmd;
  224. va_list list;
  225. int i;
  226. if (data_len > sizeof(scmd->buffer))
  227. return -EINVAL;
  228. memset(scmd, 0, sizeof(*scmd));
  229. cmd->cmd = command;
  230. cmd->data_len = data_len;
  231. cmd->data_buf = scmd->buffer;
  232. cmd->reply_len = sizeof(scmd->buffer);
  233. cmd->reply_buf = scmd->buffer;
  234. cmd->done = done;
  235. cmd->misc = misc;
  236. va_start(list, misc);
  237. for (i = 0; i < data_len; ++i)
  238. scmd->buffer[i] = (u8)va_arg(list, int);
  239. va_end(list);
  240. return smu_queue_cmd(cmd);
  241. }
  242. EXPORT_SYMBOL(smu_queue_simple);
  243. void smu_poll(void)
  244. {
  245. u8 gpio;
  246. if (smu == NULL)
  247. return;
  248. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  249. if ((gpio & 7) == 7)
  250. smu_db_intr(smu->db_irq, smu, NULL);
  251. }
  252. EXPORT_SYMBOL(smu_poll);
  253. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  254. {
  255. struct completion *comp = misc;
  256. complete(comp);
  257. }
  258. EXPORT_SYMBOL(smu_done_complete);
  259. void smu_spinwait_cmd(struct smu_cmd *cmd)
  260. {
  261. while(cmd->status == 1)
  262. smu_poll();
  263. }
  264. EXPORT_SYMBOL(smu_spinwait_cmd);
  265. /* RTC low level commands */
  266. static inline int bcd2hex (int n)
  267. {
  268. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  269. }
  270. static inline int hex2bcd (int n)
  271. {
  272. return ((n / 10) << 4) + (n % 10);
  273. }
  274. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  275. struct rtc_time *time)
  276. {
  277. cmd_buf->cmd = 0x8e;
  278. cmd_buf->length = 8;
  279. cmd_buf->data[0] = 0x80;
  280. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  281. cmd_buf->data[2] = hex2bcd(time->tm_min);
  282. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  283. cmd_buf->data[4] = time->tm_wday;
  284. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  285. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  286. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  287. }
  288. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  289. {
  290. struct smu_simple_cmd cmd;
  291. int rc;
  292. if (smu == NULL)
  293. return -ENODEV;
  294. memset(time, 0, sizeof(struct rtc_time));
  295. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  296. SMU_CMD_RTC_GET_DATETIME);
  297. if (rc)
  298. return rc;
  299. smu_spinwait_simple(&cmd);
  300. time->tm_sec = bcd2hex(cmd.buffer[0]);
  301. time->tm_min = bcd2hex(cmd.buffer[1]);
  302. time->tm_hour = bcd2hex(cmd.buffer[2]);
  303. time->tm_wday = bcd2hex(cmd.buffer[3]);
  304. time->tm_mday = bcd2hex(cmd.buffer[4]);
  305. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  306. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  307. return 0;
  308. }
  309. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  310. {
  311. struct smu_simple_cmd cmd;
  312. int rc;
  313. if (smu == NULL)
  314. return -ENODEV;
  315. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  316. SMU_CMD_RTC_SET_DATETIME,
  317. hex2bcd(time->tm_sec),
  318. hex2bcd(time->tm_min),
  319. hex2bcd(time->tm_hour),
  320. time->tm_wday,
  321. hex2bcd(time->tm_mday),
  322. hex2bcd(time->tm_mon) + 1,
  323. hex2bcd(time->tm_year - 100));
  324. if (rc)
  325. return rc;
  326. smu_spinwait_simple(&cmd);
  327. return 0;
  328. }
  329. void smu_shutdown(void)
  330. {
  331. struct smu_simple_cmd cmd;
  332. if (smu == NULL)
  333. return;
  334. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  335. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  336. return;
  337. smu_spinwait_simple(&cmd);
  338. for (;;)
  339. ;
  340. }
  341. void smu_restart(void)
  342. {
  343. struct smu_simple_cmd cmd;
  344. if (smu == NULL)
  345. return;
  346. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  347. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  348. return;
  349. smu_spinwait_simple(&cmd);
  350. for (;;)
  351. ;
  352. }
  353. int smu_present(void)
  354. {
  355. return smu != NULL;
  356. }
  357. EXPORT_SYMBOL(smu_present);
  358. int smu_init (void)
  359. {
  360. struct device_node *np;
  361. u32 *data;
  362. np = of_find_node_by_type(NULL, "smu");
  363. if (np == NULL)
  364. return -ENODEV;
  365. printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR);
  366. if (smu_cmdbuf_abs == 0) {
  367. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  368. return -EINVAL;
  369. }
  370. smu = alloc_bootmem(sizeof(struct smu_device));
  371. if (smu == NULL)
  372. return -ENOMEM;
  373. memset(smu, 0, sizeof(*smu));
  374. spin_lock_init(&smu->lock);
  375. INIT_LIST_HEAD(&smu->cmd_list);
  376. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  377. smu->of_node = np;
  378. smu->db_irq = NO_IRQ;
  379. smu->msg_irq = NO_IRQ;
  380. init_timer(&smu->i2c_timer);
  381. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  382. * 32 bits value safely
  383. */
  384. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  385. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  386. np = of_find_node_by_name(NULL, "smu-doorbell");
  387. if (np == NULL) {
  388. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  389. goto fail;
  390. }
  391. data = (u32 *)get_property(np, "reg", NULL);
  392. if (data == NULL) {
  393. of_node_put(np);
  394. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  395. goto fail;
  396. }
  397. /* Current setup has one doorbell GPIO that does both doorbell
  398. * and ack. GPIOs are at 0x50, best would be to find that out
  399. * in the device-tree though.
  400. */
  401. smu->doorbell = *data;
  402. if (smu->doorbell < 0x50)
  403. smu->doorbell += 0x50;
  404. if (np->n_intrs > 0)
  405. smu->db_irq = np->intrs[0].line;
  406. of_node_put(np);
  407. /* Now look for the smu-interrupt GPIO */
  408. do {
  409. np = of_find_node_by_name(NULL, "smu-interrupt");
  410. if (np == NULL)
  411. break;
  412. data = (u32 *)get_property(np, "reg", NULL);
  413. if (data == NULL) {
  414. of_node_put(np);
  415. break;
  416. }
  417. smu->msg = *data;
  418. if (smu->msg < 0x50)
  419. smu->msg += 0x50;
  420. if (np->n_intrs > 0)
  421. smu->msg_irq = np->intrs[0].line;
  422. of_node_put(np);
  423. } while(0);
  424. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  425. * device-tree entry giving the address. Best would probably to use
  426. * an offset for K2 base though, but let's do it that way for now.
  427. */
  428. smu->db_buf = ioremap(0x8000860c, 0x1000);
  429. if (smu->db_buf == NULL) {
  430. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  431. goto fail;
  432. }
  433. sys_ctrler = SYS_CTRLER_SMU;
  434. return 0;
  435. fail:
  436. smu = NULL;
  437. return -ENXIO;
  438. }
  439. static int smu_late_init(void)
  440. {
  441. if (!smu)
  442. return 0;
  443. /*
  444. * Try to request the interrupts
  445. */
  446. if (smu->db_irq != NO_IRQ) {
  447. if (request_irq(smu->db_irq, smu_db_intr,
  448. SA_SHIRQ, "SMU doorbell", smu) < 0) {
  449. printk(KERN_WARNING "SMU: can't "
  450. "request interrupt %d\n",
  451. smu->db_irq);
  452. smu->db_irq = NO_IRQ;
  453. }
  454. }
  455. if (smu->msg_irq != NO_IRQ) {
  456. if (request_irq(smu->msg_irq, smu_msg_intr,
  457. SA_SHIRQ, "SMU message", smu) < 0) {
  458. printk(KERN_WARNING "SMU: can't "
  459. "request interrupt %d\n",
  460. smu->msg_irq);
  461. smu->msg_irq = NO_IRQ;
  462. }
  463. }
  464. return 0;
  465. }
  466. arch_initcall(smu_late_init);
  467. /*
  468. * sysfs visibility
  469. */
  470. static void smu_expose_childs(void *unused)
  471. {
  472. struct device_node *np;
  473. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) {
  474. if (device_is_compatible(np, "smu-i2c")) {
  475. char name[32];
  476. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  477. if (reg == NULL)
  478. continue;
  479. sprintf(name, "smu-i2c-%02x", *reg);
  480. of_platform_device_create(np, name, &smu->of_dev->dev);
  481. }
  482. }
  483. }
  484. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL);
  485. static int smu_platform_probe(struct of_device* dev,
  486. const struct of_device_id *match)
  487. {
  488. if (!smu)
  489. return -ENODEV;
  490. smu->of_dev = dev;
  491. /*
  492. * Ok, we are matched, now expose all i2c busses. We have to defer
  493. * that unfortunately or it would deadlock inside the device model
  494. */
  495. schedule_work(&smu_expose_childs_work);
  496. return 0;
  497. }
  498. static struct of_device_id smu_platform_match[] =
  499. {
  500. {
  501. .type = "smu",
  502. },
  503. {},
  504. };
  505. static struct of_platform_driver smu_of_platform_driver =
  506. {
  507. .name = "smu",
  508. .match_table = smu_platform_match,
  509. .probe = smu_platform_probe,
  510. };
  511. static int __init smu_init_sysfs(void)
  512. {
  513. int rc;
  514. /*
  515. * Due to sysfs bogosity, a sysdev is not a real device, so
  516. * we should in fact create both if we want sysdev semantics
  517. * for power management.
  518. * For now, we don't power manage machines with an SMU chip,
  519. * I'm a bit too far from figuring out how that works with those
  520. * new chipsets, but that will come back and bite us
  521. */
  522. rc = of_register_driver(&smu_of_platform_driver);
  523. return 0;
  524. }
  525. device_initcall(smu_init_sysfs);
  526. struct of_device *smu_get_ofdev(void)
  527. {
  528. if (!smu)
  529. return NULL;
  530. return smu->of_dev;
  531. }
  532. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  533. /*
  534. * i2c interface
  535. */
  536. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  537. {
  538. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  539. void *misc = cmd->misc;
  540. unsigned long flags;
  541. /* Check for read case */
  542. if (!fail && cmd->read) {
  543. if (cmd->pdata[0] < 1)
  544. fail = 1;
  545. else
  546. memcpy(cmd->info.data, &cmd->pdata[1],
  547. cmd->info.datalen);
  548. }
  549. DPRINTK("SMU: completing, success: %d\n", !fail);
  550. /* Update status and mark no pending i2c command with lock
  551. * held so nobody comes in while we dequeue an eventual
  552. * pending next i2c command
  553. */
  554. spin_lock_irqsave(&smu->lock, flags);
  555. smu->cmd_i2c_cur = NULL;
  556. wmb();
  557. cmd->status = fail ? -EIO : 0;
  558. /* Is there another i2c command waiting ? */
  559. if (!list_empty(&smu->cmd_i2c_list)) {
  560. struct smu_i2c_cmd *newcmd;
  561. /* Fetch it, new current, remove from list */
  562. newcmd = list_entry(smu->cmd_i2c_list.next,
  563. struct smu_i2c_cmd, link);
  564. smu->cmd_i2c_cur = newcmd;
  565. list_del(&cmd->link);
  566. /* Queue with low level smu */
  567. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  568. if (smu->cmd_cur == NULL)
  569. smu_start_cmd();
  570. }
  571. spin_unlock_irqrestore(&smu->lock, flags);
  572. /* Call command completion handler if any */
  573. if (done)
  574. done(cmd, misc);
  575. }
  576. static void smu_i2c_retry(unsigned long data)
  577. {
  578. struct smu_i2c_cmd *cmd = (struct smu_i2c_cmd *)data;
  579. DPRINTK("SMU: i2c failure, requeuing...\n");
  580. /* requeue command simply by resetting reply_len */
  581. cmd->pdata[0] = 0xff;
  582. cmd->scmd.reply_len = 0x10;
  583. smu_queue_cmd(&cmd->scmd);
  584. }
  585. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  586. {
  587. struct smu_i2c_cmd *cmd = misc;
  588. int fail = 0;
  589. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  590. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  591. /* Check for possible status */
  592. if (scmd->status < 0)
  593. fail = 1;
  594. else if (cmd->read) {
  595. if (cmd->stage == 0)
  596. fail = cmd->pdata[0] != 0;
  597. else
  598. fail = cmd->pdata[0] >= 0x80;
  599. } else {
  600. fail = cmd->pdata[0] != 0;
  601. }
  602. /* Handle failures by requeuing command, after 5ms interval
  603. */
  604. if (fail && --cmd->retries > 0) {
  605. DPRINTK("SMU: i2c failure, starting timer...\n");
  606. smu->i2c_timer.function = smu_i2c_retry;
  607. smu->i2c_timer.data = (unsigned long)cmd;
  608. smu->i2c_timer.expires = jiffies + msecs_to_jiffies(5);
  609. add_timer(&smu->i2c_timer);
  610. return;
  611. }
  612. /* If failure or stage 1, command is complete */
  613. if (fail || cmd->stage != 0) {
  614. smu_i2c_complete_command(cmd, fail);
  615. return;
  616. }
  617. DPRINTK("SMU: going to stage 1\n");
  618. /* Ok, initial command complete, now poll status */
  619. scmd->reply_buf = cmd->pdata;
  620. scmd->reply_len = 0x10;
  621. scmd->data_buf = cmd->pdata;
  622. scmd->data_len = 1;
  623. cmd->pdata[0] = 0;
  624. cmd->stage = 1;
  625. cmd->retries = 20;
  626. smu_queue_cmd(scmd);
  627. }
  628. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  629. {
  630. unsigned long flags;
  631. if (smu == NULL)
  632. return -ENODEV;
  633. /* Fill most fields of scmd */
  634. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  635. cmd->scmd.done = smu_i2c_low_completion;
  636. cmd->scmd.misc = cmd;
  637. cmd->scmd.reply_buf = cmd->pdata;
  638. cmd->scmd.reply_len = 0x10;
  639. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  640. cmd->scmd.status = 1;
  641. cmd->stage = 0;
  642. cmd->pdata[0] = 0xff;
  643. cmd->retries = 20;
  644. cmd->status = 1;
  645. /* Check transfer type, sanitize some "info" fields
  646. * based on transfer type and do more checking
  647. */
  648. cmd->info.caddr = cmd->info.devaddr;
  649. cmd->read = cmd->info.devaddr & 0x01;
  650. switch(cmd->info.type) {
  651. case SMU_I2C_TRANSFER_SIMPLE:
  652. memset(&cmd->info.sublen, 0, 4);
  653. break;
  654. case SMU_I2C_TRANSFER_COMBINED:
  655. cmd->info.devaddr &= 0xfe;
  656. case SMU_I2C_TRANSFER_STDSUB:
  657. if (cmd->info.sublen > 3)
  658. return -EINVAL;
  659. break;
  660. default:
  661. return -EINVAL;
  662. }
  663. /* Finish setting up command based on transfer direction
  664. */
  665. if (cmd->read) {
  666. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  667. return -EINVAL;
  668. memset(cmd->info.data, 0xff, cmd->info.datalen);
  669. cmd->scmd.data_len = 9;
  670. } else {
  671. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  672. return -EINVAL;
  673. cmd->scmd.data_len = 9 + cmd->info.datalen;
  674. }
  675. DPRINTK("SMU: i2c enqueuing command\n");
  676. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  677. cmd->read ? "read" : "write", cmd->info.datalen,
  678. cmd->info.bus, cmd->info.caddr,
  679. cmd->info.subaddr[0], cmd->info.type);
  680. /* Enqueue command in i2c list, and if empty, enqueue also in
  681. * main command list
  682. */
  683. spin_lock_irqsave(&smu->lock, flags);
  684. if (smu->cmd_i2c_cur == NULL) {
  685. smu->cmd_i2c_cur = cmd;
  686. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  687. if (smu->cmd_cur == NULL)
  688. smu_start_cmd();
  689. } else
  690. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  691. spin_unlock_irqrestore(&smu->lock, flags);
  692. return 0;
  693. }
  694. struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  695. {
  696. char pname[32];
  697. if (!smu)
  698. return NULL;
  699. sprintf(pname, "sdb-partition-%02x", id);
  700. return (struct smu_sdbp_header *)get_property(smu->of_node,
  701. pname, size);
  702. }
  703. EXPORT_SYMBOL(smu_get_sdb_partition);
  704. /*
  705. * Userland driver interface
  706. */
  707. static LIST_HEAD(smu_clist);
  708. static DEFINE_SPINLOCK(smu_clist_lock);
  709. enum smu_file_mode {
  710. smu_file_commands,
  711. smu_file_events,
  712. smu_file_closing
  713. };
  714. struct smu_private
  715. {
  716. struct list_head list;
  717. enum smu_file_mode mode;
  718. int busy;
  719. struct smu_cmd cmd;
  720. spinlock_t lock;
  721. wait_queue_head_t wait;
  722. u8 buffer[SMU_MAX_DATA];
  723. };
  724. static int smu_open(struct inode *inode, struct file *file)
  725. {
  726. struct smu_private *pp;
  727. unsigned long flags;
  728. pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL);
  729. if (pp == 0)
  730. return -ENOMEM;
  731. memset(pp, 0, sizeof(struct smu_private));
  732. spin_lock_init(&pp->lock);
  733. pp->mode = smu_file_commands;
  734. init_waitqueue_head(&pp->wait);
  735. spin_lock_irqsave(&smu_clist_lock, flags);
  736. list_add(&pp->list, &smu_clist);
  737. spin_unlock_irqrestore(&smu_clist_lock, flags);
  738. file->private_data = pp;
  739. return 0;
  740. }
  741. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  742. {
  743. struct smu_private *pp = misc;
  744. wake_up_all(&pp->wait);
  745. }
  746. static ssize_t smu_write(struct file *file, const char __user *buf,
  747. size_t count, loff_t *ppos)
  748. {
  749. struct smu_private *pp = file->private_data;
  750. unsigned long flags;
  751. struct smu_user_cmd_hdr hdr;
  752. int rc = 0;
  753. if (pp->busy)
  754. return -EBUSY;
  755. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  756. return -EFAULT;
  757. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  758. pp->mode = smu_file_events;
  759. return 0;
  760. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  761. return -EINVAL;
  762. else if (pp->mode != smu_file_commands)
  763. return -EBADFD;
  764. else if (hdr.data_len > SMU_MAX_DATA)
  765. return -EINVAL;
  766. spin_lock_irqsave(&pp->lock, flags);
  767. if (pp->busy) {
  768. spin_unlock_irqrestore(&pp->lock, flags);
  769. return -EBUSY;
  770. }
  771. pp->busy = 1;
  772. pp->cmd.status = 1;
  773. spin_unlock_irqrestore(&pp->lock, flags);
  774. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  775. pp->busy = 0;
  776. return -EFAULT;
  777. }
  778. pp->cmd.cmd = hdr.cmd;
  779. pp->cmd.data_len = hdr.data_len;
  780. pp->cmd.reply_len = SMU_MAX_DATA;
  781. pp->cmd.data_buf = pp->buffer;
  782. pp->cmd.reply_buf = pp->buffer;
  783. pp->cmd.done = smu_user_cmd_done;
  784. pp->cmd.misc = pp;
  785. rc = smu_queue_cmd(&pp->cmd);
  786. if (rc < 0)
  787. return rc;
  788. return count;
  789. }
  790. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  791. char __user *buf, size_t count)
  792. {
  793. DECLARE_WAITQUEUE(wait, current);
  794. struct smu_user_reply_hdr hdr;
  795. unsigned long flags;
  796. int size, rc = 0;
  797. if (!pp->busy)
  798. return 0;
  799. if (count < sizeof(struct smu_user_reply_hdr))
  800. return -EOVERFLOW;
  801. spin_lock_irqsave(&pp->lock, flags);
  802. if (pp->cmd.status == 1) {
  803. if (file->f_flags & O_NONBLOCK)
  804. return -EAGAIN;
  805. add_wait_queue(&pp->wait, &wait);
  806. for (;;) {
  807. set_current_state(TASK_INTERRUPTIBLE);
  808. rc = 0;
  809. if (pp->cmd.status != 1)
  810. break;
  811. rc = -ERESTARTSYS;
  812. if (signal_pending(current))
  813. break;
  814. spin_unlock_irqrestore(&pp->lock, flags);
  815. schedule();
  816. spin_lock_irqsave(&pp->lock, flags);
  817. }
  818. set_current_state(TASK_RUNNING);
  819. remove_wait_queue(&pp->wait, &wait);
  820. }
  821. spin_unlock_irqrestore(&pp->lock, flags);
  822. if (rc)
  823. return rc;
  824. if (pp->cmd.status != 0)
  825. pp->cmd.reply_len = 0;
  826. size = sizeof(hdr) + pp->cmd.reply_len;
  827. if (count < size)
  828. size = count;
  829. rc = size;
  830. hdr.status = pp->cmd.status;
  831. hdr.reply_len = pp->cmd.reply_len;
  832. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  833. return -EFAULT;
  834. size -= sizeof(hdr);
  835. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  836. return -EFAULT;
  837. pp->busy = 0;
  838. return rc;
  839. }
  840. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  841. char __user *buf, size_t count)
  842. {
  843. /* Not implemented */
  844. msleep_interruptible(1000);
  845. return 0;
  846. }
  847. static ssize_t smu_read(struct file *file, char __user *buf,
  848. size_t count, loff_t *ppos)
  849. {
  850. struct smu_private *pp = file->private_data;
  851. if (pp->mode == smu_file_commands)
  852. return smu_read_command(file, pp, buf, count);
  853. if (pp->mode == smu_file_events)
  854. return smu_read_events(file, pp, buf, count);
  855. return -EBADFD;
  856. }
  857. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  858. {
  859. struct smu_private *pp = file->private_data;
  860. unsigned int mask = 0;
  861. unsigned long flags;
  862. if (pp == 0)
  863. return 0;
  864. if (pp->mode == smu_file_commands) {
  865. poll_wait(file, &pp->wait, wait);
  866. spin_lock_irqsave(&pp->lock, flags);
  867. if (pp->busy && pp->cmd.status != 1)
  868. mask |= POLLIN;
  869. spin_unlock_irqrestore(&pp->lock, flags);
  870. } if (pp->mode == smu_file_events) {
  871. /* Not yet implemented */
  872. }
  873. return mask;
  874. }
  875. static int smu_release(struct inode *inode, struct file *file)
  876. {
  877. struct smu_private *pp = file->private_data;
  878. unsigned long flags;
  879. unsigned int busy;
  880. if (pp == 0)
  881. return 0;
  882. file->private_data = NULL;
  883. /* Mark file as closing to avoid races with new request */
  884. spin_lock_irqsave(&pp->lock, flags);
  885. pp->mode = smu_file_closing;
  886. busy = pp->busy;
  887. /* Wait for any pending request to complete */
  888. if (busy && pp->cmd.status == 1) {
  889. DECLARE_WAITQUEUE(wait, current);
  890. add_wait_queue(&pp->wait, &wait);
  891. for (;;) {
  892. set_current_state(TASK_UNINTERRUPTIBLE);
  893. if (pp->cmd.status != 1)
  894. break;
  895. spin_lock_irqsave(&pp->lock, flags);
  896. schedule();
  897. spin_unlock_irqrestore(&pp->lock, flags);
  898. }
  899. set_current_state(TASK_RUNNING);
  900. remove_wait_queue(&pp->wait, &wait);
  901. }
  902. spin_unlock_irqrestore(&pp->lock, flags);
  903. spin_lock_irqsave(&smu_clist_lock, flags);
  904. list_del(&pp->list);
  905. spin_unlock_irqrestore(&smu_clist_lock, flags);
  906. kfree(pp);
  907. return 0;
  908. }
  909. static struct file_operations smu_device_fops = {
  910. .llseek = no_llseek,
  911. .read = smu_read,
  912. .write = smu_write,
  913. .poll = smu_fpoll,
  914. .open = smu_open,
  915. .release = smu_release,
  916. };
  917. static struct miscdevice pmu_device = {
  918. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  919. };
  920. static int smu_device_init(void)
  921. {
  922. if (!smu)
  923. return -ENODEV;
  924. if (misc_register(&pmu_device) < 0)
  925. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  926. return 0;
  927. }
  928. device_initcall(smu_device_init);