prima2.dtsi 8.6 KB

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  1. /*
  2. * DTS file for CSR SiRFprimaII SoC
  3. *
  4. * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
  5. *
  6. * Licensed under GPLv2 or later.
  7. */
  8. /include/ "skeleton.dtsi"
  9. / {
  10. compatible = "sirf,prima2";
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. interrupt-parent = <&intc>;
  14. cpus {
  15. #address-cells = <1>;
  16. #size-cells = <0>;
  17. cpu@0 {
  18. reg = <0x0>;
  19. d-cache-line-size = <32>;
  20. i-cache-line-size = <32>;
  21. d-cache-size = <32768>;
  22. i-cache-size = <32768>;
  23. /* from bootloader */
  24. timebase-frequency = <0>;
  25. bus-frequency = <0>;
  26. clock-frequency = <0>;
  27. };
  28. };
  29. axi {
  30. compatible = "simple-bus";
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. ranges = <0x40000000 0x40000000 0x80000000>;
  34. l2-cache-controller@80040000 {
  35. compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
  36. reg = <0x80040000 0x1000>;
  37. interrupts = <59>;
  38. arm,tag-latency = <1 1 1>;
  39. arm,data-latency = <1 1 1>;
  40. arm,filter-ranges = <0 0x40000000>;
  41. };
  42. intc: interrupt-controller@80020000 {
  43. #interrupt-cells = <1>;
  44. interrupt-controller;
  45. compatible = "sirf,prima2-intc";
  46. reg = <0x80020000 0x1000>;
  47. };
  48. sys-iobg {
  49. compatible = "simple-bus";
  50. #address-cells = <1>;
  51. #size-cells = <1>;
  52. ranges = <0x88000000 0x88000000 0x40000>;
  53. clock-controller@88000000 {
  54. compatible = "sirf,prima2-clkc";
  55. reg = <0x88000000 0x1000>;
  56. interrupts = <3>;
  57. };
  58. reset-controller@88010000 {
  59. compatible = "sirf,prima2-rstc";
  60. reg = <0x88010000 0x1000>;
  61. };
  62. rsc-controller@88020000 {
  63. compatible = "sirf,prima2-rsc";
  64. reg = <0x88020000 0x1000>;
  65. };
  66. };
  67. mem-iobg {
  68. compatible = "simple-bus";
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. ranges = <0x90000000 0x90000000 0x10000>;
  72. memory-controller@90000000 {
  73. compatible = "sirf,prima2-memc";
  74. reg = <0x90000000 0x10000>;
  75. interrupts = <27>;
  76. };
  77. };
  78. disp-iobg {
  79. compatible = "simple-bus";
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. ranges = <0x90010000 0x90010000 0x30000>;
  83. display@90010000 {
  84. compatible = "sirf,prima2-lcd";
  85. reg = <0x90010000 0x20000>;
  86. interrupts = <30>;
  87. };
  88. vpp@90020000 {
  89. compatible = "sirf,prima2-vpp";
  90. reg = <0x90020000 0x10000>;
  91. interrupts = <31>;
  92. };
  93. };
  94. graphics-iobg {
  95. compatible = "simple-bus";
  96. #address-cells = <1>;
  97. #size-cells = <1>;
  98. ranges = <0x98000000 0x98000000 0x8000000>;
  99. graphics@98000000 {
  100. compatible = "powervr,sgx531";
  101. reg = <0x98000000 0x8000000>;
  102. interrupts = <6>;
  103. };
  104. };
  105. multimedia-iobg {
  106. compatible = "simple-bus";
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. ranges = <0xa0000000 0xa0000000 0x8000000>;
  110. multimedia@a0000000 {
  111. compatible = "sirf,prima2-video-codec";
  112. reg = <0xa0000000 0x8000000>;
  113. interrupts = <5>;
  114. };
  115. };
  116. dsp-iobg {
  117. compatible = "simple-bus";
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. ranges = <0xa8000000 0xa8000000 0x2000000>;
  121. dspif@a8000000 {
  122. compatible = "sirf,prima2-dspif";
  123. reg = <0xa8000000 0x10000>;
  124. interrupts = <9>;
  125. };
  126. gps@a8010000 {
  127. compatible = "sirf,prima2-gps";
  128. reg = <0xa8010000 0x10000>;
  129. interrupts = <7>;
  130. };
  131. dsp@a9000000 {
  132. compatible = "sirf,prima2-dsp";
  133. reg = <0xa9000000 0x1000000>;
  134. interrupts = <8>;
  135. };
  136. };
  137. peri-iobg {
  138. compatible = "simple-bus";
  139. #address-cells = <1>;
  140. #size-cells = <1>;
  141. ranges = <0xb0000000 0xb0000000 0x180000>;
  142. timer@b0020000 {
  143. compatible = "sirf,prima2-tick";
  144. reg = <0xb0020000 0x1000>;
  145. interrupts = <0>;
  146. };
  147. nand@b0030000 {
  148. compatible = "sirf,prima2-nand";
  149. reg = <0xb0030000 0x10000>;
  150. interrupts = <41>;
  151. };
  152. audio@b0040000 {
  153. compatible = "sirf,prima2-audio";
  154. reg = <0xb0040000 0x10000>;
  155. interrupts = <35>;
  156. };
  157. uart0: uart@b0050000 {
  158. cell-index = <0>;
  159. compatible = "sirf,prima2-uart";
  160. reg = <0xb0050000 0x10000>;
  161. interrupts = <17>;
  162. };
  163. uart1: uart@b0060000 {
  164. cell-index = <1>;
  165. compatible = "sirf,prima2-uart";
  166. reg = <0xb0060000 0x10000>;
  167. interrupts = <18>;
  168. };
  169. uart2: uart@b0070000 {
  170. cell-index = <2>;
  171. compatible = "sirf,prima2-uart";
  172. reg = <0xb0070000 0x10000>;
  173. interrupts = <19>;
  174. };
  175. usp0: usp@b0080000 {
  176. cell-index = <0>;
  177. compatible = "sirf,prima2-usp";
  178. reg = <0xb0080000 0x10000>;
  179. interrupts = <20>;
  180. };
  181. usp1: usp@b0090000 {
  182. cell-index = <1>;
  183. compatible = "sirf,prima2-usp";
  184. reg = <0xb0090000 0x10000>;
  185. interrupts = <21>;
  186. };
  187. usp2: usp@b00a0000 {
  188. cell-index = <2>;
  189. compatible = "sirf,prima2-usp";
  190. reg = <0xb00a0000 0x10000>;
  191. interrupts = <22>;
  192. };
  193. dmac0: dma-controller@b00b0000 {
  194. cell-index = <0>;
  195. compatible = "sirf,prima2-dmac";
  196. reg = <0xb00b0000 0x10000>;
  197. interrupts = <12>;
  198. };
  199. dmac1: dma-controller@b0160000 {
  200. cell-index = <1>;
  201. compatible = "sirf,prima2-dmac";
  202. reg = <0xb0160000 0x10000>;
  203. interrupts = <13>;
  204. };
  205. vip@b00C0000 {
  206. compatible = "sirf,prima2-vip";
  207. reg = <0xb00C0000 0x10000>;
  208. };
  209. spi0: spi@b00d0000 {
  210. cell-index = <0>;
  211. compatible = "sirf,prima2-spi";
  212. reg = <0xb00d0000 0x10000>;
  213. interrupts = <15>;
  214. };
  215. spi1: spi@b0170000 {
  216. cell-index = <1>;
  217. compatible = "sirf,prima2-spi";
  218. reg = <0xb0170000 0x10000>;
  219. interrupts = <16>;
  220. };
  221. i2c0: i2c@b00e0000 {
  222. cell-index = <0>;
  223. compatible = "sirf,prima2-i2c";
  224. reg = <0xb00e0000 0x10000>;
  225. interrupts = <24>;
  226. };
  227. i2c1: i2c@b00f0000 {
  228. cell-index = <1>;
  229. compatible = "sirf,prima2-i2c";
  230. reg = <0xb00f0000 0x10000>;
  231. interrupts = <25>;
  232. };
  233. tsc@b0110000 {
  234. compatible = "sirf,prima2-tsc";
  235. reg = <0xb0110000 0x10000>;
  236. interrupts = <33>;
  237. };
  238. gpio: gpio-controller@b0120000 {
  239. #gpio-cells = <2>;
  240. #interrupt-cells = <2>;
  241. compatible = "sirf,prima2-gpio-pinmux";
  242. reg = <0xb0120000 0x10000>;
  243. interrupts = <43 44 45 46 47>;
  244. gpio-controller;
  245. interrupt-controller;
  246. };
  247. pwm@b0130000 {
  248. compatible = "sirf,prima2-pwm";
  249. reg = <0xb0130000 0x10000>;
  250. };
  251. efusesys@b0140000 {
  252. compatible = "sirf,prima2-efuse";
  253. reg = <0xb0140000 0x10000>;
  254. };
  255. pulsec@b0150000 {
  256. compatible = "sirf,prima2-pulsec";
  257. reg = <0xb0150000 0x10000>;
  258. interrupts = <48>;
  259. };
  260. pci-iobg {
  261. compatible = "sirf,prima2-pciiobg", "simple-bus";
  262. #address-cells = <1>;
  263. #size-cells = <1>;
  264. ranges = <0x56000000 0x56000000 0x1b00000>;
  265. sd0: sdhci@56000000 {
  266. cell-index = <0>;
  267. compatible = "sirf,prima2-sdhc";
  268. reg = <0x56000000 0x100000>;
  269. interrupts = <38>;
  270. };
  271. sd1: sdhci@56100000 {
  272. cell-index = <1>;
  273. compatible = "sirf,prima2-sdhc";
  274. reg = <0x56100000 0x100000>;
  275. interrupts = <38>;
  276. };
  277. sd2: sdhci@56200000 {
  278. cell-index = <2>;
  279. compatible = "sirf,prima2-sdhc";
  280. reg = <0x56200000 0x100000>;
  281. interrupts = <23>;
  282. };
  283. sd3: sdhci@56300000 {
  284. cell-index = <3>;
  285. compatible = "sirf,prima2-sdhc";
  286. reg = <0x56300000 0x100000>;
  287. interrupts = <23>;
  288. };
  289. sd4: sdhci@56400000 {
  290. cell-index = <4>;
  291. compatible = "sirf,prima2-sdhc";
  292. reg = <0x56400000 0x100000>;
  293. interrupts = <39>;
  294. };
  295. sd5: sdhci@56500000 {
  296. cell-index = <5>;
  297. compatible = "sirf,prima2-sdhc";
  298. reg = <0x56500000 0x100000>;
  299. interrupts = <39>;
  300. };
  301. pci-copy@57900000 {
  302. compatible = "sirf,prima2-pcicp";
  303. reg = <0x57900000 0x100000>;
  304. interrupts = <40>;
  305. };
  306. rom-interface@57a00000 {
  307. compatible = "sirf,prima2-romif";
  308. reg = <0x57a00000 0x100000>;
  309. };
  310. };
  311. };
  312. rtc-iobg {
  313. compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
  314. #address-cells = <1>;
  315. #size-cells = <1>;
  316. reg = <0x80030000 0x10000>;
  317. gpsrtc@1000 {
  318. compatible = "sirf,prima2-gpsrtc";
  319. reg = <0x1000 0x1000>;
  320. interrupts = <55 56 57>;
  321. };
  322. sysrtc@2000 {
  323. compatible = "sirf,prima2-sysrtc";
  324. reg = <0x2000 0x1000>;
  325. interrupts = <52 53 54>;
  326. };
  327. pwrc@3000 {
  328. compatible = "sirf,prima2-pwrc";
  329. reg = <0x3000 0x1000>;
  330. interrupts = <32>;
  331. };
  332. };
  333. uus-iobg {
  334. compatible = "simple-bus";
  335. #address-cells = <1>;
  336. #size-cells = <1>;
  337. ranges = <0xb8000000 0xb8000000 0x40000>;
  338. usb0: usb@b00e0000 {
  339. compatible = "chipidea,ci13611a-prima2";
  340. reg = <0xb8000000 0x10000>;
  341. interrupts = <10>;
  342. };
  343. usb1: usb@b00f0000 {
  344. compatible = "chipidea,ci13611a-prima2";
  345. reg = <0xb8010000 0x10000>;
  346. interrupts = <11>;
  347. };
  348. sata@b00f0000 {
  349. compatible = "synopsys,dwc-ahsata";
  350. reg = <0xb8020000 0x10000>;
  351. interrupts = <37>;
  352. };
  353. security@b00f0000 {
  354. compatible = "sirf,prima2-security";
  355. reg = <0xb8030000 0x10000>;
  356. interrupts = <42>;
  357. };
  358. };
  359. };
  360. };