dma-mapping.h 14 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm_types.h>
  5. #include <linux/scatterlist.h>
  6. #include <asm-generic/dma-coherent.h>
  7. #include <asm/memory.h>
  8. /*
  9. * page_to_dma/dma_to_virt/virt_to_dma are architecture private functions
  10. * used internally by the DMA-mapping API to provide DMA addresses. They
  11. * must not be used by drivers.
  12. */
  13. #ifndef __arch_page_to_dma
  14. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  15. {
  16. return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page));
  17. }
  18. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  19. {
  20. return (void *)__bus_to_virt(addr);
  21. }
  22. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  23. {
  24. return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  25. }
  26. #else
  27. static inline dma_addr_t page_to_dma(struct device *dev, struct page *page)
  28. {
  29. return __arch_page_to_dma(dev, page);
  30. }
  31. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  32. {
  33. return __arch_dma_to_virt(dev, addr);
  34. }
  35. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  36. {
  37. return __arch_virt_to_dma(dev, addr);
  38. }
  39. #endif
  40. /*
  41. * DMA-consistent mapping functions. These allocate/free a region of
  42. * uncached, unwrite-buffered mapped memory space for use with DMA
  43. * devices. This is the "generic" version. The PCI specific version
  44. * is in pci.h
  45. *
  46. * Note: Drivers should NOT use this function directly, as it will break
  47. * platforms with CONFIG_DMABOUNCE.
  48. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  49. */
  50. extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  51. extern void dma_cache_maint_page(struct page *page, unsigned long offset,
  52. size_t size, int rw);
  53. /*
  54. * Return whether the given device DMA address mask can be supported
  55. * properly. For example, if your device can only drive the low 24-bits
  56. * during bus mastering, then you would pass 0x00ffffff as the mask
  57. * to this function.
  58. *
  59. * FIXME: This should really be a platform specific issue - we should
  60. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  61. */
  62. static inline int dma_supported(struct device *dev, u64 mask)
  63. {
  64. if (mask < ISA_DMA_THRESHOLD)
  65. return 0;
  66. return 1;
  67. }
  68. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  69. {
  70. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  71. return -EIO;
  72. *dev->dma_mask = dma_mask;
  73. return 0;
  74. }
  75. static inline int dma_get_cache_alignment(void)
  76. {
  77. return 32;
  78. }
  79. static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  80. {
  81. return !!arch_is_coherent();
  82. }
  83. /*
  84. * DMA errors are defined by all-bits-set in the DMA address.
  85. */
  86. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  87. {
  88. return dma_addr == ~0;
  89. }
  90. /*
  91. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  92. * function so drivers using this API are highlighted with build warnings.
  93. */
  94. static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
  95. dma_addr_t *handle, gfp_t gfp)
  96. {
  97. return NULL;
  98. }
  99. static inline void dma_free_noncoherent(struct device *dev, size_t size,
  100. void *cpu_addr, dma_addr_t handle)
  101. {
  102. }
  103. /**
  104. * dma_alloc_coherent - allocate consistent memory for DMA
  105. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  106. * @size: required memory size
  107. * @handle: bus-specific DMA address
  108. *
  109. * Allocate some uncached, unbuffered memory for a device for
  110. * performing DMA. This function allocates pages, and will
  111. * return the CPU-viewed address, and sets @handle to be the
  112. * device-viewed address.
  113. */
  114. extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
  115. /**
  116. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  117. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  118. * @size: size of memory originally requested in dma_alloc_coherent
  119. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  120. * @handle: device-view address returned from dma_alloc_coherent
  121. *
  122. * Free (and unmap) a DMA buffer previously allocated by
  123. * dma_alloc_coherent().
  124. *
  125. * References to memory and mappings associated with cpu_addr/handle
  126. * during and after this call executing are illegal.
  127. */
  128. extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
  129. /**
  130. * dma_mmap_coherent - map a coherent DMA allocation into user space
  131. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  132. * @vma: vm_area_struct describing requested user mapping
  133. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  134. * @handle: device-view address returned from dma_alloc_coherent
  135. * @size: size of memory originally requested in dma_alloc_coherent
  136. *
  137. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  138. * into user space. The coherent DMA buffer must not be freed by the
  139. * driver until the user space mapping has been released.
  140. */
  141. int dma_mmap_coherent(struct device *, struct vm_area_struct *,
  142. void *, dma_addr_t, size_t);
  143. /**
  144. * dma_alloc_writecombine - allocate writecombining memory for DMA
  145. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  146. * @size: required memory size
  147. * @handle: bus-specific DMA address
  148. *
  149. * Allocate some uncached, buffered memory for a device for
  150. * performing DMA. This function allocates pages, and will
  151. * return the CPU-viewed address, and sets @handle to be the
  152. * device-viewed address.
  153. */
  154. extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
  155. gfp_t);
  156. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  157. dma_free_coherent(dev,size,cpu_addr,handle)
  158. int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  159. void *, dma_addr_t, size_t);
  160. #ifdef CONFIG_DMABOUNCE
  161. /*
  162. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  163. * and utilize bounce buffers as needed to work around limited DMA windows.
  164. *
  165. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  166. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  167. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  168. *
  169. * The following are helper functions used by the dmabounce subystem
  170. *
  171. */
  172. /**
  173. * dmabounce_register_dev
  174. *
  175. * @dev: valid struct device pointer
  176. * @small_buf_size: size of buffers to use with small buffer pool
  177. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  178. *
  179. * This function should be called by low-level platform code to register
  180. * a device as requireing DMA buffer bouncing. The function will allocate
  181. * appropriate DMA pools for the device.
  182. *
  183. */
  184. extern int dmabounce_register_dev(struct device *, unsigned long,
  185. unsigned long);
  186. /**
  187. * dmabounce_unregister_dev
  188. *
  189. * @dev: valid struct device pointer
  190. *
  191. * This function should be called by low-level platform code when device
  192. * that was previously registered with dmabounce_register_dev is removed
  193. * from the system.
  194. *
  195. */
  196. extern void dmabounce_unregister_dev(struct device *);
  197. /**
  198. * dma_needs_bounce
  199. *
  200. * @dev: valid struct device pointer
  201. * @dma_handle: dma_handle of unbounced buffer
  202. * @size: size of region being mapped
  203. *
  204. * Platforms that utilize the dmabounce mechanism must implement
  205. * this function.
  206. *
  207. * The dmabounce routines call this function whenever a dma-mapping
  208. * is requested to determine whether a given buffer needs to be bounced
  209. * or not. The function must return 0 if the buffer is OK for
  210. * DMA access and 1 if the buffer needs to be bounced.
  211. *
  212. */
  213. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  214. /*
  215. * The DMA API, implemented by dmabounce.c. See below for descriptions.
  216. */
  217. extern dma_addr_t dma_map_single(struct device *, void *, size_t,
  218. enum dma_data_direction);
  219. extern dma_addr_t dma_map_page(struct device *, struct page *,
  220. unsigned long, size_t, enum dma_data_direction);
  221. extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
  222. enum dma_data_direction);
  223. /*
  224. * Private functions
  225. */
  226. int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
  227. size_t, enum dma_data_direction);
  228. int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
  229. size_t, enum dma_data_direction);
  230. #else
  231. static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
  232. unsigned long offset, size_t size, enum dma_data_direction dir)
  233. {
  234. return 1;
  235. }
  236. static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
  237. unsigned long offset, size_t size, enum dma_data_direction dir)
  238. {
  239. return 1;
  240. }
  241. /**
  242. * dma_map_single - map a single buffer for streaming DMA
  243. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  244. * @cpu_addr: CPU direct mapped address of buffer
  245. * @size: size of buffer to map
  246. * @dir: DMA transfer direction
  247. *
  248. * Ensure that any data held in the cache is appropriately discarded
  249. * or written back.
  250. *
  251. * The device owns this memory once this call has completed. The CPU
  252. * can regain ownership by calling dma_unmap_single() or
  253. * dma_sync_single_for_cpu().
  254. */
  255. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  256. size_t size, enum dma_data_direction dir)
  257. {
  258. BUG_ON(!valid_dma_direction(dir));
  259. if (!arch_is_coherent())
  260. dma_cache_maint(cpu_addr, size, dir);
  261. return virt_to_dma(dev, cpu_addr);
  262. }
  263. /**
  264. * dma_map_page - map a portion of a page for streaming DMA
  265. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  266. * @page: page that buffer resides in
  267. * @offset: offset into page for start of buffer
  268. * @size: size of buffer to map
  269. * @dir: DMA transfer direction
  270. *
  271. * Ensure that any data held in the cache is appropriately discarded
  272. * or written back.
  273. *
  274. * The device owns this memory once this call has completed. The CPU
  275. * can regain ownership by calling dma_unmap_page().
  276. */
  277. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  278. unsigned long offset, size_t size, enum dma_data_direction dir)
  279. {
  280. BUG_ON(!valid_dma_direction(dir));
  281. if (!arch_is_coherent())
  282. dma_cache_maint_page(page, offset, size, dir);
  283. return page_to_dma(dev, page) + offset;
  284. }
  285. /**
  286. * dma_unmap_single - unmap a single buffer previously mapped
  287. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  288. * @handle: DMA address of buffer
  289. * @size: size of buffer (same as passed to dma_map_single)
  290. * @dir: DMA transfer direction (same as passed to dma_map_single)
  291. *
  292. * Unmap a single streaming mode DMA translation. The handle and size
  293. * must match what was provided in the previous dma_map_single() call.
  294. * All other usages are undefined.
  295. *
  296. * After this call, reads by the CPU to the buffer are guaranteed to see
  297. * whatever the device wrote there.
  298. */
  299. static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
  300. size_t size, enum dma_data_direction dir)
  301. {
  302. /* nothing to do */
  303. }
  304. #endif /* CONFIG_DMABOUNCE */
  305. /**
  306. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  307. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  308. * @handle: DMA address of buffer
  309. * @size: size of buffer (same as passed to dma_map_page)
  310. * @dir: DMA transfer direction (same as passed to dma_map_page)
  311. *
  312. * Unmap a page streaming mode DMA translation. The handle and size
  313. * must match what was provided in the previous dma_map_page() call.
  314. * All other usages are undefined.
  315. *
  316. * After this call, reads by the CPU to the buffer are guaranteed to see
  317. * whatever the device wrote there.
  318. */
  319. static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
  320. size_t size, enum dma_data_direction dir)
  321. {
  322. dma_unmap_single(dev, handle, size, dir);
  323. }
  324. /**
  325. * dma_sync_single_range_for_cpu
  326. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  327. * @handle: DMA address of buffer
  328. * @offset: offset of region to start sync
  329. * @size: size of region to sync
  330. * @dir: DMA transfer direction (same as passed to dma_map_single)
  331. *
  332. * Make physical memory consistent for a single streaming mode DMA
  333. * translation after a transfer.
  334. *
  335. * If you perform a dma_map_single() but wish to interrogate the
  336. * buffer using the cpu, yet do not wish to teardown the PCI dma
  337. * mapping, you must call this function before doing so. At the
  338. * next point you give the PCI dma address back to the card, you
  339. * must first the perform a dma_sync_for_device, and then the
  340. * device again owns the buffer.
  341. */
  342. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  343. dma_addr_t handle, unsigned long offset, size_t size,
  344. enum dma_data_direction dir)
  345. {
  346. BUG_ON(!valid_dma_direction(dir));
  347. dmabounce_sync_for_cpu(dev, handle, offset, size, dir);
  348. }
  349. static inline void dma_sync_single_range_for_device(struct device *dev,
  350. dma_addr_t handle, unsigned long offset, size_t size,
  351. enum dma_data_direction dir)
  352. {
  353. BUG_ON(!valid_dma_direction(dir));
  354. if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
  355. return;
  356. if (!arch_is_coherent())
  357. dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
  358. }
  359. static inline void dma_sync_single_for_cpu(struct device *dev,
  360. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  361. {
  362. dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
  363. }
  364. static inline void dma_sync_single_for_device(struct device *dev,
  365. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  366. {
  367. dma_sync_single_range_for_device(dev, handle, 0, size, dir);
  368. }
  369. /*
  370. * The scatter list versions of the above methods.
  371. */
  372. extern int dma_map_sg(struct device *, struct scatterlist *, int,
  373. enum dma_data_direction);
  374. extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
  375. enum dma_data_direction);
  376. extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
  377. enum dma_data_direction);
  378. extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
  379. enum dma_data_direction);
  380. #endif /* __KERNEL__ */
  381. #endif