rtl8187_dev.c 24 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187 USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Realtek */
  31. {USB_DEVICE(0x0bda, 0x8187)},
  32. /* Netgear */
  33. {USB_DEVICE(0x0846, 0x6100)},
  34. {USB_DEVICE(0x0846, 0x6a00)},
  35. /* HP */
  36. {USB_DEVICE(0x03f0, 0xca02)},
  37. /* Sitecom */
  38. {USB_DEVICE(0x0df6, 0x000d)},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  42. static const struct ieee80211_rate rtl818x_rates[] = {
  43. { .bitrate = 10, .hw_value = 0, },
  44. { .bitrate = 20, .hw_value = 1, },
  45. { .bitrate = 55, .hw_value = 2, },
  46. { .bitrate = 110, .hw_value = 3, },
  47. { .bitrate = 60, .hw_value = 4, },
  48. { .bitrate = 90, .hw_value = 5, },
  49. { .bitrate = 120, .hw_value = 6, },
  50. { .bitrate = 180, .hw_value = 7, },
  51. { .bitrate = 240, .hw_value = 8, },
  52. { .bitrate = 360, .hw_value = 9, },
  53. { .bitrate = 480, .hw_value = 10, },
  54. { .bitrate = 540, .hw_value = 11, },
  55. };
  56. static const struct ieee80211_channel rtl818x_channels[] = {
  57. { .center_freq = 2412 },
  58. { .center_freq = 2417 },
  59. { .center_freq = 2422 },
  60. { .center_freq = 2427 },
  61. { .center_freq = 2432 },
  62. { .center_freq = 2437 },
  63. { .center_freq = 2442 },
  64. { .center_freq = 2447 },
  65. { .center_freq = 2452 },
  66. { .center_freq = 2457 },
  67. { .center_freq = 2462 },
  68. { .center_freq = 2467 },
  69. { .center_freq = 2472 },
  70. { .center_freq = 2484 },
  71. };
  72. static void rtl8187_iowrite_async_cb(struct urb *urb)
  73. {
  74. kfree(urb->context);
  75. usb_free_urb(urb);
  76. }
  77. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  78. void *data, u16 len)
  79. {
  80. struct usb_ctrlrequest *dr;
  81. struct urb *urb;
  82. struct rtl8187_async_write_data {
  83. u8 data[4];
  84. struct usb_ctrlrequest dr;
  85. } *buf;
  86. int rc;
  87. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  88. if (!buf)
  89. return;
  90. urb = usb_alloc_urb(0, GFP_ATOMIC);
  91. if (!urb) {
  92. kfree(buf);
  93. return;
  94. }
  95. dr = &buf->dr;
  96. dr->bRequestType = RTL8187_REQT_WRITE;
  97. dr->bRequest = RTL8187_REQ_SET_REG;
  98. dr->wValue = addr;
  99. dr->wIndex = 0;
  100. dr->wLength = cpu_to_le16(len);
  101. memcpy(buf, data, len);
  102. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  103. (unsigned char *)dr, buf, len,
  104. rtl8187_iowrite_async_cb, buf);
  105. rc = usb_submit_urb(urb, GFP_ATOMIC);
  106. if (rc < 0) {
  107. kfree(buf);
  108. usb_free_urb(urb);
  109. }
  110. }
  111. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  112. __le32 *addr, u32 val)
  113. {
  114. __le32 buf = cpu_to_le32(val);
  115. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  116. &buf, sizeof(buf));
  117. }
  118. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  119. {
  120. struct rtl8187_priv *priv = dev->priv;
  121. data <<= 8;
  122. data |= addr | 0x80;
  123. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  124. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  125. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  126. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  127. msleep(1);
  128. }
  129. static void rtl8187_tx_cb(struct urb *urb)
  130. {
  131. struct ieee80211_tx_status status;
  132. struct sk_buff *skb = (struct sk_buff *)urb->context;
  133. struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
  134. memset(&status, 0, sizeof(status));
  135. usb_free_urb(info->urb);
  136. if (info->control)
  137. memcpy(&status.control, info->control, sizeof(status.control));
  138. kfree(info->control);
  139. skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
  140. status.flags |= IEEE80211_TX_STATUS_ACK;
  141. ieee80211_tx_status_irqsafe(info->dev, skb, &status);
  142. }
  143. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  144. struct ieee80211_tx_control *control)
  145. {
  146. struct rtl8187_priv *priv = dev->priv;
  147. struct rtl8187_tx_hdr *hdr;
  148. struct rtl8187_tx_info *info;
  149. struct urb *urb;
  150. __le16 rts_dur = 0;
  151. u32 flags;
  152. int rc;
  153. urb = usb_alloc_urb(0, GFP_ATOMIC);
  154. if (!urb) {
  155. kfree_skb(skb);
  156. return 0;
  157. }
  158. flags = skb->len;
  159. flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
  160. BUG_ON(!control->tx_rate);
  161. flags |= control->tx_rate->hw_value << 24;
  162. if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
  163. flags |= RTL8187_TX_FLAG_MORE_FRAG;
  164. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  165. BUG_ON(!control->rts_cts_rate);
  166. flags |= RTL8187_TX_FLAG_RTS;
  167. flags |= control->rts_cts_rate->hw_value << 19;
  168. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  169. skb->len, control);
  170. } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  171. BUG_ON(!control->rts_cts_rate);
  172. flags |= RTL8187_TX_FLAG_CTS;
  173. flags |= control->rts_cts_rate->hw_value << 19;
  174. }
  175. hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  176. hdr->flags = cpu_to_le32(flags);
  177. hdr->len = 0;
  178. hdr->rts_duration = rts_dur;
  179. hdr->retry = cpu_to_le32(control->retry_limit << 8);
  180. info = (struct rtl8187_tx_info *)skb->cb;
  181. info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
  182. info->urb = urb;
  183. info->dev = dev;
  184. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
  185. hdr, skb->len, rtl8187_tx_cb, skb);
  186. rc = usb_submit_urb(urb, GFP_ATOMIC);
  187. if (rc < 0) {
  188. usb_free_urb(urb);
  189. kfree_skb(skb);
  190. }
  191. return 0;
  192. }
  193. static void rtl8187_rx_cb(struct urb *urb)
  194. {
  195. struct sk_buff *skb = (struct sk_buff *)urb->context;
  196. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  197. struct ieee80211_hw *dev = info->dev;
  198. struct rtl8187_priv *priv = dev->priv;
  199. struct rtl8187_rx_hdr *hdr;
  200. struct ieee80211_rx_status rx_status = { 0 };
  201. int rate, signal;
  202. u32 flags;
  203. spin_lock(&priv->rx_queue.lock);
  204. if (skb->next)
  205. __skb_unlink(skb, &priv->rx_queue);
  206. else {
  207. spin_unlock(&priv->rx_queue.lock);
  208. return;
  209. }
  210. spin_unlock(&priv->rx_queue.lock);
  211. if (unlikely(urb->status)) {
  212. usb_free_urb(urb);
  213. dev_kfree_skb_irq(skb);
  214. return;
  215. }
  216. skb_put(skb, urb->actual_length);
  217. hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
  218. flags = le32_to_cpu(hdr->flags);
  219. skb_trim(skb, flags & 0x0FFF);
  220. signal = hdr->agc >> 1;
  221. rate = (flags >> 20) & 0xF;
  222. if (rate > 3) { /* OFDM rate */
  223. if (signal > 90)
  224. signal = 90;
  225. else if (signal < 25)
  226. signal = 25;
  227. signal = 90 - signal;
  228. } else { /* CCK rate */
  229. if (signal > 95)
  230. signal = 95;
  231. else if (signal < 30)
  232. signal = 30;
  233. signal = 95 - signal;
  234. }
  235. rx_status.antenna = (hdr->signal >> 7) & 1;
  236. rx_status.qual = 64 - min(hdr->noise, (u8)64);
  237. rx_status.signal = signal;
  238. rx_status.rate_idx = rate;
  239. rx_status.freq = dev->conf.channel->center_freq;
  240. rx_status.band = dev->conf.channel->band;
  241. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  242. rx_status.flag |= RX_FLAG_TSFT;
  243. if (flags & (1 << 13))
  244. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  245. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  246. skb = dev_alloc_skb(RTL8187_MAX_RX);
  247. if (unlikely(!skb)) {
  248. usb_free_urb(urb);
  249. /* TODO check rx queue length and refill *somewhere* */
  250. return;
  251. }
  252. info = (struct rtl8187_rx_info *)skb->cb;
  253. info->urb = urb;
  254. info->dev = dev;
  255. urb->transfer_buffer = skb_tail_pointer(skb);
  256. urb->context = skb;
  257. skb_queue_tail(&priv->rx_queue, skb);
  258. usb_submit_urb(urb, GFP_ATOMIC);
  259. }
  260. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  261. {
  262. struct rtl8187_priv *priv = dev->priv;
  263. struct urb *entry;
  264. struct sk_buff *skb;
  265. struct rtl8187_rx_info *info;
  266. while (skb_queue_len(&priv->rx_queue) < 8) {
  267. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  268. if (!skb)
  269. break;
  270. entry = usb_alloc_urb(0, GFP_KERNEL);
  271. if (!entry) {
  272. kfree_skb(skb);
  273. break;
  274. }
  275. usb_fill_bulk_urb(entry, priv->udev,
  276. usb_rcvbulkpipe(priv->udev, 1),
  277. skb_tail_pointer(skb),
  278. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  279. info = (struct rtl8187_rx_info *)skb->cb;
  280. info->urb = entry;
  281. info->dev = dev;
  282. skb_queue_tail(&priv->rx_queue, skb);
  283. usb_submit_urb(entry, GFP_KERNEL);
  284. }
  285. return 0;
  286. }
  287. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  288. {
  289. struct rtl8187_priv *priv = dev->priv;
  290. u8 reg;
  291. int i;
  292. /* reset */
  293. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  294. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  295. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  296. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  297. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  298. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  299. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  300. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  301. msleep(200);
  302. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  303. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  304. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  305. msleep(200);
  306. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  307. reg &= (1 << 1);
  308. reg |= RTL818X_CMD_RESET;
  309. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  310. i = 10;
  311. do {
  312. msleep(2);
  313. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  314. RTL818X_CMD_RESET))
  315. break;
  316. } while (--i);
  317. if (!i) {
  318. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  319. return -ETIMEDOUT;
  320. }
  321. /* reload registers from eeprom */
  322. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  323. i = 10;
  324. do {
  325. msleep(4);
  326. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  327. RTL818X_EEPROM_CMD_CONFIG))
  328. break;
  329. } while (--i);
  330. if (!i) {
  331. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  332. wiphy_name(dev->wiphy));
  333. return -ETIMEDOUT;
  334. }
  335. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  336. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  337. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  338. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  339. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  340. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  341. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  342. /* setup card */
  343. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  344. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  345. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  346. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  347. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  348. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  349. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  350. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  351. reg &= 0x3F;
  352. reg |= 0x80;
  353. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  354. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  355. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  356. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  357. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  358. // TODO: set RESP_RATE and BRSR properly
  359. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  360. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  361. /* host_usb_init */
  362. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  363. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  364. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  365. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  366. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  367. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  368. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  369. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  370. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  371. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  372. msleep(100);
  373. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  374. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  375. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  376. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  377. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  378. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  379. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  380. msleep(100);
  381. priv->rf->init(dev);
  382. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  383. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  384. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  385. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  386. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  387. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  388. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  389. return 0;
  390. }
  391. static int rtl8187_start(struct ieee80211_hw *dev)
  392. {
  393. struct rtl8187_priv *priv = dev->priv;
  394. u32 reg;
  395. int ret;
  396. ret = rtl8187_init_hw(dev);
  397. if (ret)
  398. return ret;
  399. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  400. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  401. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  402. rtl8187_init_urbs(dev);
  403. reg = RTL818X_RX_CONF_ONLYERLPKT |
  404. RTL818X_RX_CONF_RX_AUTORESETPHY |
  405. RTL818X_RX_CONF_BSSID |
  406. RTL818X_RX_CONF_MGMT |
  407. RTL818X_RX_CONF_DATA |
  408. (7 << 13 /* RX FIFO threshold NONE */) |
  409. (7 << 10 /* MAX RX DMA */) |
  410. RTL818X_RX_CONF_BROADCAST |
  411. RTL818X_RX_CONF_NICMAC;
  412. priv->rx_conf = reg;
  413. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  414. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  415. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  416. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  417. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  418. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  419. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  420. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  421. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  422. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  423. reg = RTL818X_TX_CONF_CW_MIN |
  424. (7 << 21 /* MAX TX DMA */) |
  425. RTL818X_TX_CONF_NO_ICV;
  426. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  427. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  428. reg |= RTL818X_CMD_TX_ENABLE;
  429. reg |= RTL818X_CMD_RX_ENABLE;
  430. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  431. return 0;
  432. }
  433. static void rtl8187_stop(struct ieee80211_hw *dev)
  434. {
  435. struct rtl8187_priv *priv = dev->priv;
  436. struct rtl8187_rx_info *info;
  437. struct sk_buff *skb;
  438. u32 reg;
  439. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  440. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  441. reg &= ~RTL818X_CMD_TX_ENABLE;
  442. reg &= ~RTL818X_CMD_RX_ENABLE;
  443. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  444. priv->rf->stop(dev);
  445. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  446. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  447. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  448. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  449. while ((skb = skb_dequeue(&priv->rx_queue))) {
  450. info = (struct rtl8187_rx_info *)skb->cb;
  451. usb_kill_urb(info->urb);
  452. kfree_skb(skb);
  453. }
  454. return;
  455. }
  456. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  457. struct ieee80211_if_init_conf *conf)
  458. {
  459. struct rtl8187_priv *priv = dev->priv;
  460. int i;
  461. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  462. return -EOPNOTSUPP;
  463. switch (conf->type) {
  464. case IEEE80211_IF_TYPE_STA:
  465. priv->mode = conf->type;
  466. break;
  467. default:
  468. return -EOPNOTSUPP;
  469. }
  470. priv->vif = conf->vif;
  471. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  472. for (i = 0; i < ETH_ALEN; i++)
  473. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  474. ((u8 *)conf->mac_addr)[i]);
  475. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  476. return 0;
  477. }
  478. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  479. struct ieee80211_if_init_conf *conf)
  480. {
  481. struct rtl8187_priv *priv = dev->priv;
  482. priv->mode = IEEE80211_IF_TYPE_MNTR;
  483. priv->vif = NULL;
  484. }
  485. static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  486. {
  487. struct rtl8187_priv *priv = dev->priv;
  488. u32 reg;
  489. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  490. /* Enable TX loopback on MAC level to avoid TX during channel
  491. * changes, as this has be seen to causes problems and the
  492. * card will stop work until next reset
  493. */
  494. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  495. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  496. msleep(10);
  497. priv->rf->set_chan(dev, conf);
  498. msleep(10);
  499. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  500. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  501. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  502. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  503. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  504. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  505. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  506. } else {
  507. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  508. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  509. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  510. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  511. }
  512. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  513. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  514. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  515. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  516. return 0;
  517. }
  518. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  519. struct ieee80211_vif *vif,
  520. struct ieee80211_if_conf *conf)
  521. {
  522. struct rtl8187_priv *priv = dev->priv;
  523. int i;
  524. for (i = 0; i < ETH_ALEN; i++)
  525. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  526. if (is_valid_ether_addr(conf->bssid))
  527. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
  528. else
  529. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
  530. return 0;
  531. }
  532. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  533. unsigned int changed_flags,
  534. unsigned int *total_flags,
  535. int mc_count, struct dev_addr_list *mclist)
  536. {
  537. struct rtl8187_priv *priv = dev->priv;
  538. if (changed_flags & FIF_FCSFAIL)
  539. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  540. if (changed_flags & FIF_CONTROL)
  541. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  542. if (changed_flags & FIF_OTHER_BSS)
  543. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  544. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  545. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  546. else
  547. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  548. *total_flags = 0;
  549. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  550. *total_flags |= FIF_FCSFAIL;
  551. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  552. *total_flags |= FIF_CONTROL;
  553. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  554. *total_flags |= FIF_OTHER_BSS;
  555. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  556. *total_flags |= FIF_ALLMULTI;
  557. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  558. }
  559. static const struct ieee80211_ops rtl8187_ops = {
  560. .tx = rtl8187_tx,
  561. .start = rtl8187_start,
  562. .stop = rtl8187_stop,
  563. .add_interface = rtl8187_add_interface,
  564. .remove_interface = rtl8187_remove_interface,
  565. .config = rtl8187_config,
  566. .config_interface = rtl8187_config_interface,
  567. .configure_filter = rtl8187_configure_filter,
  568. };
  569. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  570. {
  571. struct ieee80211_hw *dev = eeprom->data;
  572. struct rtl8187_priv *priv = dev->priv;
  573. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  574. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  575. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  576. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  577. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  578. }
  579. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  580. {
  581. struct ieee80211_hw *dev = eeprom->data;
  582. struct rtl8187_priv *priv = dev->priv;
  583. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  584. if (eeprom->reg_data_in)
  585. reg |= RTL818X_EEPROM_CMD_WRITE;
  586. if (eeprom->reg_data_out)
  587. reg |= RTL818X_EEPROM_CMD_READ;
  588. if (eeprom->reg_data_clock)
  589. reg |= RTL818X_EEPROM_CMD_CK;
  590. if (eeprom->reg_chip_select)
  591. reg |= RTL818X_EEPROM_CMD_CS;
  592. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  593. udelay(10);
  594. }
  595. static int __devinit rtl8187_probe(struct usb_interface *intf,
  596. const struct usb_device_id *id)
  597. {
  598. struct usb_device *udev = interface_to_usbdev(intf);
  599. struct ieee80211_hw *dev;
  600. struct rtl8187_priv *priv;
  601. struct eeprom_93cx6 eeprom;
  602. struct ieee80211_channel *channel;
  603. u16 txpwr, reg;
  604. int err, i;
  605. DECLARE_MAC_BUF(mac);
  606. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  607. if (!dev) {
  608. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  609. return -ENOMEM;
  610. }
  611. priv = dev->priv;
  612. SET_IEEE80211_DEV(dev, &intf->dev);
  613. usb_set_intfdata(intf, dev);
  614. priv->udev = udev;
  615. usb_get_dev(udev);
  616. skb_queue_head_init(&priv->rx_queue);
  617. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  618. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  619. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  620. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  621. priv->map = (struct rtl818x_csr *)0xFF00;
  622. priv->band.band = IEEE80211_BAND_2GHZ;
  623. priv->band.channels = priv->channels;
  624. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  625. priv->band.bitrates = priv->rates;
  626. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  627. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  628. priv->mode = IEEE80211_IF_TYPE_MNTR;
  629. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  630. IEEE80211_HW_RX_INCLUDES_FCS |
  631. IEEE80211_HW_SIGNAL_UNSPEC;
  632. dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
  633. dev->queues = 1;
  634. dev->max_signal = 65;
  635. eeprom.data = dev;
  636. eeprom.register_read = rtl8187_eeprom_register_read;
  637. eeprom.register_write = rtl8187_eeprom_register_write;
  638. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  639. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  640. else
  641. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  642. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  643. udelay(10);
  644. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  645. (__le16 __force *)dev->wiphy->perm_addr, 3);
  646. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  647. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  648. "generated MAC address\n");
  649. random_ether_addr(dev->wiphy->perm_addr);
  650. }
  651. channel = priv->channels;
  652. for (i = 0; i < 3; i++) {
  653. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  654. &txpwr);
  655. (*channel++).hw_value = txpwr & 0xFF;
  656. (*channel++).hw_value = txpwr >> 8;
  657. }
  658. for (i = 0; i < 2; i++) {
  659. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  660. &txpwr);
  661. (*channel++).hw_value = txpwr & 0xFF;
  662. (*channel++).hw_value = txpwr >> 8;
  663. }
  664. for (i = 0; i < 2; i++) {
  665. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  666. &txpwr);
  667. (*channel++).hw_value = txpwr & 0xFF;
  668. (*channel++).hw_value = txpwr >> 8;
  669. }
  670. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  671. &priv->txpwr_base);
  672. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  673. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  674. /* 0 means asic B-cut, we should use SW 3 wire
  675. * bit-by-bit banging for radio. 1 means we can use
  676. * USB specific request to write radio registers */
  677. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  678. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  679. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  680. priv->rf = rtl8187_detect_rf(dev);
  681. err = ieee80211_register_hw(dev);
  682. if (err) {
  683. printk(KERN_ERR "rtl8187: Cannot register device\n");
  684. goto err_free_dev;
  685. }
  686. printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
  687. wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
  688. priv->asic_rev, priv->rf->name);
  689. return 0;
  690. err_free_dev:
  691. ieee80211_free_hw(dev);
  692. usb_set_intfdata(intf, NULL);
  693. usb_put_dev(udev);
  694. return err;
  695. }
  696. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  697. {
  698. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  699. struct rtl8187_priv *priv;
  700. if (!dev)
  701. return;
  702. ieee80211_unregister_hw(dev);
  703. priv = dev->priv;
  704. usb_put_dev(interface_to_usbdev(intf));
  705. ieee80211_free_hw(dev);
  706. }
  707. static struct usb_driver rtl8187_driver = {
  708. .name = KBUILD_MODNAME,
  709. .id_table = rtl8187_table,
  710. .probe = rtl8187_probe,
  711. .disconnect = rtl8187_disconnect,
  712. };
  713. static int __init rtl8187_init(void)
  714. {
  715. return usb_register(&rtl8187_driver);
  716. }
  717. static void __exit rtl8187_exit(void)
  718. {
  719. usb_deregister(&rtl8187_driver);
  720. }
  721. module_init(rtl8187_init);
  722. module_exit(rtl8187_exit);