sunxi.txt 1.3 KB

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  1. Device Tree Clock bindings for arch-sunxi
  2. This binding uses the common clock binding[1].
  3. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  4. Required properties:
  5. - compatible : shall be one of the following:
  6. "allwinner,sun4i-osc-clk" - for a gatable oscillator
  7. "allwinner,sun4i-pll1-clk" - for the main PLL clock
  8. "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
  9. "allwinner,sun4i-axi-clk" - for the AXI clock
  10. "allwinner,sun4i-ahb-clk" - for the AHB clock
  11. "allwinner,sun4i-apb0-clk" - for the APB0 clock
  12. "allwinner,sun4i-apb1-clk" - for the APB1 clock
  13. "allwinner,sun4i-apb1-mux-clk" - for the APB1 clock muxing
  14. Required properties for all clocks:
  15. - reg : shall be the control register address for the clock.
  16. - clocks : shall be the input parent clock(s) phandle for the clock
  17. - #clock-cells : from common clock binding; shall be set to 0.
  18. For example:
  19. osc24M: osc24M@01c20050 {
  20. #clock-cells = <0>;
  21. compatible = "allwinner,sun4i-osc-clk";
  22. reg = <0x01c20050 0x4>;
  23. clocks = <&osc24M_fixed>;
  24. };
  25. pll1: pll1@01c20000 {
  26. #clock-cells = <0>;
  27. compatible = "allwinner,sun4i-pll1-clk";
  28. reg = <0x01c20000 0x4>;
  29. clocks = <&osc24M>;
  30. };
  31. cpu: cpu@01c20054 {
  32. #clock-cells = <0>;
  33. compatible = "allwinner,sun4i-cpu-clk";
  34. reg = <0x01c20054 0x4>;
  35. clocks = <&osc32k>, <&osc24M>, <&pll1>;
  36. };