omap-cpufreq.c 8.0 KB

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  1. /*
  2. * CPU frequency scaling for OMAP using OPP information
  3. *
  4. * Copyright (C) 2005 Nokia Corporation
  5. * Written by Tony Lindgren <tony@atomide.com>
  6. *
  7. * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
  8. *
  9. * Copyright (C) 2007-2011 Texas Instruments, Inc.
  10. * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/cpufreq.h>
  20. #include <linux/delay.h>
  21. #include <linux/init.h>
  22. #include <linux/err.h>
  23. #include <linux/clk.h>
  24. #include <linux/io.h>
  25. #include <linux/opp.h>
  26. #include <linux/cpu.h>
  27. #include <linux/module.h>
  28. #include <linux/regulator/consumer.h>
  29. #include <asm/system.h>
  30. #include <asm/smp_plat.h>
  31. #include <asm/cpu.h>
  32. #include <plat/clock.h>
  33. #include <plat/omap-pm.h>
  34. #include <plat/common.h>
  35. #include <plat/omap_device.h>
  36. #include <mach/hardware.h>
  37. /* OPP tolerance in percentage */
  38. #define OPP_TOLERANCE 4
  39. #ifdef CONFIG_SMP
  40. struct lpj_info {
  41. unsigned long ref;
  42. unsigned int freq;
  43. };
  44. static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
  45. static struct lpj_info global_lpj_ref;
  46. #endif
  47. static struct cpufreq_frequency_table *freq_table;
  48. static atomic_t freq_table_users = ATOMIC_INIT(0);
  49. static struct clk *mpu_clk;
  50. static char *mpu_clk_name;
  51. static struct device *mpu_dev;
  52. static struct regulator *mpu_reg;
  53. static int omap_verify_speed(struct cpufreq_policy *policy)
  54. {
  55. if (!freq_table)
  56. return -EINVAL;
  57. return cpufreq_frequency_table_verify(policy, freq_table);
  58. }
  59. static unsigned int omap_getspeed(unsigned int cpu)
  60. {
  61. unsigned long rate;
  62. if (cpu >= NR_CPUS)
  63. return 0;
  64. rate = clk_get_rate(mpu_clk) / 1000;
  65. return rate;
  66. }
  67. static int omap_target(struct cpufreq_policy *policy,
  68. unsigned int target_freq,
  69. unsigned int relation)
  70. {
  71. unsigned int i;
  72. int r, ret = 0;
  73. struct cpufreq_freqs freqs;
  74. struct opp *opp;
  75. unsigned long freq, volt = 0, volt_old = 0, tol = 0;
  76. if (!freq_table) {
  77. dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
  78. policy->cpu);
  79. return -EINVAL;
  80. }
  81. ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
  82. relation, &i);
  83. if (ret) {
  84. dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
  85. __func__, policy->cpu, target_freq, ret);
  86. return ret;
  87. }
  88. freqs.new = freq_table[i].frequency;
  89. if (!freqs.new) {
  90. dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
  91. policy->cpu, target_freq);
  92. return -EINVAL;
  93. }
  94. freqs.old = omap_getspeed(policy->cpu);
  95. freqs.cpu = policy->cpu;
  96. if (freqs.old == freqs.new && policy->cur == freqs.new)
  97. return ret;
  98. /* notifiers */
  99. for_each_cpu(i, policy->cpus) {
  100. freqs.cpu = i;
  101. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  102. }
  103. freq = freqs.new * 1000;
  104. if (mpu_reg) {
  105. opp = opp_find_freq_ceil(mpu_dev, &freq);
  106. if (IS_ERR(opp)) {
  107. dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
  108. __func__, freqs.new);
  109. return -EINVAL;
  110. }
  111. volt = opp_get_voltage(opp);
  112. tol = volt * OPP_TOLERANCE / 100;
  113. volt_old = regulator_get_voltage(mpu_reg);
  114. }
  115. dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
  116. freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
  117. freqs.new / 1000, volt ? volt / 1000 : -1);
  118. /* scaling up? scale voltage before frequency */
  119. if (mpu_reg && (freqs.new > freqs.old)) {
  120. r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
  121. if (r < 0) {
  122. dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
  123. __func__);
  124. freqs.new = freqs.old;
  125. goto done;
  126. }
  127. }
  128. ret = clk_set_rate(mpu_clk, freqs.new * 1000);
  129. /* scaling down? scale voltage after frequency */
  130. if (mpu_reg && (freqs.new < freqs.old)) {
  131. r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
  132. if (r < 0) {
  133. dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
  134. __func__);
  135. ret = clk_set_rate(mpu_clk, freqs.old * 1000);
  136. freqs.new = freqs.old;
  137. goto done;
  138. }
  139. }
  140. freqs.new = omap_getspeed(policy->cpu);
  141. #ifdef CONFIG_SMP
  142. /*
  143. * Note that loops_per_jiffy is not updated on SMP systems in
  144. * cpufreq driver. So, update the per-CPU loops_per_jiffy value
  145. * on frequency transition. We need to update all dependent CPUs.
  146. */
  147. for_each_cpu(i, policy->cpus) {
  148. struct lpj_info *lpj = &per_cpu(lpj_ref, i);
  149. if (!lpj->freq) {
  150. lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
  151. lpj->freq = freqs.old;
  152. }
  153. per_cpu(cpu_data, i).loops_per_jiffy =
  154. cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
  155. }
  156. /* And don't forget to adjust the global one */
  157. if (!global_lpj_ref.freq) {
  158. global_lpj_ref.ref = loops_per_jiffy;
  159. global_lpj_ref.freq = freqs.old;
  160. }
  161. loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
  162. freqs.new);
  163. #endif
  164. done:
  165. /* notifiers */
  166. for_each_cpu(i, policy->cpus) {
  167. freqs.cpu = i;
  168. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  169. }
  170. return ret;
  171. }
  172. static inline void freq_table_free(void)
  173. {
  174. if (atomic_dec_and_test(&freq_table_users))
  175. opp_free_cpufreq_table(mpu_dev, &freq_table);
  176. }
  177. static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
  178. {
  179. int result = 0;
  180. mpu_clk = clk_get(NULL, mpu_clk_name);
  181. if (IS_ERR(mpu_clk))
  182. return PTR_ERR(mpu_clk);
  183. if (policy->cpu >= NR_CPUS) {
  184. result = -EINVAL;
  185. goto fail_ck;
  186. }
  187. policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
  188. if (atomic_inc_return(&freq_table_users) == 1)
  189. result = opp_init_cpufreq_table(mpu_dev, &freq_table);
  190. if (result) {
  191. dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
  192. __func__, policy->cpu, result);
  193. goto fail_ck;
  194. }
  195. result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
  196. if (result)
  197. goto fail_table;
  198. cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
  199. policy->min = policy->cpuinfo.min_freq;
  200. policy->max = policy->cpuinfo.max_freq;
  201. policy->cur = omap_getspeed(policy->cpu);
  202. /*
  203. * On OMAP SMP configuartion, both processors share the voltage
  204. * and clock. So both CPUs needs to be scaled together and hence
  205. * needs software co-ordination. Use cpufreq affected_cpus
  206. * interface to handle this scenario. Additional is_smp() check
  207. * is to keep SMP_ON_UP build working.
  208. */
  209. if (is_smp()) {
  210. policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
  211. cpumask_setall(policy->cpus);
  212. }
  213. /* FIXME: what's the actual transition time? */
  214. policy->cpuinfo.transition_latency = 300 * 1000;
  215. return 0;
  216. fail_table:
  217. freq_table_free();
  218. fail_ck:
  219. clk_put(mpu_clk);
  220. return result;
  221. }
  222. static int omap_cpu_exit(struct cpufreq_policy *policy)
  223. {
  224. freq_table_free();
  225. clk_put(mpu_clk);
  226. return 0;
  227. }
  228. static struct freq_attr *omap_cpufreq_attr[] = {
  229. &cpufreq_freq_attr_scaling_available_freqs,
  230. NULL,
  231. };
  232. static struct cpufreq_driver omap_driver = {
  233. .flags = CPUFREQ_STICKY,
  234. .verify = omap_verify_speed,
  235. .target = omap_target,
  236. .get = omap_getspeed,
  237. .init = omap_cpu_init,
  238. .exit = omap_cpu_exit,
  239. .name = "omap",
  240. .attr = omap_cpufreq_attr,
  241. };
  242. static int __init omap_cpufreq_init(void)
  243. {
  244. if (cpu_is_omap24xx())
  245. mpu_clk_name = "virt_prcm_set";
  246. else if (cpu_is_omap34xx())
  247. mpu_clk_name = "dpll1_ck";
  248. else if (cpu_is_omap44xx())
  249. mpu_clk_name = "dpll_mpu_ck";
  250. if (!mpu_clk_name) {
  251. pr_err("%s: unsupported Silicon?\n", __func__);
  252. return -EINVAL;
  253. }
  254. mpu_dev = omap_device_get_by_hwmod_name("mpu");
  255. if (!mpu_dev) {
  256. pr_warning("%s: unable to get the mpu device\n", __func__);
  257. return -EINVAL;
  258. }
  259. mpu_reg = regulator_get(mpu_dev, "vcc");
  260. if (IS_ERR(mpu_reg)) {
  261. pr_warning("%s: unable to get MPU regulator\n", __func__);
  262. mpu_reg = NULL;
  263. } else {
  264. /*
  265. * Ensure physical regulator is present.
  266. * (e.g. could be dummy regulator.)
  267. */
  268. if (regulator_get_voltage(mpu_reg) < 0) {
  269. pr_warn("%s: physical regulator not present for MPU\n",
  270. __func__);
  271. regulator_put(mpu_reg);
  272. mpu_reg = NULL;
  273. }
  274. }
  275. return cpufreq_register_driver(&omap_driver);
  276. }
  277. static void __exit omap_cpufreq_exit(void)
  278. {
  279. cpufreq_unregister_driver(&omap_driver);
  280. }
  281. MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
  282. MODULE_LICENSE("GPL");
  283. module_init(omap_cpufreq_init);
  284. module_exit(omap_cpufreq_exit);