pinctrl-samsung.c 32 KB

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  1. /*
  2. * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * Author: Thomas Abraham <thomas.ab@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This driver implements the Samsung pinctrl driver. It supports setting up of
  17. * pinmux and pinconf configurations. The gpiolib interface is also included.
  18. * External interrupt (gpio and wakeup) support are not included in this driver
  19. * but provides extensions to which platform specific implementation of the gpio
  20. * and wakeup interrupts can be hooked to.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/slab.h>
  26. #include <linux/err.h>
  27. #include <linux/gpio.h>
  28. #include <linux/irqdomain.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/syscore_ops.h>
  31. #include "core.h"
  32. #include "pinctrl-samsung.h"
  33. #define GROUP_SUFFIX "-grp"
  34. #define GSUFFIX_LEN sizeof(GROUP_SUFFIX)
  35. #define FUNCTION_SUFFIX "-mux"
  36. #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
  37. /* list of all possible config options supported */
  38. static struct pin_config {
  39. char *prop_cfg;
  40. unsigned int cfg_type;
  41. } pcfgs[] = {
  42. { "samsung,pin-pud", PINCFG_TYPE_PUD },
  43. { "samsung,pin-drv", PINCFG_TYPE_DRV },
  44. { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
  45. { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
  46. };
  47. /* Global list of devices (struct samsung_pinctrl_drv_data) */
  48. LIST_HEAD(drvdata_list);
  49. static unsigned int pin_base;
  50. static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
  51. {
  52. return container_of(gc, struct samsung_pin_bank, gpio_chip);
  53. }
  54. /* check if the selector is a valid pin group selector */
  55. static int samsung_get_group_count(struct pinctrl_dev *pctldev)
  56. {
  57. struct samsung_pinctrl_drv_data *drvdata;
  58. drvdata = pinctrl_dev_get_drvdata(pctldev);
  59. return drvdata->nr_groups;
  60. }
  61. /* return the name of the group selected by the group selector */
  62. static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
  63. unsigned selector)
  64. {
  65. struct samsung_pinctrl_drv_data *drvdata;
  66. drvdata = pinctrl_dev_get_drvdata(pctldev);
  67. return drvdata->pin_groups[selector].name;
  68. }
  69. /* return the pin numbers associated with the specified group */
  70. static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
  71. unsigned selector, const unsigned **pins, unsigned *num_pins)
  72. {
  73. struct samsung_pinctrl_drv_data *drvdata;
  74. drvdata = pinctrl_dev_get_drvdata(pctldev);
  75. *pins = drvdata->pin_groups[selector].pins;
  76. *num_pins = drvdata->pin_groups[selector].num_pins;
  77. return 0;
  78. }
  79. /* create pinctrl_map entries by parsing device tree nodes */
  80. static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
  81. struct device_node *np, struct pinctrl_map **maps,
  82. unsigned *nmaps)
  83. {
  84. struct device *dev = pctldev->dev;
  85. struct pinctrl_map *map;
  86. unsigned long *cfg = NULL;
  87. char *gname, *fname;
  88. int cfg_cnt = 0, map_cnt = 0, idx = 0;
  89. /* count the number of config options specfied in the node */
  90. for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
  91. if (of_find_property(np, pcfgs[idx].prop_cfg, NULL))
  92. cfg_cnt++;
  93. }
  94. /*
  95. * Find out the number of map entries to create. All the config options
  96. * can be accomadated into a single config map entry.
  97. */
  98. if (cfg_cnt)
  99. map_cnt = 1;
  100. if (of_find_property(np, "samsung,pin-function", NULL))
  101. map_cnt++;
  102. if (!map_cnt) {
  103. dev_err(dev, "node %s does not have either config or function "
  104. "configurations\n", np->name);
  105. return -EINVAL;
  106. }
  107. /* Allocate memory for pin-map entries */
  108. map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL);
  109. if (!map) {
  110. dev_err(dev, "could not alloc memory for pin-maps\n");
  111. return -ENOMEM;
  112. }
  113. *nmaps = 0;
  114. /*
  115. * Allocate memory for pin group name. The pin group name is derived
  116. * from the node name from which these map entries are be created.
  117. */
  118. gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL);
  119. if (!gname) {
  120. dev_err(dev, "failed to alloc memory for group name\n");
  121. goto free_map;
  122. }
  123. sprintf(gname, "%s%s", np->name, GROUP_SUFFIX);
  124. /*
  125. * don't have config options? then skip over to creating function
  126. * map entries.
  127. */
  128. if (!cfg_cnt)
  129. goto skip_cfgs;
  130. /* Allocate memory for config entries */
  131. cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL);
  132. if (!cfg) {
  133. dev_err(dev, "failed to alloc memory for configs\n");
  134. goto free_gname;
  135. }
  136. /* Prepare a list of config settings */
  137. for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
  138. u32 value;
  139. if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value))
  140. cfg[cfg_cnt++] =
  141. PINCFG_PACK(pcfgs[idx].cfg_type, value);
  142. }
  143. /* create the config map entry */
  144. map[*nmaps].data.configs.group_or_pin = gname;
  145. map[*nmaps].data.configs.configs = cfg;
  146. map[*nmaps].data.configs.num_configs = cfg_cnt;
  147. map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
  148. *nmaps += 1;
  149. skip_cfgs:
  150. /* create the function map entry */
  151. if (of_find_property(np, "samsung,pin-function", NULL)) {
  152. fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL);
  153. if (!fname) {
  154. dev_err(dev, "failed to alloc memory for func name\n");
  155. goto free_cfg;
  156. }
  157. sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX);
  158. map[*nmaps].data.mux.group = gname;
  159. map[*nmaps].data.mux.function = fname;
  160. map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP;
  161. *nmaps += 1;
  162. }
  163. *maps = map;
  164. return 0;
  165. free_cfg:
  166. kfree(cfg);
  167. free_gname:
  168. kfree(gname);
  169. free_map:
  170. kfree(map);
  171. return -ENOMEM;
  172. }
  173. /* free the memory allocated to hold the pin-map table */
  174. static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
  175. struct pinctrl_map *map, unsigned num_maps)
  176. {
  177. int idx;
  178. for (idx = 0; idx < num_maps; idx++) {
  179. if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) {
  180. kfree(map[idx].data.mux.function);
  181. if (!idx)
  182. kfree(map[idx].data.mux.group);
  183. } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) {
  184. kfree(map[idx].data.configs.configs);
  185. if (!idx)
  186. kfree(map[idx].data.configs.group_or_pin);
  187. }
  188. };
  189. kfree(map);
  190. }
  191. /* list of pinctrl callbacks for the pinctrl core */
  192. static const struct pinctrl_ops samsung_pctrl_ops = {
  193. .get_groups_count = samsung_get_group_count,
  194. .get_group_name = samsung_get_group_name,
  195. .get_group_pins = samsung_get_group_pins,
  196. .dt_node_to_map = samsung_dt_node_to_map,
  197. .dt_free_map = samsung_dt_free_map,
  198. };
  199. /* check if the selector is a valid pin function selector */
  200. static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
  201. {
  202. struct samsung_pinctrl_drv_data *drvdata;
  203. drvdata = pinctrl_dev_get_drvdata(pctldev);
  204. return drvdata->nr_functions;
  205. }
  206. /* return the name of the pin function specified */
  207. static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
  208. unsigned selector)
  209. {
  210. struct samsung_pinctrl_drv_data *drvdata;
  211. drvdata = pinctrl_dev_get_drvdata(pctldev);
  212. return drvdata->pmx_functions[selector].name;
  213. }
  214. /* return the groups associated for the specified function selector */
  215. static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
  216. unsigned selector, const char * const **groups,
  217. unsigned * const num_groups)
  218. {
  219. struct samsung_pinctrl_drv_data *drvdata;
  220. drvdata = pinctrl_dev_get_drvdata(pctldev);
  221. *groups = drvdata->pmx_functions[selector].groups;
  222. *num_groups = drvdata->pmx_functions[selector].num_groups;
  223. return 0;
  224. }
  225. /*
  226. * given a pin number that is local to a pin controller, find out the pin bank
  227. * and the register base of the pin bank.
  228. */
  229. static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
  230. unsigned pin, void __iomem **reg, u32 *offset,
  231. struct samsung_pin_bank **bank)
  232. {
  233. struct samsung_pin_bank *b;
  234. b = drvdata->ctrl->pin_banks;
  235. while ((pin >= b->pin_base) &&
  236. ((b->pin_base + b->nr_pins - 1) < pin))
  237. b++;
  238. *reg = drvdata->virt_base + b->pctl_offset;
  239. *offset = pin - b->pin_base;
  240. if (bank)
  241. *bank = b;
  242. }
  243. /* enable or disable a pinmux function */
  244. static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
  245. unsigned group, bool enable)
  246. {
  247. struct samsung_pinctrl_drv_data *drvdata;
  248. const unsigned int *pins;
  249. struct samsung_pin_bank *bank;
  250. void __iomem *reg;
  251. u32 mask, shift, data, pin_offset, cnt;
  252. unsigned long flags;
  253. drvdata = pinctrl_dev_get_drvdata(pctldev);
  254. pins = drvdata->pin_groups[group].pins;
  255. /*
  256. * for each pin in the pin group selected, program the correspoding pin
  257. * pin function number in the config register.
  258. */
  259. for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) {
  260. struct samsung_pin_bank_type *type;
  261. pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base,
  262. &reg, &pin_offset, &bank);
  263. type = bank->type;
  264. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  265. shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
  266. if (shift >= 32) {
  267. /* Some banks have two config registers */
  268. shift -= 32;
  269. reg += 4;
  270. }
  271. spin_lock_irqsave(&bank->slock, flags);
  272. data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  273. data &= ~(mask << shift);
  274. if (enable)
  275. data |= drvdata->pin_groups[group].func << shift;
  276. writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  277. spin_unlock_irqrestore(&bank->slock, flags);
  278. }
  279. }
  280. /* enable a specified pinmux by writing to registers */
  281. static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector,
  282. unsigned group)
  283. {
  284. samsung_pinmux_setup(pctldev, selector, group, true);
  285. return 0;
  286. }
  287. /* disable a specified pinmux by writing to registers */
  288. static void samsung_pinmux_disable(struct pinctrl_dev *pctldev,
  289. unsigned selector, unsigned group)
  290. {
  291. samsung_pinmux_setup(pctldev, selector, group, false);
  292. }
  293. /*
  294. * The calls to gpio_direction_output() and gpio_direction_input()
  295. * leads to this function call (via the pinctrl_gpio_direction_{input|output}()
  296. * function called from the gpiolib interface).
  297. */
  298. static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
  299. struct pinctrl_gpio_range *range, unsigned offset, bool input)
  300. {
  301. struct samsung_pin_bank_type *type;
  302. struct samsung_pin_bank *bank;
  303. struct samsung_pinctrl_drv_data *drvdata;
  304. void __iomem *reg;
  305. u32 data, pin_offset, mask, shift;
  306. unsigned long flags;
  307. bank = gc_to_pin_bank(range->gc);
  308. type = bank->type;
  309. drvdata = pinctrl_dev_get_drvdata(pctldev);
  310. pin_offset = offset - bank->pin_base;
  311. reg = drvdata->virt_base + bank->pctl_offset +
  312. type->reg_offset[PINCFG_TYPE_FUNC];
  313. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  314. shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
  315. if (shift >= 32) {
  316. /* Some banks have two config registers */
  317. shift -= 32;
  318. reg += 4;
  319. }
  320. spin_lock_irqsave(&bank->slock, flags);
  321. data = readl(reg);
  322. data &= ~(mask << shift);
  323. if (!input)
  324. data |= FUNC_OUTPUT << shift;
  325. writel(data, reg);
  326. spin_unlock_irqrestore(&bank->slock, flags);
  327. return 0;
  328. }
  329. /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
  330. static const struct pinmux_ops samsung_pinmux_ops = {
  331. .get_functions_count = samsung_get_functions_count,
  332. .get_function_name = samsung_pinmux_get_fname,
  333. .get_function_groups = samsung_pinmux_get_groups,
  334. .enable = samsung_pinmux_enable,
  335. .disable = samsung_pinmux_disable,
  336. .gpio_set_direction = samsung_pinmux_gpio_set_direction,
  337. };
  338. /* set or get the pin config settings for a specified pin */
  339. static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
  340. unsigned long *config, bool set)
  341. {
  342. struct samsung_pinctrl_drv_data *drvdata;
  343. struct samsung_pin_bank_type *type;
  344. struct samsung_pin_bank *bank;
  345. void __iomem *reg_base;
  346. enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
  347. u32 data, width, pin_offset, mask, shift;
  348. u32 cfg_value, cfg_reg;
  349. unsigned long flags;
  350. drvdata = pinctrl_dev_get_drvdata(pctldev);
  351. pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, &reg_base,
  352. &pin_offset, &bank);
  353. type = bank->type;
  354. if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
  355. return -EINVAL;
  356. width = type->fld_width[cfg_type];
  357. cfg_reg = type->reg_offset[cfg_type];
  358. spin_lock_irqsave(&bank->slock, flags);
  359. mask = (1 << width) - 1;
  360. shift = pin_offset * width;
  361. data = readl(reg_base + cfg_reg);
  362. if (set) {
  363. cfg_value = PINCFG_UNPACK_VALUE(*config);
  364. data &= ~(mask << shift);
  365. data |= (cfg_value << shift);
  366. writel(data, reg_base + cfg_reg);
  367. } else {
  368. data >>= shift;
  369. data &= mask;
  370. *config = PINCFG_PACK(cfg_type, data);
  371. }
  372. spin_unlock_irqrestore(&bank->slock, flags);
  373. return 0;
  374. }
  375. /* set the pin config settings for a specified pin */
  376. static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
  377. unsigned long config)
  378. {
  379. return samsung_pinconf_rw(pctldev, pin, &config, true);
  380. }
  381. /* get the pin config settings for a specified pin */
  382. static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
  383. unsigned long *config)
  384. {
  385. return samsung_pinconf_rw(pctldev, pin, config, false);
  386. }
  387. /* set the pin config settings for a specified pin group */
  388. static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
  389. unsigned group, unsigned long config)
  390. {
  391. struct samsung_pinctrl_drv_data *drvdata;
  392. const unsigned int *pins;
  393. unsigned int cnt;
  394. drvdata = pinctrl_dev_get_drvdata(pctldev);
  395. pins = drvdata->pin_groups[group].pins;
  396. for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
  397. samsung_pinconf_set(pctldev, pins[cnt], config);
  398. return 0;
  399. }
  400. /* get the pin config settings for a specified pin group */
  401. static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
  402. unsigned int group, unsigned long *config)
  403. {
  404. struct samsung_pinctrl_drv_data *drvdata;
  405. const unsigned int *pins;
  406. drvdata = pinctrl_dev_get_drvdata(pctldev);
  407. pins = drvdata->pin_groups[group].pins;
  408. samsung_pinconf_get(pctldev, pins[0], config);
  409. return 0;
  410. }
  411. /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
  412. static const struct pinconf_ops samsung_pinconf_ops = {
  413. .pin_config_get = samsung_pinconf_get,
  414. .pin_config_set = samsung_pinconf_set,
  415. .pin_config_group_get = samsung_pinconf_group_get,
  416. .pin_config_group_set = samsung_pinconf_group_set,
  417. };
  418. /* gpiolib gpio_set callback function */
  419. static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
  420. {
  421. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  422. struct samsung_pin_bank_type *type = bank->type;
  423. unsigned long flags;
  424. void __iomem *reg;
  425. u32 data;
  426. reg = bank->drvdata->virt_base + bank->pctl_offset;
  427. spin_lock_irqsave(&bank->slock, flags);
  428. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  429. data &= ~(1 << offset);
  430. if (value)
  431. data |= 1 << offset;
  432. writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
  433. spin_unlock_irqrestore(&bank->slock, flags);
  434. }
  435. /* gpiolib gpio_get callback function */
  436. static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
  437. {
  438. void __iomem *reg;
  439. u32 data;
  440. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  441. struct samsung_pin_bank_type *type = bank->type;
  442. reg = bank->drvdata->virt_base + bank->pctl_offset;
  443. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  444. data >>= offset;
  445. data &= 1;
  446. return data;
  447. }
  448. /*
  449. * gpiolib gpio_direction_input callback function. The setting of the pin
  450. * mux function as 'gpio input' will be handled by the pinctrl susbsystem
  451. * interface.
  452. */
  453. static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
  454. {
  455. return pinctrl_gpio_direction_input(gc->base + offset);
  456. }
  457. /*
  458. * gpiolib gpio_direction_output callback function. The setting of the pin
  459. * mux function as 'gpio output' will be handled by the pinctrl susbsystem
  460. * interface.
  461. */
  462. static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
  463. int value)
  464. {
  465. samsung_gpio_set(gc, offset, value);
  466. return pinctrl_gpio_direction_output(gc->base + offset);
  467. }
  468. /*
  469. * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
  470. * and a virtual IRQ, if not already present.
  471. */
  472. static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
  473. {
  474. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  475. unsigned int virq;
  476. if (!bank->irq_domain)
  477. return -ENXIO;
  478. virq = irq_create_mapping(bank->irq_domain, offset);
  479. return (virq) ? : -ENXIO;
  480. }
  481. /*
  482. * Parse the pin names listed in the 'samsung,pins' property and convert it
  483. * into a list of gpio numbers are create a pin group from it.
  484. */
  485. static int samsung_pinctrl_parse_dt_pins(struct platform_device *pdev,
  486. struct device_node *cfg_np,
  487. struct pinctrl_desc *pctl,
  488. unsigned int **pin_list,
  489. unsigned int *npins)
  490. {
  491. struct device *dev = &pdev->dev;
  492. struct property *prop;
  493. struct pinctrl_pin_desc const *pdesc = pctl->pins;
  494. unsigned int idx = 0, cnt;
  495. const char *pin_name;
  496. *npins = of_property_count_strings(cfg_np, "samsung,pins");
  497. if (IS_ERR_VALUE(*npins)) {
  498. dev_err(dev, "invalid pin list in %s node", cfg_np->name);
  499. return -EINVAL;
  500. }
  501. *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL);
  502. if (!*pin_list) {
  503. dev_err(dev, "failed to allocate memory for pin list\n");
  504. return -ENOMEM;
  505. }
  506. of_property_for_each_string(cfg_np, "samsung,pins", prop, pin_name) {
  507. for (cnt = 0; cnt < pctl->npins; cnt++) {
  508. if (pdesc[cnt].name) {
  509. if (!strcmp(pin_name, pdesc[cnt].name)) {
  510. (*pin_list)[idx++] = pdesc[cnt].number;
  511. break;
  512. }
  513. }
  514. }
  515. if (cnt == pctl->npins) {
  516. dev_err(dev, "pin %s not valid in %s node\n",
  517. pin_name, cfg_np->name);
  518. devm_kfree(dev, *pin_list);
  519. return -EINVAL;
  520. }
  521. }
  522. return 0;
  523. }
  524. /*
  525. * Parse the information about all the available pin groups and pin functions
  526. * from device node of the pin-controller. A pin group is formed with all
  527. * the pins listed in the "samsung,pins" property.
  528. */
  529. static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
  530. struct samsung_pinctrl_drv_data *drvdata)
  531. {
  532. struct device *dev = &pdev->dev;
  533. struct device_node *dev_np = dev->of_node;
  534. struct device_node *cfg_np;
  535. struct samsung_pin_group *groups, *grp;
  536. struct samsung_pmx_func *functions, *func;
  537. unsigned *pin_list;
  538. unsigned int npins, grp_cnt, func_idx = 0;
  539. char *gname, *fname;
  540. int ret;
  541. grp_cnt = of_get_child_count(dev_np);
  542. if (!grp_cnt)
  543. return -EINVAL;
  544. groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL);
  545. if (!groups) {
  546. dev_err(dev, "failed allocate memory for ping group list\n");
  547. return -EINVAL;
  548. }
  549. grp = groups;
  550. functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL);
  551. if (!functions) {
  552. dev_err(dev, "failed to allocate memory for function list\n");
  553. return -EINVAL;
  554. }
  555. func = functions;
  556. /*
  557. * Iterate over all the child nodes of the pin controller node
  558. * and create pin groups and pin function lists.
  559. */
  560. for_each_child_of_node(dev_np, cfg_np) {
  561. u32 function;
  562. if (!of_find_property(cfg_np, "samsung,pins", NULL))
  563. continue;
  564. ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np,
  565. &drvdata->pctl, &pin_list, &npins);
  566. if (ret)
  567. return ret;
  568. /* derive pin group name from the node name */
  569. gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN,
  570. GFP_KERNEL);
  571. if (!gname) {
  572. dev_err(dev, "failed to alloc memory for group name\n");
  573. return -ENOMEM;
  574. }
  575. sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX);
  576. grp->name = gname;
  577. grp->pins = pin_list;
  578. grp->num_pins = npins;
  579. of_property_read_u32(cfg_np, "samsung,pin-function", &function);
  580. grp->func = function;
  581. grp++;
  582. if (!of_find_property(cfg_np, "samsung,pin-function", NULL))
  583. continue;
  584. /* derive function name from the node name */
  585. fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN,
  586. GFP_KERNEL);
  587. if (!fname) {
  588. dev_err(dev, "failed to alloc memory for func name\n");
  589. return -ENOMEM;
  590. }
  591. sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX);
  592. func->name = fname;
  593. func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL);
  594. if (!func->groups) {
  595. dev_err(dev, "failed to alloc memory for group list "
  596. "in pin function");
  597. return -ENOMEM;
  598. }
  599. func->groups[0] = gname;
  600. func->num_groups = 1;
  601. func++;
  602. func_idx++;
  603. }
  604. drvdata->pin_groups = groups;
  605. drvdata->nr_groups = grp_cnt;
  606. drvdata->pmx_functions = functions;
  607. drvdata->nr_functions = func_idx;
  608. return 0;
  609. }
  610. /* register the pinctrl interface with the pinctrl subsystem */
  611. static int samsung_pinctrl_register(struct platform_device *pdev,
  612. struct samsung_pinctrl_drv_data *drvdata)
  613. {
  614. struct pinctrl_desc *ctrldesc = &drvdata->pctl;
  615. struct pinctrl_pin_desc *pindesc, *pdesc;
  616. struct samsung_pin_bank *pin_bank;
  617. char *pin_names;
  618. int pin, bank, ret;
  619. ctrldesc->name = "samsung-pinctrl";
  620. ctrldesc->owner = THIS_MODULE;
  621. ctrldesc->pctlops = &samsung_pctrl_ops;
  622. ctrldesc->pmxops = &samsung_pinmux_ops;
  623. ctrldesc->confops = &samsung_pinconf_ops;
  624. pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
  625. drvdata->ctrl->nr_pins, GFP_KERNEL);
  626. if (!pindesc) {
  627. dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
  628. return -ENOMEM;
  629. }
  630. ctrldesc->pins = pindesc;
  631. ctrldesc->npins = drvdata->ctrl->nr_pins;
  632. /* dynamically populate the pin number and pin name for pindesc */
  633. for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
  634. pdesc->number = pin + drvdata->ctrl->base;
  635. /*
  636. * allocate space for storing the dynamically generated names for all
  637. * the pins which belong to this pin-controller.
  638. */
  639. pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
  640. drvdata->ctrl->nr_pins, GFP_KERNEL);
  641. if (!pin_names) {
  642. dev_err(&pdev->dev, "mem alloc for pin names failed\n");
  643. return -ENOMEM;
  644. }
  645. /* for each pin, the name of the pin is pin-bank name + pin number */
  646. for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) {
  647. pin_bank = &drvdata->ctrl->pin_banks[bank];
  648. for (pin = 0; pin < pin_bank->nr_pins; pin++) {
  649. sprintf(pin_names, "%s-%d", pin_bank->name, pin);
  650. pdesc = pindesc + pin_bank->pin_base + pin;
  651. pdesc->name = pin_names;
  652. pin_names += PIN_NAME_LENGTH;
  653. }
  654. }
  655. drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
  656. if (!drvdata->pctl_dev) {
  657. dev_err(&pdev->dev, "could not register pinctrl driver\n");
  658. return -EINVAL;
  659. }
  660. for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) {
  661. pin_bank = &drvdata->ctrl->pin_banks[bank];
  662. pin_bank->grange.name = pin_bank->name;
  663. pin_bank->grange.id = bank;
  664. pin_bank->grange.pin_base = pin_bank->pin_base;
  665. pin_bank->grange.base = pin_bank->gpio_chip.base;
  666. pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
  667. pin_bank->grange.gc = &pin_bank->gpio_chip;
  668. pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
  669. }
  670. ret = samsung_pinctrl_parse_dt(pdev, drvdata);
  671. if (ret) {
  672. pinctrl_unregister(drvdata->pctl_dev);
  673. return ret;
  674. }
  675. return 0;
  676. }
  677. static const struct gpio_chip samsung_gpiolib_chip = {
  678. .set = samsung_gpio_set,
  679. .get = samsung_gpio_get,
  680. .direction_input = samsung_gpio_direction_input,
  681. .direction_output = samsung_gpio_direction_output,
  682. .to_irq = samsung_gpio_to_irq,
  683. .owner = THIS_MODULE,
  684. };
  685. /* register the gpiolib interface with the gpiolib subsystem */
  686. static int samsung_gpiolib_register(struct platform_device *pdev,
  687. struct samsung_pinctrl_drv_data *drvdata)
  688. {
  689. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  690. struct samsung_pin_bank *bank = ctrl->pin_banks;
  691. struct gpio_chip *gc;
  692. int ret;
  693. int i;
  694. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  695. bank->gpio_chip = samsung_gpiolib_chip;
  696. gc = &bank->gpio_chip;
  697. gc->base = ctrl->base + bank->pin_base;
  698. gc->ngpio = bank->nr_pins;
  699. gc->dev = &pdev->dev;
  700. gc->of_node = bank->of_node;
  701. gc->label = bank->name;
  702. ret = gpiochip_add(gc);
  703. if (ret) {
  704. dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
  705. gc->label, ret);
  706. goto fail;
  707. }
  708. }
  709. return 0;
  710. fail:
  711. for (--i, --bank; i >= 0; --i, --bank)
  712. if (gpiochip_remove(&bank->gpio_chip))
  713. dev_err(&pdev->dev, "gpio chip %s remove failed\n",
  714. bank->gpio_chip.label);
  715. return ret;
  716. }
  717. /* unregister the gpiolib interface with the gpiolib subsystem */
  718. static int samsung_gpiolib_unregister(struct platform_device *pdev,
  719. struct samsung_pinctrl_drv_data *drvdata)
  720. {
  721. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  722. struct samsung_pin_bank *bank = ctrl->pin_banks;
  723. int ret = 0;
  724. int i;
  725. for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank)
  726. ret = gpiochip_remove(&bank->gpio_chip);
  727. if (ret)
  728. dev_err(&pdev->dev, "gpio chip remove failed\n");
  729. return ret;
  730. }
  731. static const struct of_device_id samsung_pinctrl_dt_match[];
  732. /* retrieve the soc specific data */
  733. static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
  734. struct samsung_pinctrl_drv_data *d,
  735. struct platform_device *pdev)
  736. {
  737. int id;
  738. const struct of_device_id *match;
  739. struct device_node *node = pdev->dev.of_node;
  740. struct device_node *np;
  741. struct samsung_pin_ctrl *ctrl;
  742. struct samsung_pin_bank *bank;
  743. int i;
  744. id = of_alias_get_id(node, "pinctrl");
  745. if (id < 0) {
  746. dev_err(&pdev->dev, "failed to get alias id\n");
  747. return NULL;
  748. }
  749. match = of_match_node(samsung_pinctrl_dt_match, node);
  750. ctrl = (struct samsung_pin_ctrl *)match->data + id;
  751. bank = ctrl->pin_banks;
  752. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  753. spin_lock_init(&bank->slock);
  754. bank->drvdata = d;
  755. bank->pin_base = ctrl->nr_pins;
  756. ctrl->nr_pins += bank->nr_pins;
  757. }
  758. for_each_child_of_node(node, np) {
  759. if (!of_find_property(np, "gpio-controller", NULL))
  760. continue;
  761. bank = ctrl->pin_banks;
  762. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  763. if (!strcmp(bank->name, np->name)) {
  764. bank->of_node = np;
  765. break;
  766. }
  767. }
  768. }
  769. ctrl->base = pin_base;
  770. pin_base += ctrl->nr_pins;
  771. return ctrl;
  772. }
  773. static int samsung_pinctrl_probe(struct platform_device *pdev)
  774. {
  775. struct samsung_pinctrl_drv_data *drvdata;
  776. struct device *dev = &pdev->dev;
  777. struct samsung_pin_ctrl *ctrl;
  778. struct resource *res;
  779. int ret;
  780. if (!dev->of_node) {
  781. dev_err(dev, "device tree node not found\n");
  782. return -ENODEV;
  783. }
  784. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  785. if (!drvdata) {
  786. dev_err(dev, "failed to allocate memory for driver's "
  787. "private data\n");
  788. return -ENOMEM;
  789. }
  790. ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
  791. if (!ctrl) {
  792. dev_err(&pdev->dev, "driver data not available\n");
  793. return -EINVAL;
  794. }
  795. drvdata->ctrl = ctrl;
  796. drvdata->dev = dev;
  797. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  798. drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
  799. if (IS_ERR(drvdata->virt_base))
  800. return PTR_ERR(drvdata->virt_base);
  801. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  802. if (res)
  803. drvdata->irq = res->start;
  804. ret = samsung_gpiolib_register(pdev, drvdata);
  805. if (ret)
  806. return ret;
  807. ret = samsung_pinctrl_register(pdev, drvdata);
  808. if (ret) {
  809. samsung_gpiolib_unregister(pdev, drvdata);
  810. return ret;
  811. }
  812. if (ctrl->eint_gpio_init)
  813. ctrl->eint_gpio_init(drvdata);
  814. if (ctrl->eint_wkup_init)
  815. ctrl->eint_wkup_init(drvdata);
  816. platform_set_drvdata(pdev, drvdata);
  817. /* Add to the global list */
  818. list_add_tail(&drvdata->node, &drvdata_list);
  819. return 0;
  820. }
  821. #ifdef CONFIG_PM
  822. /**
  823. * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
  824. *
  825. * Save data for all banks handled by this device.
  826. */
  827. static void samsung_pinctrl_suspend_dev(
  828. struct samsung_pinctrl_drv_data *drvdata)
  829. {
  830. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  831. void __iomem *virt_base = drvdata->virt_base;
  832. int i;
  833. for (i = 0; i < ctrl->nr_banks; i++) {
  834. struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
  835. void __iomem *reg = virt_base + bank->pctl_offset;
  836. u8 *offs = bank->type->reg_offset;
  837. u8 *widths = bank->type->fld_width;
  838. enum pincfg_type type;
  839. /* Registers without a powerdown config aren't lost */
  840. if (!widths[PINCFG_TYPE_CON_PDN])
  841. continue;
  842. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  843. if (widths[type])
  844. bank->pm_save[type] = readl(reg + offs[type]);
  845. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  846. /* Some banks have two config registers */
  847. bank->pm_save[PINCFG_TYPE_NUM] =
  848. readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
  849. pr_debug("Save %s @ %p (con %#010x %08x)\n",
  850. bank->name, reg,
  851. bank->pm_save[PINCFG_TYPE_FUNC],
  852. bank->pm_save[PINCFG_TYPE_NUM]);
  853. } else {
  854. pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
  855. reg, bank->pm_save[PINCFG_TYPE_FUNC]);
  856. }
  857. }
  858. if (ctrl->suspend)
  859. ctrl->suspend(drvdata);
  860. }
  861. /**
  862. * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
  863. *
  864. * Restore one of the banks that was saved during suspend.
  865. *
  866. * We don't bother doing anything complicated to avoid glitching lines since
  867. * we're called before pad retention is turned off.
  868. */
  869. static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
  870. {
  871. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  872. void __iomem *virt_base = drvdata->virt_base;
  873. int i;
  874. if (ctrl->resume)
  875. ctrl->resume(drvdata);
  876. for (i = 0; i < ctrl->nr_banks; i++) {
  877. struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
  878. void __iomem *reg = virt_base + bank->pctl_offset;
  879. u8 *offs = bank->type->reg_offset;
  880. u8 *widths = bank->type->fld_width;
  881. enum pincfg_type type;
  882. /* Registers without a powerdown config aren't lost */
  883. if (!widths[PINCFG_TYPE_CON_PDN])
  884. continue;
  885. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  886. /* Some banks have two config registers */
  887. pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
  888. bank->name, reg,
  889. readl(reg + offs[PINCFG_TYPE_FUNC]),
  890. readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
  891. bank->pm_save[PINCFG_TYPE_FUNC],
  892. bank->pm_save[PINCFG_TYPE_NUM]);
  893. writel(bank->pm_save[PINCFG_TYPE_NUM],
  894. reg + offs[PINCFG_TYPE_FUNC] + 4);
  895. } else {
  896. pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
  897. reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
  898. bank->pm_save[PINCFG_TYPE_FUNC]);
  899. }
  900. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  901. if (widths[type])
  902. writel(bank->pm_save[type], reg + offs[type]);
  903. }
  904. }
  905. /**
  906. * samsung_pinctrl_suspend - save pinctrl state for suspend
  907. *
  908. * Save data for all banks across all devices.
  909. */
  910. static int samsung_pinctrl_suspend(void)
  911. {
  912. struct samsung_pinctrl_drv_data *drvdata;
  913. list_for_each_entry(drvdata, &drvdata_list, node) {
  914. samsung_pinctrl_suspend_dev(drvdata);
  915. }
  916. return 0;
  917. }
  918. /**
  919. * samsung_pinctrl_resume - restore pinctrl state for suspend
  920. *
  921. * Restore data for all banks across all devices.
  922. */
  923. static void samsung_pinctrl_resume(void)
  924. {
  925. struct samsung_pinctrl_drv_data *drvdata;
  926. list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
  927. samsung_pinctrl_resume_dev(drvdata);
  928. }
  929. }
  930. #else
  931. #define samsung_pinctrl_suspend NULL
  932. #define samsung_pinctrl_resume NULL
  933. #endif
  934. static struct syscore_ops samsung_pinctrl_syscore_ops = {
  935. .suspend = samsung_pinctrl_suspend,
  936. .resume = samsung_pinctrl_resume,
  937. };
  938. static const struct of_device_id samsung_pinctrl_dt_match[] = {
  939. #ifdef CONFIG_PINCTRL_EXYNOS
  940. { .compatible = "samsung,exynos4210-pinctrl",
  941. .data = (void *)exynos4210_pin_ctrl },
  942. { .compatible = "samsung,exynos4x12-pinctrl",
  943. .data = (void *)exynos4x12_pin_ctrl },
  944. { .compatible = "samsung,exynos5250-pinctrl",
  945. .data = (void *)exynos5250_pin_ctrl },
  946. { .compatible = "samsung,exynos5420-pinctrl",
  947. .data = (void *)exynos5420_pin_ctrl },
  948. #endif
  949. #ifdef CONFIG_PINCTRL_S3C64XX
  950. { .compatible = "samsung,s3c64xx-pinctrl",
  951. .data = s3c64xx_pin_ctrl },
  952. #endif
  953. #ifdef CONFIG_PINCTRL_S3C24XX
  954. { .compatible = "samsung,s3c2412-pinctrl",
  955. .data = s3c2412_pin_ctrl },
  956. { .compatible = "samsung,s3c2416-pinctrl",
  957. .data = s3c2416_pin_ctrl },
  958. { .compatible = "samsung,s3c2440-pinctrl",
  959. .data = s3c2440_pin_ctrl },
  960. { .compatible = "samsung,s3c2450-pinctrl",
  961. .data = s3c2450_pin_ctrl },
  962. #endif
  963. {},
  964. };
  965. MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
  966. static struct platform_driver samsung_pinctrl_driver = {
  967. .probe = samsung_pinctrl_probe,
  968. .driver = {
  969. .name = "samsung-pinctrl",
  970. .owner = THIS_MODULE,
  971. .of_match_table = of_match_ptr(samsung_pinctrl_dt_match),
  972. },
  973. };
  974. static int __init samsung_pinctrl_drv_register(void)
  975. {
  976. /*
  977. * Register syscore ops for save/restore of registers across suspend.
  978. * It's important to ensure that this driver is running at an earlier
  979. * initcall level than any arch-specific init calls that install syscore
  980. * ops that turn off pad retention (like exynos_pm_resume).
  981. */
  982. register_syscore_ops(&samsung_pinctrl_syscore_ops);
  983. return platform_driver_register(&samsung_pinctrl_driver);
  984. }
  985. postcore_initcall(samsung_pinctrl_drv_register);
  986. static void __exit samsung_pinctrl_drv_unregister(void)
  987. {
  988. platform_driver_unregister(&samsung_pinctrl_driver);
  989. }
  990. module_exit(samsung_pinctrl_drv_unregister);
  991. MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
  992. MODULE_DESCRIPTION("Samsung pinctrl driver");
  993. MODULE_LICENSE("GPL v2");