board-da850-evm.c 16 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/nand.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/regulator/machine.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <mach/cp_intc.h>
  30. #include <mach/da8xx.h>
  31. #include <mach/nand.h>
  32. #include <mach/mux.h>
  33. #define DA850_EVM_PHY_MASK 0x1
  34. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  35. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  36. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  37. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  38. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  39. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  40. static struct mtd_partition da850_evm_norflash_partition[] = {
  41. {
  42. .name = "NOR filesystem",
  43. .offset = 0,
  44. .size = MTDPART_SIZ_FULL,
  45. .mask_flags = 0,
  46. },
  47. };
  48. static struct physmap_flash_data da850_evm_norflash_data = {
  49. .width = 2,
  50. .parts = da850_evm_norflash_partition,
  51. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  52. };
  53. static struct resource da850_evm_norflash_resource[] = {
  54. {
  55. .start = DA8XX_AEMIF_CS2_BASE,
  56. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. };
  60. static struct platform_device da850_evm_norflash_device = {
  61. .name = "physmap-flash",
  62. .id = 0,
  63. .dev = {
  64. .platform_data = &da850_evm_norflash_data,
  65. },
  66. .num_resources = 1,
  67. .resource = da850_evm_norflash_resource,
  68. };
  69. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  70. * (128K blocks). It may be used instead of the (default) SPI flash
  71. * to boot, using TI's tools to install the secondary boot loader
  72. * (UBL) and U-Boot.
  73. */
  74. struct mtd_partition da850_evm_nandflash_partition[] = {
  75. {
  76. .name = "u-boot env",
  77. .offset = 0,
  78. .size = SZ_128K,
  79. .mask_flags = MTD_WRITEABLE,
  80. },
  81. {
  82. .name = "UBL",
  83. .offset = MTDPART_OFS_APPEND,
  84. .size = SZ_128K,
  85. .mask_flags = MTD_WRITEABLE,
  86. },
  87. {
  88. .name = "u-boot",
  89. .offset = MTDPART_OFS_APPEND,
  90. .size = 4 * SZ_128K,
  91. .mask_flags = MTD_WRITEABLE,
  92. },
  93. {
  94. .name = "kernel",
  95. .offset = 0x200000,
  96. .size = SZ_2M,
  97. .mask_flags = 0,
  98. },
  99. {
  100. .name = "filesystem",
  101. .offset = MTDPART_OFS_APPEND,
  102. .size = MTDPART_SIZ_FULL,
  103. .mask_flags = 0,
  104. },
  105. };
  106. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  107. .parts = da850_evm_nandflash_partition,
  108. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  109. .ecc_mode = NAND_ECC_HW,
  110. .options = NAND_USE_FLASH_BBT,
  111. };
  112. static struct resource da850_evm_nandflash_resource[] = {
  113. {
  114. .start = DA8XX_AEMIF_CS3_BASE,
  115. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = DA8XX_AEMIF_CTL_BASE,
  120. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. };
  124. static struct platform_device da850_evm_nandflash_device = {
  125. .name = "davinci_nand",
  126. .id = 1,
  127. .dev = {
  128. .platform_data = &da850_evm_nandflash_data,
  129. },
  130. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  131. .resource = da850_evm_nandflash_resource,
  132. };
  133. static u32 ui_card_detected;
  134. static void da850_evm_setup_nor_nand(void);
  135. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  136. unsigned ngpio, void *c)
  137. {
  138. struct davinci_soc_info *soc_info = &davinci_soc_info;
  139. int sel_a, sel_b, sel_c, ret;
  140. sel_a = gpio + 7;
  141. sel_b = gpio + 6;
  142. sel_c = gpio + 5;
  143. ret = gpio_request(sel_a, "sel_a");
  144. if (ret) {
  145. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  146. goto exp_setup_sela_fail;
  147. }
  148. ret = gpio_request(sel_b, "sel_b");
  149. if (ret) {
  150. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  151. goto exp_setup_selb_fail;
  152. }
  153. ret = gpio_request(sel_c, "sel_c");
  154. if (ret) {
  155. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  156. goto exp_setup_selc_fail;
  157. }
  158. /* deselect all functionalities */
  159. gpio_direction_output(sel_a, 1);
  160. gpio_direction_output(sel_b, 1);
  161. gpio_direction_output(sel_c, 1);
  162. ui_card_detected = 1;
  163. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  164. da850_evm_setup_nor_nand();
  165. if (soc_info->emac_pdata->rmii_en)
  166. /* enable RMII */
  167. gpio_set_value(sel_a, 0);
  168. return 0;
  169. exp_setup_selc_fail:
  170. gpio_free(sel_b);
  171. exp_setup_selb_fail:
  172. gpio_free(sel_a);
  173. exp_setup_sela_fail:
  174. return ret;
  175. }
  176. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  177. unsigned gpio, unsigned ngpio, void *c)
  178. {
  179. /* deselect all functionalities */
  180. gpio_set_value(gpio + 5, 1);
  181. gpio_set_value(gpio + 6, 1);
  182. gpio_set_value(gpio + 7, 1);
  183. gpio_free(gpio + 5);
  184. gpio_free(gpio + 6);
  185. gpio_free(gpio + 7);
  186. return 0;
  187. }
  188. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  189. .gpio_base = DAVINCI_N_GPIO,
  190. .setup = da850_evm_ui_expander_setup,
  191. .teardown = da850_evm_ui_expander_teardown,
  192. };
  193. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  194. {
  195. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  196. },
  197. {
  198. I2C_BOARD_INFO("tca6416", 0x20),
  199. .platform_data = &da850_evm_ui_expander_info,
  200. },
  201. };
  202. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  203. .bus_freq = 100, /* kHz */
  204. .bus_delay = 0, /* usec */
  205. };
  206. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  207. .enabled_uarts = 0x7,
  208. };
  209. static struct platform_device *da850_evm_devices[] __initdata = {
  210. &da850_evm_nandflash_device,
  211. &da850_evm_norflash_device,
  212. };
  213. /* davinci da850 evm audio machine driver */
  214. static u8 da850_iis_serializer_direction[] = {
  215. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  216. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  217. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  218. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  219. };
  220. static struct snd_platform_data da850_evm_snd_data = {
  221. .tx_dma_offset = 0x2000,
  222. .rx_dma_offset = 0x2000,
  223. .op_mode = DAVINCI_MCASP_IIS_MODE,
  224. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  225. .tdm_slots = 2,
  226. .serial_dir = da850_iis_serializer_direction,
  227. .eventq_no = EVENTQ_1,
  228. .version = MCASP_VERSION_2,
  229. .txnumevt = 1,
  230. .rxnumevt = 1,
  231. };
  232. static int da850_evm_mmc_get_ro(int index)
  233. {
  234. return gpio_get_value(DA850_MMCSD_WP_PIN);
  235. }
  236. static int da850_evm_mmc_get_cd(int index)
  237. {
  238. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  239. }
  240. static struct davinci_mmc_config da850_mmc_config = {
  241. .get_ro = da850_evm_mmc_get_ro,
  242. .get_cd = da850_evm_mmc_get_cd,
  243. .wires = 4,
  244. .version = MMC_CTLR_VERSION_2,
  245. };
  246. static int da850_lcd_hw_init(void)
  247. {
  248. int status;
  249. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  250. if (status < 0)
  251. return status;
  252. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  253. if (status < 0) {
  254. gpio_free(DA850_LCD_BL_PIN);
  255. return status;
  256. }
  257. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  258. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  259. /* disable lcd backlight */
  260. gpio_set_value(DA850_LCD_BL_PIN, 0);
  261. /* disable lcd power */
  262. gpio_set_value(DA850_LCD_PWR_PIN, 0);
  263. /* enable lcd power */
  264. gpio_set_value(DA850_LCD_PWR_PIN, 1);
  265. /* enable lcd backlight */
  266. gpio_set_value(DA850_LCD_BL_PIN, 1);
  267. return 0;
  268. }
  269. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  270. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  271. static void __init da850_evm_init_nor(void)
  272. {
  273. void __iomem *aemif_addr;
  274. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  275. /* Configure data bus width of CS2 to 16 bit */
  276. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  277. DA8XX_AEMIF_ASIZE_16BIT,
  278. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  279. iounmap(aemif_addr);
  280. }
  281. /* TPS65070 voltage regulator support */
  282. /* 3.3V */
  283. struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  284. {
  285. .supply = "usb0_vdda33",
  286. },
  287. {
  288. .supply = "usb1_vdda33",
  289. },
  290. };
  291. /* 3.3V or 1.8V */
  292. struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  293. {
  294. .supply = "dvdd3318_a",
  295. },
  296. {
  297. .supply = "dvdd3318_b",
  298. },
  299. {
  300. .supply = "dvdd3318_c",
  301. },
  302. };
  303. /* 1.2V */
  304. struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  305. {
  306. .supply = "cvdd",
  307. },
  308. };
  309. /* 1.8V LDO */
  310. struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  311. {
  312. .supply = "sata_vddr",
  313. },
  314. {
  315. .supply = "usb0_vdda18",
  316. },
  317. {
  318. .supply = "usb1_vdda18",
  319. },
  320. {
  321. .supply = "ddr_dvdd18",
  322. },
  323. };
  324. /* 1.2V LDO */
  325. struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  326. {
  327. .supply = "sata_vdd",
  328. },
  329. {
  330. .supply = "pll0_vdda",
  331. },
  332. {
  333. .supply = "pll1_vdda",
  334. },
  335. {
  336. .supply = "usbs_cvdd",
  337. },
  338. {
  339. .supply = "vddarnwa1",
  340. },
  341. };
  342. struct regulator_init_data tps65070_regulator_data[] = {
  343. /* dcdc1 */
  344. {
  345. .constraints = {
  346. .min_uV = 3150000,
  347. .max_uV = 3450000,
  348. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  349. REGULATOR_CHANGE_STATUS),
  350. .boot_on = 1,
  351. },
  352. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  353. .consumer_supplies = tps65070_dcdc1_consumers,
  354. },
  355. /* dcdc2 */
  356. {
  357. .constraints = {
  358. .min_uV = 1710000,
  359. .max_uV = 3450000,
  360. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  361. REGULATOR_CHANGE_STATUS),
  362. .boot_on = 1,
  363. },
  364. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  365. .consumer_supplies = tps65070_dcdc2_consumers,
  366. },
  367. /* dcdc3 */
  368. {
  369. .constraints = {
  370. .min_uV = 950000,
  371. .max_uV = 1320000,
  372. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  373. REGULATOR_CHANGE_STATUS),
  374. .boot_on = 1,
  375. },
  376. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  377. .consumer_supplies = tps65070_dcdc3_consumers,
  378. },
  379. /* ldo1 */
  380. {
  381. .constraints = {
  382. .min_uV = 1710000,
  383. .max_uV = 1890000,
  384. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  385. REGULATOR_CHANGE_STATUS),
  386. .boot_on = 1,
  387. },
  388. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  389. .consumer_supplies = tps65070_ldo1_consumers,
  390. },
  391. /* ldo2 */
  392. {
  393. .constraints = {
  394. .min_uV = 1140000,
  395. .max_uV = 1320000,
  396. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  397. REGULATOR_CHANGE_STATUS),
  398. .boot_on = 1,
  399. },
  400. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  401. .consumer_supplies = tps65070_ldo2_consumers,
  402. },
  403. };
  404. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  405. {
  406. I2C_BOARD_INFO("tps6507x", 0x48),
  407. .platform_data = &tps65070_regulator_data[0],
  408. },
  409. };
  410. static int __init pmic_tps65070_init(void)
  411. {
  412. return i2c_register_board_info(1, da850evm_tps65070_info,
  413. ARRAY_SIZE(da850evm_tps65070_info));
  414. }
  415. #if defined(CONFIG_MMC_DAVINCI) || \
  416. defined(CONFIG_MMC_DAVINCI_MODULE)
  417. #define HAS_MMC 1
  418. #else
  419. #define HAS_MMC 0
  420. #endif
  421. static void da850_evm_setup_nor_nand(void)
  422. {
  423. int ret = 0;
  424. if (ui_card_detected & !HAS_MMC) {
  425. ret = da8xx_pinmux_setup(da850_nand_pins);
  426. if (ret)
  427. pr_warning("da850_evm_init: nand mux setup failed: "
  428. "%d\n", ret);
  429. ret = da8xx_pinmux_setup(da850_nor_pins);
  430. if (ret)
  431. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  432. ret);
  433. da850_evm_init_nor();
  434. platform_add_devices(da850_evm_devices,
  435. ARRAY_SIZE(da850_evm_devices));
  436. }
  437. }
  438. static const short da850_evm_lcdc_pins[] = {
  439. DA850_GPIO2_8, DA850_GPIO2_15,
  440. -1
  441. };
  442. static int __init da850_evm_config_emac(u8 rmii_en)
  443. {
  444. void __iomem *cfg_chip3_base;
  445. int ret;
  446. u32 val;
  447. cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
  448. /* configure the CFGCHIP3 register for RMII or MII */
  449. val = __raw_readl(cfg_chip3_base);
  450. if (rmii_en)
  451. val |= BIT(8);
  452. else
  453. val &= ~BIT(8);
  454. __raw_writel(val, cfg_chip3_base);
  455. if (!rmii_en)
  456. ret = da8xx_pinmux_setup(da850_cpgmac_pins);
  457. else
  458. ret = da8xx_pinmux_setup(da850_rmii_pins);
  459. if (ret)
  460. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  461. ret);
  462. ret = davinci_cfg_reg(DA850_GPIO2_6);
  463. if (ret)
  464. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  465. "failed\n");
  466. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  467. if (ret) {
  468. pr_warning("Cannot open GPIO %d\n",
  469. DA850_MII_MDIO_CLKEN_PIN);
  470. return ret;
  471. }
  472. if (rmii_en) {
  473. /* Disable MII MDIO clock */
  474. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
  475. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  476. " functional\n");
  477. } else {
  478. /* Enable MII MDIO clock */
  479. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
  480. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  481. " functional\n");
  482. }
  483. return 0;
  484. }
  485. static __init void da850_evm_init(void)
  486. {
  487. struct davinci_soc_info *soc_info = &davinci_soc_info;
  488. int ret;
  489. ret = pmic_tps65070_init();
  490. if (ret)
  491. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  492. ret);
  493. ret = da8xx_register_edma();
  494. if (ret)
  495. pr_warning("da850_evm_init: edma registration failed: %d\n",
  496. ret);
  497. ret = da8xx_pinmux_setup(da850_i2c0_pins);
  498. if (ret)
  499. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  500. ret);
  501. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  502. if (ret)
  503. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  504. ret);
  505. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  506. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  507. #ifdef CONFIG_DA850_UI_RMII
  508. soc_info->emac_pdata->rmii_en = 1;
  509. #else
  510. soc_info->emac_pdata->rmii_en = 0;
  511. #endif
  512. ret = da850_evm_config_emac(soc_info->emac_pdata->rmii_en);
  513. if (ret)
  514. pr_warning("da850_evm_init: emac setup failed: %d\n", ret);
  515. ret = da8xx_register_emac();
  516. if (ret)
  517. pr_warning("da850_evm_init: emac registration failed: %d\n",
  518. ret);
  519. ret = da8xx_register_watchdog();
  520. if (ret)
  521. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  522. ret);
  523. if (HAS_MMC) {
  524. ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
  525. if (ret)
  526. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  527. " %d\n", ret);
  528. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  529. if (ret)
  530. pr_warning("da850_evm_init: can not open GPIO %d\n",
  531. DA850_MMCSD_CD_PIN);
  532. gpio_direction_input(DA850_MMCSD_CD_PIN);
  533. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  534. if (ret)
  535. pr_warning("da850_evm_init: can not open GPIO %d\n",
  536. DA850_MMCSD_WP_PIN);
  537. gpio_direction_input(DA850_MMCSD_WP_PIN);
  538. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  539. if (ret)
  540. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  541. " %d\n", ret);
  542. }
  543. davinci_serial_init(&da850_evm_uart_config);
  544. i2c_register_board_info(1, da850_evm_i2c_devices,
  545. ARRAY_SIZE(da850_evm_i2c_devices));
  546. /*
  547. * shut down uart 0 and 1; they are not used on the board and
  548. * accessing them causes endless "too much work in irq53" messages
  549. * with arago fs
  550. */
  551. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  552. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  553. ret = da8xx_pinmux_setup(da850_mcasp_pins);
  554. if (ret)
  555. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  556. ret);
  557. da8xx_register_mcasp(0, &da850_evm_snd_data);
  558. ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
  559. if (ret)
  560. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  561. ret);
  562. /* Handle board specific muxing for LCD here */
  563. ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
  564. if (ret)
  565. pr_warning("da850_evm_init: evm specific lcd mux setup "
  566. "failed: %d\n", ret);
  567. ret = da850_lcd_hw_init();
  568. if (ret)
  569. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  570. ret);
  571. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  572. if (ret)
  573. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  574. ret);
  575. ret = da8xx_register_rtc();
  576. if (ret)
  577. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  578. ret = da850_register_cpufreq();
  579. if (ret)
  580. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  581. ret);
  582. }
  583. #ifdef CONFIG_SERIAL_8250_CONSOLE
  584. static int __init da850_evm_console_init(void)
  585. {
  586. return add_preferred_console("ttyS", 2, "115200");
  587. }
  588. console_initcall(da850_evm_console_init);
  589. #endif
  590. static __init void da850_evm_irq_init(void)
  591. {
  592. struct davinci_soc_info *soc_info = &davinci_soc_info;
  593. cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
  594. soc_info->intc_irq_prios);
  595. }
  596. static void __init da850_evm_map_io(void)
  597. {
  598. da850_init();
  599. }
  600. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
  601. .phys_io = IO_PHYS,
  602. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  603. .boot_params = (DA8XX_DDR_BASE + 0x100),
  604. .map_io = da850_evm_map_io,
  605. .init_irq = da850_evm_irq_init,
  606. .timer = &davinci_timer,
  607. .init_machine = da850_evm_init,
  608. MACHINE_END