rt2x00queue.h 18 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 queue datastructures and routines
  20. */
  21. #ifndef RT2X00QUEUE_H
  22. #define RT2X00QUEUE_H
  23. #include <linux/prefetch.h>
  24. /**
  25. * DOC: Entrie frame size
  26. *
  27. * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  28. * for USB devices this restriction does not apply, but the value of
  29. * 2432 makes sense since it is big enough to contain the maximum fragment
  30. * size according to the ieee802.11 specs.
  31. */
  32. #define DATA_FRAME_SIZE 2432
  33. #define MGMT_FRAME_SIZE 256
  34. /**
  35. * DOC: Number of entries per queue
  36. *
  37. * Under normal load without fragmentation 12 entries are sufficient
  38. * without the queue being filled up to the maximum. When using fragmentation
  39. * and the queue threshold code we need to add some additional margins to
  40. * make sure the queue will never (or only under extreme load) fill up
  41. * completely.
  42. * Since we don't use preallocated DMA having a large number of queue entries
  43. * will have only minimal impact on the memory requirements for the queue.
  44. */
  45. #define RX_ENTRIES 24
  46. #define TX_ENTRIES 24
  47. #define BEACON_ENTRIES 1
  48. #define ATIM_ENTRIES 8
  49. /**
  50. * enum data_queue_qid: Queue identification
  51. *
  52. * @QID_AC_BE: AC BE queue
  53. * @QID_AC_BK: AC BK queue
  54. * @QID_AC_VI: AC VI queue
  55. * @QID_AC_VO: AC VO queue
  56. * @QID_HCCA: HCCA queue
  57. * @QID_MGMT: MGMT queue (prio queue)
  58. * @QID_RX: RX queue
  59. * @QID_OTHER: None of the above (don't use, only present for completeness)
  60. * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  61. * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  62. */
  63. enum data_queue_qid {
  64. QID_AC_BE = 0,
  65. QID_AC_BK = 1,
  66. QID_AC_VI = 2,
  67. QID_AC_VO = 3,
  68. QID_HCCA = 4,
  69. QID_MGMT = 13,
  70. QID_RX = 14,
  71. QID_OTHER = 15,
  72. QID_BEACON,
  73. QID_ATIM,
  74. };
  75. /**
  76. * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  77. *
  78. * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  79. * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  80. * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  81. * mac80211 but was stripped for processing by the driver.
  82. */
  83. enum skb_frame_desc_flags {
  84. SKBDESC_DMA_MAPPED_RX = 1 << 0,
  85. SKBDESC_DMA_MAPPED_TX = 1 << 1,
  86. FRAME_DESC_IV_STRIPPED = 1 << 2,
  87. };
  88. /**
  89. * struct skb_frame_desc: Descriptor information for the skb buffer
  90. *
  91. * This structure is placed over the driver_data array, this means that
  92. * this structure should not exceed the size of that array (40 bytes).
  93. *
  94. * @flags: Frame flags, see &enum skb_frame_desc_flags.
  95. * @desc_len: Length of the frame descriptor.
  96. * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  97. * @tx_rate_flags: the TX rate flags, used for TX status reporting
  98. * @desc: Pointer to descriptor part of the frame.
  99. * Note that this pointer could point to something outside
  100. * of the scope of the skb->data pointer.
  101. * @iv: IV/EIV data used during encryption/decryption.
  102. * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
  103. * @entry: The entry to which this sk buffer belongs.
  104. */
  105. struct skb_frame_desc {
  106. u8 flags;
  107. u8 desc_len;
  108. u8 tx_rate_idx;
  109. u8 tx_rate_flags;
  110. void *desc;
  111. __le32 iv[2];
  112. dma_addr_t skb_dma;
  113. struct queue_entry *entry;
  114. };
  115. /**
  116. * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
  117. * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
  118. */
  119. static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
  120. {
  121. BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
  122. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  123. return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
  124. }
  125. /**
  126. * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
  127. *
  128. * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
  129. * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
  130. * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
  131. */
  132. enum rxdone_entry_desc_flags {
  133. RXDONE_SIGNAL_PLCP = 1 << 0,
  134. RXDONE_SIGNAL_BITRATE = 1 << 1,
  135. RXDONE_MY_BSS = 1 << 2,
  136. };
  137. /**
  138. * struct rxdone_entry_desc: RX Entry descriptor
  139. *
  140. * Summary of information that has been read from the RX frame descriptor.
  141. *
  142. * @timestamp: RX Timestamp
  143. * @signal: Signal of the received frame.
  144. * @rssi: RSSI of the received frame.
  145. * @size: Data size of the received frame.
  146. * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
  147. * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
  148. * @cipher: Cipher type used during decryption.
  149. * @cipher_status: Decryption status.
  150. * @iv: IV/EIV data used during decryption.
  151. * @icv: ICV data used during decryption.
  152. */
  153. struct rxdone_entry_desc {
  154. u64 timestamp;
  155. int signal;
  156. int rssi;
  157. int size;
  158. int flags;
  159. int dev_flags;
  160. u8 cipher;
  161. u8 cipher_status;
  162. __le32 iv[2];
  163. __le32 icv;
  164. };
  165. /**
  166. * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
  167. *
  168. * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
  169. * @TXDONE_SUCCESS: Frame was successfully send
  170. * @TXDONE_FAILURE: Frame was not successfully send
  171. * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
  172. * frame transmission failed due to excessive retries.
  173. */
  174. enum txdone_entry_desc_flags {
  175. TXDONE_UNKNOWN,
  176. TXDONE_SUCCESS,
  177. TXDONE_FAILURE,
  178. TXDONE_EXCESSIVE_RETRY,
  179. };
  180. /**
  181. * struct txdone_entry_desc: TX done entry descriptor
  182. *
  183. * Summary of information that has been read from the TX frame descriptor
  184. * after the device is done with transmission.
  185. *
  186. * @flags: TX done flags (See &enum txdone_entry_desc_flags).
  187. * @retry: Retry count.
  188. */
  189. struct txdone_entry_desc {
  190. unsigned long flags;
  191. int retry;
  192. };
  193. /**
  194. * enum txentry_desc_flags: Status flags for TX entry descriptor
  195. *
  196. * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
  197. * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
  198. * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate.
  199. * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
  200. * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
  201. * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
  202. * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
  203. * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
  204. * @ENTRY_TXD_ACK: An ACK is required for this frame.
  205. * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
  206. * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
  207. * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
  208. * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
  209. * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
  210. */
  211. enum txentry_desc_flags {
  212. ENTRY_TXD_RTS_FRAME,
  213. ENTRY_TXD_CTS_FRAME,
  214. ENTRY_TXD_OFDM_RATE,
  215. ENTRY_TXD_GENERATE_SEQ,
  216. ENTRY_TXD_FIRST_FRAGMENT,
  217. ENTRY_TXD_MORE_FRAG,
  218. ENTRY_TXD_REQ_TIMESTAMP,
  219. ENTRY_TXD_BURST,
  220. ENTRY_TXD_ACK,
  221. ENTRY_TXD_RETRY_MODE,
  222. ENTRY_TXD_ENCRYPT,
  223. ENTRY_TXD_ENCRYPT_PAIRWISE,
  224. ENTRY_TXD_ENCRYPT_IV,
  225. ENTRY_TXD_ENCRYPT_MMIC,
  226. };
  227. /**
  228. * struct txentry_desc: TX Entry descriptor
  229. *
  230. * Summary of information for the frame descriptor before sending a TX frame.
  231. *
  232. * @flags: Descriptor flags (See &enum queue_entry_flags).
  233. * @queue: Queue identification (See &enum data_queue_qid).
  234. * @length_high: PLCP length high word.
  235. * @length_low: PLCP length low word.
  236. * @signal: PLCP signal.
  237. * @service: PLCP service.
  238. * @retry_limit: Max number of retries.
  239. * @aifs: AIFS value.
  240. * @ifs: IFS value.
  241. * @cw_min: cwmin value.
  242. * @cw_max: cwmax value.
  243. * @cipher: Cipher type used for encryption.
  244. * @key_idx: Key index used for encryption.
  245. * @iv_offset: Position where IV should be inserted by hardware.
  246. */
  247. struct txentry_desc {
  248. unsigned long flags;
  249. enum data_queue_qid queue;
  250. u16 length_high;
  251. u16 length_low;
  252. u16 signal;
  253. u16 service;
  254. short retry_limit;
  255. short aifs;
  256. short ifs;
  257. short cw_min;
  258. short cw_max;
  259. enum cipher cipher;
  260. u16 key_idx;
  261. u16 iv_offset;
  262. };
  263. /**
  264. * enum queue_entry_flags: Status flags for queue entry
  265. *
  266. * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
  267. * As long as this bit is set, this entry may only be touched
  268. * through the interface structure.
  269. * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
  270. * transfer (either TX or RX depending on the queue). The entry should
  271. * only be touched after the device has signaled it is done with it.
  272. * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
  273. * encryption or decryption. The entry should only be touched after
  274. * the device has signaled it is done with it.
  275. * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
  276. * for the signal to start sending.
  277. */
  278. enum queue_entry_flags {
  279. ENTRY_BCN_ASSIGNED,
  280. ENTRY_OWNER_DEVICE_DATA,
  281. ENTRY_OWNER_DEVICE_CRYPTO,
  282. ENTRY_DATA_PENDING,
  283. };
  284. /**
  285. * struct queue_entry: Entry inside the &struct data_queue
  286. *
  287. * @flags: Entry flags, see &enum queue_entry_flags.
  288. * @queue: The data queue (&struct data_queue) to which this entry belongs.
  289. * @skb: The buffer which is currently being transmitted (for TX queue),
  290. * or used to directly recieve data in (for RX queue).
  291. * @entry_idx: The entry index number.
  292. * @priv_data: Private data belonging to this queue entry. The pointer
  293. * points to data specific to a particular driver and queue type.
  294. */
  295. struct queue_entry {
  296. unsigned long flags;
  297. struct data_queue *queue;
  298. struct sk_buff *skb;
  299. unsigned int entry_idx;
  300. void *priv_data;
  301. };
  302. /**
  303. * enum queue_index: Queue index type
  304. *
  305. * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
  306. * owned by the hardware then the queue is considered to be full.
  307. * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
  308. * the hardware and for which we need to run the txdone handler. If this
  309. * entry is not owned by the hardware the queue is considered to be empty.
  310. * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
  311. * will be completed by the hardware next.
  312. * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
  313. * of the index array.
  314. */
  315. enum queue_index {
  316. Q_INDEX,
  317. Q_INDEX_DONE,
  318. Q_INDEX_CRYPTO,
  319. Q_INDEX_MAX,
  320. };
  321. /**
  322. * struct data_queue: Data queue
  323. *
  324. * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  325. * @entries: Base address of the &struct queue_entry which are
  326. * part of this queue.
  327. * @qid: The queue identification, see &enum data_queue_qid.
  328. * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
  329. * @index_crypt needs to be changed this lock should be grabbed to prevent
  330. * index corruption due to concurrency.
  331. * @count: Number of frames handled in the queue.
  332. * @limit: Maximum number of entries in the queue.
  333. * @threshold: Minimum number of free entries before queue is kicked by force.
  334. * @length: Number of frames in queue.
  335. * @index: Index pointers to entry positions in the queue,
  336. * use &enum queue_index to get a specific index field.
  337. * @txop: maximum burst time.
  338. * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
  339. * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
  340. * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
  341. * @data_size: Maximum data size for the frames in this queue.
  342. * @desc_size: Hardware descriptor size for the data in this queue.
  343. * @usb_endpoint: Device endpoint used for communication (USB only)
  344. * @usb_maxpacket: Max packet size for given endpoint (USB only)
  345. */
  346. struct data_queue {
  347. struct rt2x00_dev *rt2x00dev;
  348. struct queue_entry *entries;
  349. enum data_queue_qid qid;
  350. spinlock_t lock;
  351. unsigned int count;
  352. unsigned short limit;
  353. unsigned short threshold;
  354. unsigned short length;
  355. unsigned short index[Q_INDEX_MAX];
  356. unsigned short txop;
  357. unsigned short aifs;
  358. unsigned short cw_min;
  359. unsigned short cw_max;
  360. unsigned short data_size;
  361. unsigned short desc_size;
  362. unsigned short usb_endpoint;
  363. unsigned short usb_maxpacket;
  364. };
  365. /**
  366. * struct data_queue_desc: Data queue description
  367. *
  368. * The information in this structure is used by drivers
  369. * to inform rt2x00lib about the creation of the data queue.
  370. *
  371. * @entry_num: Maximum number of entries for a queue.
  372. * @data_size: Maximum data size for the frames in this queue.
  373. * @desc_size: Hardware descriptor size for the data in this queue.
  374. * @priv_size: Size of per-queue_entry private data.
  375. */
  376. struct data_queue_desc {
  377. unsigned short entry_num;
  378. unsigned short data_size;
  379. unsigned short desc_size;
  380. unsigned short priv_size;
  381. };
  382. /**
  383. * queue_end - Return pointer to the last queue (HELPER MACRO).
  384. * @__dev: Pointer to &struct rt2x00_dev
  385. *
  386. * Using the base rx pointer and the maximum number of available queues,
  387. * this macro will return the address of 1 position beyond the end of the
  388. * queues array.
  389. */
  390. #define queue_end(__dev) \
  391. &(__dev)->rx[(__dev)->data_queues]
  392. /**
  393. * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
  394. * @__dev: Pointer to &struct rt2x00_dev
  395. *
  396. * Using the base tx pointer and the maximum number of available TX
  397. * queues, this macro will return the address of 1 position beyond
  398. * the end of the TX queue array.
  399. */
  400. #define tx_queue_end(__dev) \
  401. &(__dev)->tx[(__dev)->ops->tx_queues]
  402. /**
  403. * queue_next - Return pointer to next queue in list (HELPER MACRO).
  404. * @__queue: Current queue for which we need the next queue
  405. *
  406. * Using the current queue address we take the address directly
  407. * after the queue to take the next queue. Note that this macro
  408. * should be used carefully since it does not protect against
  409. * moving past the end of the list. (See macros &queue_end and
  410. * &tx_queue_end for determining the end of the queue).
  411. */
  412. #define queue_next(__queue) \
  413. &(__queue)[1]
  414. /**
  415. * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
  416. * @__entry: Pointer where the current queue entry will be stored in.
  417. * @__start: Start queue pointer.
  418. * @__end: End queue pointer.
  419. *
  420. * This macro will loop through all queues between &__start and &__end.
  421. */
  422. #define queue_loop(__entry, __start, __end) \
  423. for ((__entry) = (__start); \
  424. prefetch(queue_next(__entry)), (__entry) != (__end);\
  425. (__entry) = queue_next(__entry))
  426. /**
  427. * queue_for_each - Loop through all queues
  428. * @__dev: Pointer to &struct rt2x00_dev
  429. * @__entry: Pointer where the current queue entry will be stored in.
  430. *
  431. * This macro will loop through all available queues.
  432. */
  433. #define queue_for_each(__dev, __entry) \
  434. queue_loop(__entry, (__dev)->rx, queue_end(__dev))
  435. /**
  436. * tx_queue_for_each - Loop through the TX queues
  437. * @__dev: Pointer to &struct rt2x00_dev
  438. * @__entry: Pointer where the current queue entry will be stored in.
  439. *
  440. * This macro will loop through all TX related queues excluding
  441. * the Beacon and Atim queues.
  442. */
  443. #define tx_queue_for_each(__dev, __entry) \
  444. queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
  445. /**
  446. * txall_queue_for_each - Loop through all TX related queues
  447. * @__dev: Pointer to &struct rt2x00_dev
  448. * @__entry: Pointer where the current queue entry will be stored in.
  449. *
  450. * This macro will loop through all TX related queues including
  451. * the Beacon and Atim queues.
  452. */
  453. #define txall_queue_for_each(__dev, __entry) \
  454. queue_loop(__entry, (__dev)->tx, queue_end(__dev))
  455. /**
  456. * rt2x00queue_empty - Check if the queue is empty.
  457. * @queue: Queue to check if empty.
  458. */
  459. static inline int rt2x00queue_empty(struct data_queue *queue)
  460. {
  461. return queue->length == 0;
  462. }
  463. /**
  464. * rt2x00queue_full - Check if the queue is full.
  465. * @queue: Queue to check if full.
  466. */
  467. static inline int rt2x00queue_full(struct data_queue *queue)
  468. {
  469. return queue->length == queue->limit;
  470. }
  471. /**
  472. * rt2x00queue_free - Check the number of available entries in queue.
  473. * @queue: Queue to check.
  474. */
  475. static inline int rt2x00queue_available(struct data_queue *queue)
  476. {
  477. return queue->limit - queue->length;
  478. }
  479. /**
  480. * rt2x00queue_threshold - Check if the queue is below threshold
  481. * @queue: Queue to check.
  482. */
  483. static inline int rt2x00queue_threshold(struct data_queue *queue)
  484. {
  485. return rt2x00queue_available(queue) < queue->threshold;
  486. }
  487. /**
  488. * _rt2x00_desc_read - Read a word from the hardware descriptor.
  489. * @desc: Base descriptor address
  490. * @word: Word index from where the descriptor should be read.
  491. * @value: Address where the descriptor value should be written into.
  492. */
  493. static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  494. {
  495. *value = desc[word];
  496. }
  497. /**
  498. * rt2x00_desc_read - Read a word from the hardware descriptor, this
  499. * function will take care of the byte ordering.
  500. * @desc: Base descriptor address
  501. * @word: Word index from where the descriptor should be read.
  502. * @value: Address where the descriptor value should be written into.
  503. */
  504. static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
  505. {
  506. __le32 tmp;
  507. _rt2x00_desc_read(desc, word, &tmp);
  508. *value = le32_to_cpu(tmp);
  509. }
  510. /**
  511. * rt2x00_desc_write - write a word to the hardware descriptor, this
  512. * function will take care of the byte ordering.
  513. * @desc: Base descriptor address
  514. * @word: Word index from where the descriptor should be written.
  515. * @value: Value that should be written into the descriptor.
  516. */
  517. static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
  518. {
  519. desc[word] = value;
  520. }
  521. /**
  522. * rt2x00_desc_write - write a word to the hardware descriptor.
  523. * @desc: Base descriptor address
  524. * @word: Word index from where the descriptor should be written.
  525. * @value: Value that should be written into the descriptor.
  526. */
  527. static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
  528. {
  529. _rt2x00_desc_write(desc, word, cpu_to_le32(value));
  530. }
  531. #endif /* RT2X00QUEUE_H */