events.c 31 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <asm/desc.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/irq.h>
  34. #include <asm/idle.h>
  35. #include <asm/io_apic.h>
  36. #include <asm/sync_bitops.h>
  37. #include <asm/xen/pci.h>
  38. #include <asm/xen/hypercall.h>
  39. #include <asm/xen/hypervisor.h>
  40. #include <xen/xen.h>
  41. #include <xen/hvm.h>
  42. #include <xen/xen-ops.h>
  43. #include <xen/events.h>
  44. #include <xen/interface/xen.h>
  45. #include <xen/interface/event_channel.h>
  46. #include <xen/interface/hvm/hvm_op.h>
  47. #include <xen/interface/hvm/params.h>
  48. /*
  49. * This lock protects updates to the following mapping and reference-count
  50. * arrays. The lock does not need to be acquired to read the mapping tables.
  51. */
  52. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  53. /* IRQ <-> VIRQ mapping. */
  54. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  55. /* IRQ <-> IPI mapping */
  56. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  57. /* Interrupt types. */
  58. enum xen_irq_type {
  59. IRQT_UNBOUND = 0,
  60. IRQT_PIRQ,
  61. IRQT_VIRQ,
  62. IRQT_IPI,
  63. IRQT_EVTCHN
  64. };
  65. /*
  66. * Packed IRQ information:
  67. * type - enum xen_irq_type
  68. * event channel - irq->event channel mapping
  69. * cpu - cpu this event channel is bound to
  70. * index - type-specific information:
  71. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  72. * guest, or GSI (real passthrough IRQ) of the device.
  73. * VIRQ - virq number
  74. * IPI - IPI vector
  75. * EVTCHN -
  76. */
  77. struct irq_info
  78. {
  79. enum xen_irq_type type; /* type */
  80. unsigned short evtchn; /* event channel */
  81. unsigned short cpu; /* cpu bound */
  82. union {
  83. unsigned short virq;
  84. enum ipi_vector ipi;
  85. struct {
  86. unsigned short pirq;
  87. unsigned short gsi;
  88. unsigned char vector;
  89. unsigned char flags;
  90. } pirq;
  91. } u;
  92. };
  93. #define PIRQ_NEEDS_EOI (1 << 0)
  94. #define PIRQ_SHAREABLE (1 << 1)
  95. static struct irq_info *irq_info;
  96. static int *pirq_to_irq;
  97. static int nr_pirqs;
  98. static int *evtchn_to_irq;
  99. struct cpu_evtchn_s {
  100. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  101. };
  102. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  103. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  104. };
  105. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  106. static inline unsigned long *cpu_evtchn_mask(int cpu)
  107. {
  108. return cpu_evtchn_mask_p[cpu].bits;
  109. }
  110. /* Xen will never allocate port zero for any purpose. */
  111. #define VALID_EVTCHN(chn) ((chn) != 0)
  112. static struct irq_chip xen_dynamic_chip;
  113. static struct irq_chip xen_percpu_chip;
  114. static struct irq_chip xen_pirq_chip;
  115. /* Constructor for packed IRQ information. */
  116. static struct irq_info mk_unbound_info(void)
  117. {
  118. return (struct irq_info) { .type = IRQT_UNBOUND };
  119. }
  120. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  121. {
  122. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  123. .cpu = 0 };
  124. }
  125. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  126. {
  127. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  128. .cpu = 0, .u.ipi = ipi };
  129. }
  130. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  131. {
  132. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  133. .cpu = 0, .u.virq = virq };
  134. }
  135. static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
  136. unsigned short gsi, unsigned short vector)
  137. {
  138. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  139. .cpu = 0,
  140. .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
  141. }
  142. /*
  143. * Accessors for packed IRQ information.
  144. */
  145. static struct irq_info *info_for_irq(unsigned irq)
  146. {
  147. return &irq_info[irq];
  148. }
  149. static unsigned int evtchn_from_irq(unsigned irq)
  150. {
  151. return info_for_irq(irq)->evtchn;
  152. }
  153. unsigned irq_from_evtchn(unsigned int evtchn)
  154. {
  155. return evtchn_to_irq[evtchn];
  156. }
  157. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  158. static enum ipi_vector ipi_from_irq(unsigned irq)
  159. {
  160. struct irq_info *info = info_for_irq(irq);
  161. BUG_ON(info == NULL);
  162. BUG_ON(info->type != IRQT_IPI);
  163. return info->u.ipi;
  164. }
  165. static unsigned virq_from_irq(unsigned irq)
  166. {
  167. struct irq_info *info = info_for_irq(irq);
  168. BUG_ON(info == NULL);
  169. BUG_ON(info->type != IRQT_VIRQ);
  170. return info->u.virq;
  171. }
  172. static unsigned pirq_from_irq(unsigned irq)
  173. {
  174. struct irq_info *info = info_for_irq(irq);
  175. BUG_ON(info == NULL);
  176. BUG_ON(info->type != IRQT_PIRQ);
  177. return info->u.pirq.pirq;
  178. }
  179. static unsigned gsi_from_irq(unsigned irq)
  180. {
  181. struct irq_info *info = info_for_irq(irq);
  182. BUG_ON(info == NULL);
  183. BUG_ON(info->type != IRQT_PIRQ);
  184. return info->u.pirq.gsi;
  185. }
  186. static unsigned vector_from_irq(unsigned irq)
  187. {
  188. struct irq_info *info = info_for_irq(irq);
  189. BUG_ON(info == NULL);
  190. BUG_ON(info->type != IRQT_PIRQ);
  191. return info->u.pirq.vector;
  192. }
  193. static enum xen_irq_type type_from_irq(unsigned irq)
  194. {
  195. return info_for_irq(irq)->type;
  196. }
  197. static unsigned cpu_from_irq(unsigned irq)
  198. {
  199. return info_for_irq(irq)->cpu;
  200. }
  201. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  202. {
  203. int irq = evtchn_to_irq[evtchn];
  204. unsigned ret = 0;
  205. if (irq != -1)
  206. ret = cpu_from_irq(irq);
  207. return ret;
  208. }
  209. static bool pirq_needs_eoi(unsigned irq)
  210. {
  211. struct irq_info *info = info_for_irq(irq);
  212. BUG_ON(info->type != IRQT_PIRQ);
  213. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  214. }
  215. static inline unsigned long active_evtchns(unsigned int cpu,
  216. struct shared_info *sh,
  217. unsigned int idx)
  218. {
  219. return (sh->evtchn_pending[idx] &
  220. cpu_evtchn_mask(cpu)[idx] &
  221. ~sh->evtchn_mask[idx]);
  222. }
  223. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  224. {
  225. int irq = evtchn_to_irq[chn];
  226. BUG_ON(irq == -1);
  227. #ifdef CONFIG_SMP
  228. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  229. #endif
  230. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  231. __set_bit(chn, cpu_evtchn_mask(cpu));
  232. irq_info[irq].cpu = cpu;
  233. }
  234. static void init_evtchn_cpu_bindings(void)
  235. {
  236. #ifdef CONFIG_SMP
  237. struct irq_desc *desc;
  238. int i;
  239. /* By default all event channels notify CPU#0. */
  240. for_each_irq_desc(i, desc) {
  241. cpumask_copy(desc->affinity, cpumask_of(0));
  242. }
  243. #endif
  244. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  245. }
  246. static inline void clear_evtchn(int port)
  247. {
  248. struct shared_info *s = HYPERVISOR_shared_info;
  249. sync_clear_bit(port, &s->evtchn_pending[0]);
  250. }
  251. static inline void set_evtchn(int port)
  252. {
  253. struct shared_info *s = HYPERVISOR_shared_info;
  254. sync_set_bit(port, &s->evtchn_pending[0]);
  255. }
  256. static inline int test_evtchn(int port)
  257. {
  258. struct shared_info *s = HYPERVISOR_shared_info;
  259. return sync_test_bit(port, &s->evtchn_pending[0]);
  260. }
  261. /**
  262. * notify_remote_via_irq - send event to remote end of event channel via irq
  263. * @irq: irq of event channel to send event to
  264. *
  265. * Unlike notify_remote_via_evtchn(), this is safe to use across
  266. * save/restore. Notifications on a broken connection are silently
  267. * dropped.
  268. */
  269. void notify_remote_via_irq(int irq)
  270. {
  271. int evtchn = evtchn_from_irq(irq);
  272. if (VALID_EVTCHN(evtchn))
  273. notify_remote_via_evtchn(evtchn);
  274. }
  275. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  276. static void mask_evtchn(int port)
  277. {
  278. struct shared_info *s = HYPERVISOR_shared_info;
  279. sync_set_bit(port, &s->evtchn_mask[0]);
  280. }
  281. static void unmask_evtchn(int port)
  282. {
  283. struct shared_info *s = HYPERVISOR_shared_info;
  284. unsigned int cpu = get_cpu();
  285. BUG_ON(!irqs_disabled());
  286. /* Slow path (hypercall) if this is a non-local port. */
  287. if (unlikely(cpu != cpu_from_evtchn(port))) {
  288. struct evtchn_unmask unmask = { .port = port };
  289. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  290. } else {
  291. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  292. sync_clear_bit(port, &s->evtchn_mask[0]);
  293. /*
  294. * The following is basically the equivalent of
  295. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  296. * the interrupt edge' if the channel is masked.
  297. */
  298. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  299. !sync_test_and_set_bit(port / BITS_PER_LONG,
  300. &vcpu_info->evtchn_pending_sel))
  301. vcpu_info->evtchn_upcall_pending = 1;
  302. }
  303. put_cpu();
  304. }
  305. static int get_nr_hw_irqs(void)
  306. {
  307. int ret = 1;
  308. #ifdef CONFIG_X86_IO_APIC
  309. ret = get_nr_irqs_gsi();
  310. #endif
  311. return ret;
  312. }
  313. /* callers of this function should make sure that PHYSDEVOP_get_nr_pirqs
  314. * succeeded otherwise nr_pirqs won't hold the right value */
  315. static int find_unbound_pirq(void)
  316. {
  317. int i;
  318. for (i = nr_pirqs-1; i >= 0; i--) {
  319. if (pirq_to_irq[i] < 0)
  320. return i;
  321. }
  322. return -1;
  323. }
  324. static int find_unbound_irq(void)
  325. {
  326. struct irq_data *data;
  327. int irq, res;
  328. int start = get_nr_hw_irqs();
  329. if (start == nr_irqs)
  330. goto no_irqs;
  331. /* nr_irqs is a magic value. Must not use it.*/
  332. for (irq = nr_irqs-1; irq > start; irq--) {
  333. data = irq_get_irq_data(irq);
  334. /* only 0->15 have init'd desc; handle irq > 16 */
  335. if (!data)
  336. break;
  337. if (data->chip == &no_irq_chip)
  338. break;
  339. if (data->chip != &xen_dynamic_chip)
  340. continue;
  341. if (irq_info[irq].type == IRQT_UNBOUND)
  342. return irq;
  343. }
  344. if (irq == start)
  345. goto no_irqs;
  346. res = irq_alloc_desc_at(irq, 0);
  347. if (WARN_ON(res != irq))
  348. return -1;
  349. return irq;
  350. no_irqs:
  351. panic("No available IRQ to bind to: increase nr_irqs!\n");
  352. }
  353. static bool identity_mapped_irq(unsigned irq)
  354. {
  355. /* identity map all the hardware irqs */
  356. return irq < get_nr_hw_irqs();
  357. }
  358. static void pirq_unmask_notify(int irq)
  359. {
  360. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  361. if (unlikely(pirq_needs_eoi(irq))) {
  362. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  363. WARN_ON(rc);
  364. }
  365. }
  366. static void pirq_query_unmask(int irq)
  367. {
  368. struct physdev_irq_status_query irq_status;
  369. struct irq_info *info = info_for_irq(irq);
  370. BUG_ON(info->type != IRQT_PIRQ);
  371. irq_status.irq = pirq_from_irq(irq);
  372. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  373. irq_status.flags = 0;
  374. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  375. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  376. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  377. }
  378. static bool probing_irq(int irq)
  379. {
  380. struct irq_desc *desc = irq_to_desc(irq);
  381. return desc && desc->action == NULL;
  382. }
  383. static unsigned int startup_pirq(unsigned int irq)
  384. {
  385. struct evtchn_bind_pirq bind_pirq;
  386. struct irq_info *info = info_for_irq(irq);
  387. int evtchn = evtchn_from_irq(irq);
  388. int rc;
  389. BUG_ON(info->type != IRQT_PIRQ);
  390. if (VALID_EVTCHN(evtchn))
  391. goto out;
  392. bind_pirq.pirq = pirq_from_irq(irq);
  393. /* NB. We are happy to share unless we are probing. */
  394. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  395. BIND_PIRQ__WILL_SHARE : 0;
  396. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  397. if (rc != 0) {
  398. if (!probing_irq(irq))
  399. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  400. irq);
  401. return 0;
  402. }
  403. evtchn = bind_pirq.port;
  404. pirq_query_unmask(irq);
  405. evtchn_to_irq[evtchn] = irq;
  406. bind_evtchn_to_cpu(evtchn, 0);
  407. info->evtchn = evtchn;
  408. out:
  409. unmask_evtchn(evtchn);
  410. pirq_unmask_notify(irq);
  411. return 0;
  412. }
  413. static void shutdown_pirq(unsigned int irq)
  414. {
  415. struct evtchn_close close;
  416. struct irq_info *info = info_for_irq(irq);
  417. int evtchn = evtchn_from_irq(irq);
  418. BUG_ON(info->type != IRQT_PIRQ);
  419. if (!VALID_EVTCHN(evtchn))
  420. return;
  421. mask_evtchn(evtchn);
  422. close.port = evtchn;
  423. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  424. BUG();
  425. bind_evtchn_to_cpu(evtchn, 0);
  426. evtchn_to_irq[evtchn] = -1;
  427. info->evtchn = 0;
  428. }
  429. static void enable_pirq(unsigned int irq)
  430. {
  431. startup_pirq(irq);
  432. }
  433. static void disable_pirq(unsigned int irq)
  434. {
  435. }
  436. static void ack_pirq(unsigned int irq)
  437. {
  438. int evtchn = evtchn_from_irq(irq);
  439. move_native_irq(irq);
  440. if (VALID_EVTCHN(evtchn)) {
  441. mask_evtchn(evtchn);
  442. clear_evtchn(evtchn);
  443. }
  444. }
  445. static void end_pirq(unsigned int irq)
  446. {
  447. int evtchn = evtchn_from_irq(irq);
  448. struct irq_desc *desc = irq_to_desc(irq);
  449. if (WARN_ON(!desc))
  450. return;
  451. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  452. (IRQ_DISABLED|IRQ_PENDING)) {
  453. shutdown_pirq(irq);
  454. } else if (VALID_EVTCHN(evtchn)) {
  455. unmask_evtchn(evtchn);
  456. pirq_unmask_notify(irq);
  457. }
  458. }
  459. static int find_irq_by_gsi(unsigned gsi)
  460. {
  461. int irq;
  462. for (irq = 0; irq < nr_irqs; irq++) {
  463. struct irq_info *info = info_for_irq(irq);
  464. if (info == NULL || info->type != IRQT_PIRQ)
  465. continue;
  466. if (gsi_from_irq(irq) == gsi)
  467. return irq;
  468. }
  469. return -1;
  470. }
  471. int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
  472. {
  473. return xen_map_pirq_gsi(gsi, gsi, shareable, name);
  474. }
  475. /* xen_map_pirq_gsi might allocate irqs from the top down, as a
  476. * consequence don't assume that the irq number returned has a low value
  477. * or can be used as a pirq number unless you know otherwise.
  478. *
  479. * One notable exception is when xen_map_pirq_gsi is called passing an
  480. * hardware gsi as argument, in that case the irq number returned
  481. * matches the gsi number passed as second argument.
  482. *
  483. * Note: We don't assign an event channel until the irq actually started
  484. * up. Return an existing irq if we've already got one for the gsi.
  485. */
  486. int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
  487. {
  488. int irq = 0;
  489. struct physdev_irq irq_op;
  490. spin_lock(&irq_mapping_update_lock);
  491. if ((pirq > nr_pirqs) || (gsi > nr_irqs)) {
  492. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  493. pirq > nr_pirqs ? "nr_pirqs" :"",
  494. gsi > nr_irqs ? "nr_irqs" : "");
  495. goto out;
  496. }
  497. irq = find_irq_by_gsi(gsi);
  498. if (irq != -1) {
  499. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  500. irq, gsi);
  501. goto out; /* XXX need refcount? */
  502. }
  503. /* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
  504. * we are using the !xen_initial_domain() to drop in the function.*/
  505. if (identity_mapped_irq(gsi) || !xen_initial_domain()) {
  506. irq = gsi;
  507. irq_alloc_desc_at(irq, 0);
  508. } else
  509. irq = find_unbound_irq();
  510. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  511. handle_level_irq, name);
  512. irq_op.irq = irq;
  513. irq_op.vector = 0;
  514. /* Only the privileged domain can do this. For non-priv, the pcifront
  515. * driver provides a PCI bus that does the call to do exactly
  516. * this in the priv domain. */
  517. if (xen_initial_domain() &&
  518. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  519. irq_free_desc(irq);
  520. irq = -ENOSPC;
  521. goto out;
  522. }
  523. irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
  524. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  525. pirq_to_irq[pirq] = irq;
  526. out:
  527. spin_unlock(&irq_mapping_update_lock);
  528. return irq;
  529. }
  530. int xen_destroy_irq(int irq)
  531. {
  532. struct irq_desc *desc;
  533. int rc = -ENOENT;
  534. spin_lock(&irq_mapping_update_lock);
  535. desc = irq_to_desc(irq);
  536. if (!desc)
  537. goto out;
  538. irq_info[irq] = mk_unbound_info();
  539. irq_free_desc(irq);
  540. out:
  541. spin_unlock(&irq_mapping_update_lock);
  542. return rc;
  543. }
  544. int xen_vector_from_irq(unsigned irq)
  545. {
  546. return vector_from_irq(irq);
  547. }
  548. int xen_gsi_from_irq(unsigned irq)
  549. {
  550. return gsi_from_irq(irq);
  551. }
  552. int bind_evtchn_to_irq(unsigned int evtchn)
  553. {
  554. int irq;
  555. spin_lock(&irq_mapping_update_lock);
  556. irq = evtchn_to_irq[evtchn];
  557. if (irq == -1) {
  558. irq = find_unbound_irq();
  559. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  560. handle_edge_irq, "event");
  561. evtchn_to_irq[evtchn] = irq;
  562. irq_info[irq] = mk_evtchn_info(evtchn);
  563. }
  564. spin_unlock(&irq_mapping_update_lock);
  565. return irq;
  566. }
  567. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  568. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  569. {
  570. struct evtchn_bind_ipi bind_ipi;
  571. int evtchn, irq;
  572. spin_lock(&irq_mapping_update_lock);
  573. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  574. if (irq == -1) {
  575. irq = find_unbound_irq();
  576. if (irq < 0)
  577. goto out;
  578. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  579. handle_percpu_irq, "ipi");
  580. bind_ipi.vcpu = cpu;
  581. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  582. &bind_ipi) != 0)
  583. BUG();
  584. evtchn = bind_ipi.port;
  585. evtchn_to_irq[evtchn] = irq;
  586. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  587. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  588. bind_evtchn_to_cpu(evtchn, cpu);
  589. }
  590. out:
  591. spin_unlock(&irq_mapping_update_lock);
  592. return irq;
  593. }
  594. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  595. {
  596. struct evtchn_bind_virq bind_virq;
  597. int evtchn, irq;
  598. spin_lock(&irq_mapping_update_lock);
  599. irq = per_cpu(virq_to_irq, cpu)[virq];
  600. if (irq == -1) {
  601. bind_virq.virq = virq;
  602. bind_virq.vcpu = cpu;
  603. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  604. &bind_virq) != 0)
  605. BUG();
  606. evtchn = bind_virq.port;
  607. irq = find_unbound_irq();
  608. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  609. handle_percpu_irq, "virq");
  610. evtchn_to_irq[evtchn] = irq;
  611. irq_info[irq] = mk_virq_info(evtchn, virq);
  612. per_cpu(virq_to_irq, cpu)[virq] = irq;
  613. bind_evtchn_to_cpu(evtchn, cpu);
  614. }
  615. spin_unlock(&irq_mapping_update_lock);
  616. return irq;
  617. }
  618. static void unbind_from_irq(unsigned int irq)
  619. {
  620. struct evtchn_close close;
  621. int evtchn = evtchn_from_irq(irq);
  622. spin_lock(&irq_mapping_update_lock);
  623. if (VALID_EVTCHN(evtchn)) {
  624. close.port = evtchn;
  625. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  626. BUG();
  627. switch (type_from_irq(irq)) {
  628. case IRQT_VIRQ:
  629. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  630. [virq_from_irq(irq)] = -1;
  631. break;
  632. case IRQT_IPI:
  633. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  634. [ipi_from_irq(irq)] = -1;
  635. break;
  636. default:
  637. break;
  638. }
  639. /* Closed ports are implicitly re-bound to VCPU0. */
  640. bind_evtchn_to_cpu(evtchn, 0);
  641. evtchn_to_irq[evtchn] = -1;
  642. }
  643. if (irq_info[irq].type != IRQT_UNBOUND) {
  644. irq_info[irq] = mk_unbound_info();
  645. irq_free_desc(irq);
  646. }
  647. spin_unlock(&irq_mapping_update_lock);
  648. }
  649. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  650. irq_handler_t handler,
  651. unsigned long irqflags,
  652. const char *devname, void *dev_id)
  653. {
  654. unsigned int irq;
  655. int retval;
  656. irq = bind_evtchn_to_irq(evtchn);
  657. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  658. if (retval != 0) {
  659. unbind_from_irq(irq);
  660. return retval;
  661. }
  662. return irq;
  663. }
  664. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  665. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  666. irq_handler_t handler,
  667. unsigned long irqflags, const char *devname, void *dev_id)
  668. {
  669. unsigned int irq;
  670. int retval;
  671. irq = bind_virq_to_irq(virq, cpu);
  672. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  673. if (retval != 0) {
  674. unbind_from_irq(irq);
  675. return retval;
  676. }
  677. return irq;
  678. }
  679. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  680. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  681. unsigned int cpu,
  682. irq_handler_t handler,
  683. unsigned long irqflags,
  684. const char *devname,
  685. void *dev_id)
  686. {
  687. int irq, retval;
  688. irq = bind_ipi_to_irq(ipi, cpu);
  689. if (irq < 0)
  690. return irq;
  691. irqflags |= IRQF_NO_SUSPEND;
  692. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  693. if (retval != 0) {
  694. unbind_from_irq(irq);
  695. return retval;
  696. }
  697. return irq;
  698. }
  699. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  700. {
  701. free_irq(irq, dev_id);
  702. unbind_from_irq(irq);
  703. }
  704. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  705. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  706. {
  707. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  708. BUG_ON(irq < 0);
  709. notify_remote_via_irq(irq);
  710. }
  711. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  712. {
  713. struct shared_info *sh = HYPERVISOR_shared_info;
  714. int cpu = smp_processor_id();
  715. int i;
  716. unsigned long flags;
  717. static DEFINE_SPINLOCK(debug_lock);
  718. spin_lock_irqsave(&debug_lock, flags);
  719. printk("vcpu %d\n ", cpu);
  720. for_each_online_cpu(i) {
  721. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  722. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  723. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  724. v->evtchn_upcall_pending,
  725. v->evtchn_pending_sel);
  726. }
  727. printk("pending:\n ");
  728. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  729. printk("%08lx%s", sh->evtchn_pending[i],
  730. i % 8 == 0 ? "\n " : " ");
  731. printk("\nmasks:\n ");
  732. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  733. printk("%08lx%s", sh->evtchn_mask[i],
  734. i % 8 == 0 ? "\n " : " ");
  735. printk("\nunmasked:\n ");
  736. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  737. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  738. i % 8 == 0 ? "\n " : " ");
  739. printk("\npending list:\n");
  740. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  741. if (sync_test_bit(i, sh->evtchn_pending)) {
  742. printk(" %d: event %d -> irq %d\n",
  743. cpu_from_evtchn(i), i,
  744. evtchn_to_irq[i]);
  745. }
  746. }
  747. spin_unlock_irqrestore(&debug_lock, flags);
  748. return IRQ_HANDLED;
  749. }
  750. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  751. /*
  752. * Search the CPUs pending events bitmasks. For each one found, map
  753. * the event number to an irq, and feed it into do_IRQ() for
  754. * handling.
  755. *
  756. * Xen uses a two-level bitmap to speed searching. The first level is
  757. * a bitset of words which contain pending event bits. The second
  758. * level is a bitset of pending events themselves.
  759. */
  760. static void __xen_evtchn_do_upcall(void)
  761. {
  762. int cpu = get_cpu();
  763. struct shared_info *s = HYPERVISOR_shared_info;
  764. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  765. unsigned count;
  766. do {
  767. unsigned long pending_words;
  768. vcpu_info->evtchn_upcall_pending = 0;
  769. if (__get_cpu_var(xed_nesting_count)++)
  770. goto out;
  771. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  772. /* Clear master flag /before/ clearing selector flag. */
  773. wmb();
  774. #endif
  775. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  776. while (pending_words != 0) {
  777. unsigned long pending_bits;
  778. int word_idx = __ffs(pending_words);
  779. pending_words &= ~(1UL << word_idx);
  780. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  781. int bit_idx = __ffs(pending_bits);
  782. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  783. int irq = evtchn_to_irq[port];
  784. struct irq_desc *desc;
  785. if (irq != -1) {
  786. desc = irq_to_desc(irq);
  787. if (desc)
  788. generic_handle_irq_desc(irq, desc);
  789. }
  790. }
  791. }
  792. BUG_ON(!irqs_disabled());
  793. count = __get_cpu_var(xed_nesting_count);
  794. __get_cpu_var(xed_nesting_count) = 0;
  795. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  796. out:
  797. put_cpu();
  798. }
  799. void xen_evtchn_do_upcall(struct pt_regs *regs)
  800. {
  801. struct pt_regs *old_regs = set_irq_regs(regs);
  802. exit_idle();
  803. irq_enter();
  804. __xen_evtchn_do_upcall();
  805. irq_exit();
  806. set_irq_regs(old_regs);
  807. }
  808. void xen_hvm_evtchn_do_upcall(void)
  809. {
  810. __xen_evtchn_do_upcall();
  811. }
  812. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  813. /* Rebind a new event channel to an existing irq. */
  814. void rebind_evtchn_irq(int evtchn, int irq)
  815. {
  816. struct irq_info *info = info_for_irq(irq);
  817. /* Make sure the irq is masked, since the new event channel
  818. will also be masked. */
  819. disable_irq(irq);
  820. spin_lock(&irq_mapping_update_lock);
  821. /* After resume the irq<->evtchn mappings are all cleared out */
  822. BUG_ON(evtchn_to_irq[evtchn] != -1);
  823. /* Expect irq to have been bound before,
  824. so there should be a proper type */
  825. BUG_ON(info->type == IRQT_UNBOUND);
  826. evtchn_to_irq[evtchn] = irq;
  827. irq_info[irq] = mk_evtchn_info(evtchn);
  828. spin_unlock(&irq_mapping_update_lock);
  829. /* new event channels are always bound to cpu 0 */
  830. irq_set_affinity(irq, cpumask_of(0));
  831. /* Unmask the event channel. */
  832. enable_irq(irq);
  833. }
  834. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  835. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  836. {
  837. struct evtchn_bind_vcpu bind_vcpu;
  838. int evtchn = evtchn_from_irq(irq);
  839. /* events delivered via platform PCI interrupts are always
  840. * routed to vcpu 0 */
  841. if (!VALID_EVTCHN(evtchn) ||
  842. (xen_hvm_domain() && !xen_have_vector_callback))
  843. return -1;
  844. /* Send future instances of this interrupt to other vcpu. */
  845. bind_vcpu.port = evtchn;
  846. bind_vcpu.vcpu = tcpu;
  847. /*
  848. * If this fails, it usually just indicates that we're dealing with a
  849. * virq or IPI channel, which don't actually need to be rebound. Ignore
  850. * it, but don't do the xenlinux-level rebind in that case.
  851. */
  852. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  853. bind_evtchn_to_cpu(evtchn, tcpu);
  854. return 0;
  855. }
  856. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  857. {
  858. unsigned tcpu = cpumask_first(dest);
  859. return rebind_irq_to_cpu(irq, tcpu);
  860. }
  861. int resend_irq_on_evtchn(unsigned int irq)
  862. {
  863. int masked, evtchn = evtchn_from_irq(irq);
  864. struct shared_info *s = HYPERVISOR_shared_info;
  865. if (!VALID_EVTCHN(evtchn))
  866. return 1;
  867. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  868. sync_set_bit(evtchn, s->evtchn_pending);
  869. if (!masked)
  870. unmask_evtchn(evtchn);
  871. return 1;
  872. }
  873. static void enable_dynirq(unsigned int irq)
  874. {
  875. int evtchn = evtchn_from_irq(irq);
  876. if (VALID_EVTCHN(evtchn))
  877. unmask_evtchn(evtchn);
  878. }
  879. static void disable_dynirq(unsigned int irq)
  880. {
  881. int evtchn = evtchn_from_irq(irq);
  882. if (VALID_EVTCHN(evtchn))
  883. mask_evtchn(evtchn);
  884. }
  885. static void ack_dynirq(unsigned int irq)
  886. {
  887. int evtchn = evtchn_from_irq(irq);
  888. move_native_irq(irq);
  889. if (VALID_EVTCHN(evtchn))
  890. clear_evtchn(evtchn);
  891. }
  892. static int retrigger_dynirq(unsigned int irq)
  893. {
  894. int evtchn = evtchn_from_irq(irq);
  895. struct shared_info *sh = HYPERVISOR_shared_info;
  896. int ret = 0;
  897. if (VALID_EVTCHN(evtchn)) {
  898. int masked;
  899. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  900. sync_set_bit(evtchn, sh->evtchn_pending);
  901. if (!masked)
  902. unmask_evtchn(evtchn);
  903. ret = 1;
  904. }
  905. return ret;
  906. }
  907. static void restore_cpu_virqs(unsigned int cpu)
  908. {
  909. struct evtchn_bind_virq bind_virq;
  910. int virq, irq, evtchn;
  911. for (virq = 0; virq < NR_VIRQS; virq++) {
  912. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  913. continue;
  914. BUG_ON(virq_from_irq(irq) != virq);
  915. /* Get a new binding from Xen. */
  916. bind_virq.virq = virq;
  917. bind_virq.vcpu = cpu;
  918. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  919. &bind_virq) != 0)
  920. BUG();
  921. evtchn = bind_virq.port;
  922. /* Record the new mapping. */
  923. evtchn_to_irq[evtchn] = irq;
  924. irq_info[irq] = mk_virq_info(evtchn, virq);
  925. bind_evtchn_to_cpu(evtchn, cpu);
  926. /* Ready for use. */
  927. unmask_evtchn(evtchn);
  928. }
  929. }
  930. static void restore_cpu_ipis(unsigned int cpu)
  931. {
  932. struct evtchn_bind_ipi bind_ipi;
  933. int ipi, irq, evtchn;
  934. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  935. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  936. continue;
  937. BUG_ON(ipi_from_irq(irq) != ipi);
  938. /* Get a new binding from Xen. */
  939. bind_ipi.vcpu = cpu;
  940. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  941. &bind_ipi) != 0)
  942. BUG();
  943. evtchn = bind_ipi.port;
  944. /* Record the new mapping. */
  945. evtchn_to_irq[evtchn] = irq;
  946. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  947. bind_evtchn_to_cpu(evtchn, cpu);
  948. /* Ready for use. */
  949. unmask_evtchn(evtchn);
  950. }
  951. }
  952. /* Clear an irq's pending state, in preparation for polling on it */
  953. void xen_clear_irq_pending(int irq)
  954. {
  955. int evtchn = evtchn_from_irq(irq);
  956. if (VALID_EVTCHN(evtchn))
  957. clear_evtchn(evtchn);
  958. }
  959. EXPORT_SYMBOL(xen_clear_irq_pending);
  960. void xen_set_irq_pending(int irq)
  961. {
  962. int evtchn = evtchn_from_irq(irq);
  963. if (VALID_EVTCHN(evtchn))
  964. set_evtchn(evtchn);
  965. }
  966. bool xen_test_irq_pending(int irq)
  967. {
  968. int evtchn = evtchn_from_irq(irq);
  969. bool ret = false;
  970. if (VALID_EVTCHN(evtchn))
  971. ret = test_evtchn(evtchn);
  972. return ret;
  973. }
  974. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  975. * the irq will be disabled so it won't deliver an interrupt. */
  976. void xen_poll_irq_timeout(int irq, u64 timeout)
  977. {
  978. evtchn_port_t evtchn = evtchn_from_irq(irq);
  979. if (VALID_EVTCHN(evtchn)) {
  980. struct sched_poll poll;
  981. poll.nr_ports = 1;
  982. poll.timeout = timeout;
  983. set_xen_guest_handle(poll.ports, &evtchn);
  984. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  985. BUG();
  986. }
  987. }
  988. EXPORT_SYMBOL(xen_poll_irq_timeout);
  989. /* Poll waiting for an irq to become pending. In the usual case, the
  990. * irq will be disabled so it won't deliver an interrupt. */
  991. void xen_poll_irq(int irq)
  992. {
  993. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  994. }
  995. void xen_irq_resume(void)
  996. {
  997. unsigned int cpu, irq, evtchn;
  998. init_evtchn_cpu_bindings();
  999. /* New event-channel space is not 'live' yet. */
  1000. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1001. mask_evtchn(evtchn);
  1002. /* No IRQ <-> event-channel mappings. */
  1003. for (irq = 0; irq < nr_irqs; irq++)
  1004. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  1005. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1006. evtchn_to_irq[evtchn] = -1;
  1007. for_each_possible_cpu(cpu) {
  1008. restore_cpu_virqs(cpu);
  1009. restore_cpu_ipis(cpu);
  1010. }
  1011. }
  1012. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1013. .name = "xen-dyn",
  1014. .disable = disable_dynirq,
  1015. .mask = disable_dynirq,
  1016. .unmask = enable_dynirq,
  1017. .ack = ack_dynirq,
  1018. .set_affinity = set_affinity_irq,
  1019. .retrigger = retrigger_dynirq,
  1020. };
  1021. static struct irq_chip xen_pirq_chip __read_mostly = {
  1022. .name = "xen-pirq",
  1023. .startup = startup_pirq,
  1024. .shutdown = shutdown_pirq,
  1025. .enable = enable_pirq,
  1026. .unmask = enable_pirq,
  1027. .disable = disable_pirq,
  1028. .mask = disable_pirq,
  1029. .ack = ack_pirq,
  1030. .end = end_pirq,
  1031. .set_affinity = set_affinity_irq,
  1032. .retrigger = retrigger_dynirq,
  1033. };
  1034. static struct irq_chip xen_percpu_chip __read_mostly = {
  1035. .name = "xen-percpu",
  1036. .disable = disable_dynirq,
  1037. .mask = disable_dynirq,
  1038. .unmask = enable_dynirq,
  1039. .ack = ack_dynirq,
  1040. };
  1041. int xen_set_callback_via(uint64_t via)
  1042. {
  1043. struct xen_hvm_param a;
  1044. a.domid = DOMID_SELF;
  1045. a.index = HVM_PARAM_CALLBACK_IRQ;
  1046. a.value = via;
  1047. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1048. }
  1049. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1050. #ifdef CONFIG_XEN_PVHVM
  1051. /* Vector callbacks are better than PCI interrupts to receive event
  1052. * channel notifications because we can receive vector callbacks on any
  1053. * vcpu and we don't need PCI support or APIC interactions. */
  1054. void xen_callback_vector(void)
  1055. {
  1056. int rc;
  1057. uint64_t callback_via;
  1058. if (xen_have_vector_callback) {
  1059. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1060. rc = xen_set_callback_via(callback_via);
  1061. if (rc) {
  1062. printk(KERN_ERR "Request for Xen HVM callback vector"
  1063. " failed.\n");
  1064. xen_have_vector_callback = 0;
  1065. return;
  1066. }
  1067. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1068. "enabled\n");
  1069. /* in the restore case the vector has already been allocated */
  1070. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1071. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1072. }
  1073. }
  1074. #else
  1075. void xen_callback_vector(void) {}
  1076. #endif
  1077. void __init xen_init_IRQ(void)
  1078. {
  1079. int i, rc;
  1080. struct physdev_nr_pirqs op_nr_pirqs;
  1081. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1082. GFP_KERNEL);
  1083. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1084. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_nr_pirqs, &op_nr_pirqs);
  1085. if (rc < 0) {
  1086. nr_pirqs = nr_irqs;
  1087. if (rc != -ENOSYS)
  1088. printk(KERN_WARNING "PHYSDEVOP_get_nr_pirqs returned rc=%d\n", rc);
  1089. } else {
  1090. if (xen_pv_domain() && !xen_initial_domain())
  1091. nr_pirqs = max((int)op_nr_pirqs.nr_pirqs, nr_irqs);
  1092. else
  1093. nr_pirqs = op_nr_pirqs.nr_pirqs;
  1094. }
  1095. pirq_to_irq = kcalloc(nr_pirqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1096. for (i = 0; i < nr_pirqs; i++)
  1097. pirq_to_irq[i] = -1;
  1098. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1099. GFP_KERNEL);
  1100. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1101. evtchn_to_irq[i] = -1;
  1102. init_evtchn_cpu_bindings();
  1103. /* No event channels are 'live' right now. */
  1104. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1105. mask_evtchn(i);
  1106. if (xen_hvm_domain()) {
  1107. xen_callback_vector();
  1108. native_init_IRQ();
  1109. } else {
  1110. irq_ctx_init(smp_processor_id());
  1111. }
  1112. }