omap_hwmod.c 118 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include <asm/system_misc.h>
  141. #include "clock.h"
  142. #include "omap_hwmod.h"
  143. #include "soc.h"
  144. #include "common.h"
  145. #include "clockdomain.h"
  146. #include "powerdomain.h"
  147. #include "cm2xxx.h"
  148. #include "cm3xxx.h"
  149. #include "cminst44xx.h"
  150. #include "cm33xx.h"
  151. #include "prm.h"
  152. #include "prm3xxx.h"
  153. #include "prm44xx.h"
  154. #include "prm33xx.h"
  155. #include "prminst44xx.h"
  156. #include "mux.h"
  157. #include "pm.h"
  158. /* Name of the OMAP hwmod for the MPU */
  159. #define MPU_INITIATOR_NAME "mpu"
  160. /*
  161. * Number of struct omap_hwmod_link records per struct
  162. * omap_hwmod_ocp_if record (master->slave and slave->master)
  163. */
  164. #define LINKS_PER_OCP_IF 2
  165. /**
  166. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  167. * @enable_module: function to enable a module (via MODULEMODE)
  168. * @disable_module: function to disable a module (via MODULEMODE)
  169. *
  170. * XXX Eventually this functionality will be hidden inside the PRM/CM
  171. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  172. * conditionals in this code.
  173. */
  174. struct omap_hwmod_soc_ops {
  175. void (*enable_module)(struct omap_hwmod *oh);
  176. int (*disable_module)(struct omap_hwmod *oh);
  177. int (*wait_target_ready)(struct omap_hwmod *oh);
  178. int (*assert_hardreset)(struct omap_hwmod *oh,
  179. struct omap_hwmod_rst_info *ohri);
  180. int (*deassert_hardreset)(struct omap_hwmod *oh,
  181. struct omap_hwmod_rst_info *ohri);
  182. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  183. struct omap_hwmod_rst_info *ohri);
  184. int (*init_clkdm)(struct omap_hwmod *oh);
  185. void (*update_context_lost)(struct omap_hwmod *oh);
  186. int (*get_context_lost)(struct omap_hwmod *oh);
  187. };
  188. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  189. static struct omap_hwmod_soc_ops soc_ops;
  190. /* omap_hwmod_list contains all registered struct omap_hwmods */
  191. static LIST_HEAD(omap_hwmod_list);
  192. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  193. static struct omap_hwmod *mpu_oh;
  194. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  195. static DEFINE_SPINLOCK(io_chain_lock);
  196. /*
  197. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  198. * allocated from - used to reduce the number of small memory
  199. * allocations, which has a significant impact on performance
  200. */
  201. static struct omap_hwmod_link *linkspace;
  202. /*
  203. * free_ls, max_ls: array indexes into linkspace; representing the
  204. * next free struct omap_hwmod_link index, and the maximum number of
  205. * struct omap_hwmod_link records allocated (respectively)
  206. */
  207. static unsigned short free_ls, max_ls, ls_supp;
  208. /* inited: set to true once the hwmod code is initialized */
  209. static bool inited;
  210. /* Private functions */
  211. /**
  212. * _fetch_next_ocp_if - return the next OCP interface in a list
  213. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  214. * @i: pointer to the index of the element pointed to by @p in the list
  215. *
  216. * Return a pointer to the struct omap_hwmod_ocp_if record
  217. * containing the struct list_head pointed to by @p, and increment
  218. * @p such that a future call to this routine will return the next
  219. * record.
  220. */
  221. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  222. int *i)
  223. {
  224. struct omap_hwmod_ocp_if *oi;
  225. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  226. *p = (*p)->next;
  227. *i = *i + 1;
  228. return oi;
  229. }
  230. /**
  231. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  232. * @oh: struct omap_hwmod *
  233. *
  234. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  235. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  236. * OCP_SYSCONFIG register or 0 upon success.
  237. */
  238. static int _update_sysc_cache(struct omap_hwmod *oh)
  239. {
  240. if (!oh->class->sysc) {
  241. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  242. return -EINVAL;
  243. }
  244. /* XXX ensure module interface clock is up */
  245. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  246. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  247. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  248. return 0;
  249. }
  250. /**
  251. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  252. * @v: OCP_SYSCONFIG value to write
  253. * @oh: struct omap_hwmod *
  254. *
  255. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  256. * one. No return value.
  257. */
  258. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  259. {
  260. if (!oh->class->sysc) {
  261. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  262. return;
  263. }
  264. /* XXX ensure module interface clock is up */
  265. /* Module might have lost context, always update cache and register */
  266. oh->_sysc_cache = v;
  267. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  268. }
  269. /**
  270. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  271. * @oh: struct omap_hwmod *
  272. * @standbymode: MIDLEMODE field bits
  273. * @v: pointer to register contents to modify
  274. *
  275. * Update the master standby mode bits in @v to be @standbymode for
  276. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  277. * upon error or 0 upon success.
  278. */
  279. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  280. u32 *v)
  281. {
  282. u32 mstandby_mask;
  283. u8 mstandby_shift;
  284. if (!oh->class->sysc ||
  285. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  286. return -EINVAL;
  287. if (!oh->class->sysc->sysc_fields) {
  288. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  289. return -EINVAL;
  290. }
  291. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  292. mstandby_mask = (0x3 << mstandby_shift);
  293. *v &= ~mstandby_mask;
  294. *v |= __ffs(standbymode) << mstandby_shift;
  295. return 0;
  296. }
  297. /**
  298. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  299. * @oh: struct omap_hwmod *
  300. * @idlemode: SIDLEMODE field bits
  301. * @v: pointer to register contents to modify
  302. *
  303. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  304. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  305. * or 0 upon success.
  306. */
  307. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  308. {
  309. u32 sidle_mask;
  310. u8 sidle_shift;
  311. if (!oh->class->sysc ||
  312. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  313. return -EINVAL;
  314. if (!oh->class->sysc->sysc_fields) {
  315. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  316. return -EINVAL;
  317. }
  318. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  319. sidle_mask = (0x3 << sidle_shift);
  320. *v &= ~sidle_mask;
  321. *v |= __ffs(idlemode) << sidle_shift;
  322. return 0;
  323. }
  324. /**
  325. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  326. * @oh: struct omap_hwmod *
  327. * @clockact: CLOCKACTIVITY field bits
  328. * @v: pointer to register contents to modify
  329. *
  330. * Update the clockactivity mode bits in @v to be @clockact for the
  331. * @oh hwmod. Used for additional powersaving on some modules. Does
  332. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  333. * success.
  334. */
  335. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  336. {
  337. u32 clkact_mask;
  338. u8 clkact_shift;
  339. if (!oh->class->sysc ||
  340. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  341. return -EINVAL;
  342. if (!oh->class->sysc->sysc_fields) {
  343. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  344. return -EINVAL;
  345. }
  346. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  347. clkact_mask = (0x3 << clkact_shift);
  348. *v &= ~clkact_mask;
  349. *v |= clockact << clkact_shift;
  350. return 0;
  351. }
  352. /**
  353. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  354. * @oh: struct omap_hwmod *
  355. * @v: pointer to register contents to modify
  356. *
  357. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  358. * error or 0 upon success.
  359. */
  360. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  361. {
  362. u32 softrst_mask;
  363. if (!oh->class->sysc ||
  364. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  365. return -EINVAL;
  366. if (!oh->class->sysc->sysc_fields) {
  367. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  368. return -EINVAL;
  369. }
  370. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  371. *v |= softrst_mask;
  372. return 0;
  373. }
  374. /**
  375. * _wait_softreset_complete - wait for an OCP softreset to complete
  376. * @oh: struct omap_hwmod * to wait on
  377. *
  378. * Wait until the IP block represented by @oh reports that its OCP
  379. * softreset is complete. This can be triggered by software (see
  380. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  381. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  382. * microseconds. Returns the number of microseconds waited.
  383. */
  384. static int _wait_softreset_complete(struct omap_hwmod *oh)
  385. {
  386. struct omap_hwmod_class_sysconfig *sysc;
  387. u32 softrst_mask;
  388. int c = 0;
  389. sysc = oh->class->sysc;
  390. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  391. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  392. & SYSS_RESETDONE_MASK),
  393. MAX_MODULE_SOFTRESET_WAIT, c);
  394. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  395. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  396. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  397. & softrst_mask),
  398. MAX_MODULE_SOFTRESET_WAIT, c);
  399. }
  400. return c;
  401. }
  402. /**
  403. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  404. * @oh: struct omap_hwmod *
  405. *
  406. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  407. * of some modules. When the DMA must perform read/write accesses, the
  408. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  409. * for power management, software must set the DMADISABLE bit back to 1.
  410. *
  411. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  412. * error or 0 upon success.
  413. */
  414. static int _set_dmadisable(struct omap_hwmod *oh)
  415. {
  416. u32 v;
  417. u32 dmadisable_mask;
  418. if (!oh->class->sysc ||
  419. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  420. return -EINVAL;
  421. if (!oh->class->sysc->sysc_fields) {
  422. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  423. return -EINVAL;
  424. }
  425. /* clocks must be on for this operation */
  426. if (oh->_state != _HWMOD_STATE_ENABLED) {
  427. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  428. return -EINVAL;
  429. }
  430. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  431. v = oh->_sysc_cache;
  432. dmadisable_mask =
  433. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  434. v |= dmadisable_mask;
  435. _write_sysconfig(v, oh);
  436. return 0;
  437. }
  438. /**
  439. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  440. * @oh: struct omap_hwmod *
  441. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  442. * @v: pointer to register contents to modify
  443. *
  444. * Update the module autoidle bit in @v to be @autoidle for the @oh
  445. * hwmod. The autoidle bit controls whether the module can gate
  446. * internal clocks automatically when it isn't doing anything; the
  447. * exact function of this bit varies on a per-module basis. This
  448. * function does not write to the hardware. Returns -EINVAL upon
  449. * error or 0 upon success.
  450. */
  451. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  452. u32 *v)
  453. {
  454. u32 autoidle_mask;
  455. u8 autoidle_shift;
  456. if (!oh->class->sysc ||
  457. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  458. return -EINVAL;
  459. if (!oh->class->sysc->sysc_fields) {
  460. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  461. return -EINVAL;
  462. }
  463. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  464. autoidle_mask = (0x1 << autoidle_shift);
  465. *v &= ~autoidle_mask;
  466. *v |= autoidle << autoidle_shift;
  467. return 0;
  468. }
  469. /**
  470. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  471. * @oh: struct omap_hwmod *
  472. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  473. *
  474. * Set or clear the I/O pad wakeup flag in the mux entries for the
  475. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  476. * in memory. If the hwmod is currently idled, and the new idle
  477. * values don't match the previous ones, this function will also
  478. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  479. * currently idled, this function won't touch the hardware: the new
  480. * mux settings are written to the SCM PADCTRL registers when the
  481. * hwmod is idled. No return value.
  482. */
  483. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  484. {
  485. struct omap_device_pad *pad;
  486. bool change = false;
  487. u16 prev_idle;
  488. int j;
  489. if (!oh->mux || !oh->mux->enabled)
  490. return;
  491. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  492. pad = oh->mux->pads_dynamic[j];
  493. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  494. continue;
  495. prev_idle = pad->idle;
  496. if (set_wake)
  497. pad->idle |= OMAP_WAKEUP_EN;
  498. else
  499. pad->idle &= ~OMAP_WAKEUP_EN;
  500. if (prev_idle != pad->idle)
  501. change = true;
  502. }
  503. if (change && oh->_state == _HWMOD_STATE_IDLE)
  504. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  505. }
  506. /**
  507. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  508. * @oh: struct omap_hwmod *
  509. *
  510. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  511. * upon error or 0 upon success.
  512. */
  513. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  514. {
  515. if (!oh->class->sysc ||
  516. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  517. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  518. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  519. return -EINVAL;
  520. if (!oh->class->sysc->sysc_fields) {
  521. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  522. return -EINVAL;
  523. }
  524. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  525. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  526. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  527. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  528. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  529. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  530. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  531. return 0;
  532. }
  533. /**
  534. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  538. * upon error or 0 upon success.
  539. */
  540. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  541. {
  542. if (!oh->class->sysc ||
  543. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  544. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  545. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  546. return -EINVAL;
  547. if (!oh->class->sysc->sysc_fields) {
  548. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  549. return -EINVAL;
  550. }
  551. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  552. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  553. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  554. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  555. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  556. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  557. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  558. return 0;
  559. }
  560. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  561. {
  562. struct clk_hw_omap *clk;
  563. if (oh->clkdm) {
  564. return oh->clkdm;
  565. } else if (oh->_clk) {
  566. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  567. return clk->clkdm;
  568. }
  569. return NULL;
  570. }
  571. /**
  572. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  573. * @oh: struct omap_hwmod *
  574. *
  575. * Prevent the hardware module @oh from entering idle while the
  576. * hardare module initiator @init_oh is active. Useful when a module
  577. * will be accessed by a particular initiator (e.g., if a module will
  578. * be accessed by the IVA, there should be a sleepdep between the IVA
  579. * initiator and the module). Only applies to modules in smart-idle
  580. * mode. If the clockdomain is marked as not needing autodeps, return
  581. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  582. * passes along clkdm_add_sleepdep() value upon success.
  583. */
  584. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  585. {
  586. struct clockdomain *clkdm, *init_clkdm;
  587. clkdm = _get_clkdm(oh);
  588. init_clkdm = _get_clkdm(init_oh);
  589. if (!clkdm || !init_clkdm)
  590. return -EINVAL;
  591. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  592. return 0;
  593. return clkdm_add_sleepdep(clkdm, init_clkdm);
  594. }
  595. /**
  596. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  597. * @oh: struct omap_hwmod *
  598. *
  599. * Allow the hardware module @oh to enter idle while the hardare
  600. * module initiator @init_oh is active. Useful when a module will not
  601. * be accessed by a particular initiator (e.g., if a module will not
  602. * be accessed by the IVA, there should be no sleepdep between the IVA
  603. * initiator and the module). Only applies to modules in smart-idle
  604. * mode. If the clockdomain is marked as not needing autodeps, return
  605. * 0 without doing anything. Returns -EINVAL upon error or passes
  606. * along clkdm_del_sleepdep() value upon success.
  607. */
  608. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  609. {
  610. struct clockdomain *clkdm, *init_clkdm;
  611. clkdm = _get_clkdm(oh);
  612. init_clkdm = _get_clkdm(init_oh);
  613. if (!clkdm || !init_clkdm)
  614. return -EINVAL;
  615. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  616. return 0;
  617. return clkdm_del_sleepdep(clkdm, init_clkdm);
  618. }
  619. /**
  620. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  621. * @oh: struct omap_hwmod *
  622. *
  623. * Called from _init_clocks(). Populates the @oh _clk (main
  624. * functional clock pointer) if a main_clk is present. Returns 0 on
  625. * success or -EINVAL on error.
  626. */
  627. static int _init_main_clk(struct omap_hwmod *oh)
  628. {
  629. int ret = 0;
  630. if (!oh->main_clk)
  631. return 0;
  632. oh->_clk = clk_get(NULL, oh->main_clk);
  633. if (IS_ERR(oh->_clk)) {
  634. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  635. oh->name, oh->main_clk);
  636. return -EINVAL;
  637. }
  638. /*
  639. * HACK: This needs a re-visit once clk_prepare() is implemented
  640. * to do something meaningful. Today its just a no-op.
  641. * If clk_prepare() is used at some point to do things like
  642. * voltage scaling etc, then this would have to be moved to
  643. * some point where subsystems like i2c and pmic become
  644. * available.
  645. */
  646. clk_prepare(oh->_clk);
  647. if (!_get_clkdm(oh))
  648. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  649. oh->name, oh->main_clk);
  650. return ret;
  651. }
  652. /**
  653. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  654. * @oh: struct omap_hwmod *
  655. *
  656. * Called from _init_clocks(). Populates the @oh OCP slave interface
  657. * clock pointers. Returns 0 on success or -EINVAL on error.
  658. */
  659. static int _init_interface_clks(struct omap_hwmod *oh)
  660. {
  661. struct omap_hwmod_ocp_if *os;
  662. struct list_head *p;
  663. struct clk *c;
  664. int i = 0;
  665. int ret = 0;
  666. p = oh->slave_ports.next;
  667. while (i < oh->slaves_cnt) {
  668. os = _fetch_next_ocp_if(&p, &i);
  669. if (!os->clk)
  670. continue;
  671. c = clk_get(NULL, os->clk);
  672. if (IS_ERR(c)) {
  673. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  674. oh->name, os->clk);
  675. ret = -EINVAL;
  676. }
  677. os->_clk = c;
  678. /*
  679. * HACK: This needs a re-visit once clk_prepare() is implemented
  680. * to do something meaningful. Today its just a no-op.
  681. * If clk_prepare() is used at some point to do things like
  682. * voltage scaling etc, then this would have to be moved to
  683. * some point where subsystems like i2c and pmic become
  684. * available.
  685. */
  686. clk_prepare(os->_clk);
  687. }
  688. return ret;
  689. }
  690. /**
  691. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  692. * @oh: struct omap_hwmod *
  693. *
  694. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  695. * clock pointers. Returns 0 on success or -EINVAL on error.
  696. */
  697. static int _init_opt_clks(struct omap_hwmod *oh)
  698. {
  699. struct omap_hwmod_opt_clk *oc;
  700. struct clk *c;
  701. int i;
  702. int ret = 0;
  703. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  704. c = clk_get(NULL, oc->clk);
  705. if (IS_ERR(c)) {
  706. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  707. oh->name, oc->clk);
  708. ret = -EINVAL;
  709. }
  710. oc->_clk = c;
  711. /*
  712. * HACK: This needs a re-visit once clk_prepare() is implemented
  713. * to do something meaningful. Today its just a no-op.
  714. * If clk_prepare() is used at some point to do things like
  715. * voltage scaling etc, then this would have to be moved to
  716. * some point where subsystems like i2c and pmic become
  717. * available.
  718. */
  719. clk_prepare(oc->_clk);
  720. }
  721. return ret;
  722. }
  723. /**
  724. * _enable_clocks - enable hwmod main clock and interface clocks
  725. * @oh: struct omap_hwmod *
  726. *
  727. * Enables all clocks necessary for register reads and writes to succeed
  728. * on the hwmod @oh. Returns 0.
  729. */
  730. static int _enable_clocks(struct omap_hwmod *oh)
  731. {
  732. struct omap_hwmod_ocp_if *os;
  733. struct list_head *p;
  734. int i = 0;
  735. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  736. if (oh->_clk)
  737. clk_enable(oh->_clk);
  738. p = oh->slave_ports.next;
  739. while (i < oh->slaves_cnt) {
  740. os = _fetch_next_ocp_if(&p, &i);
  741. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  742. clk_enable(os->_clk);
  743. }
  744. /* The opt clocks are controlled by the device driver. */
  745. return 0;
  746. }
  747. /**
  748. * _disable_clocks - disable hwmod main clock and interface clocks
  749. * @oh: struct omap_hwmod *
  750. *
  751. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  752. */
  753. static int _disable_clocks(struct omap_hwmod *oh)
  754. {
  755. struct omap_hwmod_ocp_if *os;
  756. struct list_head *p;
  757. int i = 0;
  758. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  759. if (oh->_clk)
  760. clk_disable(oh->_clk);
  761. p = oh->slave_ports.next;
  762. while (i < oh->slaves_cnt) {
  763. os = _fetch_next_ocp_if(&p, &i);
  764. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  765. clk_disable(os->_clk);
  766. }
  767. /* The opt clocks are controlled by the device driver. */
  768. return 0;
  769. }
  770. static void _enable_optional_clocks(struct omap_hwmod *oh)
  771. {
  772. struct omap_hwmod_opt_clk *oc;
  773. int i;
  774. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  775. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  776. if (oc->_clk) {
  777. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  778. __clk_get_name(oc->_clk));
  779. clk_enable(oc->_clk);
  780. }
  781. }
  782. static void _disable_optional_clocks(struct omap_hwmod *oh)
  783. {
  784. struct omap_hwmod_opt_clk *oc;
  785. int i;
  786. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  787. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  788. if (oc->_clk) {
  789. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  790. __clk_get_name(oc->_clk));
  791. clk_disable(oc->_clk);
  792. }
  793. }
  794. /**
  795. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  796. * @oh: struct omap_hwmod *
  797. *
  798. * Enables the PRCM module mode related to the hwmod @oh.
  799. * No return value.
  800. */
  801. static void _omap4_enable_module(struct omap_hwmod *oh)
  802. {
  803. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  804. return;
  805. pr_debug("omap_hwmod: %s: %s: %d\n",
  806. oh->name, __func__, oh->prcm.omap4.modulemode);
  807. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  808. oh->clkdm->prcm_partition,
  809. oh->clkdm->cm_inst,
  810. oh->clkdm->clkdm_offs,
  811. oh->prcm.omap4.clkctrl_offs);
  812. }
  813. /**
  814. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  815. * @oh: struct omap_hwmod *
  816. *
  817. * Enables the PRCM module mode related to the hwmod @oh.
  818. * No return value.
  819. */
  820. static void _am33xx_enable_module(struct omap_hwmod *oh)
  821. {
  822. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  823. return;
  824. pr_debug("omap_hwmod: %s: %s: %d\n",
  825. oh->name, __func__, oh->prcm.omap4.modulemode);
  826. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  827. oh->clkdm->clkdm_offs,
  828. oh->prcm.omap4.clkctrl_offs);
  829. }
  830. /**
  831. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  832. * @oh: struct omap_hwmod *
  833. *
  834. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  835. * does not have an IDLEST bit or if the module successfully enters
  836. * slave idle; otherwise, pass along the return value of the
  837. * appropriate *_cm*_wait_module_idle() function.
  838. */
  839. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  840. {
  841. if (!oh)
  842. return -EINVAL;
  843. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  844. return 0;
  845. if (oh->flags & HWMOD_NO_IDLEST)
  846. return 0;
  847. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  848. oh->clkdm->cm_inst,
  849. oh->clkdm->clkdm_offs,
  850. oh->prcm.omap4.clkctrl_offs);
  851. }
  852. /**
  853. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  854. * @oh: struct omap_hwmod *
  855. *
  856. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  857. * does not have an IDLEST bit or if the module successfully enters
  858. * slave idle; otherwise, pass along the return value of the
  859. * appropriate *_cm*_wait_module_idle() function.
  860. */
  861. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  862. {
  863. if (!oh)
  864. return -EINVAL;
  865. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  866. return 0;
  867. if (oh->flags & HWMOD_NO_IDLEST)
  868. return 0;
  869. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  870. oh->clkdm->clkdm_offs,
  871. oh->prcm.omap4.clkctrl_offs);
  872. }
  873. /**
  874. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  875. * @oh: struct omap_hwmod *oh
  876. *
  877. * Count and return the number of MPU IRQs associated with the hwmod
  878. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  879. * NULL.
  880. */
  881. static int _count_mpu_irqs(struct omap_hwmod *oh)
  882. {
  883. struct omap_hwmod_irq_info *ohii;
  884. int i = 0;
  885. if (!oh || !oh->mpu_irqs)
  886. return 0;
  887. do {
  888. ohii = &oh->mpu_irqs[i++];
  889. } while (ohii->irq != -1);
  890. return i-1;
  891. }
  892. /**
  893. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  894. * @oh: struct omap_hwmod *oh
  895. *
  896. * Count and return the number of SDMA request lines associated with
  897. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  898. * if @oh is NULL.
  899. */
  900. static int _count_sdma_reqs(struct omap_hwmod *oh)
  901. {
  902. struct omap_hwmod_dma_info *ohdi;
  903. int i = 0;
  904. if (!oh || !oh->sdma_reqs)
  905. return 0;
  906. do {
  907. ohdi = &oh->sdma_reqs[i++];
  908. } while (ohdi->dma_req != -1);
  909. return i-1;
  910. }
  911. /**
  912. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  913. * @oh: struct omap_hwmod *oh
  914. *
  915. * Count and return the number of address space ranges associated with
  916. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  917. * if @oh is NULL.
  918. */
  919. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  920. {
  921. struct omap_hwmod_addr_space *mem;
  922. int i = 0;
  923. if (!os || !os->addr)
  924. return 0;
  925. do {
  926. mem = &os->addr[i++];
  927. } while (mem->pa_start != mem->pa_end);
  928. return i-1;
  929. }
  930. /**
  931. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  932. * @oh: struct omap_hwmod * to operate on
  933. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  934. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  935. *
  936. * Retrieve a MPU hardware IRQ line number named by @name associated
  937. * with the IP block pointed to by @oh. The IRQ number will be filled
  938. * into the address pointed to by @dma. When @name is non-null, the
  939. * IRQ line number associated with the named entry will be returned.
  940. * If @name is null, the first matching entry will be returned. Data
  941. * order is not meaningful in hwmod data, so callers are strongly
  942. * encouraged to use a non-null @name whenever possible to avoid
  943. * unpredictable effects if hwmod data is later added that causes data
  944. * ordering to change. Returns 0 upon success or a negative error
  945. * code upon error.
  946. */
  947. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  948. unsigned int *irq)
  949. {
  950. int i;
  951. bool found = false;
  952. if (!oh->mpu_irqs)
  953. return -ENOENT;
  954. i = 0;
  955. while (oh->mpu_irqs[i].irq != -1) {
  956. if (name == oh->mpu_irqs[i].name ||
  957. !strcmp(name, oh->mpu_irqs[i].name)) {
  958. found = true;
  959. break;
  960. }
  961. i++;
  962. }
  963. if (!found)
  964. return -ENOENT;
  965. *irq = oh->mpu_irqs[i].irq;
  966. return 0;
  967. }
  968. /**
  969. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  970. * @oh: struct omap_hwmod * to operate on
  971. * @name: pointer to the name of the SDMA request line to fetch (optional)
  972. * @dma: pointer to an unsigned int to store the request line ID to
  973. *
  974. * Retrieve an SDMA request line ID named by @name on the IP block
  975. * pointed to by @oh. The ID will be filled into the address pointed
  976. * to by @dma. When @name is non-null, the request line ID associated
  977. * with the named entry will be returned. If @name is null, the first
  978. * matching entry will be returned. Data order is not meaningful in
  979. * hwmod data, so callers are strongly encouraged to use a non-null
  980. * @name whenever possible to avoid unpredictable effects if hwmod
  981. * data is later added that causes data ordering to change. Returns 0
  982. * upon success or a negative error code upon error.
  983. */
  984. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  985. unsigned int *dma)
  986. {
  987. int i;
  988. bool found = false;
  989. if (!oh->sdma_reqs)
  990. return -ENOENT;
  991. i = 0;
  992. while (oh->sdma_reqs[i].dma_req != -1) {
  993. if (name == oh->sdma_reqs[i].name ||
  994. !strcmp(name, oh->sdma_reqs[i].name)) {
  995. found = true;
  996. break;
  997. }
  998. i++;
  999. }
  1000. if (!found)
  1001. return -ENOENT;
  1002. *dma = oh->sdma_reqs[i].dma_req;
  1003. return 0;
  1004. }
  1005. /**
  1006. * _get_addr_space_by_name - fetch address space start & end by name
  1007. * @oh: struct omap_hwmod * to operate on
  1008. * @name: pointer to the name of the address space to fetch (optional)
  1009. * @pa_start: pointer to a u32 to store the starting address to
  1010. * @pa_end: pointer to a u32 to store the ending address to
  1011. *
  1012. * Retrieve address space start and end addresses for the IP block
  1013. * pointed to by @oh. The data will be filled into the addresses
  1014. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1015. * address space data associated with the named entry will be
  1016. * returned. If @name is null, the first matching entry will be
  1017. * returned. Data order is not meaningful in hwmod data, so callers
  1018. * are strongly encouraged to use a non-null @name whenever possible
  1019. * to avoid unpredictable effects if hwmod data is later added that
  1020. * causes data ordering to change. Returns 0 upon success or a
  1021. * negative error code upon error.
  1022. */
  1023. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1024. u32 *pa_start, u32 *pa_end)
  1025. {
  1026. int i, j;
  1027. struct omap_hwmod_ocp_if *os;
  1028. struct list_head *p = NULL;
  1029. bool found = false;
  1030. p = oh->slave_ports.next;
  1031. i = 0;
  1032. while (i < oh->slaves_cnt) {
  1033. os = _fetch_next_ocp_if(&p, &i);
  1034. if (!os->addr)
  1035. return -ENOENT;
  1036. j = 0;
  1037. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1038. if (name == os->addr[j].name ||
  1039. !strcmp(name, os->addr[j].name)) {
  1040. found = true;
  1041. break;
  1042. }
  1043. j++;
  1044. }
  1045. if (found)
  1046. break;
  1047. }
  1048. if (!found)
  1049. return -ENOENT;
  1050. *pa_start = os->addr[j].pa_start;
  1051. *pa_end = os->addr[j].pa_end;
  1052. return 0;
  1053. }
  1054. /**
  1055. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1056. * @oh: struct omap_hwmod *
  1057. *
  1058. * Determines the array index of the OCP slave port that the MPU uses
  1059. * to address the device, and saves it into the struct omap_hwmod.
  1060. * Intended to be called during hwmod registration only. No return
  1061. * value.
  1062. */
  1063. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1064. {
  1065. struct omap_hwmod_ocp_if *os = NULL;
  1066. struct list_head *p;
  1067. int i = 0;
  1068. if (!oh)
  1069. return;
  1070. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1071. p = oh->slave_ports.next;
  1072. while (i < oh->slaves_cnt) {
  1073. os = _fetch_next_ocp_if(&p, &i);
  1074. if (os->user & OCP_USER_MPU) {
  1075. oh->_mpu_port = os;
  1076. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1077. break;
  1078. }
  1079. }
  1080. return;
  1081. }
  1082. /**
  1083. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1084. * @oh: struct omap_hwmod *
  1085. *
  1086. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1087. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1088. * communicate with the IP block. This interface need not be directly
  1089. * connected to the MPU (and almost certainly is not), but is directly
  1090. * connected to the IP block represented by @oh. Returns a pointer
  1091. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1092. * error or if there does not appear to be a path from the MPU to this
  1093. * IP block.
  1094. */
  1095. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1096. {
  1097. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1098. return NULL;
  1099. return oh->_mpu_port;
  1100. };
  1101. /**
  1102. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1103. * @oh: struct omap_hwmod *
  1104. *
  1105. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1106. * the register target MPU address space; or returns NULL upon error.
  1107. */
  1108. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1109. {
  1110. struct omap_hwmod_ocp_if *os;
  1111. struct omap_hwmod_addr_space *mem;
  1112. int found = 0, i = 0;
  1113. os = _find_mpu_rt_port(oh);
  1114. if (!os || !os->addr)
  1115. return NULL;
  1116. do {
  1117. mem = &os->addr[i++];
  1118. if (mem->flags & ADDR_TYPE_RT)
  1119. found = 1;
  1120. } while (!found && mem->pa_start != mem->pa_end);
  1121. return (found) ? mem : NULL;
  1122. }
  1123. /**
  1124. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1125. * @oh: struct omap_hwmod *
  1126. *
  1127. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1128. * by @oh is set to indicate to the PRCM that the IP block is active.
  1129. * Usually this means placing the module into smart-idle mode and
  1130. * smart-standby, but if there is a bug in the automatic idle handling
  1131. * for the IP block, it may need to be placed into the force-idle or
  1132. * no-idle variants of these modes. No return value.
  1133. */
  1134. static void _enable_sysc(struct omap_hwmod *oh)
  1135. {
  1136. u8 idlemode, sf;
  1137. u32 v;
  1138. bool clkdm_act;
  1139. struct clockdomain *clkdm;
  1140. if (!oh->class->sysc)
  1141. return;
  1142. /*
  1143. * Wait until reset has completed, this is needed as the IP
  1144. * block is reset automatically by hardware in some cases
  1145. * (off-mode for example), and the drivers require the
  1146. * IP to be ready when they access it
  1147. */
  1148. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1149. _enable_optional_clocks(oh);
  1150. _wait_softreset_complete(oh);
  1151. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1152. _disable_optional_clocks(oh);
  1153. v = oh->_sysc_cache;
  1154. sf = oh->class->sysc->sysc_flags;
  1155. clkdm = _get_clkdm(oh);
  1156. if (sf & SYSC_HAS_SIDLEMODE) {
  1157. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1158. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1159. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1160. idlemode = HWMOD_IDLEMODE_FORCE;
  1161. else
  1162. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1163. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1164. _set_slave_idlemode(oh, idlemode, &v);
  1165. }
  1166. if (sf & SYSC_HAS_MIDLEMODE) {
  1167. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1168. idlemode = HWMOD_IDLEMODE_NO;
  1169. } else {
  1170. if (sf & SYSC_HAS_ENAWAKEUP)
  1171. _enable_wakeup(oh, &v);
  1172. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1173. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1174. else
  1175. idlemode = HWMOD_IDLEMODE_SMART;
  1176. }
  1177. _set_master_standbymode(oh, idlemode, &v);
  1178. }
  1179. /*
  1180. * XXX The clock framework should handle this, by
  1181. * calling into this code. But this must wait until the
  1182. * clock structures are tagged with omap_hwmod entries
  1183. */
  1184. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1185. (sf & SYSC_HAS_CLOCKACTIVITY))
  1186. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1187. /* If slave is in SMARTIDLE, also enable wakeup */
  1188. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1189. _enable_wakeup(oh, &v);
  1190. _write_sysconfig(v, oh);
  1191. /*
  1192. * Set the autoidle bit only after setting the smartidle bit
  1193. * Setting this will not have any impact on the other modules.
  1194. */
  1195. if (sf & SYSC_HAS_AUTOIDLE) {
  1196. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1197. 0 : 1;
  1198. _set_module_autoidle(oh, idlemode, &v);
  1199. _write_sysconfig(v, oh);
  1200. }
  1201. }
  1202. /**
  1203. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1204. * @oh: struct omap_hwmod *
  1205. *
  1206. * If module is marked as SWSUP_SIDLE, force the module into slave
  1207. * idle; otherwise, configure it for smart-idle. If module is marked
  1208. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1209. * configure it for smart-standby. No return value.
  1210. */
  1211. static void _idle_sysc(struct omap_hwmod *oh)
  1212. {
  1213. u8 idlemode, sf;
  1214. u32 v;
  1215. if (!oh->class->sysc)
  1216. return;
  1217. v = oh->_sysc_cache;
  1218. sf = oh->class->sysc->sysc_flags;
  1219. if (sf & SYSC_HAS_SIDLEMODE) {
  1220. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1221. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1222. !(oh->class->sysc->idlemodes &
  1223. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1224. idlemode = HWMOD_IDLEMODE_FORCE;
  1225. else
  1226. idlemode = HWMOD_IDLEMODE_SMART;
  1227. _set_slave_idlemode(oh, idlemode, &v);
  1228. }
  1229. if (sf & SYSC_HAS_MIDLEMODE) {
  1230. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1231. idlemode = HWMOD_IDLEMODE_FORCE;
  1232. } else {
  1233. if (sf & SYSC_HAS_ENAWAKEUP)
  1234. _enable_wakeup(oh, &v);
  1235. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1236. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1237. else
  1238. idlemode = HWMOD_IDLEMODE_SMART;
  1239. }
  1240. _set_master_standbymode(oh, idlemode, &v);
  1241. }
  1242. /* If slave is in SMARTIDLE, also enable wakeup */
  1243. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1244. _enable_wakeup(oh, &v);
  1245. _write_sysconfig(v, oh);
  1246. }
  1247. /**
  1248. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1249. * @oh: struct omap_hwmod *
  1250. *
  1251. * Force the module into slave idle and master suspend. No return
  1252. * value.
  1253. */
  1254. static void _shutdown_sysc(struct omap_hwmod *oh)
  1255. {
  1256. u32 v;
  1257. u8 sf;
  1258. if (!oh->class->sysc)
  1259. return;
  1260. v = oh->_sysc_cache;
  1261. sf = oh->class->sysc->sysc_flags;
  1262. if (sf & SYSC_HAS_SIDLEMODE)
  1263. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1264. if (sf & SYSC_HAS_MIDLEMODE)
  1265. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1266. if (sf & SYSC_HAS_AUTOIDLE)
  1267. _set_module_autoidle(oh, 1, &v);
  1268. _write_sysconfig(v, oh);
  1269. }
  1270. /**
  1271. * _lookup - find an omap_hwmod by name
  1272. * @name: find an omap_hwmod by name
  1273. *
  1274. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1275. */
  1276. static struct omap_hwmod *_lookup(const char *name)
  1277. {
  1278. struct omap_hwmod *oh, *temp_oh;
  1279. oh = NULL;
  1280. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1281. if (!strcmp(name, temp_oh->name)) {
  1282. oh = temp_oh;
  1283. break;
  1284. }
  1285. }
  1286. return oh;
  1287. }
  1288. /**
  1289. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1290. * @oh: struct omap_hwmod *
  1291. *
  1292. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1293. * clockdomain pointer, and save it into the struct omap_hwmod.
  1294. * Return -EINVAL if the clkdm_name lookup failed.
  1295. */
  1296. static int _init_clkdm(struct omap_hwmod *oh)
  1297. {
  1298. if (!oh->clkdm_name) {
  1299. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1300. return 0;
  1301. }
  1302. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1303. if (!oh->clkdm) {
  1304. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1305. oh->name, oh->clkdm_name);
  1306. return -EINVAL;
  1307. }
  1308. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1309. oh->name, oh->clkdm_name);
  1310. return 0;
  1311. }
  1312. /**
  1313. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1314. * well the clockdomain.
  1315. * @oh: struct omap_hwmod *
  1316. * @data: not used; pass NULL
  1317. *
  1318. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1319. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1320. * success, or a negative error code on failure.
  1321. */
  1322. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1323. {
  1324. int ret = 0;
  1325. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1326. return 0;
  1327. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1328. if (soc_ops.init_clkdm)
  1329. ret |= soc_ops.init_clkdm(oh);
  1330. ret |= _init_main_clk(oh);
  1331. ret |= _init_interface_clks(oh);
  1332. ret |= _init_opt_clks(oh);
  1333. if (!ret)
  1334. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1335. else
  1336. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1337. return ret;
  1338. }
  1339. /**
  1340. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1341. * @oh: struct omap_hwmod *
  1342. * @name: name of the reset line in the context of this hwmod
  1343. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1344. *
  1345. * Return the bit position of the reset line that match the
  1346. * input name. Return -ENOENT if not found.
  1347. */
  1348. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1349. struct omap_hwmod_rst_info *ohri)
  1350. {
  1351. int i;
  1352. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1353. const char *rst_line = oh->rst_lines[i].name;
  1354. if (!strcmp(rst_line, name)) {
  1355. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1356. ohri->st_shift = oh->rst_lines[i].st_shift;
  1357. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1358. oh->name, __func__, rst_line, ohri->rst_shift,
  1359. ohri->st_shift);
  1360. return 0;
  1361. }
  1362. }
  1363. return -ENOENT;
  1364. }
  1365. /**
  1366. * _assert_hardreset - assert the HW reset line of submodules
  1367. * contained in the hwmod module.
  1368. * @oh: struct omap_hwmod *
  1369. * @name: name of the reset line to lookup and assert
  1370. *
  1371. * Some IP like dsp, ipu or iva contain processor that require an HW
  1372. * reset line to be assert / deassert in order to enable fully the IP.
  1373. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1374. * asserting the hardreset line on the currently-booted SoC, or passes
  1375. * along the return value from _lookup_hardreset() or the SoC's
  1376. * assert_hardreset code.
  1377. */
  1378. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1379. {
  1380. struct omap_hwmod_rst_info ohri;
  1381. int ret = -EINVAL;
  1382. if (!oh)
  1383. return -EINVAL;
  1384. if (!soc_ops.assert_hardreset)
  1385. return -ENOSYS;
  1386. ret = _lookup_hardreset(oh, name, &ohri);
  1387. if (ret < 0)
  1388. return ret;
  1389. ret = soc_ops.assert_hardreset(oh, &ohri);
  1390. return ret;
  1391. }
  1392. /**
  1393. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1394. * in the hwmod module.
  1395. * @oh: struct omap_hwmod *
  1396. * @name: name of the reset line to look up and deassert
  1397. *
  1398. * Some IP like dsp, ipu or iva contain processor that require an HW
  1399. * reset line to be assert / deassert in order to enable fully the IP.
  1400. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1401. * deasserting the hardreset line on the currently-booted SoC, or passes
  1402. * along the return value from _lookup_hardreset() or the SoC's
  1403. * deassert_hardreset code.
  1404. */
  1405. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1406. {
  1407. struct omap_hwmod_rst_info ohri;
  1408. int ret = -EINVAL;
  1409. int hwsup = 0;
  1410. if (!oh)
  1411. return -EINVAL;
  1412. if (!soc_ops.deassert_hardreset)
  1413. return -ENOSYS;
  1414. ret = _lookup_hardreset(oh, name, &ohri);
  1415. if (IS_ERR_VALUE(ret))
  1416. return ret;
  1417. if (oh->clkdm) {
  1418. /*
  1419. * A clockdomain must be in SW_SUP otherwise reset
  1420. * might not be completed. The clockdomain can be set
  1421. * in HW_AUTO only when the module become ready.
  1422. */
  1423. hwsup = clkdm_in_hwsup(oh->clkdm);
  1424. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1425. if (ret) {
  1426. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1427. oh->name, oh->clkdm->name, ret);
  1428. return ret;
  1429. }
  1430. }
  1431. _enable_clocks(oh);
  1432. if (soc_ops.enable_module)
  1433. soc_ops.enable_module(oh);
  1434. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1435. if (soc_ops.disable_module)
  1436. soc_ops.disable_module(oh);
  1437. _disable_clocks(oh);
  1438. if (ret == -EBUSY)
  1439. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1440. if (!ret) {
  1441. /*
  1442. * Set the clockdomain to HW_AUTO, assuming that the
  1443. * previous state was HW_AUTO.
  1444. */
  1445. if (oh->clkdm && hwsup)
  1446. clkdm_allow_idle(oh->clkdm);
  1447. } else {
  1448. if (oh->clkdm)
  1449. clkdm_hwmod_disable(oh->clkdm, oh);
  1450. }
  1451. return ret;
  1452. }
  1453. /**
  1454. * _read_hardreset - read the HW reset line state of submodules
  1455. * contained in the hwmod module
  1456. * @oh: struct omap_hwmod *
  1457. * @name: name of the reset line to look up and read
  1458. *
  1459. * Return the state of the reset line. Returns -EINVAL if @oh is
  1460. * null, -ENOSYS if we have no way of reading the hardreset line
  1461. * status on the currently-booted SoC, or passes along the return
  1462. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1463. * code.
  1464. */
  1465. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1466. {
  1467. struct omap_hwmod_rst_info ohri;
  1468. int ret = -EINVAL;
  1469. if (!oh)
  1470. return -EINVAL;
  1471. if (!soc_ops.is_hardreset_asserted)
  1472. return -ENOSYS;
  1473. ret = _lookup_hardreset(oh, name, &ohri);
  1474. if (ret < 0)
  1475. return ret;
  1476. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1477. }
  1478. /**
  1479. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1480. * @oh: struct omap_hwmod *
  1481. *
  1482. * If all hardreset lines associated with @oh are asserted, then return true.
  1483. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1484. * associated with @oh are asserted, then return false.
  1485. * This function is used to avoid executing some parts of the IP block
  1486. * enable/disable sequence if its hardreset line is set.
  1487. */
  1488. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1489. {
  1490. int i, rst_cnt = 0;
  1491. if (oh->rst_lines_cnt == 0)
  1492. return false;
  1493. for (i = 0; i < oh->rst_lines_cnt; i++)
  1494. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1495. rst_cnt++;
  1496. if (oh->rst_lines_cnt == rst_cnt)
  1497. return true;
  1498. return false;
  1499. }
  1500. /**
  1501. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1502. * hard-reset
  1503. * @oh: struct omap_hwmod *
  1504. *
  1505. * If any hardreset lines associated with @oh are asserted, then
  1506. * return true. Otherwise, if no hardreset lines associated with @oh
  1507. * are asserted, or if @oh has no hardreset lines, then return false.
  1508. * This function is used to avoid executing some parts of the IP block
  1509. * enable/disable sequence if any hardreset line is set.
  1510. */
  1511. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1512. {
  1513. int rst_cnt = 0;
  1514. int i;
  1515. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1516. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1517. rst_cnt++;
  1518. return (rst_cnt) ? true : false;
  1519. }
  1520. /**
  1521. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1522. * @oh: struct omap_hwmod *
  1523. *
  1524. * Disable the PRCM module mode related to the hwmod @oh.
  1525. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1526. */
  1527. static int _omap4_disable_module(struct omap_hwmod *oh)
  1528. {
  1529. int v;
  1530. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1531. return -EINVAL;
  1532. /*
  1533. * Since integration code might still be doing something, only
  1534. * disable if all lines are under hardreset.
  1535. */
  1536. if (_are_any_hardreset_lines_asserted(oh))
  1537. return 0;
  1538. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1539. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1540. oh->clkdm->cm_inst,
  1541. oh->clkdm->clkdm_offs,
  1542. oh->prcm.omap4.clkctrl_offs);
  1543. v = _omap4_wait_target_disable(oh);
  1544. if (v)
  1545. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1546. oh->name);
  1547. return 0;
  1548. }
  1549. /**
  1550. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1551. * @oh: struct omap_hwmod *
  1552. *
  1553. * Disable the PRCM module mode related to the hwmod @oh.
  1554. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1555. */
  1556. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1557. {
  1558. int v;
  1559. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1560. return -EINVAL;
  1561. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1562. if (_are_any_hardreset_lines_asserted(oh))
  1563. return 0;
  1564. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1565. oh->prcm.omap4.clkctrl_offs);
  1566. v = _am33xx_wait_target_disable(oh);
  1567. if (v)
  1568. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1569. oh->name);
  1570. return 0;
  1571. }
  1572. /**
  1573. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1574. * @oh: struct omap_hwmod *
  1575. *
  1576. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1577. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1578. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1579. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1580. *
  1581. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1582. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1583. * use the SYSCONFIG softreset bit to provide the status.
  1584. *
  1585. * Note that some IP like McBSP do have reset control but don't have
  1586. * reset status.
  1587. */
  1588. static int _ocp_softreset(struct omap_hwmod *oh)
  1589. {
  1590. u32 v;
  1591. int c = 0;
  1592. int ret = 0;
  1593. if (!oh->class->sysc ||
  1594. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1595. return -ENOENT;
  1596. /* clocks must be on for this operation */
  1597. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1598. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1599. oh->name);
  1600. return -EINVAL;
  1601. }
  1602. /* For some modules, all optionnal clocks need to be enabled as well */
  1603. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1604. _enable_optional_clocks(oh);
  1605. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1606. v = oh->_sysc_cache;
  1607. ret = _set_softreset(oh, &v);
  1608. if (ret)
  1609. goto dis_opt_clks;
  1610. _write_sysconfig(v, oh);
  1611. if (oh->class->sysc->srst_udelay)
  1612. udelay(oh->class->sysc->srst_udelay);
  1613. c = _wait_softreset_complete(oh);
  1614. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1615. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1616. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1617. else
  1618. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1619. /*
  1620. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1621. * _wait_target_ready() or _reset()
  1622. */
  1623. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1624. dis_opt_clks:
  1625. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1626. _disable_optional_clocks(oh);
  1627. return ret;
  1628. }
  1629. /**
  1630. * _reset - reset an omap_hwmod
  1631. * @oh: struct omap_hwmod *
  1632. *
  1633. * Resets an omap_hwmod @oh. If the module has a custom reset
  1634. * function pointer defined, then call it to reset the IP block, and
  1635. * pass along its return value to the caller. Otherwise, if the IP
  1636. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1637. * associated with it, call a function to reset the IP block via that
  1638. * method, and pass along the return value to the caller. Finally, if
  1639. * the IP block has some hardreset lines associated with it, assert
  1640. * all of those, but do _not_ deassert them. (This is because driver
  1641. * authors have expressed an apparent requirement to control the
  1642. * deassertion of the hardreset lines themselves.)
  1643. *
  1644. * The default software reset mechanism for most OMAP IP blocks is
  1645. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1646. * hwmods cannot be reset via this method. Some are not targets and
  1647. * therefore have no OCP header registers to access. Others (like the
  1648. * IVA) have idiosyncratic reset sequences. So for these relatively
  1649. * rare cases, custom reset code can be supplied in the struct
  1650. * omap_hwmod_class .reset function pointer.
  1651. *
  1652. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1653. * does not prevent idling of the system. This is necessary for cases
  1654. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1655. * kernel without disabling dma.
  1656. *
  1657. * Passes along the return value from either _ocp_softreset() or the
  1658. * custom reset function - these must return -EINVAL if the hwmod
  1659. * cannot be reset this way or if the hwmod is in the wrong state,
  1660. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1661. */
  1662. static int _reset(struct omap_hwmod *oh)
  1663. {
  1664. int i, r;
  1665. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1666. if (oh->class->reset) {
  1667. r = oh->class->reset(oh);
  1668. } else {
  1669. if (oh->rst_lines_cnt > 0) {
  1670. for (i = 0; i < oh->rst_lines_cnt; i++)
  1671. _assert_hardreset(oh, oh->rst_lines[i].name);
  1672. return 0;
  1673. } else {
  1674. r = _ocp_softreset(oh);
  1675. if (r == -ENOENT)
  1676. r = 0;
  1677. }
  1678. }
  1679. _set_dmadisable(oh);
  1680. /*
  1681. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1682. * softreset. The _enable() function should be split to avoid
  1683. * the rewrite of the OCP_SYSCONFIG register.
  1684. */
  1685. if (oh->class->sysc) {
  1686. _update_sysc_cache(oh);
  1687. _enable_sysc(oh);
  1688. }
  1689. return r;
  1690. }
  1691. /**
  1692. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1693. *
  1694. * Call the appropriate PRM function to clear any logged I/O chain
  1695. * wakeups and to reconfigure the chain. This apparently needs to be
  1696. * done upon every mux change. Since hwmods can be concurrently
  1697. * enabled and idled, hold a spinlock around the I/O chain
  1698. * reconfiguration sequence. No return value.
  1699. *
  1700. * XXX When the PRM code is moved to drivers, this function can be removed,
  1701. * as the PRM infrastructure should abstract this.
  1702. */
  1703. static void _reconfigure_io_chain(void)
  1704. {
  1705. unsigned long flags;
  1706. spin_lock_irqsave(&io_chain_lock, flags);
  1707. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1708. omap3xxx_prm_reconfigure_io_chain();
  1709. else if (cpu_is_omap44xx())
  1710. omap44xx_prm_reconfigure_io_chain();
  1711. spin_unlock_irqrestore(&io_chain_lock, flags);
  1712. }
  1713. /**
  1714. * _omap4_update_context_lost - increment hwmod context loss counter if
  1715. * hwmod context was lost, and clear hardware context loss reg
  1716. * @oh: hwmod to check for context loss
  1717. *
  1718. * If the PRCM indicates that the hwmod @oh lost context, increment
  1719. * our in-memory context loss counter, and clear the RM_*_CONTEXT
  1720. * bits. No return value.
  1721. */
  1722. static void _omap4_update_context_lost(struct omap_hwmod *oh)
  1723. {
  1724. if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
  1725. return;
  1726. if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1727. oh->clkdm->pwrdm.ptr->prcm_offs,
  1728. oh->prcm.omap4.context_offs))
  1729. return;
  1730. oh->prcm.omap4.context_lost_counter++;
  1731. prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1732. oh->clkdm->pwrdm.ptr->prcm_offs,
  1733. oh->prcm.omap4.context_offs);
  1734. }
  1735. /**
  1736. * _omap4_get_context_lost - get context loss counter for a hwmod
  1737. * @oh: hwmod to get context loss counter for
  1738. *
  1739. * Returns the in-memory context loss counter for a hwmod.
  1740. */
  1741. static int _omap4_get_context_lost(struct omap_hwmod *oh)
  1742. {
  1743. return oh->prcm.omap4.context_lost_counter;
  1744. }
  1745. /**
  1746. * _enable_preprogram - Pre-program an IP block during the _enable() process
  1747. * @oh: struct omap_hwmod *
  1748. *
  1749. * Some IP blocks (such as AESS) require some additional programming
  1750. * after enable before they can enter idle. If a function pointer to
  1751. * do so is present in the hwmod data, then call it and pass along the
  1752. * return value; otherwise, return 0.
  1753. */
  1754. static int __init _enable_preprogram(struct omap_hwmod *oh)
  1755. {
  1756. if (!oh->class->enable_preprogram)
  1757. return 0;
  1758. return oh->class->enable_preprogram(oh);
  1759. }
  1760. /**
  1761. * _enable - enable an omap_hwmod
  1762. * @oh: struct omap_hwmod *
  1763. *
  1764. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1765. * register target. Returns -EINVAL if the hwmod is in the wrong
  1766. * state or passes along the return value of _wait_target_ready().
  1767. */
  1768. static int _enable(struct omap_hwmod *oh)
  1769. {
  1770. int r;
  1771. int hwsup = 0;
  1772. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1773. /*
  1774. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1775. * state at init. Now that someone is really trying to enable
  1776. * them, just ensure that the hwmod mux is set.
  1777. */
  1778. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1779. /*
  1780. * If the caller has mux data populated, do the mux'ing
  1781. * which wouldn't have been done as part of the _enable()
  1782. * done during setup.
  1783. */
  1784. if (oh->mux)
  1785. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1786. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1787. return 0;
  1788. }
  1789. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1790. oh->_state != _HWMOD_STATE_IDLE &&
  1791. oh->_state != _HWMOD_STATE_DISABLED) {
  1792. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1793. oh->name);
  1794. return -EINVAL;
  1795. }
  1796. /*
  1797. * If an IP block contains HW reset lines and all of them are
  1798. * asserted, we let integration code associated with that
  1799. * block handle the enable. We've received very little
  1800. * information on what those driver authors need, and until
  1801. * detailed information is provided and the driver code is
  1802. * posted to the public lists, this is probably the best we
  1803. * can do.
  1804. */
  1805. if (_are_all_hardreset_lines_asserted(oh))
  1806. return 0;
  1807. /* Mux pins for device runtime if populated */
  1808. if (oh->mux && (!oh->mux->enabled ||
  1809. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1810. oh->mux->pads_dynamic))) {
  1811. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1812. _reconfigure_io_chain();
  1813. }
  1814. _add_initiator_dep(oh, mpu_oh);
  1815. if (oh->clkdm) {
  1816. /*
  1817. * A clockdomain must be in SW_SUP before enabling
  1818. * completely the module. The clockdomain can be set
  1819. * in HW_AUTO only when the module become ready.
  1820. */
  1821. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1822. !clkdm_missing_idle_reporting(oh->clkdm);
  1823. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1824. if (r) {
  1825. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1826. oh->name, oh->clkdm->name, r);
  1827. return r;
  1828. }
  1829. }
  1830. _enable_clocks(oh);
  1831. if (soc_ops.enable_module)
  1832. soc_ops.enable_module(oh);
  1833. if (oh->flags & HWMOD_BLOCK_WFI)
  1834. disable_hlt();
  1835. if (soc_ops.update_context_lost)
  1836. soc_ops.update_context_lost(oh);
  1837. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1838. -EINVAL;
  1839. if (!r) {
  1840. /*
  1841. * Set the clockdomain to HW_AUTO only if the target is ready,
  1842. * assuming that the previous state was HW_AUTO
  1843. */
  1844. if (oh->clkdm && hwsup)
  1845. clkdm_allow_idle(oh->clkdm);
  1846. oh->_state = _HWMOD_STATE_ENABLED;
  1847. /* Access the sysconfig only if the target is ready */
  1848. if (oh->class->sysc) {
  1849. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1850. _update_sysc_cache(oh);
  1851. _enable_sysc(oh);
  1852. }
  1853. r = _enable_preprogram(oh);
  1854. } else {
  1855. if (soc_ops.disable_module)
  1856. soc_ops.disable_module(oh);
  1857. _disable_clocks(oh);
  1858. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1859. oh->name, r);
  1860. if (oh->clkdm)
  1861. clkdm_hwmod_disable(oh->clkdm, oh);
  1862. }
  1863. return r;
  1864. }
  1865. /**
  1866. * _idle - idle an omap_hwmod
  1867. * @oh: struct omap_hwmod *
  1868. *
  1869. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1870. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1871. * state or returns 0.
  1872. */
  1873. static int _idle(struct omap_hwmod *oh)
  1874. {
  1875. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1876. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1877. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1878. oh->name);
  1879. return -EINVAL;
  1880. }
  1881. if (_are_all_hardreset_lines_asserted(oh))
  1882. return 0;
  1883. if (oh->class->sysc)
  1884. _idle_sysc(oh);
  1885. _del_initiator_dep(oh, mpu_oh);
  1886. if (oh->flags & HWMOD_BLOCK_WFI)
  1887. enable_hlt();
  1888. if (soc_ops.disable_module)
  1889. soc_ops.disable_module(oh);
  1890. /*
  1891. * The module must be in idle mode before disabling any parents
  1892. * clocks. Otherwise, the parent clock might be disabled before
  1893. * the module transition is done, and thus will prevent the
  1894. * transition to complete properly.
  1895. */
  1896. _disable_clocks(oh);
  1897. if (oh->clkdm)
  1898. clkdm_hwmod_disable(oh->clkdm, oh);
  1899. /* Mux pins for device idle if populated */
  1900. if (oh->mux && oh->mux->pads_dynamic) {
  1901. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1902. _reconfigure_io_chain();
  1903. }
  1904. oh->_state = _HWMOD_STATE_IDLE;
  1905. return 0;
  1906. }
  1907. /**
  1908. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1909. * @oh: struct omap_hwmod *
  1910. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1911. *
  1912. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1913. * local copy. Intended to be used by drivers that require
  1914. * direct manipulation of the AUTOIDLE bits.
  1915. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1916. * along the return value from _set_module_autoidle().
  1917. *
  1918. * Any users of this function should be scrutinized carefully.
  1919. */
  1920. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1921. {
  1922. u32 v;
  1923. int retval = 0;
  1924. unsigned long flags;
  1925. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1926. return -EINVAL;
  1927. spin_lock_irqsave(&oh->_lock, flags);
  1928. v = oh->_sysc_cache;
  1929. retval = _set_module_autoidle(oh, autoidle, &v);
  1930. if (!retval)
  1931. _write_sysconfig(v, oh);
  1932. spin_unlock_irqrestore(&oh->_lock, flags);
  1933. return retval;
  1934. }
  1935. /**
  1936. * _shutdown - shutdown an omap_hwmod
  1937. * @oh: struct omap_hwmod *
  1938. *
  1939. * Shut down an omap_hwmod @oh. This should be called when the driver
  1940. * used for the hwmod is removed or unloaded or if the driver is not
  1941. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1942. * state or returns 0.
  1943. */
  1944. static int _shutdown(struct omap_hwmod *oh)
  1945. {
  1946. int ret, i;
  1947. u8 prev_state;
  1948. if (oh->_state != _HWMOD_STATE_IDLE &&
  1949. oh->_state != _HWMOD_STATE_ENABLED) {
  1950. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1951. oh->name);
  1952. return -EINVAL;
  1953. }
  1954. if (_are_all_hardreset_lines_asserted(oh))
  1955. return 0;
  1956. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1957. if (oh->class->pre_shutdown) {
  1958. prev_state = oh->_state;
  1959. if (oh->_state == _HWMOD_STATE_IDLE)
  1960. _enable(oh);
  1961. ret = oh->class->pre_shutdown(oh);
  1962. if (ret) {
  1963. if (prev_state == _HWMOD_STATE_IDLE)
  1964. _idle(oh);
  1965. return ret;
  1966. }
  1967. }
  1968. if (oh->class->sysc) {
  1969. if (oh->_state == _HWMOD_STATE_IDLE)
  1970. _enable(oh);
  1971. _shutdown_sysc(oh);
  1972. }
  1973. /* clocks and deps are already disabled in idle */
  1974. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1975. _del_initiator_dep(oh, mpu_oh);
  1976. /* XXX what about the other system initiators here? dma, dsp */
  1977. if (oh->flags & HWMOD_BLOCK_WFI)
  1978. enable_hlt();
  1979. if (soc_ops.disable_module)
  1980. soc_ops.disable_module(oh);
  1981. _disable_clocks(oh);
  1982. if (oh->clkdm)
  1983. clkdm_hwmod_disable(oh->clkdm, oh);
  1984. }
  1985. /* XXX Should this code also force-disable the optional clocks? */
  1986. for (i = 0; i < oh->rst_lines_cnt; i++)
  1987. _assert_hardreset(oh, oh->rst_lines[i].name);
  1988. /* Mux pins to safe mode or use populated off mode values */
  1989. if (oh->mux)
  1990. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1991. oh->_state = _HWMOD_STATE_DISABLED;
  1992. return 0;
  1993. }
  1994. /**
  1995. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1996. * @oh: struct omap_hwmod * to locate the virtual address
  1997. *
  1998. * Cache the virtual address used by the MPU to access this IP block's
  1999. * registers. This address is needed early so the OCP registers that
  2000. * are part of the device's address space can be ioremapped properly.
  2001. * No return value.
  2002. */
  2003. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  2004. {
  2005. struct omap_hwmod_addr_space *mem;
  2006. void __iomem *va_start;
  2007. if (!oh)
  2008. return;
  2009. _save_mpu_port_index(oh);
  2010. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2011. return;
  2012. mem = _find_mpu_rt_addr_space(oh);
  2013. if (!mem) {
  2014. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  2015. oh->name);
  2016. return;
  2017. }
  2018. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  2019. if (!va_start) {
  2020. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  2021. return;
  2022. }
  2023. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  2024. oh->name, va_start);
  2025. oh->_mpu_rt_va = va_start;
  2026. }
  2027. /**
  2028. * _init - initialize internal data for the hwmod @oh
  2029. * @oh: struct omap_hwmod *
  2030. * @n: (unused)
  2031. *
  2032. * Look up the clocks and the address space used by the MPU to access
  2033. * registers belonging to the hwmod @oh. @oh must already be
  2034. * registered at this point. This is the first of two phases for
  2035. * hwmod initialization. Code called here does not touch any hardware
  2036. * registers, it simply prepares internal data structures. Returns 0
  2037. * upon success or if the hwmod isn't registered, or -EINVAL upon
  2038. * failure.
  2039. */
  2040. static int __init _init(struct omap_hwmod *oh, void *data)
  2041. {
  2042. int r;
  2043. if (oh->_state != _HWMOD_STATE_REGISTERED)
  2044. return 0;
  2045. _init_mpu_rt_base(oh, NULL);
  2046. r = _init_clocks(oh, NULL);
  2047. if (IS_ERR_VALUE(r)) {
  2048. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  2049. return -EINVAL;
  2050. }
  2051. oh->_state = _HWMOD_STATE_INITIALIZED;
  2052. return 0;
  2053. }
  2054. /**
  2055. * _setup_iclk_autoidle - configure an IP block's interface clocks
  2056. * @oh: struct omap_hwmod *
  2057. *
  2058. * Set up the module's interface clocks. XXX This function is still mostly
  2059. * a stub; implementing this properly requires iclk autoidle usecounting in
  2060. * the clock code. No return value.
  2061. */
  2062. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2063. {
  2064. struct omap_hwmod_ocp_if *os;
  2065. struct list_head *p;
  2066. int i = 0;
  2067. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2068. return;
  2069. p = oh->slave_ports.next;
  2070. while (i < oh->slaves_cnt) {
  2071. os = _fetch_next_ocp_if(&p, &i);
  2072. if (!os->_clk)
  2073. continue;
  2074. if (os->flags & OCPIF_SWSUP_IDLE) {
  2075. /* XXX omap_iclk_deny_idle(c); */
  2076. } else {
  2077. /* XXX omap_iclk_allow_idle(c); */
  2078. clk_enable(os->_clk);
  2079. }
  2080. }
  2081. return;
  2082. }
  2083. /**
  2084. * _setup_reset - reset an IP block during the setup process
  2085. * @oh: struct omap_hwmod *
  2086. *
  2087. * Reset the IP block corresponding to the hwmod @oh during the setup
  2088. * process. The IP block is first enabled so it can be successfully
  2089. * reset. Returns 0 upon success or a negative error code upon
  2090. * failure.
  2091. */
  2092. static int __init _setup_reset(struct omap_hwmod *oh)
  2093. {
  2094. int r;
  2095. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2096. return -EINVAL;
  2097. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2098. return -EPERM;
  2099. if (oh->rst_lines_cnt == 0) {
  2100. r = _enable(oh);
  2101. if (r) {
  2102. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2103. oh->name, oh->_state);
  2104. return -EINVAL;
  2105. }
  2106. }
  2107. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2108. r = _reset(oh);
  2109. return r;
  2110. }
  2111. /**
  2112. * _setup_postsetup - transition to the appropriate state after _setup
  2113. * @oh: struct omap_hwmod *
  2114. *
  2115. * Place an IP block represented by @oh into a "post-setup" state --
  2116. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2117. * this function is called at the end of _setup().) The postsetup
  2118. * state for an IP block can be changed by calling
  2119. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2120. * before one of the omap_hwmod_setup*() functions are called for the
  2121. * IP block.
  2122. *
  2123. * The IP block stays in this state until a PM runtime-based driver is
  2124. * loaded for that IP block. A post-setup state of IDLE is
  2125. * appropriate for almost all IP blocks with runtime PM-enabled
  2126. * drivers, since those drivers are able to enable the IP block. A
  2127. * post-setup state of ENABLED is appropriate for kernels with PM
  2128. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2129. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2130. * included, since the WDTIMER starts running on reset and will reset
  2131. * the MPU if left active.
  2132. *
  2133. * This post-setup mechanism is deprecated. Once all of the OMAP
  2134. * drivers have been converted to use PM runtime, and all of the IP
  2135. * block data and interconnect data is available to the hwmod code, it
  2136. * should be possible to replace this mechanism with a "lazy reset"
  2137. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2138. * when the driver first probes, then all remaining IP blocks without
  2139. * drivers are either shut down or enabled after the drivers have
  2140. * loaded. However, this cannot take place until the above
  2141. * preconditions have been met, since otherwise the late reset code
  2142. * has no way of knowing which IP blocks are in use by drivers, and
  2143. * which ones are unused.
  2144. *
  2145. * No return value.
  2146. */
  2147. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2148. {
  2149. u8 postsetup_state;
  2150. if (oh->rst_lines_cnt > 0)
  2151. return;
  2152. postsetup_state = oh->_postsetup_state;
  2153. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2154. postsetup_state = _HWMOD_STATE_ENABLED;
  2155. /*
  2156. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2157. * it should be set by the core code as a runtime flag during startup
  2158. */
  2159. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2160. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2161. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2162. postsetup_state = _HWMOD_STATE_ENABLED;
  2163. }
  2164. if (postsetup_state == _HWMOD_STATE_IDLE)
  2165. _idle(oh);
  2166. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2167. _shutdown(oh);
  2168. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2169. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2170. oh->name, postsetup_state);
  2171. return;
  2172. }
  2173. /**
  2174. * _setup - prepare IP block hardware for use
  2175. * @oh: struct omap_hwmod *
  2176. * @n: (unused, pass NULL)
  2177. *
  2178. * Configure the IP block represented by @oh. This may include
  2179. * enabling the IP block, resetting it, and placing it into a
  2180. * post-setup state, depending on the type of IP block and applicable
  2181. * flags. IP blocks are reset to prevent any previous configuration
  2182. * by the bootloader or previous operating system from interfering
  2183. * with power management or other parts of the system. The reset can
  2184. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2185. * two phases for hwmod initialization. Code called here generally
  2186. * affects the IP block hardware, or system integration hardware
  2187. * associated with the IP block. Returns 0.
  2188. */
  2189. static int __init _setup(struct omap_hwmod *oh, void *data)
  2190. {
  2191. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2192. return 0;
  2193. _setup_iclk_autoidle(oh);
  2194. if (!_setup_reset(oh))
  2195. _setup_postsetup(oh);
  2196. return 0;
  2197. }
  2198. /**
  2199. * _register - register a struct omap_hwmod
  2200. * @oh: struct omap_hwmod *
  2201. *
  2202. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2203. * already has been registered by the same name; -EINVAL if the
  2204. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2205. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2206. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2207. * success.
  2208. *
  2209. * XXX The data should be copied into bootmem, so the original data
  2210. * should be marked __initdata and freed after init. This would allow
  2211. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2212. * that the copy process would be relatively complex due to the large number
  2213. * of substructures.
  2214. */
  2215. static int __init _register(struct omap_hwmod *oh)
  2216. {
  2217. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2218. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2219. return -EINVAL;
  2220. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2221. if (_lookup(oh->name))
  2222. return -EEXIST;
  2223. list_add_tail(&oh->node, &omap_hwmod_list);
  2224. INIT_LIST_HEAD(&oh->master_ports);
  2225. INIT_LIST_HEAD(&oh->slave_ports);
  2226. spin_lock_init(&oh->_lock);
  2227. oh->_state = _HWMOD_STATE_REGISTERED;
  2228. /*
  2229. * XXX Rather than doing a strcmp(), this should test a flag
  2230. * set in the hwmod data, inserted by the autogenerator code.
  2231. */
  2232. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2233. mpu_oh = oh;
  2234. return 0;
  2235. }
  2236. /**
  2237. * _alloc_links - return allocated memory for hwmod links
  2238. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2239. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2240. *
  2241. * Return pointers to two struct omap_hwmod_link records, via the
  2242. * addresses pointed to by @ml and @sl. Will first attempt to return
  2243. * memory allocated as part of a large initial block, but if that has
  2244. * been exhausted, will allocate memory itself. Since ideally this
  2245. * second allocation path will never occur, the number of these
  2246. * 'supplemental' allocations will be logged when debugging is
  2247. * enabled. Returns 0.
  2248. */
  2249. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2250. struct omap_hwmod_link **sl)
  2251. {
  2252. unsigned int sz;
  2253. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2254. *ml = &linkspace[free_ls++];
  2255. *sl = &linkspace[free_ls++];
  2256. return 0;
  2257. }
  2258. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2259. *sl = NULL;
  2260. *ml = alloc_bootmem(sz);
  2261. memset(*ml, 0, sz);
  2262. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2263. ls_supp++;
  2264. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2265. ls_supp * LINKS_PER_OCP_IF);
  2266. return 0;
  2267. };
  2268. /**
  2269. * _add_link - add an interconnect between two IP blocks
  2270. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2271. *
  2272. * Add struct omap_hwmod_link records connecting the master IP block
  2273. * specified in @oi->master to @oi, and connecting the slave IP block
  2274. * specified in @oi->slave to @oi. This code is assumed to run before
  2275. * preemption or SMP has been enabled, thus avoiding the need for
  2276. * locking in this code. Changes to this assumption will require
  2277. * additional locking. Returns 0.
  2278. */
  2279. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2280. {
  2281. struct omap_hwmod_link *ml, *sl;
  2282. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2283. oi->slave->name);
  2284. _alloc_links(&ml, &sl);
  2285. ml->ocp_if = oi;
  2286. INIT_LIST_HEAD(&ml->node);
  2287. list_add(&ml->node, &oi->master->master_ports);
  2288. oi->master->masters_cnt++;
  2289. sl->ocp_if = oi;
  2290. INIT_LIST_HEAD(&sl->node);
  2291. list_add(&sl->node, &oi->slave->slave_ports);
  2292. oi->slave->slaves_cnt++;
  2293. return 0;
  2294. }
  2295. /**
  2296. * _register_link - register a struct omap_hwmod_ocp_if
  2297. * @oi: struct omap_hwmod_ocp_if *
  2298. *
  2299. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2300. * has already been registered; -EINVAL if @oi is NULL or if the
  2301. * record pointed to by @oi is missing required fields; or 0 upon
  2302. * success.
  2303. *
  2304. * XXX The data should be copied into bootmem, so the original data
  2305. * should be marked __initdata and freed after init. This would allow
  2306. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2307. */
  2308. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2309. {
  2310. if (!oi || !oi->master || !oi->slave || !oi->user)
  2311. return -EINVAL;
  2312. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2313. return -EEXIST;
  2314. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2315. oi->master->name, oi->slave->name);
  2316. /*
  2317. * Register the connected hwmods, if they haven't been
  2318. * registered already
  2319. */
  2320. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2321. _register(oi->master);
  2322. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2323. _register(oi->slave);
  2324. _add_link(oi);
  2325. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2326. return 0;
  2327. }
  2328. /**
  2329. * _alloc_linkspace - allocate large block of hwmod links
  2330. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2331. *
  2332. * Allocate a large block of struct omap_hwmod_link records. This
  2333. * improves boot time significantly by avoiding the need to allocate
  2334. * individual records one by one. If the number of records to
  2335. * allocate in the block hasn't been manually specified, this function
  2336. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2337. * and use that to determine the allocation size. For SoC families
  2338. * that require multiple list registrations, such as OMAP3xxx, this
  2339. * estimation process isn't optimal, so manual estimation is advised
  2340. * in those cases. Returns -EEXIST if the allocation has already occurred
  2341. * or 0 upon success.
  2342. */
  2343. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2344. {
  2345. unsigned int i = 0;
  2346. unsigned int sz;
  2347. if (linkspace) {
  2348. WARN(1, "linkspace already allocated\n");
  2349. return -EEXIST;
  2350. }
  2351. if (max_ls == 0)
  2352. while (ois[i++])
  2353. max_ls += LINKS_PER_OCP_IF;
  2354. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2355. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2356. __func__, sz, max_ls);
  2357. linkspace = alloc_bootmem(sz);
  2358. memset(linkspace, 0, sz);
  2359. return 0;
  2360. }
  2361. /* Static functions intended only for use in soc_ops field function pointers */
  2362. /**
  2363. * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
  2364. * @oh: struct omap_hwmod *
  2365. *
  2366. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2367. * does not have an IDLEST bit or if the module successfully leaves
  2368. * slave idle; otherwise, pass along the return value of the
  2369. * appropriate *_cm*_wait_module_ready() function.
  2370. */
  2371. static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
  2372. {
  2373. if (!oh)
  2374. return -EINVAL;
  2375. if (oh->flags & HWMOD_NO_IDLEST)
  2376. return 0;
  2377. if (!_find_mpu_rt_port(oh))
  2378. return 0;
  2379. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2380. return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2381. oh->prcm.omap2.idlest_reg_id,
  2382. oh->prcm.omap2.idlest_idle_bit);
  2383. }
  2384. /**
  2385. * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  2386. * @oh: struct omap_hwmod *
  2387. *
  2388. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2389. * does not have an IDLEST bit or if the module successfully leaves
  2390. * slave idle; otherwise, pass along the return value of the
  2391. * appropriate *_cm*_wait_module_ready() function.
  2392. */
  2393. static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
  2394. {
  2395. if (!oh)
  2396. return -EINVAL;
  2397. if (oh->flags & HWMOD_NO_IDLEST)
  2398. return 0;
  2399. if (!_find_mpu_rt_port(oh))
  2400. return 0;
  2401. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2402. return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2403. oh->prcm.omap2.idlest_reg_id,
  2404. oh->prcm.omap2.idlest_idle_bit);
  2405. }
  2406. /**
  2407. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2408. * @oh: struct omap_hwmod *
  2409. *
  2410. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2411. * does not have an IDLEST bit or if the module successfully leaves
  2412. * slave idle; otherwise, pass along the return value of the
  2413. * appropriate *_cm*_wait_module_ready() function.
  2414. */
  2415. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2416. {
  2417. if (!oh)
  2418. return -EINVAL;
  2419. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2420. return 0;
  2421. if (!_find_mpu_rt_port(oh))
  2422. return 0;
  2423. /* XXX check module SIDLEMODE, hardreset status */
  2424. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2425. oh->clkdm->cm_inst,
  2426. oh->clkdm->clkdm_offs,
  2427. oh->prcm.omap4.clkctrl_offs);
  2428. }
  2429. /**
  2430. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2431. * @oh: struct omap_hwmod *
  2432. *
  2433. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2434. * does not have an IDLEST bit or if the module successfully leaves
  2435. * slave idle; otherwise, pass along the return value of the
  2436. * appropriate *_cm*_wait_module_ready() function.
  2437. */
  2438. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2439. {
  2440. if (!oh || !oh->clkdm)
  2441. return -EINVAL;
  2442. if (oh->flags & HWMOD_NO_IDLEST)
  2443. return 0;
  2444. if (!_find_mpu_rt_port(oh))
  2445. return 0;
  2446. /* XXX check module SIDLEMODE, hardreset status */
  2447. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2448. oh->clkdm->clkdm_offs,
  2449. oh->prcm.omap4.clkctrl_offs);
  2450. }
  2451. /**
  2452. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2453. * @oh: struct omap_hwmod * to assert hardreset
  2454. * @ohri: hardreset line data
  2455. *
  2456. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2457. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2458. * use as an soc_ops function pointer. Passes along the return value
  2459. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2460. * for removal when the PRM code is moved into drivers/.
  2461. */
  2462. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2463. struct omap_hwmod_rst_info *ohri)
  2464. {
  2465. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2466. ohri->rst_shift);
  2467. }
  2468. /**
  2469. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2470. * @oh: struct omap_hwmod * to deassert hardreset
  2471. * @ohri: hardreset line data
  2472. *
  2473. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2474. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2475. * use as an soc_ops function pointer. Passes along the return value
  2476. * from omap2_prm_deassert_hardreset(). XXX This function is
  2477. * scheduled for removal when the PRM code is moved into drivers/.
  2478. */
  2479. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2480. struct omap_hwmod_rst_info *ohri)
  2481. {
  2482. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2483. ohri->rst_shift,
  2484. ohri->st_shift);
  2485. }
  2486. /**
  2487. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2488. * @oh: struct omap_hwmod * to test hardreset
  2489. * @ohri: hardreset line data
  2490. *
  2491. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2492. * from the hwmod @oh and the hardreset line data @ohri. Only
  2493. * intended for use as an soc_ops function pointer. Passes along the
  2494. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2495. * function is scheduled for removal when the PRM code is moved into
  2496. * drivers/.
  2497. */
  2498. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2499. struct omap_hwmod_rst_info *ohri)
  2500. {
  2501. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2502. ohri->st_shift);
  2503. }
  2504. /**
  2505. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2506. * @oh: struct omap_hwmod * to assert hardreset
  2507. * @ohri: hardreset line data
  2508. *
  2509. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2510. * from the hwmod @oh and the hardreset line data @ohri. Only
  2511. * intended for use as an soc_ops function pointer. Passes along the
  2512. * return value from omap4_prminst_assert_hardreset(). XXX This
  2513. * function is scheduled for removal when the PRM code is moved into
  2514. * drivers/.
  2515. */
  2516. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2517. struct omap_hwmod_rst_info *ohri)
  2518. {
  2519. if (!oh->clkdm)
  2520. return -EINVAL;
  2521. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2522. oh->clkdm->pwrdm.ptr->prcm_partition,
  2523. oh->clkdm->pwrdm.ptr->prcm_offs,
  2524. oh->prcm.omap4.rstctrl_offs);
  2525. }
  2526. /**
  2527. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2528. * @oh: struct omap_hwmod * to deassert hardreset
  2529. * @ohri: hardreset line data
  2530. *
  2531. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2532. * from the hwmod @oh and the hardreset line data @ohri. Only
  2533. * intended for use as an soc_ops function pointer. Passes along the
  2534. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2535. * function is scheduled for removal when the PRM code is moved into
  2536. * drivers/.
  2537. */
  2538. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2539. struct omap_hwmod_rst_info *ohri)
  2540. {
  2541. if (!oh->clkdm)
  2542. return -EINVAL;
  2543. if (ohri->st_shift)
  2544. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2545. oh->name, ohri->name);
  2546. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2547. oh->clkdm->pwrdm.ptr->prcm_partition,
  2548. oh->clkdm->pwrdm.ptr->prcm_offs,
  2549. oh->prcm.omap4.rstctrl_offs);
  2550. }
  2551. /**
  2552. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2553. * @oh: struct omap_hwmod * to test hardreset
  2554. * @ohri: hardreset line data
  2555. *
  2556. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2557. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2558. * Only intended for use as an soc_ops function pointer. Passes along
  2559. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2560. * This function is scheduled for removal when the PRM code is moved
  2561. * into drivers/.
  2562. */
  2563. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2564. struct omap_hwmod_rst_info *ohri)
  2565. {
  2566. if (!oh->clkdm)
  2567. return -EINVAL;
  2568. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2569. oh->clkdm->pwrdm.ptr->prcm_partition,
  2570. oh->clkdm->pwrdm.ptr->prcm_offs,
  2571. oh->prcm.omap4.rstctrl_offs);
  2572. }
  2573. /**
  2574. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2575. * @oh: struct omap_hwmod * to assert hardreset
  2576. * @ohri: hardreset line data
  2577. *
  2578. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2579. * from the hwmod @oh and the hardreset line data @ohri. Only
  2580. * intended for use as an soc_ops function pointer. Passes along the
  2581. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2582. * function is scheduled for removal when the PRM code is moved into
  2583. * drivers/.
  2584. */
  2585. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2586. struct omap_hwmod_rst_info *ohri)
  2587. {
  2588. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2589. oh->clkdm->pwrdm.ptr->prcm_offs,
  2590. oh->prcm.omap4.rstctrl_offs);
  2591. }
  2592. /**
  2593. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2594. * @oh: struct omap_hwmod * to deassert hardreset
  2595. * @ohri: hardreset line data
  2596. *
  2597. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2598. * from the hwmod @oh and the hardreset line data @ohri. Only
  2599. * intended for use as an soc_ops function pointer. Passes along the
  2600. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2601. * function is scheduled for removal when the PRM code is moved into
  2602. * drivers/.
  2603. */
  2604. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2605. struct omap_hwmod_rst_info *ohri)
  2606. {
  2607. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2608. ohri->st_shift,
  2609. oh->clkdm->pwrdm.ptr->prcm_offs,
  2610. oh->prcm.omap4.rstctrl_offs,
  2611. oh->prcm.omap4.rstst_offs);
  2612. }
  2613. /**
  2614. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2615. * @oh: struct omap_hwmod * to test hardreset
  2616. * @ohri: hardreset line data
  2617. *
  2618. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2619. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2620. * Only intended for use as an soc_ops function pointer. Passes along
  2621. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2622. * This function is scheduled for removal when the PRM code is moved
  2623. * into drivers/.
  2624. */
  2625. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2626. struct omap_hwmod_rst_info *ohri)
  2627. {
  2628. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2629. oh->clkdm->pwrdm.ptr->prcm_offs,
  2630. oh->prcm.omap4.rstctrl_offs);
  2631. }
  2632. /* Public functions */
  2633. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2634. {
  2635. if (oh->flags & HWMOD_16BIT_REG)
  2636. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2637. else
  2638. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2639. }
  2640. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2641. {
  2642. if (oh->flags & HWMOD_16BIT_REG)
  2643. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2644. else
  2645. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2646. }
  2647. /**
  2648. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2649. * @oh: struct omap_hwmod *
  2650. *
  2651. * This is a public function exposed to drivers. Some drivers may need to do
  2652. * some settings before and after resetting the device. Those drivers after
  2653. * doing the necessary settings could use this function to start a reset by
  2654. * setting the SYSCONFIG.SOFTRESET bit.
  2655. */
  2656. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2657. {
  2658. u32 v;
  2659. int ret;
  2660. if (!oh || !(oh->_sysc_cache))
  2661. return -EINVAL;
  2662. v = oh->_sysc_cache;
  2663. ret = _set_softreset(oh, &v);
  2664. if (ret)
  2665. goto error;
  2666. _write_sysconfig(v, oh);
  2667. error:
  2668. return ret;
  2669. }
  2670. /**
  2671. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2672. * @oh: struct omap_hwmod *
  2673. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2674. *
  2675. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2676. * local copy. Intended to be used by drivers that have some erratum
  2677. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2678. * -EINVAL if @oh is null, or passes along the return value from
  2679. * _set_slave_idlemode().
  2680. *
  2681. * XXX Does this function have any current users? If not, we should
  2682. * remove it; it is better to let the rest of the hwmod code handle this.
  2683. * Any users of this function should be scrutinized carefully.
  2684. */
  2685. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2686. {
  2687. u32 v;
  2688. int retval = 0;
  2689. if (!oh)
  2690. return -EINVAL;
  2691. v = oh->_sysc_cache;
  2692. retval = _set_slave_idlemode(oh, idlemode, &v);
  2693. if (!retval)
  2694. _write_sysconfig(v, oh);
  2695. return retval;
  2696. }
  2697. /**
  2698. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2699. * @name: name of the omap_hwmod to look up
  2700. *
  2701. * Given a @name of an omap_hwmod, return a pointer to the registered
  2702. * struct omap_hwmod *, or NULL upon error.
  2703. */
  2704. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2705. {
  2706. struct omap_hwmod *oh;
  2707. if (!name)
  2708. return NULL;
  2709. oh = _lookup(name);
  2710. return oh;
  2711. }
  2712. /**
  2713. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2714. * @fn: pointer to a callback function
  2715. * @data: void * data to pass to callback function
  2716. *
  2717. * Call @fn for each registered omap_hwmod, passing @data to each
  2718. * function. @fn must return 0 for success or any other value for
  2719. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2720. * will stop and the non-zero return value will be passed to the
  2721. * caller of omap_hwmod_for_each(). @fn is called with
  2722. * omap_hwmod_for_each() held.
  2723. */
  2724. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2725. void *data)
  2726. {
  2727. struct omap_hwmod *temp_oh;
  2728. int ret = 0;
  2729. if (!fn)
  2730. return -EINVAL;
  2731. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2732. ret = (*fn)(temp_oh, data);
  2733. if (ret)
  2734. break;
  2735. }
  2736. return ret;
  2737. }
  2738. /**
  2739. * omap_hwmod_register_links - register an array of hwmod links
  2740. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2741. *
  2742. * Intended to be called early in boot before the clock framework is
  2743. * initialized. If @ois is not null, will register all omap_hwmods
  2744. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2745. * omap_hwmod_init() hasn't been called before calling this function,
  2746. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2747. * success.
  2748. */
  2749. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2750. {
  2751. int r, i;
  2752. if (!inited)
  2753. return -EINVAL;
  2754. if (!ois)
  2755. return 0;
  2756. if (!linkspace) {
  2757. if (_alloc_linkspace(ois)) {
  2758. pr_err("omap_hwmod: could not allocate link space\n");
  2759. return -ENOMEM;
  2760. }
  2761. }
  2762. i = 0;
  2763. do {
  2764. r = _register_link(ois[i]);
  2765. WARN(r && r != -EEXIST,
  2766. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2767. ois[i]->master->name, ois[i]->slave->name, r);
  2768. } while (ois[++i]);
  2769. return 0;
  2770. }
  2771. /**
  2772. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2773. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2774. *
  2775. * If the hwmod data corresponding to the MPU subsystem IP block
  2776. * hasn't been initialized and set up yet, do so now. This must be
  2777. * done first since sleep dependencies may be added from other hwmods
  2778. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2779. * return value.
  2780. */
  2781. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2782. {
  2783. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2784. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2785. __func__, MPU_INITIATOR_NAME);
  2786. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2787. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2788. }
  2789. /**
  2790. * omap_hwmod_setup_one - set up a single hwmod
  2791. * @oh_name: const char * name of the already-registered hwmod to set up
  2792. *
  2793. * Initialize and set up a single hwmod. Intended to be used for a
  2794. * small number of early devices, such as the timer IP blocks used for
  2795. * the scheduler clock. Must be called after omap2_clk_init().
  2796. * Resolves the struct clk names to struct clk pointers for each
  2797. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2798. * -EINVAL upon error or 0 upon success.
  2799. */
  2800. int __init omap_hwmod_setup_one(const char *oh_name)
  2801. {
  2802. struct omap_hwmod *oh;
  2803. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2804. oh = _lookup(oh_name);
  2805. if (!oh) {
  2806. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2807. return -EINVAL;
  2808. }
  2809. _ensure_mpu_hwmod_is_setup(oh);
  2810. _init(oh, NULL);
  2811. _setup(oh, NULL);
  2812. return 0;
  2813. }
  2814. /**
  2815. * omap_hwmod_setup_all - set up all registered IP blocks
  2816. *
  2817. * Initialize and set up all IP blocks registered with the hwmod code.
  2818. * Must be called after omap2_clk_init(). Resolves the struct clk
  2819. * names to struct clk pointers for each registered omap_hwmod. Also
  2820. * calls _setup() on each hwmod. Returns 0 upon success.
  2821. */
  2822. static int __init omap_hwmod_setup_all(void)
  2823. {
  2824. _ensure_mpu_hwmod_is_setup(NULL);
  2825. omap_hwmod_for_each(_init, NULL);
  2826. omap_hwmod_for_each(_setup, NULL);
  2827. return 0;
  2828. }
  2829. omap_core_initcall(omap_hwmod_setup_all);
  2830. /**
  2831. * omap_hwmod_enable - enable an omap_hwmod
  2832. * @oh: struct omap_hwmod *
  2833. *
  2834. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2835. * Returns -EINVAL on error or passes along the return value from _enable().
  2836. */
  2837. int omap_hwmod_enable(struct omap_hwmod *oh)
  2838. {
  2839. int r;
  2840. unsigned long flags;
  2841. if (!oh)
  2842. return -EINVAL;
  2843. spin_lock_irqsave(&oh->_lock, flags);
  2844. r = _enable(oh);
  2845. spin_unlock_irqrestore(&oh->_lock, flags);
  2846. return r;
  2847. }
  2848. /**
  2849. * omap_hwmod_idle - idle an omap_hwmod
  2850. * @oh: struct omap_hwmod *
  2851. *
  2852. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2853. * Returns -EINVAL on error or passes along the return value from _idle().
  2854. */
  2855. int omap_hwmod_idle(struct omap_hwmod *oh)
  2856. {
  2857. unsigned long flags;
  2858. if (!oh)
  2859. return -EINVAL;
  2860. spin_lock_irqsave(&oh->_lock, flags);
  2861. _idle(oh);
  2862. spin_unlock_irqrestore(&oh->_lock, flags);
  2863. return 0;
  2864. }
  2865. /**
  2866. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2867. * @oh: struct omap_hwmod *
  2868. *
  2869. * Shutdown an omap_hwmod @oh. Intended to be called by
  2870. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2871. * the return value from _shutdown().
  2872. */
  2873. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2874. {
  2875. unsigned long flags;
  2876. if (!oh)
  2877. return -EINVAL;
  2878. spin_lock_irqsave(&oh->_lock, flags);
  2879. _shutdown(oh);
  2880. spin_unlock_irqrestore(&oh->_lock, flags);
  2881. return 0;
  2882. }
  2883. /**
  2884. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2885. * @oh: struct omap_hwmod *oh
  2886. *
  2887. * Intended to be called by the omap_device code.
  2888. */
  2889. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2890. {
  2891. unsigned long flags;
  2892. spin_lock_irqsave(&oh->_lock, flags);
  2893. _enable_clocks(oh);
  2894. spin_unlock_irqrestore(&oh->_lock, flags);
  2895. return 0;
  2896. }
  2897. /**
  2898. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2899. * @oh: struct omap_hwmod *oh
  2900. *
  2901. * Intended to be called by the omap_device code.
  2902. */
  2903. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2904. {
  2905. unsigned long flags;
  2906. spin_lock_irqsave(&oh->_lock, flags);
  2907. _disable_clocks(oh);
  2908. spin_unlock_irqrestore(&oh->_lock, flags);
  2909. return 0;
  2910. }
  2911. /**
  2912. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2913. * @oh: struct omap_hwmod *oh
  2914. *
  2915. * Intended to be called by drivers and core code when all posted
  2916. * writes to a device must complete before continuing further
  2917. * execution (for example, after clearing some device IRQSTATUS
  2918. * register bits)
  2919. *
  2920. * XXX what about targets with multiple OCP threads?
  2921. */
  2922. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2923. {
  2924. BUG_ON(!oh);
  2925. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2926. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2927. oh->name);
  2928. return;
  2929. }
  2930. /*
  2931. * Forces posted writes to complete on the OCP thread handling
  2932. * register writes
  2933. */
  2934. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2935. }
  2936. /**
  2937. * omap_hwmod_reset - reset the hwmod
  2938. * @oh: struct omap_hwmod *
  2939. *
  2940. * Under some conditions, a driver may wish to reset the entire device.
  2941. * Called from omap_device code. Returns -EINVAL on error or passes along
  2942. * the return value from _reset().
  2943. */
  2944. int omap_hwmod_reset(struct omap_hwmod *oh)
  2945. {
  2946. int r;
  2947. unsigned long flags;
  2948. if (!oh)
  2949. return -EINVAL;
  2950. spin_lock_irqsave(&oh->_lock, flags);
  2951. r = _reset(oh);
  2952. spin_unlock_irqrestore(&oh->_lock, flags);
  2953. return r;
  2954. }
  2955. /*
  2956. * IP block data retrieval functions
  2957. */
  2958. /**
  2959. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2960. * @oh: struct omap_hwmod *
  2961. * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  2962. *
  2963. * Count the number of struct resource array elements necessary to
  2964. * contain omap_hwmod @oh resources. Intended to be called by code
  2965. * that registers omap_devices. Intended to be used to determine the
  2966. * size of a dynamically-allocated struct resource array, before
  2967. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2968. * resource array elements needed.
  2969. *
  2970. * XXX This code is not optimized. It could attempt to merge adjacent
  2971. * resource IDs.
  2972. *
  2973. */
  2974. int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
  2975. {
  2976. int ret = 0;
  2977. if (flags & IORESOURCE_IRQ)
  2978. ret += _count_mpu_irqs(oh);
  2979. if (flags & IORESOURCE_DMA)
  2980. ret += _count_sdma_reqs(oh);
  2981. if (flags & IORESOURCE_MEM) {
  2982. int i = 0;
  2983. struct omap_hwmod_ocp_if *os;
  2984. struct list_head *p = oh->slave_ports.next;
  2985. while (i < oh->slaves_cnt) {
  2986. os = _fetch_next_ocp_if(&p, &i);
  2987. ret += _count_ocp_if_addr_spaces(os);
  2988. }
  2989. }
  2990. return ret;
  2991. }
  2992. /**
  2993. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2994. * @oh: struct omap_hwmod *
  2995. * @res: pointer to the first element of an array of struct resource to fill
  2996. *
  2997. * Fill the struct resource array @res with resource data from the
  2998. * omap_hwmod @oh. Intended to be called by code that registers
  2999. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3000. * number of array elements filled.
  3001. */
  3002. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  3003. {
  3004. struct omap_hwmod_ocp_if *os;
  3005. struct list_head *p;
  3006. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  3007. int r = 0;
  3008. /* For each IRQ, DMA, memory area, fill in array.*/
  3009. mpu_irqs_cnt = _count_mpu_irqs(oh);
  3010. for (i = 0; i < mpu_irqs_cnt; i++) {
  3011. (res + r)->name = (oh->mpu_irqs + i)->name;
  3012. (res + r)->start = (oh->mpu_irqs + i)->irq;
  3013. (res + r)->end = (oh->mpu_irqs + i)->irq;
  3014. (res + r)->flags = IORESOURCE_IRQ;
  3015. r++;
  3016. }
  3017. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3018. for (i = 0; i < sdma_reqs_cnt; i++) {
  3019. (res + r)->name = (oh->sdma_reqs + i)->name;
  3020. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3021. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3022. (res + r)->flags = IORESOURCE_DMA;
  3023. r++;
  3024. }
  3025. p = oh->slave_ports.next;
  3026. i = 0;
  3027. while (i < oh->slaves_cnt) {
  3028. os = _fetch_next_ocp_if(&p, &i);
  3029. addr_cnt = _count_ocp_if_addr_spaces(os);
  3030. for (j = 0; j < addr_cnt; j++) {
  3031. (res + r)->name = (os->addr + j)->name;
  3032. (res + r)->start = (os->addr + j)->pa_start;
  3033. (res + r)->end = (os->addr + j)->pa_end;
  3034. (res + r)->flags = IORESOURCE_MEM;
  3035. r++;
  3036. }
  3037. }
  3038. return r;
  3039. }
  3040. /**
  3041. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  3042. * @oh: struct omap_hwmod *
  3043. * @res: pointer to the array of struct resource to fill
  3044. *
  3045. * Fill the struct resource array @res with dma resource data from the
  3046. * omap_hwmod @oh. Intended to be called by code that registers
  3047. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3048. * number of array elements filled.
  3049. */
  3050. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  3051. {
  3052. int i, sdma_reqs_cnt;
  3053. int r = 0;
  3054. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3055. for (i = 0; i < sdma_reqs_cnt; i++) {
  3056. (res + r)->name = (oh->sdma_reqs + i)->name;
  3057. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3058. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3059. (res + r)->flags = IORESOURCE_DMA;
  3060. r++;
  3061. }
  3062. return r;
  3063. }
  3064. /**
  3065. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  3066. * @oh: struct omap_hwmod * to operate on
  3067. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  3068. * @name: pointer to the name of the data to fetch (optional)
  3069. * @rsrc: pointer to a struct resource, allocated by the caller
  3070. *
  3071. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  3072. * data for the IP block pointed to by @oh. The data will be filled
  3073. * into a struct resource record pointed to by @rsrc. The struct
  3074. * resource must be allocated by the caller. When @name is non-null,
  3075. * the data associated with the matching entry in the IRQ/SDMA/address
  3076. * space hwmod data arrays will be returned. If @name is null, the
  3077. * first array entry will be returned. Data order is not meaningful
  3078. * in hwmod data, so callers are strongly encouraged to use a non-null
  3079. * @name whenever possible to avoid unpredictable effects if hwmod
  3080. * data is later added that causes data ordering to change. This
  3081. * function is only intended for use by OMAP core code. Device
  3082. * drivers should not call this function - the appropriate bus-related
  3083. * data accessor functions should be used instead. Returns 0 upon
  3084. * success or a negative error code upon error.
  3085. */
  3086. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  3087. const char *name, struct resource *rsrc)
  3088. {
  3089. int r;
  3090. unsigned int irq, dma;
  3091. u32 pa_start, pa_end;
  3092. if (!oh || !rsrc)
  3093. return -EINVAL;
  3094. if (type == IORESOURCE_IRQ) {
  3095. r = _get_mpu_irq_by_name(oh, name, &irq);
  3096. if (r)
  3097. return r;
  3098. rsrc->start = irq;
  3099. rsrc->end = irq;
  3100. } else if (type == IORESOURCE_DMA) {
  3101. r = _get_sdma_req_by_name(oh, name, &dma);
  3102. if (r)
  3103. return r;
  3104. rsrc->start = dma;
  3105. rsrc->end = dma;
  3106. } else if (type == IORESOURCE_MEM) {
  3107. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  3108. if (r)
  3109. return r;
  3110. rsrc->start = pa_start;
  3111. rsrc->end = pa_end;
  3112. } else {
  3113. return -EINVAL;
  3114. }
  3115. rsrc->flags = type;
  3116. rsrc->name = name;
  3117. return 0;
  3118. }
  3119. /**
  3120. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  3121. * @oh: struct omap_hwmod *
  3122. *
  3123. * Return the powerdomain pointer associated with the OMAP module
  3124. * @oh's main clock. If @oh does not have a main clk, return the
  3125. * powerdomain associated with the interface clock associated with the
  3126. * module's MPU port. (XXX Perhaps this should use the SDMA port
  3127. * instead?) Returns NULL on error, or a struct powerdomain * on
  3128. * success.
  3129. */
  3130. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  3131. {
  3132. struct clk *c;
  3133. struct omap_hwmod_ocp_if *oi;
  3134. struct clockdomain *clkdm;
  3135. struct clk_hw_omap *clk;
  3136. if (!oh)
  3137. return NULL;
  3138. if (oh->clkdm)
  3139. return oh->clkdm->pwrdm.ptr;
  3140. if (oh->_clk) {
  3141. c = oh->_clk;
  3142. } else {
  3143. oi = _find_mpu_rt_port(oh);
  3144. if (!oi)
  3145. return NULL;
  3146. c = oi->_clk;
  3147. }
  3148. clk = to_clk_hw_omap(__clk_get_hw(c));
  3149. clkdm = clk->clkdm;
  3150. if (!clkdm)
  3151. return NULL;
  3152. return clkdm->pwrdm.ptr;
  3153. }
  3154. /**
  3155. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3156. * @oh: struct omap_hwmod *
  3157. *
  3158. * Returns the virtual address corresponding to the beginning of the
  3159. * module's register target, in the address range that is intended to
  3160. * be used by the MPU. Returns the virtual address upon success or NULL
  3161. * upon error.
  3162. */
  3163. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3164. {
  3165. if (!oh)
  3166. return NULL;
  3167. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3168. return NULL;
  3169. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3170. return NULL;
  3171. return oh->_mpu_rt_va;
  3172. }
  3173. /**
  3174. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3175. * @oh: struct omap_hwmod *
  3176. * @init_oh: struct omap_hwmod * (initiator)
  3177. *
  3178. * Add a sleep dependency between the initiator @init_oh and @oh.
  3179. * Intended to be called by DSP/Bridge code via platform_data for the
  3180. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3181. * code needs to add/del initiator dependencies dynamically
  3182. * before/after accessing a device. Returns the return value from
  3183. * _add_initiator_dep().
  3184. *
  3185. * XXX Keep a usecount in the clockdomain code
  3186. */
  3187. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3188. struct omap_hwmod *init_oh)
  3189. {
  3190. return _add_initiator_dep(oh, init_oh);
  3191. }
  3192. /*
  3193. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3194. * for context save/restore operations?
  3195. */
  3196. /**
  3197. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3198. * @oh: struct omap_hwmod *
  3199. * @init_oh: struct omap_hwmod * (initiator)
  3200. *
  3201. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3202. * Intended to be called by DSP/Bridge code via platform_data for the
  3203. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3204. * code needs to add/del initiator dependencies dynamically
  3205. * before/after accessing a device. Returns the return value from
  3206. * _del_initiator_dep().
  3207. *
  3208. * XXX Keep a usecount in the clockdomain code
  3209. */
  3210. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3211. struct omap_hwmod *init_oh)
  3212. {
  3213. return _del_initiator_dep(oh, init_oh);
  3214. }
  3215. /**
  3216. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3217. * @oh: struct omap_hwmod *
  3218. *
  3219. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3220. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3221. * this IP block if it has dynamic mux entries. Eventually this
  3222. * should set PRCM wakeup registers to cause the PRCM to receive
  3223. * wakeup events from the module. Does not set any wakeup routing
  3224. * registers beyond this point - if the module is to wake up any other
  3225. * module or subsystem, that must be set separately. Called by
  3226. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3227. */
  3228. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3229. {
  3230. unsigned long flags;
  3231. u32 v;
  3232. spin_lock_irqsave(&oh->_lock, flags);
  3233. if (oh->class->sysc &&
  3234. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3235. v = oh->_sysc_cache;
  3236. _enable_wakeup(oh, &v);
  3237. _write_sysconfig(v, oh);
  3238. }
  3239. _set_idle_ioring_wakeup(oh, true);
  3240. spin_unlock_irqrestore(&oh->_lock, flags);
  3241. return 0;
  3242. }
  3243. /**
  3244. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3245. * @oh: struct omap_hwmod *
  3246. *
  3247. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3248. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3249. * events for this IP block if it has dynamic mux entries. Eventually
  3250. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3251. * wakeup events from the module. Does not set any wakeup routing
  3252. * registers beyond this point - if the module is to wake up any other
  3253. * module or subsystem, that must be set separately. Called by
  3254. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3255. */
  3256. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3257. {
  3258. unsigned long flags;
  3259. u32 v;
  3260. spin_lock_irqsave(&oh->_lock, flags);
  3261. if (oh->class->sysc &&
  3262. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3263. v = oh->_sysc_cache;
  3264. _disable_wakeup(oh, &v);
  3265. _write_sysconfig(v, oh);
  3266. }
  3267. _set_idle_ioring_wakeup(oh, false);
  3268. spin_unlock_irqrestore(&oh->_lock, flags);
  3269. return 0;
  3270. }
  3271. /**
  3272. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3273. * contained in the hwmod module.
  3274. * @oh: struct omap_hwmod *
  3275. * @name: name of the reset line to lookup and assert
  3276. *
  3277. * Some IP like dsp, ipu or iva contain processor that require
  3278. * an HW reset line to be assert / deassert in order to enable fully
  3279. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3280. * yet supported on this OMAP; otherwise, passes along the return value
  3281. * from _assert_hardreset().
  3282. */
  3283. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3284. {
  3285. int ret;
  3286. unsigned long flags;
  3287. if (!oh)
  3288. return -EINVAL;
  3289. spin_lock_irqsave(&oh->_lock, flags);
  3290. ret = _assert_hardreset(oh, name);
  3291. spin_unlock_irqrestore(&oh->_lock, flags);
  3292. return ret;
  3293. }
  3294. /**
  3295. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3296. * contained in the hwmod module.
  3297. * @oh: struct omap_hwmod *
  3298. * @name: name of the reset line to look up and deassert
  3299. *
  3300. * Some IP like dsp, ipu or iva contain processor that require
  3301. * an HW reset line to be assert / deassert in order to enable fully
  3302. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3303. * yet supported on this OMAP; otherwise, passes along the return value
  3304. * from _deassert_hardreset().
  3305. */
  3306. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3307. {
  3308. int ret;
  3309. unsigned long flags;
  3310. if (!oh)
  3311. return -EINVAL;
  3312. spin_lock_irqsave(&oh->_lock, flags);
  3313. ret = _deassert_hardreset(oh, name);
  3314. spin_unlock_irqrestore(&oh->_lock, flags);
  3315. return ret;
  3316. }
  3317. /**
  3318. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3319. * contained in the hwmod module
  3320. * @oh: struct omap_hwmod *
  3321. * @name: name of the reset line to look up and read
  3322. *
  3323. * Return the current state of the hwmod @oh's reset line named @name:
  3324. * returns -EINVAL upon parameter error or if this operation
  3325. * is unsupported on the current OMAP; otherwise, passes along the return
  3326. * value from _read_hardreset().
  3327. */
  3328. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3329. {
  3330. int ret;
  3331. unsigned long flags;
  3332. if (!oh)
  3333. return -EINVAL;
  3334. spin_lock_irqsave(&oh->_lock, flags);
  3335. ret = _read_hardreset(oh, name);
  3336. spin_unlock_irqrestore(&oh->_lock, flags);
  3337. return ret;
  3338. }
  3339. /**
  3340. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3341. * @classname: struct omap_hwmod_class name to search for
  3342. * @fn: callback function pointer to call for each hwmod in class @classname
  3343. * @user: arbitrary context data to pass to the callback function
  3344. *
  3345. * For each omap_hwmod of class @classname, call @fn.
  3346. * If the callback function returns something other than
  3347. * zero, the iterator is terminated, and the callback function's return
  3348. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3349. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3350. */
  3351. int omap_hwmod_for_each_by_class(const char *classname,
  3352. int (*fn)(struct omap_hwmod *oh,
  3353. void *user),
  3354. void *user)
  3355. {
  3356. struct omap_hwmod *temp_oh;
  3357. int ret = 0;
  3358. if (!classname || !fn)
  3359. return -EINVAL;
  3360. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3361. __func__, classname);
  3362. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3363. if (!strcmp(temp_oh->class->name, classname)) {
  3364. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3365. __func__, temp_oh->name);
  3366. ret = (*fn)(temp_oh, user);
  3367. if (ret)
  3368. break;
  3369. }
  3370. }
  3371. if (ret)
  3372. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3373. __func__, ret);
  3374. return ret;
  3375. }
  3376. /**
  3377. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3378. * @oh: struct omap_hwmod *
  3379. * @state: state that _setup() should leave the hwmod in
  3380. *
  3381. * Sets the hwmod state that @oh will enter at the end of _setup()
  3382. * (called by omap_hwmod_setup_*()). See also the documentation
  3383. * for _setup_postsetup(), above. Returns 0 upon success or
  3384. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3385. * in the wrong state.
  3386. */
  3387. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3388. {
  3389. int ret;
  3390. unsigned long flags;
  3391. if (!oh)
  3392. return -EINVAL;
  3393. if (state != _HWMOD_STATE_DISABLED &&
  3394. state != _HWMOD_STATE_ENABLED &&
  3395. state != _HWMOD_STATE_IDLE)
  3396. return -EINVAL;
  3397. spin_lock_irqsave(&oh->_lock, flags);
  3398. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3399. ret = -EINVAL;
  3400. goto ohsps_unlock;
  3401. }
  3402. oh->_postsetup_state = state;
  3403. ret = 0;
  3404. ohsps_unlock:
  3405. spin_unlock_irqrestore(&oh->_lock, flags);
  3406. return ret;
  3407. }
  3408. /**
  3409. * omap_hwmod_get_context_loss_count - get lost context count
  3410. * @oh: struct omap_hwmod *
  3411. *
  3412. * Returns the context loss count of associated @oh
  3413. * upon success, or zero if no context loss data is available.
  3414. *
  3415. * On OMAP4, this queries the per-hwmod context loss register,
  3416. * assuming one exists. If not, or on OMAP2/3, this queries the
  3417. * enclosing powerdomain context loss count.
  3418. */
  3419. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3420. {
  3421. struct powerdomain *pwrdm;
  3422. int ret = 0;
  3423. if (soc_ops.get_context_lost)
  3424. return soc_ops.get_context_lost(oh);
  3425. pwrdm = omap_hwmod_get_pwrdm(oh);
  3426. if (pwrdm)
  3427. ret = pwrdm_get_context_loss_count(pwrdm);
  3428. return ret;
  3429. }
  3430. /**
  3431. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3432. * @oh: struct omap_hwmod *
  3433. *
  3434. * Prevent the hwmod @oh from being reset during the setup process.
  3435. * Intended for use by board-*.c files on boards with devices that
  3436. * cannot tolerate being reset. Must be called before the hwmod has
  3437. * been set up. Returns 0 upon success or negative error code upon
  3438. * failure.
  3439. */
  3440. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3441. {
  3442. if (!oh)
  3443. return -EINVAL;
  3444. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3445. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3446. oh->name);
  3447. return -EINVAL;
  3448. }
  3449. oh->flags |= HWMOD_INIT_NO_RESET;
  3450. return 0;
  3451. }
  3452. /**
  3453. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3454. * @oh: struct omap_hwmod * containing hwmod mux entries
  3455. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3456. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3457. *
  3458. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3459. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3460. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3461. * this function is not called for a given pad_idx, then the ISR
  3462. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3463. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3464. * the _dynamic or wakeup_ entry: if there are other entries not
  3465. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3466. * entries are NOT COUNTED in the dynamic pad index. This function
  3467. * must be called separately for each pad that requires its interrupt
  3468. * to be re-routed this way. Returns -EINVAL if there is an argument
  3469. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3470. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3471. *
  3472. * XXX This function interface is fragile. Rather than using array
  3473. * indexes, which are subject to unpredictable change, it should be
  3474. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3475. * pad records.
  3476. */
  3477. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3478. {
  3479. int nr_irqs;
  3480. might_sleep();
  3481. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3482. pad_idx >= oh->mux->nr_pads_dynamic)
  3483. return -EINVAL;
  3484. /* Check the number of available mpu_irqs */
  3485. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3486. ;
  3487. if (irq_idx >= nr_irqs)
  3488. return -EINVAL;
  3489. if (!oh->mux->irqs) {
  3490. /* XXX What frees this? */
  3491. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3492. GFP_KERNEL);
  3493. if (!oh->mux->irqs)
  3494. return -ENOMEM;
  3495. }
  3496. oh->mux->irqs[pad_idx] = irq_idx;
  3497. return 0;
  3498. }
  3499. /**
  3500. * omap_hwmod_init - initialize the hwmod code
  3501. *
  3502. * Sets up some function pointers needed by the hwmod code to operate on the
  3503. * currently-booted SoC. Intended to be called once during kernel init
  3504. * before any hwmods are registered. No return value.
  3505. */
  3506. void __init omap_hwmod_init(void)
  3507. {
  3508. if (cpu_is_omap24xx()) {
  3509. soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
  3510. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3511. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3512. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3513. } else if (cpu_is_omap34xx()) {
  3514. soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
  3515. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3516. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3517. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3518. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3519. soc_ops.enable_module = _omap4_enable_module;
  3520. soc_ops.disable_module = _omap4_disable_module;
  3521. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3522. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3523. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3524. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3525. soc_ops.init_clkdm = _init_clkdm;
  3526. soc_ops.update_context_lost = _omap4_update_context_lost;
  3527. soc_ops.get_context_lost = _omap4_get_context_lost;
  3528. } else if (soc_is_am33xx()) {
  3529. soc_ops.enable_module = _am33xx_enable_module;
  3530. soc_ops.disable_module = _am33xx_disable_module;
  3531. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3532. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3533. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3534. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3535. soc_ops.init_clkdm = _init_clkdm;
  3536. } else {
  3537. WARN(1, "omap_hwmod: unknown SoC type\n");
  3538. }
  3539. inited = true;
  3540. }
  3541. /**
  3542. * omap_hwmod_get_main_clk - get pointer to main clock name
  3543. * @oh: struct omap_hwmod *
  3544. *
  3545. * Returns the main clock name assocated with @oh upon success,
  3546. * or NULL if @oh is NULL.
  3547. */
  3548. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3549. {
  3550. if (!oh)
  3551. return NULL;
  3552. return oh->main_clk;
  3553. }