board-ap4evb.c 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <linux/pm_clock.h>
  46. #include <linux/dma-mapping.h>
  47. #include <media/sh_mobile_ceu.h>
  48. #include <media/sh_mobile_csi2.h>
  49. #include <media/soc_camera.h>
  50. #include <sound/sh_fsi.h>
  51. #include <video/sh_mobile_hdmi.h>
  52. #include <video/sh_mobile_lcdc.h>
  53. #include <video/sh_mipi_dsi.h>
  54. #include <mach/common.h>
  55. #include <mach/irqs.h>
  56. #include <mach/sh7372.h>
  57. #include <asm/mach-types.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/setup.h>
  60. /*
  61. * Address Interface BusWidth note
  62. * ------------------------------------------------------------------
  63. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  64. * 0x0800_0000 user area -
  65. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  66. * 0x1400_0000 Ether (LAN9220) 16bit
  67. * 0x1600_0000 user area - cannot use with NAND
  68. * 0x1800_0000 user area -
  69. * 0x1A00_0000 -
  70. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  71. */
  72. /*
  73. * NOR Flash ROM
  74. *
  75. * SW1 | SW2 | SW7 | NOR Flash ROM
  76. * bit1 | bit1 bit2 | bit1 | Memory allocation
  77. * ------+------------+------+------------------
  78. * OFF | ON OFF | ON | Area 0
  79. * OFF | ON OFF | OFF | Area 4
  80. */
  81. /*
  82. * NAND Flash ROM
  83. *
  84. * SW1 | SW2 | SW7 | NAND Flash ROM
  85. * bit1 | bit1 bit2 | bit2 | Memory allocation
  86. * ------+------------+------+------------------
  87. * OFF | ON OFF | ON | FCE 0
  88. * OFF | ON OFF | OFF | FCE 1
  89. */
  90. /*
  91. * SMSC 9220
  92. *
  93. * SW1 SMSC 9220
  94. * -----------------------
  95. * ON access disable
  96. * OFF access enable
  97. */
  98. /*
  99. * LCD / IRQ / KEYSC / IrDA
  100. *
  101. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  102. * LCD = 2nd LCDC (WVGA)
  103. *
  104. * | SW43 |
  105. * SW3 | ON | OFF |
  106. * -------------+-----------------------+---------------+
  107. * ON | KEY / IrDA | LCD |
  108. * OFF | KEY / IrDA / IRQ | IRQ |
  109. *
  110. *
  111. * QHD / WVGA display
  112. *
  113. * You can choice display type on menuconfig.
  114. * Then, check above dip-switch.
  115. */
  116. /*
  117. * USB
  118. *
  119. * J7 : 1-2 MAX3355E VBUS
  120. * 2-3 DC 5.0V
  121. *
  122. * S39: bit2: off
  123. */
  124. /*
  125. * FSI/FSMI
  126. *
  127. * SW41 : ON : SH-Mobile AP4 Audio Mode
  128. * : OFF : Bluetooth Audio Mode
  129. */
  130. /*
  131. * MMC0/SDHI1 (CN7)
  132. *
  133. * J22 : select card voltage
  134. * 1-2 pin : 1.8v
  135. * 2-3 pin : 3.3v
  136. *
  137. * SW1 | SW33
  138. * | bit1 | bit2 | bit3 | bit4
  139. * ------------+------+------+------+-------
  140. * MMC0 OFF | OFF | ON | ON | X
  141. * SDHI1 OFF | ON | X | OFF | ON
  142. *
  143. * voltage lebel
  144. * CN7 : 1.8v
  145. * CN12: 3.3v
  146. */
  147. /* MTD */
  148. static struct mtd_partition nor_flash_partitions[] = {
  149. {
  150. .name = "loader",
  151. .offset = 0x00000000,
  152. .size = 512 * 1024,
  153. .mask_flags = MTD_WRITEABLE,
  154. },
  155. {
  156. .name = "bootenv",
  157. .offset = MTDPART_OFS_APPEND,
  158. .size = 512 * 1024,
  159. .mask_flags = MTD_WRITEABLE,
  160. },
  161. {
  162. .name = "kernel_ro",
  163. .offset = MTDPART_OFS_APPEND,
  164. .size = 8 * 1024 * 1024,
  165. .mask_flags = MTD_WRITEABLE,
  166. },
  167. {
  168. .name = "kernel",
  169. .offset = MTDPART_OFS_APPEND,
  170. .size = 8 * 1024 * 1024,
  171. },
  172. {
  173. .name = "data",
  174. .offset = MTDPART_OFS_APPEND,
  175. .size = MTDPART_SIZ_FULL,
  176. },
  177. };
  178. static struct physmap_flash_data nor_flash_data = {
  179. .width = 2,
  180. .parts = nor_flash_partitions,
  181. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  182. };
  183. static struct resource nor_flash_resources[] = {
  184. [0] = {
  185. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  186. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  187. .flags = IORESOURCE_MEM,
  188. }
  189. };
  190. static struct platform_device nor_flash_device = {
  191. .name = "physmap-flash",
  192. .dev = {
  193. .platform_data = &nor_flash_data,
  194. },
  195. .num_resources = ARRAY_SIZE(nor_flash_resources),
  196. .resource = nor_flash_resources,
  197. };
  198. /* SMSC 9220 */
  199. static struct resource smc911x_resources[] = {
  200. {
  201. .start = 0x14000000,
  202. .end = 0x16000000 - 1,
  203. .flags = IORESOURCE_MEM,
  204. }, {
  205. .start = evt2irq(0x02c0) /* IRQ6A */,
  206. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  207. },
  208. };
  209. static struct smsc911x_platform_config smsc911x_info = {
  210. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  211. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  212. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  213. };
  214. static struct platform_device smc911x_device = {
  215. .name = "smsc911x",
  216. .id = -1,
  217. .num_resources = ARRAY_SIZE(smc911x_resources),
  218. .resource = smc911x_resources,
  219. .dev = {
  220. .platform_data = &smsc911x_info,
  221. },
  222. };
  223. /*
  224. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  225. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  226. */
  227. static int slot_cn7_get_cd(struct platform_device *pdev)
  228. {
  229. return !gpio_get_value(GPIO_PORT41);
  230. }
  231. /* MERAM */
  232. static struct sh_mobile_meram_info meram_info = {
  233. .addr_mode = SH_MOBILE_MERAM_MODE1,
  234. };
  235. static struct resource meram_resources[] = {
  236. [0] = {
  237. .name = "MERAM",
  238. .start = 0xe8000000,
  239. .end = 0xe81fffff,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. };
  243. static struct platform_device meram_device = {
  244. .name = "sh_mobile_meram",
  245. .id = 0,
  246. .num_resources = ARRAY_SIZE(meram_resources),
  247. .resource = meram_resources,
  248. .dev = {
  249. .platform_data = &meram_info,
  250. },
  251. };
  252. /* SH_MMCIF */
  253. static struct resource sh_mmcif_resources[] = {
  254. [0] = {
  255. .name = "MMCIF",
  256. .start = 0xE6BD0000,
  257. .end = 0xE6BD00FF,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. [1] = {
  261. /* MMC ERR */
  262. .start = evt2irq(0x1ac0),
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. [2] = {
  266. /* MMC NOR */
  267. .start = evt2irq(0x1ae0),
  268. .flags = IORESOURCE_IRQ,
  269. },
  270. };
  271. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  272. .sup_pclk = 0,
  273. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  274. .caps = MMC_CAP_4_BIT_DATA |
  275. MMC_CAP_8_BIT_DATA |
  276. MMC_CAP_NEEDS_POLL,
  277. .get_cd = slot_cn7_get_cd,
  278. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  279. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  280. };
  281. static struct platform_device sh_mmcif_device = {
  282. .name = "sh_mmcif",
  283. .id = 0,
  284. .dev = {
  285. .dma_mask = NULL,
  286. .coherent_dma_mask = 0xffffffff,
  287. .platform_data = &sh_mmcif_plat,
  288. },
  289. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  290. .resource = sh_mmcif_resources,
  291. };
  292. /* SDHI0 */
  293. static struct sh_mobile_sdhi_info sdhi0_info = {
  294. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  295. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  296. .tmio_caps = MMC_CAP_SDIO_IRQ,
  297. };
  298. static struct resource sdhi0_resources[] = {
  299. [0] = {
  300. .name = "SDHI0",
  301. .start = 0xe6850000,
  302. .end = 0xe68500ff,
  303. .flags = IORESOURCE_MEM,
  304. },
  305. [1] = {
  306. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  307. .flags = IORESOURCE_IRQ,
  308. },
  309. [2] = {
  310. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  311. .flags = IORESOURCE_IRQ,
  312. },
  313. [3] = {
  314. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  315. .flags = IORESOURCE_IRQ,
  316. },
  317. };
  318. static struct platform_device sdhi0_device = {
  319. .name = "sh_mobile_sdhi",
  320. .num_resources = ARRAY_SIZE(sdhi0_resources),
  321. .resource = sdhi0_resources,
  322. .id = 0,
  323. .dev = {
  324. .platform_data = &sdhi0_info,
  325. },
  326. };
  327. /* SDHI1 */
  328. static struct sh_mobile_sdhi_info sdhi1_info = {
  329. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  330. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  331. .tmio_ocr_mask = MMC_VDD_165_195,
  332. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  333. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  334. .get_cd = slot_cn7_get_cd,
  335. };
  336. static struct resource sdhi1_resources[] = {
  337. [0] = {
  338. .name = "SDHI1",
  339. .start = 0xe6860000,
  340. .end = 0xe68600ff,
  341. .flags = IORESOURCE_MEM,
  342. },
  343. [1] = {
  344. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  345. .flags = IORESOURCE_IRQ,
  346. },
  347. [2] = {
  348. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. [3] = {
  352. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  353. .flags = IORESOURCE_IRQ,
  354. },
  355. };
  356. static struct platform_device sdhi1_device = {
  357. .name = "sh_mobile_sdhi",
  358. .num_resources = ARRAY_SIZE(sdhi1_resources),
  359. .resource = sdhi1_resources,
  360. .id = 1,
  361. .dev = {
  362. .platform_data = &sdhi1_info,
  363. },
  364. };
  365. /* USB1 */
  366. static void usb1_host_port_power(int port, int power)
  367. {
  368. if (!power) /* only power-on supported for now */
  369. return;
  370. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  371. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  372. }
  373. static struct r8a66597_platdata usb1_host_data = {
  374. .on_chip = 1,
  375. .port_power = usb1_host_port_power,
  376. };
  377. static struct resource usb1_host_resources[] = {
  378. [0] = {
  379. .name = "USBHS",
  380. .start = 0xE68B0000,
  381. .end = 0xE68B00E6 - 1,
  382. .flags = IORESOURCE_MEM,
  383. },
  384. [1] = {
  385. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  386. .flags = IORESOURCE_IRQ,
  387. },
  388. };
  389. static struct platform_device usb1_host_device = {
  390. .name = "r8a66597_hcd",
  391. .id = 1,
  392. .dev = {
  393. .dma_mask = NULL, /* not use dma */
  394. .coherent_dma_mask = 0xffffffff,
  395. .platform_data = &usb1_host_data,
  396. },
  397. .num_resources = ARRAY_SIZE(usb1_host_resources),
  398. .resource = usb1_host_resources,
  399. };
  400. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  401. {
  402. #ifdef CONFIG_AP4EVB_QHD
  403. .name = "R63302(QHD)",
  404. .xres = 544,
  405. .yres = 961,
  406. .left_margin = 72,
  407. .right_margin = 600,
  408. .hsync_len = 16,
  409. .upper_margin = 8,
  410. .lower_margin = 8,
  411. .vsync_len = 2,
  412. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  413. #else
  414. .name = "WVGA Panel",
  415. .xres = 800,
  416. .yres = 480,
  417. .left_margin = 220,
  418. .right_margin = 110,
  419. .hsync_len = 70,
  420. .upper_margin = 20,
  421. .lower_margin = 5,
  422. .vsync_len = 5,
  423. .sync = 0,
  424. #endif
  425. },
  426. };
  427. static struct sh_mobile_meram_cfg lcd_meram_cfg = {
  428. .icb[0] = {
  429. .marker_icb = 28,
  430. .cache_icb = 24,
  431. .meram_offset = 0x0,
  432. .meram_size = 0x40,
  433. },
  434. .icb[1] = {
  435. .marker_icb = 29,
  436. .cache_icb = 25,
  437. .meram_offset = 0x40,
  438. .meram_size = 0x40,
  439. },
  440. };
  441. static struct sh_mobile_lcdc_info lcdc_info = {
  442. .meram_dev = &meram_info,
  443. .ch[0] = {
  444. .chan = LCDC_CHAN_MAINLCD,
  445. .fourcc = V4L2_PIX_FMT_RGB565,
  446. .lcd_cfg = ap4evb_lcdc_modes,
  447. .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
  448. .meram_cfg = &lcd_meram_cfg,
  449. }
  450. };
  451. static struct resource lcdc_resources[] = {
  452. [0] = {
  453. .name = "LCDC",
  454. .start = 0xfe940000, /* P4-only space */
  455. .end = 0xfe943fff,
  456. .flags = IORESOURCE_MEM,
  457. },
  458. [1] = {
  459. .start = intcs_evt2irq(0x580),
  460. .flags = IORESOURCE_IRQ,
  461. },
  462. };
  463. static struct platform_device lcdc_device = {
  464. .name = "sh_mobile_lcdc_fb",
  465. .num_resources = ARRAY_SIZE(lcdc_resources),
  466. .resource = lcdc_resources,
  467. .dev = {
  468. .platform_data = &lcdc_info,
  469. .coherent_dma_mask = ~0,
  470. },
  471. };
  472. /*
  473. * QHD display
  474. */
  475. #ifdef CONFIG_AP4EVB_QHD
  476. /* KEYSC (Needs SW43 set to ON) */
  477. static struct sh_keysc_info keysc_info = {
  478. .mode = SH_KEYSC_MODE_1,
  479. .scan_timing = 3,
  480. .delay = 2500,
  481. .keycodes = {
  482. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  483. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  484. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  485. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  486. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  487. },
  488. };
  489. static struct resource keysc_resources[] = {
  490. [0] = {
  491. .name = "KEYSC",
  492. .start = 0xe61b0000,
  493. .end = 0xe61b0063,
  494. .flags = IORESOURCE_MEM,
  495. },
  496. [1] = {
  497. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  498. .flags = IORESOURCE_IRQ,
  499. },
  500. };
  501. static struct platform_device keysc_device = {
  502. .name = "sh_keysc",
  503. .id = 0, /* "keysc0" clock */
  504. .num_resources = ARRAY_SIZE(keysc_resources),
  505. .resource = keysc_resources,
  506. .dev = {
  507. .platform_data = &keysc_info,
  508. },
  509. };
  510. /* MIPI-DSI */
  511. #define PHYCTRL 0x0070
  512. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  513. void __iomem *base,
  514. int enable)
  515. {
  516. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  517. void __iomem *phy = base + PHYCTRL;
  518. if (IS_ERR(pck))
  519. return PTR_ERR(pck);
  520. if (enable) {
  521. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  522. iowrite32(ioread32(phy) | (0xb << 8), phy);
  523. clk_enable(pck);
  524. } else {
  525. clk_disable(pck);
  526. }
  527. clk_put(pck);
  528. return 0;
  529. }
  530. static struct resource mipidsi0_resources[] = {
  531. [0] = {
  532. .start = 0xffc60000,
  533. .end = 0xffc63073,
  534. .flags = IORESOURCE_MEM,
  535. },
  536. [1] = {
  537. .start = 0xffc68000,
  538. .end = 0xffc680ef,
  539. .flags = IORESOURCE_MEM,
  540. },
  541. };
  542. static struct sh_mipi_dsi_info mipidsi0_info = {
  543. .data_format = MIPI_RGB888,
  544. .lcd_chan = &lcdc_info.ch[0],
  545. .lane = 2,
  546. .vsynw_offset = 17,
  547. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  548. SH_MIPI_DSI_HSbyteCLK,
  549. .set_dot_clock = sh_mipi_set_dot_clock,
  550. };
  551. static struct platform_device mipidsi0_device = {
  552. .name = "sh-mipi-dsi",
  553. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  554. .resource = mipidsi0_resources,
  555. .id = 0,
  556. .dev = {
  557. .platform_data = &mipidsi0_info,
  558. },
  559. };
  560. static struct platform_device *qhd_devices[] __initdata = {
  561. &mipidsi0_device,
  562. &keysc_device,
  563. };
  564. #endif /* CONFIG_AP4EVB_QHD */
  565. /* FSI */
  566. #define IRQ_FSI evt2irq(0x1840)
  567. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  568. {
  569. int ret = 0;
  570. if (rate <= 0)
  571. return ret;
  572. if (enable) {
  573. ret = clk_set_rate(clk, rate);
  574. if (0 == ret)
  575. ret = clk_enable(clk);
  576. } else {
  577. clk_disable(clk);
  578. }
  579. return ret;
  580. }
  581. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  582. {
  583. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  584. }
  585. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  586. {
  587. struct clk *fsia_ick;
  588. struct clk *fsiack;
  589. int ret = -EIO;
  590. fsia_ick = clk_get(dev, "icka");
  591. if (IS_ERR(fsia_ick))
  592. return PTR_ERR(fsia_ick);
  593. /*
  594. * FSIACK is connected to AK4642,
  595. * and use external clock pin from it.
  596. * it is parent of fsia_ick now.
  597. */
  598. fsiack = clk_get_parent(fsia_ick);
  599. if (!fsiack)
  600. goto fsia_ick_out;
  601. /*
  602. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  603. *
  604. ** FIXME **
  605. * Because the freq_table of external clk (fsiack) are all 0,
  606. * the return value of clk_round_rate became 0.
  607. * So, it use __fsi_set_rate here.
  608. */
  609. ret = __fsi_set_rate(fsiack, rate, enable);
  610. if (ret < 0)
  611. goto fsiack_out;
  612. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  613. if ((ret < 0) && enable)
  614. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  615. fsiack_out:
  616. clk_put(fsiack);
  617. fsia_ick_out:
  618. clk_put(fsia_ick);
  619. return 0;
  620. }
  621. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  622. {
  623. struct clk *fsib_clk;
  624. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  625. long fsib_rate = 0;
  626. long fdiv_rate = 0;
  627. int ackmd_bpfmd;
  628. int ret;
  629. switch (rate) {
  630. case 44100:
  631. fsib_rate = rate * 256;
  632. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  633. break;
  634. case 48000:
  635. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  636. fdiv_rate = rate * 256;
  637. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  638. break;
  639. default:
  640. pr_err("unsupported rate in FSI2 port B\n");
  641. return -EINVAL;
  642. }
  643. /* FSI B setting */
  644. fsib_clk = clk_get(dev, "ickb");
  645. if (IS_ERR(fsib_clk))
  646. return -EIO;
  647. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  648. if (ret < 0)
  649. goto fsi_set_rate_end;
  650. /* FSI DIV setting */
  651. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  652. if (ret < 0) {
  653. /* disable FSI B */
  654. if (enable)
  655. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  656. goto fsi_set_rate_end;
  657. }
  658. ret = ackmd_bpfmd;
  659. fsi_set_rate_end:
  660. clk_put(fsib_clk);
  661. return ret;
  662. }
  663. static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
  664. {
  665. int ret;
  666. if (is_porta)
  667. ret = fsi_ak4642_set_rate(dev, rate, enable);
  668. else
  669. ret = fsi_hdmi_set_rate(dev, rate, enable);
  670. return ret;
  671. }
  672. static struct sh_fsi_platform_info fsi_info = {
  673. .porta_flags = SH_FSI_BRS_INV,
  674. .portb_flags = SH_FSI_BRS_INV |
  675. SH_FSI_BRM_INV |
  676. SH_FSI_LRS_INV |
  677. SH_FSI_FMT_SPDIF,
  678. .set_rate = fsi_set_rate,
  679. };
  680. static struct resource fsi_resources[] = {
  681. [0] = {
  682. .name = "FSI",
  683. .start = 0xFE3C0000,
  684. .end = 0xFE3C0400 - 1,
  685. .flags = IORESOURCE_MEM,
  686. },
  687. [1] = {
  688. .start = IRQ_FSI,
  689. .flags = IORESOURCE_IRQ,
  690. },
  691. };
  692. static struct platform_device fsi_device = {
  693. .name = "sh_fsi2",
  694. .id = -1,
  695. .num_resources = ARRAY_SIZE(fsi_resources),
  696. .resource = fsi_resources,
  697. .dev = {
  698. .platform_data = &fsi_info,
  699. },
  700. };
  701. static struct fsi_ak4642_info fsi2_ak4643_info = {
  702. .name = "AK4643",
  703. .card = "FSI2A-AK4643",
  704. .cpu_dai = "fsia-dai",
  705. .codec = "ak4642-codec.0-0013",
  706. .platform = "sh_fsi2",
  707. .id = FSI_PORT_A,
  708. };
  709. static struct platform_device fsi_ak4643_device = {
  710. .name = "fsi-ak4642-audio",
  711. .dev = {
  712. .platform_data = &fsi2_ak4643_info,
  713. },
  714. };
  715. static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  716. .icb[0] = {
  717. .marker_icb = 30,
  718. .cache_icb = 26,
  719. .meram_offset = 0x80,
  720. .meram_size = 0x100,
  721. },
  722. .icb[1] = {
  723. .marker_icb = 31,
  724. .cache_icb = 27,
  725. .meram_offset = 0x180,
  726. .meram_size = 0x100,
  727. },
  728. };
  729. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  730. .clock_source = LCDC_CLK_EXTERNAL,
  731. .meram_dev = &meram_info,
  732. .ch[0] = {
  733. .chan = LCDC_CHAN_MAINLCD,
  734. .fourcc = V4L2_PIX_FMT_RGB565,
  735. .interface_type = RGB24,
  736. .clock_divider = 1,
  737. .flags = LCDC_FLAGS_DWPOL,
  738. .meram_cfg = &hdmi_meram_cfg,
  739. }
  740. };
  741. static struct resource lcdc1_resources[] = {
  742. [0] = {
  743. .name = "LCDC1",
  744. .start = 0xfe944000,
  745. .end = 0xfe947fff,
  746. .flags = IORESOURCE_MEM,
  747. },
  748. [1] = {
  749. .start = intcs_evt2irq(0x1780),
  750. .flags = IORESOURCE_IRQ,
  751. },
  752. };
  753. static struct platform_device lcdc1_device = {
  754. .name = "sh_mobile_lcdc_fb",
  755. .num_resources = ARRAY_SIZE(lcdc1_resources),
  756. .resource = lcdc1_resources,
  757. .id = 1,
  758. .dev = {
  759. .platform_data = &sh_mobile_lcdc1_info,
  760. .coherent_dma_mask = ~0,
  761. },
  762. };
  763. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  764. unsigned long *parent_freq);
  765. static struct sh_mobile_hdmi_info hdmi_info = {
  766. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  767. .lcd_dev = &lcdc1_device.dev,
  768. .flags = HDMI_SND_SRC_SPDIF,
  769. .clk_optimize_parent = ap4evb_clk_optimize,
  770. };
  771. static struct resource hdmi_resources[] = {
  772. [0] = {
  773. .name = "HDMI",
  774. .start = 0xe6be0000,
  775. .end = 0xe6be00ff,
  776. .flags = IORESOURCE_MEM,
  777. },
  778. [1] = {
  779. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  780. .start = evt2irq(0x17e0),
  781. .flags = IORESOURCE_IRQ,
  782. },
  783. };
  784. static struct platform_device hdmi_device = {
  785. .name = "sh-mobile-hdmi",
  786. .num_resources = ARRAY_SIZE(hdmi_resources),
  787. .resource = hdmi_resources,
  788. .id = -1,
  789. .dev = {
  790. .platform_data = &hdmi_info,
  791. },
  792. };
  793. static struct platform_device fsi_hdmi_device = {
  794. .name = "sh_fsi2_b_hdmi",
  795. };
  796. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  797. unsigned long *parent_freq)
  798. {
  799. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  800. long error;
  801. if (IS_ERR(hdmi_ick)) {
  802. int ret = PTR_ERR(hdmi_ick);
  803. pr_err("Cannot get HDMI ICK: %d\n", ret);
  804. return ret;
  805. }
  806. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  807. clk_put(hdmi_ick);
  808. return error;
  809. }
  810. static struct gpio_led ap4evb_leds[] = {
  811. {
  812. .name = "led4",
  813. .gpio = GPIO_PORT185,
  814. .default_state = LEDS_GPIO_DEFSTATE_ON,
  815. },
  816. {
  817. .name = "led2",
  818. .gpio = GPIO_PORT186,
  819. .default_state = LEDS_GPIO_DEFSTATE_ON,
  820. },
  821. {
  822. .name = "led3",
  823. .gpio = GPIO_PORT187,
  824. .default_state = LEDS_GPIO_DEFSTATE_ON,
  825. },
  826. {
  827. .name = "led1",
  828. .gpio = GPIO_PORT188,
  829. .default_state = LEDS_GPIO_DEFSTATE_ON,
  830. }
  831. };
  832. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  833. .num_leds = ARRAY_SIZE(ap4evb_leds),
  834. .leds = ap4evb_leds,
  835. };
  836. static struct platform_device leds_device = {
  837. .name = "leds-gpio",
  838. .id = 0,
  839. .dev = {
  840. .platform_data = &ap4evb_leds_pdata,
  841. },
  842. };
  843. static struct i2c_board_info imx074_info = {
  844. I2C_BOARD_INFO("imx074", 0x1a),
  845. };
  846. static struct soc_camera_link imx074_link = {
  847. .bus_id = 0,
  848. .board_info = &imx074_info,
  849. .i2c_adapter_id = 0,
  850. .module_name = "imx074",
  851. };
  852. static struct platform_device ap4evb_camera = {
  853. .name = "soc-camera-pdrv",
  854. .id = 0,
  855. .dev = {
  856. .platform_data = &imx074_link,
  857. },
  858. };
  859. static struct sh_csi2_client_config csi2_clients[] = {
  860. {
  861. .phy = SH_CSI2_PHY_MAIN,
  862. .lanes = 0, /* default: 2 lanes */
  863. .channel = 0,
  864. .pdev = &ap4evb_camera,
  865. },
  866. };
  867. static struct sh_csi2_pdata csi2_info = {
  868. .type = SH_CSI2C,
  869. .clients = csi2_clients,
  870. .num_clients = ARRAY_SIZE(csi2_clients),
  871. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  872. };
  873. static struct resource csi2_resources[] = {
  874. [0] = {
  875. .name = "CSI2",
  876. .start = 0xffc90000,
  877. .end = 0xffc90fff,
  878. .flags = IORESOURCE_MEM,
  879. },
  880. [1] = {
  881. .start = intcs_evt2irq(0x17a0),
  882. .flags = IORESOURCE_IRQ,
  883. },
  884. };
  885. static struct sh_mobile_ceu_companion csi2 = {
  886. .id = 0,
  887. .num_resources = ARRAY_SIZE(csi2_resources),
  888. .resource = csi2_resources,
  889. .platform_data = &csi2_info,
  890. };
  891. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  892. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  893. .csi2 = &csi2,
  894. };
  895. static struct resource ceu_resources[] = {
  896. [0] = {
  897. .name = "CEU",
  898. .start = 0xfe910000,
  899. .end = 0xfe91009f,
  900. .flags = IORESOURCE_MEM,
  901. },
  902. [1] = {
  903. .start = intcs_evt2irq(0x880),
  904. .flags = IORESOURCE_IRQ,
  905. },
  906. [2] = {
  907. /* place holder for contiguous memory */
  908. },
  909. };
  910. static struct platform_device ceu_device = {
  911. .name = "sh_mobile_ceu",
  912. .id = 0, /* "ceu0" clock */
  913. .num_resources = ARRAY_SIZE(ceu_resources),
  914. .resource = ceu_resources,
  915. .dev = {
  916. .platform_data = &sh_mobile_ceu_info,
  917. .coherent_dma_mask = 0xffffffff,
  918. },
  919. };
  920. static struct platform_device *ap4evb_devices[] __initdata = {
  921. &leds_device,
  922. &nor_flash_device,
  923. &smc911x_device,
  924. &sdhi0_device,
  925. &sdhi1_device,
  926. &usb1_host_device,
  927. &fsi_device,
  928. &fsi_ak4643_device,
  929. &fsi_hdmi_device,
  930. &sh_mmcif_device,
  931. &lcdc1_device,
  932. &lcdc_device,
  933. &hdmi_device,
  934. &ceu_device,
  935. &ap4evb_camera,
  936. &meram_device,
  937. };
  938. static void __init hdmi_init_pm_clock(void)
  939. {
  940. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  941. int ret;
  942. long rate;
  943. if (IS_ERR(hdmi_ick)) {
  944. ret = PTR_ERR(hdmi_ick);
  945. pr_err("Cannot get HDMI ICK: %d\n", ret);
  946. goto out;
  947. }
  948. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  949. if (ret < 0) {
  950. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  951. goto out;
  952. }
  953. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  954. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  955. if (rate < 0) {
  956. pr_err("Cannot get suitable rate: %ld\n", rate);
  957. ret = rate;
  958. goto out;
  959. }
  960. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  961. if (ret < 0) {
  962. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  963. goto out;
  964. }
  965. pr_debug("PLLC2 set frequency %lu\n", rate);
  966. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  967. if (ret < 0)
  968. pr_err("Cannot set HDMI parent: %d\n", ret);
  969. out:
  970. if (!IS_ERR(hdmi_ick))
  971. clk_put(hdmi_ick);
  972. }
  973. static void __init fsi_init_pm_clock(void)
  974. {
  975. struct clk *fsia_ick;
  976. int ret;
  977. fsia_ick = clk_get(&fsi_device.dev, "icka");
  978. if (IS_ERR(fsia_ick)) {
  979. ret = PTR_ERR(fsia_ick);
  980. pr_err("Cannot get FSI ICK: %d\n", ret);
  981. return;
  982. }
  983. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  984. if (ret < 0)
  985. pr_err("Cannot set FSI-A parent: %d\n", ret);
  986. clk_put(fsia_ick);
  987. }
  988. /*
  989. * FIXME !!
  990. *
  991. * gpio_no_direction
  992. * are quick_hack.
  993. *
  994. * current gpio frame work doesn't have
  995. * the method to control only pull up/down/free.
  996. * this function should be replaced by correct gpio function
  997. */
  998. static void __init gpio_no_direction(u32 addr)
  999. {
  1000. __raw_writeb(0x00, addr);
  1001. }
  1002. /* TouchScreen */
  1003. #ifdef CONFIG_AP4EVB_QHD
  1004. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1005. # define GPIO_TSC_PORT GPIO_PORT123
  1006. #else /* WVGA */
  1007. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1008. # define GPIO_TSC_PORT GPIO_PORT40
  1009. #endif
  1010. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1011. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1012. static int ts_get_pendown_state(void)
  1013. {
  1014. int val;
  1015. gpio_free(GPIO_TSC_IRQ);
  1016. gpio_request(GPIO_TSC_PORT, NULL);
  1017. gpio_direction_input(GPIO_TSC_PORT);
  1018. val = gpio_get_value(GPIO_TSC_PORT);
  1019. gpio_request(GPIO_TSC_IRQ, NULL);
  1020. return !val;
  1021. }
  1022. static int ts_init(void)
  1023. {
  1024. gpio_request(GPIO_TSC_IRQ, NULL);
  1025. return 0;
  1026. }
  1027. static struct tsc2007_platform_data tsc2007_info = {
  1028. .model = 2007,
  1029. .x_plate_ohms = 180,
  1030. .get_pendown_state = ts_get_pendown_state,
  1031. .init_platform_hw = ts_init,
  1032. };
  1033. static struct i2c_board_info tsc_device = {
  1034. I2C_BOARD_INFO("tsc2007", 0x48),
  1035. .type = "tsc2007",
  1036. .platform_data = &tsc2007_info,
  1037. /*.irq is selected on ap4evb_init */
  1038. };
  1039. /* I2C */
  1040. static struct i2c_board_info i2c0_devices[] = {
  1041. {
  1042. I2C_BOARD_INFO("ak4643", 0x13),
  1043. },
  1044. };
  1045. static struct i2c_board_info i2c1_devices[] = {
  1046. {
  1047. I2C_BOARD_INFO("r2025sd", 0x32),
  1048. },
  1049. };
  1050. #define GPIO_PORT9CR 0xE6051009
  1051. #define GPIO_PORT10CR 0xE605100A
  1052. #define USCCR1 0xE6058144
  1053. static void __init ap4evb_init(void)
  1054. {
  1055. u32 srcr4;
  1056. struct clk *clk;
  1057. /* External clock source */
  1058. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1059. sh7372_pinmux_init();
  1060. /* enable SCIFA0 */
  1061. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1062. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1063. /* enable SMSC911X */
  1064. gpio_request(GPIO_FN_CS5A, NULL);
  1065. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1066. /* enable Debug switch (S6) */
  1067. gpio_request(GPIO_PORT32, NULL);
  1068. gpio_request(GPIO_PORT33, NULL);
  1069. gpio_request(GPIO_PORT34, NULL);
  1070. gpio_request(GPIO_PORT35, NULL);
  1071. gpio_direction_input(GPIO_PORT32);
  1072. gpio_direction_input(GPIO_PORT33);
  1073. gpio_direction_input(GPIO_PORT34);
  1074. gpio_direction_input(GPIO_PORT35);
  1075. gpio_export(GPIO_PORT32, 0);
  1076. gpio_export(GPIO_PORT33, 0);
  1077. gpio_export(GPIO_PORT34, 0);
  1078. gpio_export(GPIO_PORT35, 0);
  1079. /* SDHI0 */
  1080. gpio_request(GPIO_FN_SDHICD0, NULL);
  1081. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1082. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1083. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1084. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1085. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1086. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1087. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1088. /* SDHI1 */
  1089. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1090. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1091. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1092. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1093. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1094. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1095. /* MMCIF */
  1096. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1097. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1098. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1099. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1100. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1101. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1102. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1103. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1104. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1105. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1106. /* USB enable */
  1107. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1108. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1109. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1110. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1111. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1112. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1113. /* setup USB phy */
  1114. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1115. /* enable FSI2 port A (ak4643) */
  1116. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1117. gpio_request(GPIO_FN_FSIAILR, NULL);
  1118. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1119. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1120. gpio_request(GPIO_PORT161, NULL);
  1121. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1122. gpio_request(GPIO_PORT9, NULL);
  1123. gpio_request(GPIO_PORT10, NULL);
  1124. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1125. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1126. /* card detect pin for MMC slot (CN7) */
  1127. gpio_request(GPIO_PORT41, NULL);
  1128. gpio_direction_input(GPIO_PORT41);
  1129. /* setup FSI2 port B (HDMI) */
  1130. gpio_request(GPIO_FN_FSIBCK, NULL);
  1131. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1132. /* set SPU2 clock to 119.6 MHz */
  1133. clk = clk_get(NULL, "spu_clk");
  1134. if (!IS_ERR(clk)) {
  1135. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1136. clk_put(clk);
  1137. }
  1138. /*
  1139. * set irq priority, to avoid sound chopping
  1140. * when NFS rootfs is used
  1141. * FSI(3) > SMSC911X(2)
  1142. */
  1143. intc_set_priority(IRQ_FSI, 3);
  1144. i2c_register_board_info(0, i2c0_devices,
  1145. ARRAY_SIZE(i2c0_devices));
  1146. i2c_register_board_info(1, i2c1_devices,
  1147. ARRAY_SIZE(i2c1_devices));
  1148. #ifdef CONFIG_AP4EVB_QHD
  1149. /*
  1150. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1151. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1152. */
  1153. /* enable KEYSC */
  1154. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1155. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1156. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1157. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1158. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1159. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1160. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1161. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1162. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1163. gpio_request(GPIO_FN_KEYIN4, NULL);
  1164. /* enable TouchScreen */
  1165. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1166. tsc_device.irq = IRQ28;
  1167. i2c_register_board_info(1, &tsc_device, 1);
  1168. /* LCDC0 */
  1169. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1170. lcdc_info.ch[0].interface_type = RGB24;
  1171. lcdc_info.ch[0].clock_divider = 1;
  1172. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1173. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  1174. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  1175. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1176. #else
  1177. /*
  1178. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1179. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1180. */
  1181. gpio_request(GPIO_FN_LCDD17, NULL);
  1182. gpio_request(GPIO_FN_LCDD16, NULL);
  1183. gpio_request(GPIO_FN_LCDD15, NULL);
  1184. gpio_request(GPIO_FN_LCDD14, NULL);
  1185. gpio_request(GPIO_FN_LCDD13, NULL);
  1186. gpio_request(GPIO_FN_LCDD12, NULL);
  1187. gpio_request(GPIO_FN_LCDD11, NULL);
  1188. gpio_request(GPIO_FN_LCDD10, NULL);
  1189. gpio_request(GPIO_FN_LCDD9, NULL);
  1190. gpio_request(GPIO_FN_LCDD8, NULL);
  1191. gpio_request(GPIO_FN_LCDD7, NULL);
  1192. gpio_request(GPIO_FN_LCDD6, NULL);
  1193. gpio_request(GPIO_FN_LCDD5, NULL);
  1194. gpio_request(GPIO_FN_LCDD4, NULL);
  1195. gpio_request(GPIO_FN_LCDD3, NULL);
  1196. gpio_request(GPIO_FN_LCDD2, NULL);
  1197. gpio_request(GPIO_FN_LCDD1, NULL);
  1198. gpio_request(GPIO_FN_LCDD0, NULL);
  1199. gpio_request(GPIO_FN_LCDDISP, NULL);
  1200. gpio_request(GPIO_FN_LCDDCK, NULL);
  1201. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1202. gpio_direction_output(GPIO_PORT189, 1);
  1203. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1204. gpio_direction_output(GPIO_PORT151, 1);
  1205. lcdc_info.clock_source = LCDC_CLK_BUS;
  1206. lcdc_info.ch[0].interface_type = RGB18;
  1207. lcdc_info.ch[0].clock_divider = 3;
  1208. lcdc_info.ch[0].flags = 0;
  1209. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  1210. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  1211. /* enable TouchScreen */
  1212. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1213. tsc_device.irq = IRQ7;
  1214. i2c_register_board_info(0, &tsc_device, 1);
  1215. #endif /* CONFIG_AP4EVB_QHD */
  1216. /* CEU */
  1217. /*
  1218. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1219. * becomes available
  1220. */
  1221. /* MIPI-CSI stuff */
  1222. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1223. clk = clk_get(NULL, "vck1_clk");
  1224. if (!IS_ERR(clk)) {
  1225. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1226. clk_enable(clk);
  1227. clk_put(clk);
  1228. }
  1229. sh7372_add_standard_devices();
  1230. /* HDMI */
  1231. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1232. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1233. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1234. #define SRCR4 0xe61580bc
  1235. srcr4 = __raw_readl(SRCR4);
  1236. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1237. udelay(50);
  1238. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1239. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1240. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
  1241. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1242. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1243. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1244. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1245. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1246. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1247. hdmi_init_pm_clock();
  1248. fsi_init_pm_clock();
  1249. sh7372_pm_init();
  1250. pm_clk_add(&fsi_device.dev, "spu2");
  1251. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1252. }
  1253. MACHINE_START(AP4EVB, "ap4evb")
  1254. .map_io = sh7372_map_io,
  1255. .init_early = sh7372_add_early_devices,
  1256. .init_irq = sh7372_init_irq,
  1257. .handle_irq = shmobile_handle_irq_intc,
  1258. .init_machine = ap4evb_init,
  1259. .timer = &shmobile_timer,
  1260. MACHINE_END