fimc-lite.c 42 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
  5. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/clk.h>
  14. #include <linux/device.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/kernel.h>
  18. #include <linux/list.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/types.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/v4l2-mem2mem.h>
  29. #include <media/videobuf2-core.h>
  30. #include <media/videobuf2-dma-contig.h>
  31. #include <media/s5p_fimc.h>
  32. #include "common.h"
  33. #include "fimc-core.h"
  34. #include "fimc-lite.h"
  35. #include "fimc-lite-reg.h"
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. static const struct fimc_fmt fimc_lite_formats[] = {
  39. {
  40. .name = "YUV 4:2:2 packed, YCbYCr",
  41. .fourcc = V4L2_PIX_FMT_YUYV,
  42. .depth = { 16 },
  43. .color = FIMC_FMT_YCBYCR422,
  44. .memplanes = 1,
  45. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  46. .flags = FMT_FLAGS_YUV,
  47. }, {
  48. .name = "YUV 4:2:2 packed, CbYCrY",
  49. .fourcc = V4L2_PIX_FMT_UYVY,
  50. .depth = { 16 },
  51. .color = FIMC_FMT_CBYCRY422,
  52. .memplanes = 1,
  53. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  54. .flags = FMT_FLAGS_YUV,
  55. }, {
  56. .name = "YUV 4:2:2 packed, CrYCbY",
  57. .fourcc = V4L2_PIX_FMT_VYUY,
  58. .depth = { 16 },
  59. .color = FIMC_FMT_CRYCBY422,
  60. .memplanes = 1,
  61. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  62. .flags = FMT_FLAGS_YUV,
  63. }, {
  64. .name = "YUV 4:2:2 packed, YCrYCb",
  65. .fourcc = V4L2_PIX_FMT_YVYU,
  66. .depth = { 16 },
  67. .color = FIMC_FMT_YCRYCB422,
  68. .memplanes = 1,
  69. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  70. .flags = FMT_FLAGS_YUV,
  71. }, {
  72. .name = "RAW8 (GRBG)",
  73. .fourcc = V4L2_PIX_FMT_SGRBG8,
  74. .depth = { 8 },
  75. .color = FIMC_FMT_RAW8,
  76. .memplanes = 1,
  77. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  78. .flags = FMT_FLAGS_RAW_BAYER,
  79. }, {
  80. .name = "RAW10 (GRBG)",
  81. .fourcc = V4L2_PIX_FMT_SGRBG10,
  82. .depth = { 10 },
  83. .color = FIMC_FMT_RAW10,
  84. .memplanes = 1,
  85. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  86. .flags = FMT_FLAGS_RAW_BAYER,
  87. }, {
  88. .name = "RAW12 (GRBG)",
  89. .fourcc = V4L2_PIX_FMT_SGRBG12,
  90. .depth = { 12 },
  91. .color = FIMC_FMT_RAW12,
  92. .memplanes = 1,
  93. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  94. .flags = FMT_FLAGS_RAW_BAYER,
  95. },
  96. };
  97. /**
  98. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  99. * @pixelformat: fourcc to match, ignored if null
  100. * @mbus_code: media bus code to match, ignored if null
  101. * @mask: the color format flags to match
  102. * @index: index to the fimc_lite_formats array, ignored if negative
  103. */
  104. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  105. const u32 *mbus_code, unsigned int mask, int index)
  106. {
  107. const struct fimc_fmt *fmt, *def_fmt = NULL;
  108. unsigned int i;
  109. int id = 0;
  110. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  111. return NULL;
  112. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  113. fmt = &fimc_lite_formats[i];
  114. if (mask && !(fmt->flags & mask))
  115. continue;
  116. if (pixelformat && fmt->fourcc == *pixelformat)
  117. return fmt;
  118. if (mbus_code && fmt->mbus_code == *mbus_code)
  119. return fmt;
  120. if (index == id)
  121. def_fmt = fmt;
  122. id++;
  123. }
  124. return def_fmt;
  125. }
  126. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  127. {
  128. struct fimc_source_info *si;
  129. unsigned long flags;
  130. if (fimc->sensor == NULL)
  131. return -ENXIO;
  132. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  133. return -EINVAL;
  134. /* Get sensor configuration data from the sensor subdev */
  135. si = v4l2_get_subdev_hostdata(fimc->sensor);
  136. if (!si)
  137. return -EINVAL;
  138. spin_lock_irqsave(&fimc->slock, flags);
  139. flite_hw_set_camera_bus(fimc, si);
  140. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  141. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  142. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  143. flite_hw_set_interrupt_mask(fimc);
  144. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  145. if (debug > 0)
  146. flite_hw_dump_regs(fimc, __func__);
  147. spin_unlock_irqrestore(&fimc->slock, flags);
  148. return 0;
  149. }
  150. /*
  151. * Reinitialize the driver so it is ready to start the streaming again.
  152. * Set fimc->state to indicate stream off and the hardware shut down state.
  153. * If not suspending (@suspend is false), return any buffers to videobuf2.
  154. * Otherwise put any owned buffers onto the pending buffers queue, so they
  155. * can be re-spun when the device is being resumed. Also perform FIMC
  156. * software reset and disable streaming on the whole pipeline if required.
  157. */
  158. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  159. {
  160. struct flite_buffer *buf;
  161. unsigned long flags;
  162. bool streaming;
  163. spin_lock_irqsave(&fimc->slock, flags);
  164. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  165. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  166. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  167. if (suspend)
  168. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  169. else
  170. fimc->state &= ~(1 << ST_FLITE_PENDING |
  171. 1 << ST_FLITE_SUSPENDED);
  172. /* Release unused buffers */
  173. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  174. buf = fimc_lite_pending_queue_pop(fimc);
  175. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  176. }
  177. /* If suspending put unused buffers onto pending queue */
  178. while (!list_empty(&fimc->active_buf_q)) {
  179. buf = fimc_lite_active_queue_pop(fimc);
  180. if (suspend)
  181. fimc_lite_pending_queue_add(fimc, buf);
  182. else
  183. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  184. }
  185. spin_unlock_irqrestore(&fimc->slock, flags);
  186. flite_hw_reset(fimc);
  187. if (!streaming)
  188. return 0;
  189. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  190. }
  191. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  192. {
  193. unsigned long flags;
  194. if (!fimc_lite_active(fimc))
  195. return 0;
  196. spin_lock_irqsave(&fimc->slock, flags);
  197. set_bit(ST_FLITE_OFF, &fimc->state);
  198. flite_hw_capture_stop(fimc);
  199. spin_unlock_irqrestore(&fimc->slock, flags);
  200. wait_event_timeout(fimc->irq_queue,
  201. !test_bit(ST_FLITE_OFF, &fimc->state),
  202. (2*HZ/10)); /* 200 ms */
  203. return fimc_lite_reinit(fimc, suspend);
  204. }
  205. /* Must be called with fimc.slock spinlock held. */
  206. static void fimc_lite_config_update(struct fimc_lite *fimc)
  207. {
  208. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  209. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  210. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  211. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  212. }
  213. static irqreturn_t flite_irq_handler(int irq, void *priv)
  214. {
  215. struct fimc_lite *fimc = priv;
  216. struct flite_buffer *vbuf;
  217. unsigned long flags;
  218. struct timeval *tv;
  219. struct timespec ts;
  220. u32 intsrc;
  221. spin_lock_irqsave(&fimc->slock, flags);
  222. intsrc = flite_hw_get_interrupt_source(fimc);
  223. flite_hw_clear_pending_irq(fimc);
  224. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  225. wake_up(&fimc->irq_queue);
  226. goto done;
  227. }
  228. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  229. clear_bit(ST_FLITE_RUN, &fimc->state);
  230. fimc->events.data_overflow++;
  231. }
  232. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  233. flite_hw_clear_last_capture_end(fimc);
  234. clear_bit(ST_FLITE_STREAM, &fimc->state);
  235. wake_up(&fimc->irq_queue);
  236. }
  237. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  238. goto done;
  239. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  240. test_bit(ST_FLITE_RUN, &fimc->state) &&
  241. !list_empty(&fimc->active_buf_q) &&
  242. !list_empty(&fimc->pending_buf_q)) {
  243. vbuf = fimc_lite_active_queue_pop(fimc);
  244. ktime_get_ts(&ts);
  245. tv = &vbuf->vb.v4l2_buf.timestamp;
  246. tv->tv_sec = ts.tv_sec;
  247. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  248. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  249. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  250. vbuf = fimc_lite_pending_queue_pop(fimc);
  251. flite_hw_set_output_addr(fimc, vbuf->paddr);
  252. fimc_lite_active_queue_add(fimc, vbuf);
  253. }
  254. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  255. fimc_lite_config_update(fimc);
  256. if (list_empty(&fimc->pending_buf_q)) {
  257. flite_hw_capture_stop(fimc);
  258. clear_bit(ST_FLITE_STREAM, &fimc->state);
  259. }
  260. done:
  261. set_bit(ST_FLITE_RUN, &fimc->state);
  262. spin_unlock_irqrestore(&fimc->slock, flags);
  263. return IRQ_HANDLED;
  264. }
  265. static int start_streaming(struct vb2_queue *q, unsigned int count)
  266. {
  267. struct fimc_lite *fimc = q->drv_priv;
  268. int ret;
  269. fimc->frame_count = 0;
  270. ret = fimc_lite_hw_init(fimc, false);
  271. if (ret) {
  272. fimc_lite_reinit(fimc, false);
  273. return ret;
  274. }
  275. set_bit(ST_FLITE_PENDING, &fimc->state);
  276. if (!list_empty(&fimc->active_buf_q) &&
  277. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  278. flite_hw_capture_start(fimc);
  279. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  280. fimc_pipeline_call(fimc, set_stream,
  281. &fimc->pipeline, 1);
  282. }
  283. if (debug > 0)
  284. flite_hw_dump_regs(fimc, __func__);
  285. return 0;
  286. }
  287. static int stop_streaming(struct vb2_queue *q)
  288. {
  289. struct fimc_lite *fimc = q->drv_priv;
  290. if (!fimc_lite_active(fimc))
  291. return -EINVAL;
  292. return fimc_lite_stop_capture(fimc, false);
  293. }
  294. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  295. unsigned int *num_buffers, unsigned int *num_planes,
  296. unsigned int sizes[], void *allocators[])
  297. {
  298. const struct v4l2_pix_format_mplane *pixm = NULL;
  299. struct fimc_lite *fimc = vq->drv_priv;
  300. struct flite_frame *frame = &fimc->out_frame;
  301. const struct fimc_fmt *fmt = frame->fmt;
  302. unsigned long wh;
  303. int i;
  304. if (pfmt) {
  305. pixm = &pfmt->fmt.pix_mp;
  306. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
  307. wh = pixm->width * pixm->height;
  308. } else {
  309. wh = frame->f_width * frame->f_height;
  310. }
  311. if (fmt == NULL)
  312. return -EINVAL;
  313. *num_planes = fmt->memplanes;
  314. for (i = 0; i < fmt->memplanes; i++) {
  315. unsigned int size = (wh * fmt->depth[i]) / 8;
  316. if (pixm)
  317. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  318. else
  319. sizes[i] = size;
  320. allocators[i] = fimc->alloc_ctx;
  321. }
  322. return 0;
  323. }
  324. static int buffer_prepare(struct vb2_buffer *vb)
  325. {
  326. struct vb2_queue *vq = vb->vb2_queue;
  327. struct fimc_lite *fimc = vq->drv_priv;
  328. int i;
  329. if (fimc->out_frame.fmt == NULL)
  330. return -EINVAL;
  331. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  332. unsigned long size = fimc->payload[i];
  333. if (vb2_plane_size(vb, i) < size) {
  334. v4l2_err(&fimc->ve.vdev,
  335. "User buffer too small (%ld < %ld)\n",
  336. vb2_plane_size(vb, i), size);
  337. return -EINVAL;
  338. }
  339. vb2_set_plane_payload(vb, i, size);
  340. }
  341. return 0;
  342. }
  343. static void buffer_queue(struct vb2_buffer *vb)
  344. {
  345. struct flite_buffer *buf
  346. = container_of(vb, struct flite_buffer, vb);
  347. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  348. unsigned long flags;
  349. spin_lock_irqsave(&fimc->slock, flags);
  350. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  351. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  352. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  353. list_empty(&fimc->active_buf_q)) {
  354. flite_hw_set_output_addr(fimc, buf->paddr);
  355. fimc_lite_active_queue_add(fimc, buf);
  356. } else {
  357. fimc_lite_pending_queue_add(fimc, buf);
  358. }
  359. if (vb2_is_streaming(&fimc->vb_queue) &&
  360. !list_empty(&fimc->pending_buf_q) &&
  361. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  362. flite_hw_capture_start(fimc);
  363. spin_unlock_irqrestore(&fimc->slock, flags);
  364. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  365. fimc_pipeline_call(fimc, set_stream,
  366. &fimc->pipeline, 1);
  367. return;
  368. }
  369. spin_unlock_irqrestore(&fimc->slock, flags);
  370. }
  371. static const struct vb2_ops fimc_lite_qops = {
  372. .queue_setup = queue_setup,
  373. .buf_prepare = buffer_prepare,
  374. .buf_queue = buffer_queue,
  375. .wait_prepare = vb2_ops_wait_prepare,
  376. .wait_finish = vb2_ops_wait_finish,
  377. .start_streaming = start_streaming,
  378. .stop_streaming = stop_streaming,
  379. };
  380. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  381. {
  382. unsigned long flags;
  383. spin_lock_irqsave(&fimc->slock, flags);
  384. memset(&fimc->events, 0, sizeof(fimc->events));
  385. spin_unlock_irqrestore(&fimc->slock, flags);
  386. }
  387. static int fimc_lite_open(struct file *file)
  388. {
  389. struct fimc_lite *fimc = video_drvdata(file);
  390. struct media_entity *me = &fimc->ve.vdev.entity;
  391. int ret;
  392. mutex_lock(&fimc->lock);
  393. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  394. ret = -EBUSY;
  395. goto unlock;
  396. }
  397. set_bit(ST_FLITE_IN_USE, &fimc->state);
  398. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  399. if (ret < 0)
  400. goto unlock;
  401. ret = v4l2_fh_open(file);
  402. if (ret < 0)
  403. goto err_pm;
  404. if (!v4l2_fh_is_singular_file(file) ||
  405. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  406. goto unlock;
  407. mutex_lock(&me->parent->graph_mutex);
  408. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  409. me, true);
  410. /* Mark video pipeline ending at this video node as in use. */
  411. if (ret == 0)
  412. me->use_count++;
  413. mutex_unlock(&me->parent->graph_mutex);
  414. if (!ret) {
  415. fimc_lite_clear_event_counters(fimc);
  416. goto unlock;
  417. }
  418. v4l2_fh_release(file);
  419. err_pm:
  420. pm_runtime_put_sync(&fimc->pdev->dev);
  421. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  422. unlock:
  423. mutex_unlock(&fimc->lock);
  424. return ret;
  425. }
  426. static int fimc_lite_release(struct file *file)
  427. {
  428. struct fimc_lite *fimc = video_drvdata(file);
  429. struct media_entity *entity = &fimc->ve.vdev.entity;
  430. mutex_lock(&fimc->lock);
  431. if (v4l2_fh_is_singular_file(file) &&
  432. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  433. if (fimc->streaming) {
  434. media_entity_pipeline_stop(entity);
  435. fimc->streaming = false;
  436. }
  437. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  438. fimc_lite_stop_capture(fimc, false);
  439. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  440. mutex_lock(&entity->parent->graph_mutex);
  441. entity->use_count--;
  442. mutex_unlock(&entity->parent->graph_mutex);
  443. }
  444. vb2_fop_release(file);
  445. pm_runtime_put(&fimc->pdev->dev);
  446. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  447. mutex_unlock(&fimc->lock);
  448. return 0;
  449. }
  450. static const struct v4l2_file_operations fimc_lite_fops = {
  451. .owner = THIS_MODULE,
  452. .open = fimc_lite_open,
  453. .release = fimc_lite_release,
  454. .poll = vb2_fop_poll,
  455. .unlocked_ioctl = video_ioctl2,
  456. .mmap = vb2_fop_mmap,
  457. };
  458. /*
  459. * Format and crop negotiation helpers
  460. */
  461. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  462. u32 *width, u32 *height,
  463. u32 *code, u32 *fourcc, int pad)
  464. {
  465. struct flite_drvdata *dd = fimc->dd;
  466. const struct fimc_fmt *fmt;
  467. unsigned int flags = 0;
  468. if (pad == FLITE_SD_PAD_SINK) {
  469. v4l_bound_align_image(width, 8, dd->max_width,
  470. ffs(dd->out_width_align) - 1,
  471. height, 0, dd->max_height, 0, 0);
  472. } else {
  473. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  474. ffs(dd->out_width_align) - 1,
  475. height, 0, fimc->inp_frame.rect.height,
  476. 0, 0);
  477. flags = fimc->inp_frame.fmt->flags;
  478. }
  479. fmt = fimc_lite_find_format(fourcc, code, flags, 0);
  480. if (WARN_ON(!fmt))
  481. return NULL;
  482. if (code)
  483. *code = fmt->mbus_code;
  484. if (fourcc)
  485. *fourcc = fmt->fourcc;
  486. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  487. code ? *code : 0, *width, *height);
  488. return fmt;
  489. }
  490. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  491. {
  492. struct flite_frame *frame = &fimc->inp_frame;
  493. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  494. &r->height, 0, frame->f_height, 0, 0);
  495. /* Adjust left/top if cropping rectangle got out of bounds */
  496. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  497. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  498. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  499. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  500. r->left, r->top, r->width, r->height,
  501. frame->f_width, frame->f_height);
  502. }
  503. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  504. {
  505. struct flite_frame *frame = &fimc->out_frame;
  506. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  507. /* Scaling is not supported so we enforce compose rectangle size
  508. same as size of the sink crop rectangle. */
  509. r->width = crop_rect->width;
  510. r->height = crop_rect->height;
  511. /* Adjust left/top if the composing rectangle got out of bounds */
  512. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  513. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  514. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  515. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  516. r->left, r->top, r->width, r->height,
  517. frame->f_width, frame->f_height);
  518. }
  519. /*
  520. * Video node ioctl operations
  521. */
  522. static int fimc_lite_querycap(struct file *file, void *priv,
  523. struct v4l2_capability *cap)
  524. {
  525. struct fimc_lite *fimc = video_drvdata(file);
  526. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  527. strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
  528. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
  529. dev_name(&fimc->pdev->dev));
  530. cap->device_caps = V4L2_CAP_STREAMING;
  531. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  532. return 0;
  533. }
  534. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  535. struct v4l2_fmtdesc *f)
  536. {
  537. const struct fimc_fmt *fmt;
  538. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  539. return -EINVAL;
  540. fmt = &fimc_lite_formats[f->index];
  541. strlcpy(f->description, fmt->name, sizeof(f->description));
  542. f->pixelformat = fmt->fourcc;
  543. return 0;
  544. }
  545. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  546. struct v4l2_format *f)
  547. {
  548. struct fimc_lite *fimc = video_drvdata(file);
  549. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  550. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  551. struct flite_frame *frame = &fimc->out_frame;
  552. const struct fimc_fmt *fmt = frame->fmt;
  553. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  554. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  555. pixm->num_planes = fmt->memplanes;
  556. pixm->pixelformat = fmt->fourcc;
  557. pixm->width = frame->f_width;
  558. pixm->height = frame->f_height;
  559. pixm->field = V4L2_FIELD_NONE;
  560. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  561. return 0;
  562. }
  563. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  564. struct v4l2_pix_format_mplane *pixm,
  565. const struct fimc_fmt **ffmt)
  566. {
  567. u32 bpl = pixm->plane_fmt[0].bytesperline;
  568. struct flite_drvdata *dd = fimc->dd;
  569. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  570. const struct fimc_fmt *fmt;
  571. if (WARN_ON(inp_fmt == NULL))
  572. return -EINVAL;
  573. /*
  574. * We allow some flexibility only for YUV formats. In case of raw
  575. * raw Bayer the FIMC-LITE's output format must match its camera
  576. * interface input format.
  577. */
  578. if (inp_fmt->flags & FMT_FLAGS_YUV)
  579. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  580. inp_fmt->flags, 0);
  581. else
  582. fmt = inp_fmt;
  583. if (WARN_ON(fmt == NULL))
  584. return -EINVAL;
  585. if (ffmt)
  586. *ffmt = fmt;
  587. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  588. ffs(dd->out_width_align) - 1,
  589. &pixm->height, 0, dd->max_height, 0, 0);
  590. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  591. pixm->plane_fmt[0].bytesperline = (pixm->width *
  592. fmt->depth[0]) / 8;
  593. if (pixm->plane_fmt[0].sizeimage == 0)
  594. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  595. fmt->depth[0]) / 8;
  596. pixm->num_planes = fmt->memplanes;
  597. pixm->pixelformat = fmt->fourcc;
  598. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  599. pixm->field = V4L2_FIELD_NONE;
  600. return 0;
  601. }
  602. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  603. struct v4l2_format *f)
  604. {
  605. struct fimc_lite *fimc = video_drvdata(file);
  606. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  607. }
  608. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  609. struct v4l2_format *f)
  610. {
  611. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  612. struct fimc_lite *fimc = video_drvdata(file);
  613. struct flite_frame *frame = &fimc->out_frame;
  614. const struct fimc_fmt *fmt = NULL;
  615. int ret;
  616. if (vb2_is_busy(&fimc->vb_queue))
  617. return -EBUSY;
  618. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  619. if (ret < 0)
  620. return ret;
  621. frame->fmt = fmt;
  622. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  623. pixm->plane_fmt[0].sizeimage);
  624. frame->f_width = pixm->width;
  625. frame->f_height = pixm->height;
  626. return 0;
  627. }
  628. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  629. {
  630. struct v4l2_subdev *sd = &fimc->subdev;
  631. struct v4l2_subdev_format sink_fmt, src_fmt;
  632. struct media_pad *pad;
  633. int ret;
  634. while (1) {
  635. /* Retrieve format at the sink pad */
  636. pad = &sd->entity.pads[0];
  637. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  638. break;
  639. /* Don't call FIMC subdev operation to avoid nested locking */
  640. if (sd == &fimc->subdev) {
  641. struct flite_frame *ff = &fimc->out_frame;
  642. sink_fmt.format.width = ff->f_width;
  643. sink_fmt.format.height = ff->f_height;
  644. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  645. } else {
  646. sink_fmt.pad = pad->index;
  647. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  648. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  649. &sink_fmt);
  650. if (ret < 0 && ret != -ENOIOCTLCMD)
  651. return -EPIPE;
  652. }
  653. /* Retrieve format at the source pad */
  654. pad = media_entity_remote_pad(pad);
  655. if (pad == NULL ||
  656. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  657. break;
  658. sd = media_entity_to_v4l2_subdev(pad->entity);
  659. src_fmt.pad = pad->index;
  660. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  661. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  662. if (ret < 0 && ret != -ENOIOCTLCMD)
  663. return -EPIPE;
  664. if (src_fmt.format.width != sink_fmt.format.width ||
  665. src_fmt.format.height != sink_fmt.format.height ||
  666. src_fmt.format.code != sink_fmt.format.code)
  667. return -EPIPE;
  668. }
  669. return 0;
  670. }
  671. static int fimc_lite_streamon(struct file *file, void *priv,
  672. enum v4l2_buf_type type)
  673. {
  674. struct fimc_lite *fimc = video_drvdata(file);
  675. struct media_entity *entity = &fimc->ve.vdev.entity;
  676. struct fimc_pipeline *p = &fimc->pipeline;
  677. int ret;
  678. if (fimc_lite_active(fimc))
  679. return -EBUSY;
  680. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  681. if (ret < 0)
  682. return ret;
  683. ret = fimc_pipeline_validate(fimc);
  684. if (ret < 0)
  685. goto err_p_stop;
  686. fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
  687. ret = vb2_ioctl_streamon(file, priv, type);
  688. if (!ret) {
  689. fimc->streaming = true;
  690. return ret;
  691. }
  692. err_p_stop:
  693. media_entity_pipeline_stop(entity);
  694. return 0;
  695. }
  696. static int fimc_lite_streamoff(struct file *file, void *priv,
  697. enum v4l2_buf_type type)
  698. {
  699. struct fimc_lite *fimc = video_drvdata(file);
  700. int ret;
  701. ret = vb2_ioctl_streamoff(file, priv, type);
  702. if (ret < 0)
  703. return ret;
  704. media_entity_pipeline_stop(&fimc->ve.vdev.entity);
  705. fimc->streaming = false;
  706. return 0;
  707. }
  708. static int fimc_lite_reqbufs(struct file *file, void *priv,
  709. struct v4l2_requestbuffers *reqbufs)
  710. {
  711. struct fimc_lite *fimc = video_drvdata(file);
  712. int ret;
  713. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  714. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  715. if (!ret)
  716. fimc->reqbufs_count = reqbufs->count;
  717. return ret;
  718. }
  719. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  720. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  721. {
  722. if (a->left < b->left || a->top < b->top)
  723. return 0;
  724. if (a->left + a->width > b->left + b->width)
  725. return 0;
  726. if (a->top + a->height > b->top + b->height)
  727. return 0;
  728. return 1;
  729. }
  730. static int fimc_lite_g_selection(struct file *file, void *fh,
  731. struct v4l2_selection *sel)
  732. {
  733. struct fimc_lite *fimc = video_drvdata(file);
  734. struct flite_frame *f = &fimc->out_frame;
  735. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  736. return -EINVAL;
  737. switch (sel->target) {
  738. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  739. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  740. sel->r.left = 0;
  741. sel->r.top = 0;
  742. sel->r.width = f->f_width;
  743. sel->r.height = f->f_height;
  744. return 0;
  745. case V4L2_SEL_TGT_COMPOSE:
  746. sel->r = f->rect;
  747. return 0;
  748. }
  749. return -EINVAL;
  750. }
  751. static int fimc_lite_s_selection(struct file *file, void *fh,
  752. struct v4l2_selection *sel)
  753. {
  754. struct fimc_lite *fimc = video_drvdata(file);
  755. struct flite_frame *f = &fimc->out_frame;
  756. struct v4l2_rect rect = sel->r;
  757. unsigned long flags;
  758. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  759. sel->target != V4L2_SEL_TGT_COMPOSE)
  760. return -EINVAL;
  761. fimc_lite_try_compose(fimc, &rect);
  762. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  763. !enclosed_rectangle(&rect, &sel->r))
  764. return -ERANGE;
  765. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  766. !enclosed_rectangle(&sel->r, &rect))
  767. return -ERANGE;
  768. sel->r = rect;
  769. spin_lock_irqsave(&fimc->slock, flags);
  770. f->rect = rect;
  771. set_bit(ST_FLITE_CONFIG, &fimc->state);
  772. spin_unlock_irqrestore(&fimc->slock, flags);
  773. return 0;
  774. }
  775. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  776. .vidioc_querycap = fimc_lite_querycap,
  777. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  778. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  779. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  780. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  781. .vidioc_g_selection = fimc_lite_g_selection,
  782. .vidioc_s_selection = fimc_lite_s_selection,
  783. .vidioc_reqbufs = fimc_lite_reqbufs,
  784. .vidioc_querybuf = vb2_ioctl_querybuf,
  785. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  786. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  787. .vidioc_qbuf = vb2_ioctl_qbuf,
  788. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  789. .vidioc_streamon = fimc_lite_streamon,
  790. .vidioc_streamoff = fimc_lite_streamoff,
  791. };
  792. /* Capture subdev media entity operations */
  793. static int fimc_lite_link_setup(struct media_entity *entity,
  794. const struct media_pad *local,
  795. const struct media_pad *remote, u32 flags)
  796. {
  797. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  798. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  799. unsigned int remote_ent_type = media_entity_type(remote->entity);
  800. int ret = 0;
  801. if (WARN_ON(fimc == NULL))
  802. return 0;
  803. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  804. __func__, remote->entity->name, local->entity->name,
  805. flags, fimc->source_subdev_grp_id);
  806. switch (local->index) {
  807. case FLITE_SD_PAD_SINK:
  808. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  809. ret = -EINVAL;
  810. break;
  811. }
  812. if (flags & MEDIA_LNK_FL_ENABLED) {
  813. if (fimc->source_subdev_grp_id == 0)
  814. fimc->source_subdev_grp_id = sd->grp_id;
  815. else
  816. ret = -EBUSY;
  817. } else {
  818. fimc->source_subdev_grp_id = 0;
  819. fimc->sensor = NULL;
  820. }
  821. break;
  822. case FLITE_SD_PAD_SOURCE_DMA:
  823. if (!(flags & MEDIA_LNK_FL_ENABLED))
  824. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  825. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  826. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  827. else
  828. ret = -EINVAL;
  829. break;
  830. case FLITE_SD_PAD_SOURCE_ISP:
  831. if (!(flags & MEDIA_LNK_FL_ENABLED))
  832. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  833. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  834. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  835. else
  836. ret = -EINVAL;
  837. break;
  838. default:
  839. v4l2_err(sd, "Invalid pad index\n");
  840. ret = -EINVAL;
  841. }
  842. mb();
  843. return ret;
  844. }
  845. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  846. .link_setup = fimc_lite_link_setup,
  847. };
  848. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  849. struct v4l2_subdev_fh *fh,
  850. struct v4l2_subdev_mbus_code_enum *code)
  851. {
  852. const struct fimc_fmt *fmt;
  853. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  854. if (!fmt)
  855. return -EINVAL;
  856. code->code = fmt->mbus_code;
  857. return 0;
  858. }
  859. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  860. struct v4l2_subdev_fh *fh,
  861. struct v4l2_subdev_format *fmt)
  862. {
  863. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  864. struct v4l2_mbus_framefmt *mf = &fmt->format;
  865. struct flite_frame *f = &fimc->inp_frame;
  866. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  867. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  868. fmt->format = *mf;
  869. return 0;
  870. }
  871. mf->colorspace = V4L2_COLORSPACE_JPEG;
  872. mutex_lock(&fimc->lock);
  873. mf->code = f->fmt->mbus_code;
  874. if (fmt->pad == FLITE_SD_PAD_SINK) {
  875. /* full camera input frame size */
  876. mf->width = f->f_width;
  877. mf->height = f->f_height;
  878. } else {
  879. /* crop size */
  880. mf->width = f->rect.width;
  881. mf->height = f->rect.height;
  882. }
  883. mutex_unlock(&fimc->lock);
  884. return 0;
  885. }
  886. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  887. struct v4l2_subdev_fh *fh,
  888. struct v4l2_subdev_format *fmt)
  889. {
  890. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  891. struct v4l2_mbus_framefmt *mf = &fmt->format;
  892. struct flite_frame *sink = &fimc->inp_frame;
  893. struct flite_frame *source = &fimc->out_frame;
  894. const struct fimc_fmt *ffmt;
  895. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  896. fmt->pad, mf->code, mf->width, mf->height);
  897. mf->colorspace = V4L2_COLORSPACE_JPEG;
  898. mutex_lock(&fimc->lock);
  899. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  900. sd->entity.stream_count > 0) ||
  901. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  902. vb2_is_busy(&fimc->vb_queue))) {
  903. mutex_unlock(&fimc->lock);
  904. return -EBUSY;
  905. }
  906. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  907. &mf->code, NULL, fmt->pad);
  908. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  909. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  910. *mf = fmt->format;
  911. mutex_unlock(&fimc->lock);
  912. return 0;
  913. }
  914. if (fmt->pad == FLITE_SD_PAD_SINK) {
  915. sink->f_width = mf->width;
  916. sink->f_height = mf->height;
  917. sink->fmt = ffmt;
  918. /* Set sink crop rectangle */
  919. sink->rect.width = mf->width;
  920. sink->rect.height = mf->height;
  921. sink->rect.left = 0;
  922. sink->rect.top = 0;
  923. /* Reset source format and crop rectangle */
  924. source->rect = sink->rect;
  925. source->f_width = mf->width;
  926. source->f_height = mf->height;
  927. } else {
  928. /* Allow changing format only on sink pad */
  929. mf->code = sink->fmt->mbus_code;
  930. mf->width = sink->rect.width;
  931. mf->height = sink->rect.height;
  932. }
  933. mutex_unlock(&fimc->lock);
  934. return 0;
  935. }
  936. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  937. struct v4l2_subdev_fh *fh,
  938. struct v4l2_subdev_selection *sel)
  939. {
  940. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  941. struct flite_frame *f = &fimc->inp_frame;
  942. if ((sel->target != V4L2_SEL_TGT_CROP &&
  943. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  944. sel->pad != FLITE_SD_PAD_SINK)
  945. return -EINVAL;
  946. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  947. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  948. return 0;
  949. }
  950. mutex_lock(&fimc->lock);
  951. if (sel->target == V4L2_SEL_TGT_CROP) {
  952. sel->r = f->rect;
  953. } else {
  954. sel->r.left = 0;
  955. sel->r.top = 0;
  956. sel->r.width = f->f_width;
  957. sel->r.height = f->f_height;
  958. }
  959. mutex_unlock(&fimc->lock);
  960. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  961. __func__, f->rect.left, f->rect.top, f->rect.width,
  962. f->rect.height, f->f_width, f->f_height);
  963. return 0;
  964. }
  965. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  966. struct v4l2_subdev_fh *fh,
  967. struct v4l2_subdev_selection *sel)
  968. {
  969. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  970. struct flite_frame *f = &fimc->inp_frame;
  971. int ret = 0;
  972. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  973. return -EINVAL;
  974. mutex_lock(&fimc->lock);
  975. fimc_lite_try_crop(fimc, &sel->r);
  976. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  977. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  978. } else {
  979. unsigned long flags;
  980. spin_lock_irqsave(&fimc->slock, flags);
  981. f->rect = sel->r;
  982. /* Same crop rectangle on the source pad */
  983. fimc->out_frame.rect = sel->r;
  984. set_bit(ST_FLITE_CONFIG, &fimc->state);
  985. spin_unlock_irqrestore(&fimc->slock, flags);
  986. }
  987. mutex_unlock(&fimc->lock);
  988. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  989. __func__, f->rect.left, f->rect.top, f->rect.width,
  990. f->rect.height, f->f_width, f->f_height);
  991. return ret;
  992. }
  993. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  994. {
  995. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  996. unsigned long flags;
  997. int ret;
  998. /*
  999. * Find sensor subdev linked to FIMC-LITE directly or through
  1000. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  1001. * is used as a subdev only and feeds data internally to FIMC-IS.
  1002. * The pipeline links are protected through entity.stream_count
  1003. * so there is no need to take the media graph mutex here.
  1004. */
  1005. fimc->sensor = fimc_find_remote_sensor(&sd->entity);
  1006. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1007. return -ENOIOCTLCMD;
  1008. mutex_lock(&fimc->lock);
  1009. if (on) {
  1010. flite_hw_reset(fimc);
  1011. ret = fimc_lite_hw_init(fimc, true);
  1012. if (!ret) {
  1013. spin_lock_irqsave(&fimc->slock, flags);
  1014. flite_hw_capture_start(fimc);
  1015. spin_unlock_irqrestore(&fimc->slock, flags);
  1016. }
  1017. } else {
  1018. set_bit(ST_FLITE_OFF, &fimc->state);
  1019. spin_lock_irqsave(&fimc->slock, flags);
  1020. flite_hw_capture_stop(fimc);
  1021. spin_unlock_irqrestore(&fimc->slock, flags);
  1022. ret = wait_event_timeout(fimc->irq_queue,
  1023. !test_bit(ST_FLITE_OFF, &fimc->state),
  1024. msecs_to_jiffies(200));
  1025. if (ret == 0)
  1026. v4l2_err(sd, "s_stream(0) timeout\n");
  1027. clear_bit(ST_FLITE_RUN, &fimc->state);
  1028. }
  1029. mutex_unlock(&fimc->lock);
  1030. return ret;
  1031. }
  1032. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1033. {
  1034. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1035. flite_hw_dump_regs(fimc, __func__);
  1036. return 0;
  1037. }
  1038. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1039. {
  1040. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1041. struct vb2_queue *q = &fimc->vb_queue;
  1042. struct video_device *vfd = &fimc->ve.vdev;
  1043. int ret;
  1044. memset(vfd, 0, sizeof(*vfd));
  1045. fimc->inp_frame.fmt = &fimc_lite_formats[0];
  1046. fimc->out_frame.fmt = &fimc_lite_formats[0];
  1047. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1048. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1049. fimc->index);
  1050. vfd->fops = &fimc_lite_fops;
  1051. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1052. vfd->v4l2_dev = sd->v4l2_dev;
  1053. vfd->minor = -1;
  1054. vfd->release = video_device_release_empty;
  1055. vfd->queue = q;
  1056. fimc->reqbufs_count = 0;
  1057. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1058. INIT_LIST_HEAD(&fimc->active_buf_q);
  1059. memset(q, 0, sizeof(*q));
  1060. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1061. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1062. q->ops = &fimc_lite_qops;
  1063. q->mem_ops = &vb2_dma_contig_memops;
  1064. q->buf_struct_size = sizeof(struct flite_buffer);
  1065. q->drv_priv = fimc;
  1066. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1067. q->lock = &fimc->lock;
  1068. ret = vb2_queue_init(q);
  1069. if (ret < 0)
  1070. return ret;
  1071. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1072. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1073. if (ret < 0)
  1074. return ret;
  1075. video_set_drvdata(vfd, fimc);
  1076. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1077. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1078. if (ret < 0) {
  1079. media_entity_cleanup(&vfd->entity);
  1080. fimc->pipeline_ops = NULL;
  1081. return ret;
  1082. }
  1083. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1084. vfd->name, video_device_node_name(vfd));
  1085. return 0;
  1086. }
  1087. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1088. {
  1089. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1090. if (fimc == NULL)
  1091. return;
  1092. if (video_is_registered(&fimc->ve.vdev)) {
  1093. video_unregister_device(&fimc->ve.vdev);
  1094. media_entity_cleanup(&fimc->ve.vdev.entity);
  1095. fimc->pipeline_ops = NULL;
  1096. }
  1097. }
  1098. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1099. .registered = fimc_lite_subdev_registered,
  1100. .unregistered = fimc_lite_subdev_unregistered,
  1101. };
  1102. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1103. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1104. .get_selection = fimc_lite_subdev_get_selection,
  1105. .set_selection = fimc_lite_subdev_set_selection,
  1106. .get_fmt = fimc_lite_subdev_get_fmt,
  1107. .set_fmt = fimc_lite_subdev_set_fmt,
  1108. };
  1109. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1110. .s_stream = fimc_lite_subdev_s_stream,
  1111. };
  1112. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1113. .log_status = fimc_lite_log_status,
  1114. };
  1115. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1116. .core = &fimc_lite_core_ops,
  1117. .video = &fimc_lite_subdev_video_ops,
  1118. .pad = &fimc_lite_subdev_pad_ops,
  1119. };
  1120. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1121. {
  1122. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1123. ctrl_handler);
  1124. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1125. return 0;
  1126. }
  1127. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1128. .s_ctrl = fimc_lite_s_ctrl,
  1129. };
  1130. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1131. .ops = &fimc_lite_ctrl_ops,
  1132. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1133. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1134. .name = "Test Pattern 640x480",
  1135. .step = 1,
  1136. };
  1137. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1138. {
  1139. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1140. struct v4l2_subdev *sd = &fimc->subdev;
  1141. int ret;
  1142. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1143. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1144. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1145. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1146. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1147. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1148. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1149. fimc->subdev_pads, 0);
  1150. if (ret)
  1151. return ret;
  1152. v4l2_ctrl_handler_init(handler, 1);
  1153. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1154. NULL);
  1155. if (handler->error) {
  1156. media_entity_cleanup(&sd->entity);
  1157. return handler->error;
  1158. }
  1159. sd->ctrl_handler = handler;
  1160. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1161. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1162. sd->owner = THIS_MODULE;
  1163. v4l2_set_subdevdata(sd, fimc);
  1164. return 0;
  1165. }
  1166. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1167. {
  1168. struct v4l2_subdev *sd = &fimc->subdev;
  1169. v4l2_device_unregister_subdev(sd);
  1170. media_entity_cleanup(&sd->entity);
  1171. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1172. v4l2_set_subdevdata(sd, NULL);
  1173. }
  1174. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1175. {
  1176. if (IS_ERR(fimc->clock))
  1177. return;
  1178. clk_unprepare(fimc->clock);
  1179. clk_put(fimc->clock);
  1180. fimc->clock = ERR_PTR(-EINVAL);
  1181. }
  1182. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1183. {
  1184. int ret;
  1185. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1186. if (IS_ERR(fimc->clock))
  1187. return PTR_ERR(fimc->clock);
  1188. ret = clk_prepare(fimc->clock);
  1189. if (ret < 0) {
  1190. clk_put(fimc->clock);
  1191. fimc->clock = ERR_PTR(-EINVAL);
  1192. }
  1193. return ret;
  1194. }
  1195. static const struct of_device_id flite_of_match[];
  1196. static int fimc_lite_probe(struct platform_device *pdev)
  1197. {
  1198. struct flite_drvdata *drv_data = NULL;
  1199. struct device *dev = &pdev->dev;
  1200. const struct of_device_id *of_id;
  1201. struct fimc_lite *fimc;
  1202. struct resource *res;
  1203. int ret;
  1204. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1205. if (!fimc)
  1206. return -ENOMEM;
  1207. if (dev->of_node) {
  1208. of_id = of_match_node(flite_of_match, dev->of_node);
  1209. if (of_id)
  1210. drv_data = (struct flite_drvdata *)of_id->data;
  1211. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1212. } else {
  1213. drv_data = fimc_lite_get_drvdata(pdev);
  1214. fimc->index = pdev->id;
  1215. }
  1216. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1217. return -EINVAL;
  1218. fimc->dd = drv_data;
  1219. fimc->pdev = pdev;
  1220. init_waitqueue_head(&fimc->irq_queue);
  1221. spin_lock_init(&fimc->slock);
  1222. mutex_init(&fimc->lock);
  1223. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1224. fimc->regs = devm_ioremap_resource(dev, res);
  1225. if (IS_ERR(fimc->regs))
  1226. return PTR_ERR(fimc->regs);
  1227. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1228. if (res == NULL) {
  1229. dev_err(dev, "Failed to get IRQ resource\n");
  1230. return -ENXIO;
  1231. }
  1232. ret = fimc_lite_clk_get(fimc);
  1233. if (ret)
  1234. return ret;
  1235. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1236. 0, dev_name(dev), fimc);
  1237. if (ret) {
  1238. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1239. goto err_clk;
  1240. }
  1241. /* The video node will be created within the subdev's registered() op */
  1242. ret = fimc_lite_create_capture_subdev(fimc);
  1243. if (ret)
  1244. goto err_clk;
  1245. platform_set_drvdata(pdev, fimc);
  1246. pm_runtime_enable(dev);
  1247. ret = pm_runtime_get_sync(dev);
  1248. if (ret < 0)
  1249. goto err_sd;
  1250. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1251. if (IS_ERR(fimc->alloc_ctx)) {
  1252. ret = PTR_ERR(fimc->alloc_ctx);
  1253. goto err_pm;
  1254. }
  1255. pm_runtime_put(dev);
  1256. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1257. fimc->index);
  1258. return 0;
  1259. err_pm:
  1260. pm_runtime_put(dev);
  1261. err_sd:
  1262. fimc_lite_unregister_capture_subdev(fimc);
  1263. err_clk:
  1264. fimc_lite_clk_put(fimc);
  1265. return ret;
  1266. }
  1267. static int fimc_lite_runtime_resume(struct device *dev)
  1268. {
  1269. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1270. clk_enable(fimc->clock);
  1271. return 0;
  1272. }
  1273. static int fimc_lite_runtime_suspend(struct device *dev)
  1274. {
  1275. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1276. clk_disable(fimc->clock);
  1277. return 0;
  1278. }
  1279. #ifdef CONFIG_PM_SLEEP
  1280. static int fimc_lite_resume(struct device *dev)
  1281. {
  1282. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1283. struct flite_buffer *buf;
  1284. unsigned long flags;
  1285. int i;
  1286. spin_lock_irqsave(&fimc->slock, flags);
  1287. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1288. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1289. spin_unlock_irqrestore(&fimc->slock, flags);
  1290. return 0;
  1291. }
  1292. flite_hw_reset(fimc);
  1293. spin_unlock_irqrestore(&fimc->slock, flags);
  1294. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1295. return 0;
  1296. INIT_LIST_HEAD(&fimc->active_buf_q);
  1297. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1298. &fimc->ve.vdev.entity, false);
  1299. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1300. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1301. for (i = 0; i < fimc->reqbufs_count; i++) {
  1302. if (list_empty(&fimc->pending_buf_q))
  1303. break;
  1304. buf = fimc_lite_pending_queue_pop(fimc);
  1305. buffer_queue(&buf->vb);
  1306. }
  1307. return 0;
  1308. }
  1309. static int fimc_lite_suspend(struct device *dev)
  1310. {
  1311. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1312. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1313. int ret;
  1314. if (test_and_set_bit(ST_LPM, &fimc->state))
  1315. return 0;
  1316. ret = fimc_lite_stop_capture(fimc, suspend);
  1317. if (ret < 0 || !fimc_lite_active(fimc))
  1318. return ret;
  1319. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1320. }
  1321. #endif /* CONFIG_PM_SLEEP */
  1322. static int fimc_lite_remove(struct platform_device *pdev)
  1323. {
  1324. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1325. struct device *dev = &pdev->dev;
  1326. pm_runtime_disable(dev);
  1327. pm_runtime_set_suspended(dev);
  1328. fimc_lite_unregister_capture_subdev(fimc);
  1329. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1330. fimc_lite_clk_put(fimc);
  1331. dev_info(dev, "Driver unloaded\n");
  1332. return 0;
  1333. }
  1334. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1335. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1336. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1337. NULL)
  1338. };
  1339. /* EXYNOS4212, EXYNOS4412 */
  1340. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1341. .max_width = 8192,
  1342. .max_height = 8192,
  1343. .out_width_align = 8,
  1344. .win_hor_offs_align = 2,
  1345. .out_hor_offs_align = 8,
  1346. };
  1347. static const struct of_device_id flite_of_match[] = {
  1348. {
  1349. .compatible = "samsung,exynos4212-fimc-lite",
  1350. .data = &fimc_lite_drvdata_exynos4,
  1351. },
  1352. { /* sentinel */ },
  1353. };
  1354. MODULE_DEVICE_TABLE(of, flite_of_match);
  1355. static struct platform_driver fimc_lite_driver = {
  1356. .probe = fimc_lite_probe,
  1357. .remove = fimc_lite_remove,
  1358. .driver = {
  1359. .of_match_table = flite_of_match,
  1360. .name = FIMC_LITE_DRV_NAME,
  1361. .owner = THIS_MODULE,
  1362. .pm = &fimc_lite_pm_ops,
  1363. }
  1364. };
  1365. module_platform_driver(fimc_lite_driver);
  1366. MODULE_LICENSE("GPL");
  1367. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);