orion_nand.c 5.0 KB

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  1. /*
  2. * drivers/mtd/nand/orion_nand.c
  3. *
  4. * NAND support for Marvell Orion SoC platforms
  5. *
  6. * Tzachi Perelstein <tzachi@marvell.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/of.h>
  16. #include <linux/mtd/mtd.h>
  17. #include <linux/mtd/nand.h>
  18. #include <linux/mtd/partitions.h>
  19. #include <asm/io.h>
  20. #include <asm/sizes.h>
  21. #include <mach/hardware.h>
  22. #include <plat/orion_nand.h>
  23. static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  24. {
  25. struct nand_chip *nc = mtd->priv;
  26. struct orion_nand_data *board = nc->priv;
  27. u32 offs;
  28. if (cmd == NAND_CMD_NONE)
  29. return;
  30. if (ctrl & NAND_CLE)
  31. offs = (1 << board->cle);
  32. else if (ctrl & NAND_ALE)
  33. offs = (1 << board->ale);
  34. else
  35. return;
  36. if (nc->options & NAND_BUSWIDTH_16)
  37. offs <<= 1;
  38. writeb(cmd, nc->IO_ADDR_W + offs);
  39. }
  40. static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  41. {
  42. struct nand_chip *chip = mtd->priv;
  43. void __iomem *io_base = chip->IO_ADDR_R;
  44. uint64_t *buf64;
  45. int i = 0;
  46. while (len && (unsigned long)buf & 7) {
  47. *buf++ = readb(io_base);
  48. len--;
  49. }
  50. buf64 = (uint64_t *)buf;
  51. while (i < len/8) {
  52. /*
  53. * Since GCC has no proper constraint (PR 43518)
  54. * force x variable to r2/r3 registers as ldrd instruction
  55. * requires first register to be even.
  56. */
  57. register uint64_t x asm ("r2");
  58. asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
  59. buf64[i++] = x;
  60. }
  61. i *= 8;
  62. while (i < len)
  63. buf[i++] = readb(io_base);
  64. }
  65. static int __init orion_nand_probe(struct platform_device *pdev)
  66. {
  67. struct mtd_info *mtd;
  68. struct mtd_part_parser_data ppdata = {};
  69. struct nand_chip *nc;
  70. struct orion_nand_data *board;
  71. struct resource *res;
  72. void __iomem *io_base;
  73. int ret = 0;
  74. u32 val = 0;
  75. nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
  76. if (!nc) {
  77. printk(KERN_ERR "orion_nand: failed to allocate device structure.\n");
  78. ret = -ENOMEM;
  79. goto no_res;
  80. }
  81. mtd = (struct mtd_info *)(nc + 1);
  82. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  83. if (!res) {
  84. ret = -ENODEV;
  85. goto no_res;
  86. }
  87. io_base = ioremap(res->start, resource_size(res));
  88. if (!io_base) {
  89. printk(KERN_ERR "orion_nand: ioremap failed\n");
  90. ret = -EIO;
  91. goto no_res;
  92. }
  93. if (pdev->dev.of_node) {
  94. board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
  95. GFP_KERNEL);
  96. if (!board) {
  97. printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
  98. ret = -ENOMEM;
  99. goto no_res;
  100. }
  101. if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
  102. board->cle = (u8)val;
  103. else
  104. board->cle = 0;
  105. if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
  106. board->ale = (u8)val;
  107. else
  108. board->ale = 1;
  109. if (!of_property_read_u32(pdev->dev.of_node,
  110. "bank-width", &val))
  111. board->width = (u8)val * 8;
  112. else
  113. board->width = 8;
  114. if (!of_property_read_u32(pdev->dev.of_node,
  115. "chip-delay", &val))
  116. board->chip_delay = (u8)val;
  117. } else
  118. board = pdev->dev.platform_data;
  119. mtd->priv = nc;
  120. mtd->owner = THIS_MODULE;
  121. nc->priv = board;
  122. nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
  123. nc->cmd_ctrl = orion_nand_cmd_ctrl;
  124. nc->read_buf = orion_nand_read_buf;
  125. nc->ecc.mode = NAND_ECC_SOFT;
  126. if (board->chip_delay)
  127. nc->chip_delay = board->chip_delay;
  128. WARN(board->width > 16,
  129. "%d bit bus width out of range",
  130. board->width);
  131. if (board->width == 16)
  132. nc->options |= NAND_BUSWIDTH_16;
  133. if (board->dev_ready)
  134. nc->dev_ready = board->dev_ready;
  135. platform_set_drvdata(pdev, mtd);
  136. if (nand_scan(mtd, 1)) {
  137. ret = -ENXIO;
  138. goto no_dev;
  139. }
  140. mtd->name = "orion_nand";
  141. ppdata.of_node = pdev->dev.of_node;
  142. ret = mtd_device_parse_register(mtd, NULL, &ppdata,
  143. board->parts, board->nr_parts);
  144. if (ret) {
  145. nand_release(mtd);
  146. goto no_dev;
  147. }
  148. return 0;
  149. no_dev:
  150. platform_set_drvdata(pdev, NULL);
  151. iounmap(io_base);
  152. no_res:
  153. kfree(nc);
  154. return ret;
  155. }
  156. static int __devexit orion_nand_remove(struct platform_device *pdev)
  157. {
  158. struct mtd_info *mtd = platform_get_drvdata(pdev);
  159. struct nand_chip *nc = mtd->priv;
  160. nand_release(mtd);
  161. iounmap(nc->IO_ADDR_W);
  162. kfree(nc);
  163. return 0;
  164. }
  165. #ifdef CONFIG_OF
  166. static struct of_device_id orion_nand_of_match_table[] = {
  167. { .compatible = "mrvl,orion-nand", },
  168. {},
  169. };
  170. #endif
  171. static struct platform_driver orion_nand_driver = {
  172. .remove = __devexit_p(orion_nand_remove),
  173. .driver = {
  174. .name = "orion_nand",
  175. .owner = THIS_MODULE,
  176. .of_match_table = of_match_ptr(orion_nand_of_match_table),
  177. },
  178. };
  179. static int __init orion_nand_init(void)
  180. {
  181. return platform_driver_probe(&orion_nand_driver, orion_nand_probe);
  182. }
  183. static void __exit orion_nand_exit(void)
  184. {
  185. platform_driver_unregister(&orion_nand_driver);
  186. }
  187. module_init(orion_nand_init);
  188. module_exit(orion_nand_exit);
  189. MODULE_LICENSE("GPL");
  190. MODULE_AUTHOR("Tzachi Perelstein");
  191. MODULE_DESCRIPTION("NAND glue for Orion platforms");
  192. MODULE_ALIAS("platform:orion_nand");