omap2420.dtsi 2.6 KB

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  1. /*
  2. * Device Tree Source for OMAP2420 SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /include/ "omap2.dtsi"
  11. / {
  12. compatible = "ti,omap2420", "ti,omap2";
  13. ocp {
  14. counter32k: counter@48004000 {
  15. compatible = "ti,omap-counter32k";
  16. reg = <0x48004000 0x20>;
  17. ti,hwmods = "counter_32k";
  18. };
  19. omap2420_pmx: pinmux@48000030 {
  20. compatible = "ti,omap2420-padconf", "pinctrl-single";
  21. reg = <0x48000030 0x0113>;
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. pinctrl-single,register-width = <8>;
  25. pinctrl-single,function-mask = <0x3f>;
  26. };
  27. gpio1: gpio@48018000 {
  28. compatible = "ti,omap2-gpio";
  29. reg = <0x48018000 0x200>;
  30. interrupts = <29>;
  31. ti,hwmods = "gpio1";
  32. #gpio-cells = <2>;
  33. gpio-controller;
  34. #interrupt-cells = <2>;
  35. interrupt-controller;
  36. };
  37. gpio2: gpio@4801a000 {
  38. compatible = "ti,omap2-gpio";
  39. reg = <0x4801a000 0x200>;
  40. interrupts = <30>;
  41. ti,hwmods = "gpio2";
  42. #gpio-cells = <2>;
  43. gpio-controller;
  44. #interrupt-cells = <2>;
  45. interrupt-controller;
  46. };
  47. gpio3: gpio@4801c000 {
  48. compatible = "ti,omap2-gpio";
  49. reg = <0x4801c000 0x200>;
  50. interrupts = <31>;
  51. ti,hwmods = "gpio3";
  52. #gpio-cells = <2>;
  53. gpio-controller;
  54. #interrupt-cells = <2>;
  55. interrupt-controller;
  56. };
  57. gpio4: gpio@4801e000 {
  58. compatible = "ti,omap2-gpio";
  59. reg = <0x4801e000 0x200>;
  60. interrupts = <32>;
  61. ti,hwmods = "gpio4";
  62. #gpio-cells = <2>;
  63. gpio-controller;
  64. #interrupt-cells = <2>;
  65. interrupt-controller;
  66. };
  67. gpmc: gpmc@6800a000 {
  68. compatible = "ti,omap2420-gpmc";
  69. reg = <0x6800a000 0x1000>;
  70. #address-cells = <2>;
  71. #size-cells = <1>;
  72. interrupts = <20>;
  73. gpmc,num-cs = <8>;
  74. gpmc,num-waitpins = <4>;
  75. ti,hwmods = "gpmc";
  76. };
  77. mcbsp1: mcbsp@48074000 {
  78. compatible = "ti,omap2420-mcbsp";
  79. reg = <0x48074000 0xff>;
  80. reg-names = "mpu";
  81. interrupts = <59>, /* TX interrupt */
  82. <60>; /* RX interrupt */
  83. interrupt-names = "tx", "rx";
  84. ti,hwmods = "mcbsp1";
  85. };
  86. mcbsp2: mcbsp@48076000 {
  87. compatible = "ti,omap2420-mcbsp";
  88. reg = <0x48076000 0xff>;
  89. reg-names = "mpu";
  90. interrupts = <62>, /* TX interrupt */
  91. <63>; /* RX interrupt */
  92. interrupt-names = "tx", "rx";
  93. ti,hwmods = "mcbsp2";
  94. };
  95. timer1: timer@48028000 {
  96. compatible = "ti,omap2-timer";
  97. reg = <0x48028000 0x400>;
  98. interrupts = <37>;
  99. ti,hwmods = "timer1";
  100. ti,timer-alwon;
  101. };
  102. };
  103. };