atmel_lcdfb.c 34 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <linux/gfp.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_data/atmel.h>
  22. #include <video/of_display_timing.h>
  23. #include <mach/cpu.h>
  24. #include <asm/gpio.h>
  25. #include <video/atmel_lcdc.h>
  26. struct atmel_lcdfb_config {
  27. bool have_alt_pixclock;
  28. bool have_hozval;
  29. bool have_intensity_bit;
  30. };
  31. /* LCD Controller info data structure, stored in device platform_data */
  32. struct atmel_lcdfb_info {
  33. spinlock_t lock;
  34. struct fb_info *info;
  35. void __iomem *mmio;
  36. int irq_base;
  37. struct work_struct task;
  38. unsigned int smem_len;
  39. struct platform_device *pdev;
  40. struct clk *bus_clk;
  41. struct clk *lcdc_clk;
  42. struct backlight_device *backlight;
  43. u8 bl_power;
  44. u8 saved_lcdcon;
  45. u32 pseudo_palette[16];
  46. bool have_intensity_bit;
  47. struct atmel_lcdfb_pdata pdata;
  48. struct atmel_lcdfb_config *config;
  49. };
  50. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  51. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  52. /* configurable parameters */
  53. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  54. #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
  55. #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
  56. static struct atmel_lcdfb_config at91sam9261_config = {
  57. .have_hozval = true,
  58. .have_intensity_bit = true,
  59. };
  60. static struct atmel_lcdfb_config at91sam9263_config = {
  61. .have_intensity_bit = true,
  62. };
  63. static struct atmel_lcdfb_config at91sam9g10_config = {
  64. .have_hozval = true,
  65. };
  66. static struct atmel_lcdfb_config at91sam9g45_config = {
  67. .have_alt_pixclock = true,
  68. };
  69. static struct atmel_lcdfb_config at91sam9g45es_config = {
  70. };
  71. static struct atmel_lcdfb_config at91sam9rl_config = {
  72. .have_intensity_bit = true,
  73. };
  74. static struct atmel_lcdfb_config at32ap_config = {
  75. .have_hozval = true,
  76. };
  77. static const struct platform_device_id atmel_lcdfb_devtypes[] = {
  78. {
  79. .name = "at91sam9261-lcdfb",
  80. .driver_data = (unsigned long)&at91sam9261_config,
  81. }, {
  82. .name = "at91sam9263-lcdfb",
  83. .driver_data = (unsigned long)&at91sam9263_config,
  84. }, {
  85. .name = "at91sam9g10-lcdfb",
  86. .driver_data = (unsigned long)&at91sam9g10_config,
  87. }, {
  88. .name = "at91sam9g45-lcdfb",
  89. .driver_data = (unsigned long)&at91sam9g45_config,
  90. }, {
  91. .name = "at91sam9g45es-lcdfb",
  92. .driver_data = (unsigned long)&at91sam9g45es_config,
  93. }, {
  94. .name = "at91sam9rl-lcdfb",
  95. .driver_data = (unsigned long)&at91sam9rl_config,
  96. }, {
  97. .name = "at32ap-lcdfb",
  98. .driver_data = (unsigned long)&at32ap_config,
  99. }, {
  100. /* terminator */
  101. }
  102. };
  103. static struct atmel_lcdfb_config *
  104. atmel_lcdfb_get_config(struct platform_device *pdev)
  105. {
  106. unsigned long data;
  107. data = platform_get_device_id(pdev)->driver_data;
  108. return (struct atmel_lcdfb_config *)data;
  109. }
  110. #if defined(CONFIG_ARCH_AT91)
  111. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  112. | FBINFO_PARTIAL_PAN_OK \
  113. | FBINFO_HWACCEL_YPAN)
  114. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  115. struct fb_var_screeninfo *var,
  116. struct fb_info *info)
  117. {
  118. }
  119. #elif defined(CONFIG_AVR32)
  120. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  121. | FBINFO_PARTIAL_PAN_OK \
  122. | FBINFO_HWACCEL_XPAN \
  123. | FBINFO_HWACCEL_YPAN)
  124. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  125. struct fb_var_screeninfo *var,
  126. struct fb_info *info)
  127. {
  128. u32 dma2dcfg;
  129. u32 pixeloff;
  130. pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
  131. dma2dcfg = (info->var.xres_virtual - info->var.xres)
  132. * info->var.bits_per_pixel / 8;
  133. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  134. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  135. /* Update configuration */
  136. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  137. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  138. | ATMEL_LCDC_DMAUPDT);
  139. }
  140. #endif
  141. static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  142. | ATMEL_LCDC_POL_POSITIVE
  143. | ATMEL_LCDC_ENA_PWMENABLE;
  144. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  145. /* some bl->props field just changed */
  146. static int atmel_bl_update_status(struct backlight_device *bl)
  147. {
  148. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  149. int power = sinfo->bl_power;
  150. int brightness = bl->props.brightness;
  151. /* REVISIT there may be a meaningful difference between
  152. * fb_blank and power ... there seem to be some cases
  153. * this doesn't handle correctly.
  154. */
  155. if (bl->props.fb_blank != sinfo->bl_power)
  156. power = bl->props.fb_blank;
  157. else if (bl->props.power != sinfo->bl_power)
  158. power = bl->props.power;
  159. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  160. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  161. else if (power != FB_BLANK_UNBLANK)
  162. brightness = 0;
  163. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  164. if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
  165. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  166. brightness ? contrast_ctr : 0);
  167. else
  168. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  169. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  170. return 0;
  171. }
  172. static int atmel_bl_get_brightness(struct backlight_device *bl)
  173. {
  174. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  175. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  176. }
  177. static const struct backlight_ops atmel_lcdc_bl_ops = {
  178. .update_status = atmel_bl_update_status,
  179. .get_brightness = atmel_bl_get_brightness,
  180. };
  181. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  182. {
  183. struct backlight_properties props;
  184. struct backlight_device *bl;
  185. sinfo->bl_power = FB_BLANK_UNBLANK;
  186. if (sinfo->backlight)
  187. return;
  188. memset(&props, 0, sizeof(struct backlight_properties));
  189. props.type = BACKLIGHT_RAW;
  190. props.max_brightness = 0xff;
  191. bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
  192. &atmel_lcdc_bl_ops, &props);
  193. if (IS_ERR(bl)) {
  194. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  195. PTR_ERR(bl));
  196. return;
  197. }
  198. sinfo->backlight = bl;
  199. bl->props.power = FB_BLANK_UNBLANK;
  200. bl->props.fb_blank = FB_BLANK_UNBLANK;
  201. bl->props.brightness = atmel_bl_get_brightness(bl);
  202. }
  203. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  204. {
  205. if (!sinfo->backlight)
  206. return;
  207. if (sinfo->backlight->ops) {
  208. sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
  209. sinfo->backlight->ops->update_status(sinfo->backlight);
  210. }
  211. backlight_device_unregister(sinfo->backlight);
  212. }
  213. #else
  214. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  215. {
  216. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  217. }
  218. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  219. {
  220. }
  221. #endif
  222. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  223. {
  224. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  225. /* contrast pwm can be 'inverted' */
  226. if (pdata->lcdcon_pol_negative)
  227. contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
  228. /* have some default contrast/backlight settings */
  229. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  230. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  231. if (pdata->lcdcon_is_backlight)
  232. init_backlight(sinfo);
  233. }
  234. static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
  235. {
  236. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  237. if (pdata->atmel_lcdfb_power_control)
  238. pdata->atmel_lcdfb_power_control(on);
  239. }
  240. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  241. .type = FB_TYPE_PACKED_PIXELS,
  242. .visual = FB_VISUAL_TRUECOLOR,
  243. .xpanstep = 0,
  244. .ypanstep = 1,
  245. .ywrapstep = 0,
  246. .accel = FB_ACCEL_NONE,
  247. };
  248. static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
  249. unsigned long xres)
  250. {
  251. unsigned long lcdcon2;
  252. unsigned long value;
  253. if (!sinfo->config->have_hozval)
  254. return xres;
  255. lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
  256. value = xres;
  257. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  258. /* STN display */
  259. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  260. value *= 3;
  261. }
  262. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  263. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  264. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  265. value = DIV_ROUND_UP(value, 4);
  266. else
  267. value = DIV_ROUND_UP(value, 8);
  268. }
  269. return value;
  270. }
  271. static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
  272. {
  273. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  274. /* Turn off the LCD controller and the DMA controller */
  275. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  276. pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  277. /* Wait for the LCDC core to become idle */
  278. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  279. msleep(10);
  280. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  281. }
  282. static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
  283. {
  284. atmel_lcdfb_stop_nowait(sinfo);
  285. /* Wait for DMA engine to become idle... */
  286. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  287. msleep(10);
  288. }
  289. static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
  290. {
  291. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  292. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
  293. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  294. (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
  295. | ATMEL_LCDC_PWR);
  296. }
  297. static void atmel_lcdfb_update_dma(struct fb_info *info,
  298. struct fb_var_screeninfo *var)
  299. {
  300. struct atmel_lcdfb_info *sinfo = info->par;
  301. struct fb_fix_screeninfo *fix = &info->fix;
  302. unsigned long dma_addr;
  303. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  304. + var->xoffset * info->var.bits_per_pixel / 8);
  305. dma_addr &= ~3UL;
  306. /* Set framebuffer DMA base address and pixel offset */
  307. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  308. atmel_lcdfb_update_dma2d(sinfo, var, info);
  309. }
  310. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  311. {
  312. struct fb_info *info = sinfo->info;
  313. dma_free_writecombine(info->device, info->fix.smem_len,
  314. info->screen_base, info->fix.smem_start);
  315. }
  316. /**
  317. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  318. * @sinfo: the frame buffer to allocate memory for
  319. *
  320. * This function is called only from the atmel_lcdfb_probe()
  321. * so no locking by fb_info->mm_lock around smem_len setting is needed.
  322. */
  323. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  324. {
  325. struct fb_info *info = sinfo->info;
  326. struct fb_var_screeninfo *var = &info->var;
  327. unsigned int smem_len;
  328. smem_len = (var->xres_virtual * var->yres_virtual
  329. * ((var->bits_per_pixel + 7) / 8));
  330. info->fix.smem_len = max(smem_len, sinfo->smem_len);
  331. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  332. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  333. if (!info->screen_base) {
  334. return -ENOMEM;
  335. }
  336. memset(info->screen_base, 0, info->fix.smem_len);
  337. return 0;
  338. }
  339. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  340. struct fb_info *info)
  341. {
  342. struct fb_videomode varfbmode;
  343. const struct fb_videomode *fbmode = NULL;
  344. fb_var_to_videomode(&varfbmode, var);
  345. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  346. if (fbmode)
  347. fb_videomode_to_var(var, fbmode);
  348. return fbmode;
  349. }
  350. /**
  351. * atmel_lcdfb_check_var - Validates a var passed in.
  352. * @var: frame buffer variable screen structure
  353. * @info: frame buffer structure that represents a single frame buffer
  354. *
  355. * Checks to see if the hardware supports the state requested by
  356. * var passed in. This function does not alter the hardware
  357. * state!!! This means the data stored in struct fb_info and
  358. * struct atmel_lcdfb_info do not change. This includes the var
  359. * inside of struct fb_info. Do NOT change these. This function
  360. * can be called on its own if we intent to only test a mode and
  361. * not actually set it. The stuff in modedb.c is a example of
  362. * this. If the var passed in is slightly off by what the
  363. * hardware can support then we alter the var PASSED in to what
  364. * we can do. If the hardware doesn't support mode change a
  365. * -EINVAL will be returned by the upper layers. You don't need
  366. * to implement this function then. If you hardware doesn't
  367. * support changing the resolution then this function is not
  368. * needed. In this case the driver would just provide a var that
  369. * represents the static state the screen is in.
  370. *
  371. * Returns negative errno on error, or zero on success.
  372. */
  373. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  374. struct fb_info *info)
  375. {
  376. struct device *dev = info->device;
  377. struct atmel_lcdfb_info *sinfo = info->par;
  378. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  379. unsigned long clk_value_khz;
  380. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  381. dev_dbg(dev, "%s:\n", __func__);
  382. if (!(var->pixclock && var->bits_per_pixel)) {
  383. /* choose a suitable mode if possible */
  384. if (!atmel_lcdfb_choose_mode(var, info)) {
  385. dev_err(dev, "needed value not specified\n");
  386. return -EINVAL;
  387. }
  388. }
  389. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  390. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  391. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  392. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  393. if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
  394. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  395. return -EINVAL;
  396. }
  397. /* Do not allow to have real resoulution larger than virtual */
  398. if (var->xres > var->xres_virtual)
  399. var->xres_virtual = var->xres;
  400. if (var->yres > var->yres_virtual)
  401. var->yres_virtual = var->yres;
  402. /* Force same alignment for each line */
  403. var->xres = (var->xres + 3) & ~3UL;
  404. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  405. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  406. var->transp.msb_right = 0;
  407. var->transp.offset = var->transp.length = 0;
  408. var->xoffset = var->yoffset = 0;
  409. if (info->fix.smem_len) {
  410. unsigned int smem_len = (var->xres_virtual * var->yres_virtual
  411. * ((var->bits_per_pixel + 7) / 8));
  412. if (smem_len > info->fix.smem_len) {
  413. dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
  414. info->fix.smem_len, smem_len);
  415. return -EINVAL;
  416. }
  417. }
  418. /* Saturate vertical and horizontal timings at maximum values */
  419. var->vsync_len = min_t(u32, var->vsync_len,
  420. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  421. var->upper_margin = min_t(u32, var->upper_margin,
  422. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  423. var->lower_margin = min_t(u32, var->lower_margin,
  424. ATMEL_LCDC_VFP);
  425. var->right_margin = min_t(u32, var->right_margin,
  426. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  427. var->hsync_len = min_t(u32, var->hsync_len,
  428. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  429. var->left_margin = min_t(u32, var->left_margin,
  430. ATMEL_LCDC_HBP + 1);
  431. /* Some parameters can't be zero */
  432. var->vsync_len = max_t(u32, var->vsync_len, 1);
  433. var->right_margin = max_t(u32, var->right_margin, 1);
  434. var->hsync_len = max_t(u32, var->hsync_len, 1);
  435. var->left_margin = max_t(u32, var->left_margin, 1);
  436. switch (var->bits_per_pixel) {
  437. case 1:
  438. case 2:
  439. case 4:
  440. case 8:
  441. var->red.offset = var->green.offset = var->blue.offset = 0;
  442. var->red.length = var->green.length = var->blue.length
  443. = var->bits_per_pixel;
  444. break;
  445. case 16:
  446. /* Older SOCs use IBGR:555 rather than BGR:565. */
  447. if (sinfo->config->have_intensity_bit)
  448. var->green.length = 5;
  449. else
  450. var->green.length = 6;
  451. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  452. /* RGB:5X5 mode */
  453. var->red.offset = var->green.length + 5;
  454. var->blue.offset = 0;
  455. } else {
  456. /* BGR:5X5 mode */
  457. var->red.offset = 0;
  458. var->blue.offset = var->green.length + 5;
  459. }
  460. var->green.offset = 5;
  461. var->red.length = var->blue.length = 5;
  462. break;
  463. case 32:
  464. var->transp.offset = 24;
  465. var->transp.length = 8;
  466. /* fall through */
  467. case 24:
  468. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  469. /* RGB:888 mode */
  470. var->red.offset = 16;
  471. var->blue.offset = 0;
  472. } else {
  473. /* BGR:888 mode */
  474. var->red.offset = 0;
  475. var->blue.offset = 16;
  476. }
  477. var->green.offset = 8;
  478. var->red.length = var->green.length = var->blue.length = 8;
  479. break;
  480. default:
  481. dev_err(dev, "color depth %d not supported\n",
  482. var->bits_per_pixel);
  483. return -EINVAL;
  484. }
  485. return 0;
  486. }
  487. /*
  488. * LCD reset sequence
  489. */
  490. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  491. {
  492. might_sleep();
  493. atmel_lcdfb_stop(sinfo);
  494. atmel_lcdfb_start(sinfo);
  495. }
  496. /**
  497. * atmel_lcdfb_set_par - Alters the hardware state.
  498. * @info: frame buffer structure that represents a single frame buffer
  499. *
  500. * Using the fb_var_screeninfo in fb_info we set the resolution
  501. * of the this particular framebuffer. This function alters the
  502. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  503. * not alter var in fb_info since we are using that data. This
  504. * means we depend on the data in var inside fb_info to be
  505. * supported by the hardware. atmel_lcdfb_check_var is always called
  506. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  507. * change the resolution you don't need this function.
  508. *
  509. */
  510. static int atmel_lcdfb_set_par(struct fb_info *info)
  511. {
  512. struct atmel_lcdfb_info *sinfo = info->par;
  513. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  514. unsigned long hozval_linesz;
  515. unsigned long value;
  516. unsigned long clk_value_khz;
  517. unsigned long bits_per_line;
  518. unsigned long pix_factor = 2;
  519. might_sleep();
  520. dev_dbg(info->device, "%s:\n", __func__);
  521. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  522. info->var.xres, info->var.yres,
  523. info->var.xres_virtual, info->var.yres_virtual);
  524. atmel_lcdfb_stop_nowait(sinfo);
  525. if (info->var.bits_per_pixel == 1)
  526. info->fix.visual = FB_VISUAL_MONO01;
  527. else if (info->var.bits_per_pixel <= 8)
  528. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  529. else
  530. info->fix.visual = FB_VISUAL_TRUECOLOR;
  531. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  532. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  533. /* Re-initialize the DMA engine... */
  534. dev_dbg(info->device, " * update DMA engine\n");
  535. atmel_lcdfb_update_dma(info, &info->var);
  536. /* ...set frame size and burst length = 8 words (?) */
  537. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  538. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  539. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  540. /* Now, the LCDC core... */
  541. /* Set pixel clock */
  542. if (sinfo->config->have_alt_pixclock)
  543. pix_factor = 1;
  544. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  545. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  546. if (value < pix_factor) {
  547. dev_notice(info->device, "Bypassing pixel clock divider\n");
  548. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  549. } else {
  550. value = (value / pix_factor) - 1;
  551. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  552. value);
  553. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  554. value << ATMEL_LCDC_CLKVAL_OFFSET);
  555. info->var.pixclock =
  556. KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
  557. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  558. PICOS2KHZ(info->var.pixclock));
  559. }
  560. /* Initialize control register 2 */
  561. value = pdata->default_lcdcon2;
  562. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  563. value |= ATMEL_LCDC_INVLINE_INVERTED;
  564. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  565. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  566. switch (info->var.bits_per_pixel) {
  567. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  568. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  569. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  570. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  571. case 15: /* fall through */
  572. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  573. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  574. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  575. default: BUG(); break;
  576. }
  577. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  578. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  579. /* Vertical timing */
  580. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  581. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  582. value |= info->var.lower_margin;
  583. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  584. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  585. /* Horizontal timing */
  586. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  587. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  588. value |= (info->var.left_margin - 1);
  589. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  590. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  591. /* Horizontal value (aka line size) */
  592. hozval_linesz = compute_hozval(sinfo, info->var.xres);
  593. /* Display size */
  594. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  595. value |= info->var.yres - 1;
  596. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  597. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  598. /* FIFO Threshold: Use formula from data sheet */
  599. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  600. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  601. /* Toggle LCD_MODE every frame */
  602. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  603. /* Disable all interrupts */
  604. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  605. /* Enable FIFO & DMA errors */
  606. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  607. /* ...wait for DMA engine to become idle... */
  608. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  609. msleep(10);
  610. atmel_lcdfb_start(sinfo);
  611. dev_dbg(info->device, " * DONE\n");
  612. return 0;
  613. }
  614. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  615. {
  616. chan &= 0xffff;
  617. chan >>= 16 - bf->length;
  618. return chan << bf->offset;
  619. }
  620. /**
  621. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  622. * @regno: Which register in the CLUT we are programming
  623. * @red: The red value which can be up to 16 bits wide
  624. * @green: The green value which can be up to 16 bits wide
  625. * @blue: The blue value which can be up to 16 bits wide.
  626. * @transp: If supported the alpha value which can be up to 16 bits wide.
  627. * @info: frame buffer info structure
  628. *
  629. * Set a single color register. The values supplied have a 16 bit
  630. * magnitude which needs to be scaled in this function for the hardware.
  631. * Things to take into consideration are how many color registers, if
  632. * any, are supported with the current color visual. With truecolor mode
  633. * no color palettes are supported. Here a pseudo palette is created
  634. * which we store the value in pseudo_palette in struct fb_info. For
  635. * pseudocolor mode we have a limited color palette. To deal with this
  636. * we can program what color is displayed for a particular pixel value.
  637. * DirectColor is similar in that we can program each color field. If
  638. * we have a static colormap we don't need to implement this function.
  639. *
  640. * Returns negative errno on error, or zero on success. In an
  641. * ideal world, this would have been the case, but as it turns
  642. * out, the other drivers return 1 on failure, so that's what
  643. * we're going to do.
  644. */
  645. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  646. unsigned int green, unsigned int blue,
  647. unsigned int transp, struct fb_info *info)
  648. {
  649. struct atmel_lcdfb_info *sinfo = info->par;
  650. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  651. unsigned int val;
  652. u32 *pal;
  653. int ret = 1;
  654. if (info->var.grayscale)
  655. red = green = blue = (19595 * red + 38470 * green
  656. + 7471 * blue) >> 16;
  657. switch (info->fix.visual) {
  658. case FB_VISUAL_TRUECOLOR:
  659. if (regno < 16) {
  660. pal = info->pseudo_palette;
  661. val = chan_to_field(red, &info->var.red);
  662. val |= chan_to_field(green, &info->var.green);
  663. val |= chan_to_field(blue, &info->var.blue);
  664. pal[regno] = val;
  665. ret = 0;
  666. }
  667. break;
  668. case FB_VISUAL_PSEUDOCOLOR:
  669. if (regno < 256) {
  670. if (sinfo->config->have_intensity_bit) {
  671. /* old style I+BGR:555 */
  672. val = ((red >> 11) & 0x001f);
  673. val |= ((green >> 6) & 0x03e0);
  674. val |= ((blue >> 1) & 0x7c00);
  675. /*
  676. * TODO: intensity bit. Maybe something like
  677. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  678. */
  679. } else {
  680. /* new style BGR:565 / RGB:565 */
  681. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  682. val = ((blue >> 11) & 0x001f);
  683. val |= ((red >> 0) & 0xf800);
  684. } else {
  685. val = ((red >> 11) & 0x001f);
  686. val |= ((blue >> 0) & 0xf800);
  687. }
  688. val |= ((green >> 5) & 0x07e0);
  689. }
  690. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  691. ret = 0;
  692. }
  693. break;
  694. case FB_VISUAL_MONO01:
  695. if (regno < 2) {
  696. val = (regno == 0) ? 0x00 : 0x1F;
  697. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  698. ret = 0;
  699. }
  700. break;
  701. }
  702. return ret;
  703. }
  704. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  705. struct fb_info *info)
  706. {
  707. dev_dbg(info->device, "%s\n", __func__);
  708. atmel_lcdfb_update_dma(info, var);
  709. return 0;
  710. }
  711. static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
  712. {
  713. struct atmel_lcdfb_info *sinfo = info->par;
  714. switch (blank_mode) {
  715. case FB_BLANK_UNBLANK:
  716. case FB_BLANK_NORMAL:
  717. atmel_lcdfb_start(sinfo);
  718. break;
  719. case FB_BLANK_VSYNC_SUSPEND:
  720. case FB_BLANK_HSYNC_SUSPEND:
  721. break;
  722. case FB_BLANK_POWERDOWN:
  723. atmel_lcdfb_stop(sinfo);
  724. break;
  725. default:
  726. return -EINVAL;
  727. }
  728. /* let fbcon do a soft blank for us */
  729. return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
  730. }
  731. static struct fb_ops atmel_lcdfb_ops = {
  732. .owner = THIS_MODULE,
  733. .fb_check_var = atmel_lcdfb_check_var,
  734. .fb_set_par = atmel_lcdfb_set_par,
  735. .fb_setcolreg = atmel_lcdfb_setcolreg,
  736. .fb_blank = atmel_lcdfb_blank,
  737. .fb_pan_display = atmel_lcdfb_pan_display,
  738. .fb_fillrect = cfb_fillrect,
  739. .fb_copyarea = cfb_copyarea,
  740. .fb_imageblit = cfb_imageblit,
  741. };
  742. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  743. {
  744. struct fb_info *info = dev_id;
  745. struct atmel_lcdfb_info *sinfo = info->par;
  746. u32 status;
  747. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  748. if (status & ATMEL_LCDC_UFLWI) {
  749. dev_warn(info->device, "FIFO underflow %#x\n", status);
  750. /* reset DMA and FIFO to avoid screen shifting */
  751. schedule_work(&sinfo->task);
  752. }
  753. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  754. return IRQ_HANDLED;
  755. }
  756. /*
  757. * LCD controller task (to reset the LCD)
  758. */
  759. static void atmel_lcdfb_task(struct work_struct *work)
  760. {
  761. struct atmel_lcdfb_info *sinfo =
  762. container_of(work, struct atmel_lcdfb_info, task);
  763. atmel_lcdfb_reset(sinfo);
  764. }
  765. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  766. {
  767. struct fb_info *info = sinfo->info;
  768. int ret = 0;
  769. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  770. dev_info(info->device,
  771. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  772. (unsigned long)info->fix.smem_len / 1024,
  773. (unsigned long)info->fix.smem_start,
  774. info->screen_base);
  775. /* Allocate colormap */
  776. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  777. if (ret < 0)
  778. dev_err(info->device, "Alloc color map failed\n");
  779. return ret;
  780. }
  781. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  782. {
  783. clk_prepare_enable(sinfo->bus_clk);
  784. clk_prepare_enable(sinfo->lcdc_clk);
  785. }
  786. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  787. {
  788. clk_disable_unprepare(sinfo->bus_clk);
  789. clk_disable_unprepare(sinfo->lcdc_clk);
  790. }
  791. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  792. {
  793. struct device *dev = &pdev->dev;
  794. struct fb_info *info;
  795. struct atmel_lcdfb_info *sinfo;
  796. struct atmel_lcdfb_pdata *pdata;
  797. struct fb_videomode fbmode;
  798. struct resource *regs = NULL;
  799. struct resource *map = NULL;
  800. int ret;
  801. dev_dbg(dev, "%s BEGIN\n", __func__);
  802. ret = -ENOMEM;
  803. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  804. if (!info) {
  805. dev_err(dev, "cannot allocate memory\n");
  806. goto out;
  807. }
  808. sinfo = info->par;
  809. if (dev_get_platdata(dev)) {
  810. pdata = dev_get_platdata(dev);
  811. sinfo->pdata = *pdata;
  812. } else {
  813. dev_err(dev, "cannot get default configuration\n");
  814. goto free_info;
  815. }
  816. sinfo->info = info;
  817. sinfo->pdev = pdev;
  818. sinfo->config = atmel_lcdfb_get_config(pdev);
  819. if (!sinfo->config)
  820. goto free_info;
  821. strcpy(info->fix.id, sinfo->pdev->name);
  822. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  823. info->pseudo_palette = sinfo->pseudo_palette;
  824. info->fbops = &atmel_lcdfb_ops;
  825. memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
  826. info->fix = atmel_lcdfb_fix;
  827. /* Enable LCDC Clocks */
  828. sinfo->bus_clk = clk_get(dev, "hclk");
  829. if (IS_ERR(sinfo->bus_clk)) {
  830. ret = PTR_ERR(sinfo->bus_clk);
  831. goto free_info;
  832. }
  833. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  834. if (IS_ERR(sinfo->lcdc_clk)) {
  835. ret = PTR_ERR(sinfo->lcdc_clk);
  836. goto put_bus_clk;
  837. }
  838. atmel_lcdfb_start_clock(sinfo);
  839. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  840. info->monspecs.modedb_len, info->monspecs.modedb,
  841. pdata->default_bpp);
  842. if (!ret) {
  843. dev_err(dev, "no suitable video mode found\n");
  844. goto stop_clk;
  845. }
  846. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  847. if (!regs) {
  848. dev_err(dev, "resources unusable\n");
  849. ret = -ENXIO;
  850. goto stop_clk;
  851. }
  852. sinfo->irq_base = platform_get_irq(pdev, 0);
  853. if (sinfo->irq_base < 0) {
  854. dev_err(dev, "unable to get irq\n");
  855. ret = sinfo->irq_base;
  856. goto stop_clk;
  857. }
  858. /* Initialize video memory */
  859. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  860. if (map) {
  861. /* use a pre-allocated memory buffer */
  862. info->fix.smem_start = map->start;
  863. info->fix.smem_len = resource_size(map);
  864. if (!request_mem_region(info->fix.smem_start,
  865. info->fix.smem_len, pdev->name)) {
  866. ret = -EBUSY;
  867. goto stop_clk;
  868. }
  869. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  870. if (!info->screen_base) {
  871. ret = -ENOMEM;
  872. goto release_intmem;
  873. }
  874. /*
  875. * Don't clear the framebuffer -- someone may have set
  876. * up a splash image.
  877. */
  878. } else {
  879. /* allocate memory buffer */
  880. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  881. if (ret < 0) {
  882. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  883. goto stop_clk;
  884. }
  885. }
  886. /* LCDC registers */
  887. info->fix.mmio_start = regs->start;
  888. info->fix.mmio_len = resource_size(regs);
  889. if (!request_mem_region(info->fix.mmio_start,
  890. info->fix.mmio_len, pdev->name)) {
  891. ret = -EBUSY;
  892. goto free_fb;
  893. }
  894. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  895. if (!sinfo->mmio) {
  896. dev_err(dev, "cannot map LCDC registers\n");
  897. ret = -ENOMEM;
  898. goto release_mem;
  899. }
  900. /* Initialize PWM for contrast or backlight ("off") */
  901. init_contrast(sinfo);
  902. /* interrupt */
  903. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  904. if (ret) {
  905. dev_err(dev, "request_irq failed: %d\n", ret);
  906. goto unmap_mmio;
  907. }
  908. /* Some operations on the LCDC might sleep and
  909. * require a preemptible task context */
  910. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  911. ret = atmel_lcdfb_init_fbinfo(sinfo);
  912. if (ret < 0) {
  913. dev_err(dev, "init fbinfo failed: %d\n", ret);
  914. goto unregister_irqs;
  915. }
  916. /*
  917. * This makes sure that our colour bitfield
  918. * descriptors are correctly initialised.
  919. */
  920. atmel_lcdfb_check_var(&info->var, info);
  921. ret = fb_set_var(info, &info->var);
  922. if (ret) {
  923. dev_warn(dev, "unable to set display parameters\n");
  924. goto free_cmap;
  925. }
  926. dev_set_drvdata(dev, info);
  927. /*
  928. * Tell the world that we're ready to go
  929. */
  930. ret = register_framebuffer(info);
  931. if (ret < 0) {
  932. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  933. goto free_cmap;
  934. }
  935. /* add selected videomode to modelist */
  936. fb_var_to_videomode(&fbmode, &info->var);
  937. fb_add_videomode(&fbmode, &info->modelist);
  938. /* Power up the LCDC screen */
  939. atmel_lcdfb_power_control(sinfo, 1);
  940. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
  941. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  942. return 0;
  943. free_cmap:
  944. fb_dealloc_cmap(&info->cmap);
  945. unregister_irqs:
  946. cancel_work_sync(&sinfo->task);
  947. free_irq(sinfo->irq_base, info);
  948. unmap_mmio:
  949. exit_backlight(sinfo);
  950. iounmap(sinfo->mmio);
  951. release_mem:
  952. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  953. free_fb:
  954. if (map)
  955. iounmap(info->screen_base);
  956. else
  957. atmel_lcdfb_free_video_memory(sinfo);
  958. release_intmem:
  959. if (map)
  960. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  961. stop_clk:
  962. atmel_lcdfb_stop_clock(sinfo);
  963. clk_put(sinfo->lcdc_clk);
  964. put_bus_clk:
  965. clk_put(sinfo->bus_clk);
  966. free_info:
  967. framebuffer_release(info);
  968. out:
  969. dev_dbg(dev, "%s FAILED\n", __func__);
  970. return ret;
  971. }
  972. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  973. {
  974. struct device *dev = &pdev->dev;
  975. struct fb_info *info = dev_get_drvdata(dev);
  976. struct atmel_lcdfb_info *sinfo;
  977. struct atmel_lcdfb_pdata *pdata;
  978. if (!info || !info->par)
  979. return 0;
  980. sinfo = info->par;
  981. pdata = &sinfo->pdata;
  982. cancel_work_sync(&sinfo->task);
  983. exit_backlight(sinfo);
  984. atmel_lcdfb_power_control(sinfo, 0);
  985. unregister_framebuffer(info);
  986. atmel_lcdfb_stop_clock(sinfo);
  987. clk_put(sinfo->lcdc_clk);
  988. clk_put(sinfo->bus_clk);
  989. fb_dealloc_cmap(&info->cmap);
  990. free_irq(sinfo->irq_base, info);
  991. iounmap(sinfo->mmio);
  992. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  993. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  994. iounmap(info->screen_base);
  995. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  996. } else {
  997. atmel_lcdfb_free_video_memory(sinfo);
  998. }
  999. framebuffer_release(info);
  1000. return 0;
  1001. }
  1002. #ifdef CONFIG_PM
  1003. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  1004. {
  1005. struct fb_info *info = platform_get_drvdata(pdev);
  1006. struct atmel_lcdfb_info *sinfo = info->par;
  1007. /*
  1008. * We don't want to handle interrupts while the clock is
  1009. * stopped. It may take forever.
  1010. */
  1011. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  1012. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
  1013. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  1014. atmel_lcdfb_power_control(sinfo, 0);
  1015. atmel_lcdfb_stop(sinfo);
  1016. atmel_lcdfb_stop_clock(sinfo);
  1017. return 0;
  1018. }
  1019. static int atmel_lcdfb_resume(struct platform_device *pdev)
  1020. {
  1021. struct fb_info *info = platform_get_drvdata(pdev);
  1022. struct atmel_lcdfb_info *sinfo = info->par;
  1023. atmel_lcdfb_start_clock(sinfo);
  1024. atmel_lcdfb_start(sinfo);
  1025. atmel_lcdfb_power_control(sinfo, 1);
  1026. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  1027. /* Enable FIFO & DMA errors */
  1028. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
  1029. | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  1030. return 0;
  1031. }
  1032. #else
  1033. #define atmel_lcdfb_suspend NULL
  1034. #define atmel_lcdfb_resume NULL
  1035. #endif
  1036. static struct platform_driver atmel_lcdfb_driver = {
  1037. .remove = __exit_p(atmel_lcdfb_remove),
  1038. .suspend = atmel_lcdfb_suspend,
  1039. .resume = atmel_lcdfb_resume,
  1040. .id_table = atmel_lcdfb_devtypes,
  1041. .driver = {
  1042. .name = "atmel_lcdfb",
  1043. .owner = THIS_MODULE,
  1044. },
  1045. };
  1046. module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
  1047. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  1048. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  1049. MODULE_LICENSE("GPL");