cciss.c 136 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/major.h>
  30. #include <linux/fs.h>
  31. #include <linux/bio.h>
  32. #include <linux/blkpg.h>
  33. #include <linux/timer.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/init.h>
  37. #include <linux/jiffies.h>
  38. #include <linux/hdreg.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/compat.h>
  41. #include <linux/mutex.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/genhd.h>
  47. #include <linux/completion.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/sg.h>
  50. #include <scsi/scsi_ioctl.h>
  51. #include <linux/cdrom.h>
  52. #include <linux/scatterlist.h>
  53. #include <linux/kthread.h>
  54. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  55. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  56. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  57. /* Embedded module documentation macros - see modules.h */
  58. MODULE_AUTHOR("Hewlett-Packard Company");
  59. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  60. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  61. MODULE_VERSION("3.6.26");
  62. MODULE_LICENSE("GPL");
  63. static DEFINE_MUTEX(cciss_mutex);
  64. #include "cciss_cmd.h"
  65. #include "cciss.h"
  66. #include <linux/cciss_ioctl.h>
  67. /* define the PCI info for the cards we can control */
  68. static const struct pci_device_id cciss_pci_device_id[] = {
  69. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  89. {0,}
  90. };
  91. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  92. /* board_id = Subsystem Device ID & Vendor ID
  93. * product = Marketing Name for the board
  94. * access = Address of the struct of function pointers
  95. */
  96. static struct board_type products[] = {
  97. {0x40700E11, "Smart Array 5300", &SA5_access},
  98. {0x40800E11, "Smart Array 5i", &SA5B_access},
  99. {0x40820E11, "Smart Array 532", &SA5B_access},
  100. {0x40830E11, "Smart Array 5312", &SA5B_access},
  101. {0x409A0E11, "Smart Array 641", &SA5_access},
  102. {0x409B0E11, "Smart Array 642", &SA5_access},
  103. {0x409C0E11, "Smart Array 6400", &SA5_access},
  104. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  105. {0x40910E11, "Smart Array 6i", &SA5_access},
  106. {0x3225103C, "Smart Array P600", &SA5_access},
  107. {0x3223103C, "Smart Array P800", &SA5_access},
  108. {0x3234103C, "Smart Array P400", &SA5_access},
  109. {0x3235103C, "Smart Array P400i", &SA5_access},
  110. {0x3211103C, "Smart Array E200i", &SA5_access},
  111. {0x3212103C, "Smart Array E200", &SA5_access},
  112. {0x3213103C, "Smart Array E200i", &SA5_access},
  113. {0x3214103C, "Smart Array E200i", &SA5_access},
  114. {0x3215103C, "Smart Array E200i", &SA5_access},
  115. {0x3237103C, "Smart Array E500", &SA5_access},
  116. {0x323d103c, "Smart Array P700M", &SA5_access},
  117. };
  118. /* How long to wait (in milliseconds) for board to go into simple mode */
  119. #define MAX_CONFIG_WAIT 30000
  120. #define MAX_IOCTL_CONFIG_WAIT 1000
  121. /*define how many times we will try a command because of bus resets */
  122. #define MAX_CMD_RETRIES 3
  123. #define MAX_CTLR 32
  124. /* Originally cciss driver only supports 8 major numbers */
  125. #define MAX_CTLR_ORIG 8
  126. static ctlr_info_t *hba[MAX_CTLR];
  127. static struct task_struct *cciss_scan_thread;
  128. static DEFINE_MUTEX(scan_mutex);
  129. static LIST_HEAD(scan_q);
  130. static void do_cciss_request(struct request_queue *q);
  131. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  132. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  133. static int cciss_open(struct block_device *bdev, fmode_t mode);
  134. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  135. static int cciss_release(struct gendisk *disk, fmode_t mode);
  136. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  137. unsigned int cmd, unsigned long arg);
  138. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  139. unsigned int cmd, unsigned long arg);
  140. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  141. static int cciss_revalidate(struct gendisk *disk);
  142. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  143. static int deregister_disk(ctlr_info_t *h, int drv_index,
  144. int clear_all, int via_ioctl);
  145. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  146. sector_t *total_size, unsigned int *block_size);
  147. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  148. sector_t *total_size, unsigned int *block_size);
  149. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  150. sector_t total_size,
  151. unsigned int block_size, InquiryData_struct *inq_buff,
  152. drive_info_struct *drv);
  153. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  154. static void start_io(ctlr_info_t *h);
  155. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  156. __u8 page_code, unsigned char scsi3addr[],
  157. int cmd_type);
  158. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  159. int attempt_retry);
  160. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  161. static int add_to_scan_list(struct ctlr_info *h);
  162. static int scan_thread(void *data);
  163. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  164. static void cciss_hba_release(struct device *dev);
  165. static void cciss_device_release(struct device *dev);
  166. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  167. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  168. static inline u32 next_command(ctlr_info_t *h);
  169. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  170. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  171. u64 *cfg_offset);
  172. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  173. unsigned long *memory_bar);
  174. /* performant mode helper functions */
  175. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  176. int *bucket_map);
  177. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  178. #ifdef CONFIG_PROC_FS
  179. static void cciss_procinit(ctlr_info_t *h);
  180. #else
  181. static void cciss_procinit(ctlr_info_t *h)
  182. {
  183. }
  184. #endif /* CONFIG_PROC_FS */
  185. #ifdef CONFIG_COMPAT
  186. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  187. unsigned, unsigned long);
  188. #endif
  189. static const struct block_device_operations cciss_fops = {
  190. .owner = THIS_MODULE,
  191. .open = cciss_unlocked_open,
  192. .release = cciss_release,
  193. .ioctl = do_ioctl,
  194. .getgeo = cciss_getgeo,
  195. #ifdef CONFIG_COMPAT
  196. .compat_ioctl = cciss_compat_ioctl,
  197. #endif
  198. .revalidate_disk = cciss_revalidate,
  199. };
  200. /* set_performant_mode: Modify the tag for cciss performant
  201. * set bit 0 for pull model, bits 3-1 for block fetch
  202. * register number
  203. */
  204. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  205. {
  206. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  207. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  208. }
  209. /*
  210. * Enqueuing and dequeuing functions for cmdlists.
  211. */
  212. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  213. {
  214. hlist_add_head(&c->list, list);
  215. }
  216. static inline void removeQ(CommandList_struct *c)
  217. {
  218. /*
  219. * After kexec/dump some commands might still
  220. * be in flight, which the firmware will try
  221. * to complete. Resetting the firmware doesn't work
  222. * with old fw revisions, so we have to mark
  223. * them off as 'stale' to prevent the driver from
  224. * falling over.
  225. */
  226. if (WARN_ON(hlist_unhashed(&c->list))) {
  227. c->cmd_type = CMD_MSG_STALE;
  228. return;
  229. }
  230. hlist_del_init(&c->list);
  231. }
  232. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  233. CommandList_struct *c)
  234. {
  235. unsigned long flags;
  236. set_performant_mode(h, c);
  237. spin_lock_irqsave(&h->lock, flags);
  238. addQ(&h->reqQ, c);
  239. h->Qdepth++;
  240. if (h->Qdepth > h->maxQsinceinit)
  241. h->maxQsinceinit = h->Qdepth;
  242. start_io(h);
  243. spin_unlock_irqrestore(&h->lock, flags);
  244. }
  245. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  246. int nr_cmds)
  247. {
  248. int i;
  249. if (!cmd_sg_list)
  250. return;
  251. for (i = 0; i < nr_cmds; i++) {
  252. kfree(cmd_sg_list[i]);
  253. cmd_sg_list[i] = NULL;
  254. }
  255. kfree(cmd_sg_list);
  256. }
  257. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  258. ctlr_info_t *h, int chainsize, int nr_cmds)
  259. {
  260. int j;
  261. SGDescriptor_struct **cmd_sg_list;
  262. if (chainsize <= 0)
  263. return NULL;
  264. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  265. if (!cmd_sg_list)
  266. return NULL;
  267. /* Build up chain blocks for each command */
  268. for (j = 0; j < nr_cmds; j++) {
  269. /* Need a block of chainsized s/g elements. */
  270. cmd_sg_list[j] = kmalloc((chainsize *
  271. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  272. if (!cmd_sg_list[j]) {
  273. dev_err(&h->pdev->dev, "Cannot get memory "
  274. "for s/g chains.\n");
  275. goto clean;
  276. }
  277. }
  278. return cmd_sg_list;
  279. clean:
  280. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  281. return NULL;
  282. }
  283. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  284. {
  285. SGDescriptor_struct *chain_sg;
  286. u64bit temp64;
  287. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  288. return;
  289. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  290. temp64.val32.lower = chain_sg->Addr.lower;
  291. temp64.val32.upper = chain_sg->Addr.upper;
  292. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  293. }
  294. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  295. SGDescriptor_struct *chain_block, int len)
  296. {
  297. SGDescriptor_struct *chain_sg;
  298. u64bit temp64;
  299. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  300. chain_sg->Ext = CCISS_SG_CHAIN;
  301. chain_sg->Len = len;
  302. temp64.val = pci_map_single(h->pdev, chain_block, len,
  303. PCI_DMA_TODEVICE);
  304. chain_sg->Addr.lower = temp64.val32.lower;
  305. chain_sg->Addr.upper = temp64.val32.upper;
  306. }
  307. #include "cciss_scsi.c" /* For SCSI tape support */
  308. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  309. "UNKNOWN"
  310. };
  311. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  312. #ifdef CONFIG_PROC_FS
  313. /*
  314. * Report information about this controller.
  315. */
  316. #define ENG_GIG 1000000000
  317. #define ENG_GIG_FACTOR (ENG_GIG/512)
  318. #define ENGAGE_SCSI "engage scsi"
  319. static struct proc_dir_entry *proc_cciss;
  320. static void cciss_seq_show_header(struct seq_file *seq)
  321. {
  322. ctlr_info_t *h = seq->private;
  323. seq_printf(seq, "%s: HP %s Controller\n"
  324. "Board ID: 0x%08lx\n"
  325. "Firmware Version: %c%c%c%c\n"
  326. "IRQ: %d\n"
  327. "Logical drives: %d\n"
  328. "Current Q depth: %d\n"
  329. "Current # commands on controller: %d\n"
  330. "Max Q depth since init: %d\n"
  331. "Max # commands on controller since init: %d\n"
  332. "Max SG entries since init: %d\n",
  333. h->devname,
  334. h->product_name,
  335. (unsigned long)h->board_id,
  336. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  337. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  338. h->num_luns,
  339. h->Qdepth, h->commands_outstanding,
  340. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  341. #ifdef CONFIG_CISS_SCSI_TAPE
  342. cciss_seq_tape_report(seq, h);
  343. #endif /* CONFIG_CISS_SCSI_TAPE */
  344. }
  345. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  346. {
  347. ctlr_info_t *h = seq->private;
  348. unsigned long flags;
  349. /* prevent displaying bogus info during configuration
  350. * or deconfiguration of a logical volume
  351. */
  352. spin_lock_irqsave(&h->lock, flags);
  353. if (h->busy_configuring) {
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. return ERR_PTR(-EBUSY);
  356. }
  357. h->busy_configuring = 1;
  358. spin_unlock_irqrestore(&h->lock, flags);
  359. if (*pos == 0)
  360. cciss_seq_show_header(seq);
  361. return pos;
  362. }
  363. static int cciss_seq_show(struct seq_file *seq, void *v)
  364. {
  365. sector_t vol_sz, vol_sz_frac;
  366. ctlr_info_t *h = seq->private;
  367. unsigned ctlr = h->ctlr;
  368. loff_t *pos = v;
  369. drive_info_struct *drv = h->drv[*pos];
  370. if (*pos > h->highest_lun)
  371. return 0;
  372. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  373. return 0;
  374. if (drv->heads == 0)
  375. return 0;
  376. vol_sz = drv->nr_blocks;
  377. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  378. vol_sz_frac *= 100;
  379. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  380. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  381. drv->raid_level = RAID_UNKNOWN;
  382. seq_printf(seq, "cciss/c%dd%d:"
  383. "\t%4u.%02uGB\tRAID %s\n",
  384. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  385. raid_label[drv->raid_level]);
  386. return 0;
  387. }
  388. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  389. {
  390. ctlr_info_t *h = seq->private;
  391. if (*pos > h->highest_lun)
  392. return NULL;
  393. *pos += 1;
  394. return pos;
  395. }
  396. static void cciss_seq_stop(struct seq_file *seq, void *v)
  397. {
  398. ctlr_info_t *h = seq->private;
  399. /* Only reset h->busy_configuring if we succeeded in setting
  400. * it during cciss_seq_start. */
  401. if (v == ERR_PTR(-EBUSY))
  402. return;
  403. h->busy_configuring = 0;
  404. }
  405. static const struct seq_operations cciss_seq_ops = {
  406. .start = cciss_seq_start,
  407. .show = cciss_seq_show,
  408. .next = cciss_seq_next,
  409. .stop = cciss_seq_stop,
  410. };
  411. static int cciss_seq_open(struct inode *inode, struct file *file)
  412. {
  413. int ret = seq_open(file, &cciss_seq_ops);
  414. struct seq_file *seq = file->private_data;
  415. if (!ret)
  416. seq->private = PDE(inode)->data;
  417. return ret;
  418. }
  419. static ssize_t
  420. cciss_proc_write(struct file *file, const char __user *buf,
  421. size_t length, loff_t *ppos)
  422. {
  423. int err;
  424. char *buffer;
  425. #ifndef CONFIG_CISS_SCSI_TAPE
  426. return -EINVAL;
  427. #endif
  428. if (!buf || length > PAGE_SIZE - 1)
  429. return -EINVAL;
  430. buffer = (char *)__get_free_page(GFP_KERNEL);
  431. if (!buffer)
  432. return -ENOMEM;
  433. err = -EFAULT;
  434. if (copy_from_user(buffer, buf, length))
  435. goto out;
  436. buffer[length] = '\0';
  437. #ifdef CONFIG_CISS_SCSI_TAPE
  438. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  439. struct seq_file *seq = file->private_data;
  440. ctlr_info_t *h = seq->private;
  441. err = cciss_engage_scsi(h);
  442. if (err == 0)
  443. err = length;
  444. } else
  445. #endif /* CONFIG_CISS_SCSI_TAPE */
  446. err = -EINVAL;
  447. /* might be nice to have "disengage" too, but it's not
  448. safely possible. (only 1 module use count, lock issues.) */
  449. out:
  450. free_page((unsigned long)buffer);
  451. return err;
  452. }
  453. static const struct file_operations cciss_proc_fops = {
  454. .owner = THIS_MODULE,
  455. .open = cciss_seq_open,
  456. .read = seq_read,
  457. .llseek = seq_lseek,
  458. .release = seq_release,
  459. .write = cciss_proc_write,
  460. };
  461. static void __devinit cciss_procinit(ctlr_info_t *h)
  462. {
  463. struct proc_dir_entry *pde;
  464. if (proc_cciss == NULL)
  465. proc_cciss = proc_mkdir("driver/cciss", NULL);
  466. if (!proc_cciss)
  467. return;
  468. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  469. S_IROTH, proc_cciss,
  470. &cciss_proc_fops, h);
  471. }
  472. #endif /* CONFIG_PROC_FS */
  473. #define MAX_PRODUCT_NAME_LEN 19
  474. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  475. #define to_drv(n) container_of(n, drive_info_struct, dev)
  476. static ssize_t host_store_rescan(struct device *dev,
  477. struct device_attribute *attr,
  478. const char *buf, size_t count)
  479. {
  480. struct ctlr_info *h = to_hba(dev);
  481. add_to_scan_list(h);
  482. wake_up_process(cciss_scan_thread);
  483. wait_for_completion_interruptible(&h->scan_wait);
  484. return count;
  485. }
  486. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  487. static ssize_t dev_show_unique_id(struct device *dev,
  488. struct device_attribute *attr,
  489. char *buf)
  490. {
  491. drive_info_struct *drv = to_drv(dev);
  492. struct ctlr_info *h = to_hba(drv->dev.parent);
  493. __u8 sn[16];
  494. unsigned long flags;
  495. int ret = 0;
  496. spin_lock_irqsave(&h->lock, flags);
  497. if (h->busy_configuring)
  498. ret = -EBUSY;
  499. else
  500. memcpy(sn, drv->serial_no, sizeof(sn));
  501. spin_unlock_irqrestore(&h->lock, flags);
  502. if (ret)
  503. return ret;
  504. else
  505. return snprintf(buf, 16 * 2 + 2,
  506. "%02X%02X%02X%02X%02X%02X%02X%02X"
  507. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  508. sn[0], sn[1], sn[2], sn[3],
  509. sn[4], sn[5], sn[6], sn[7],
  510. sn[8], sn[9], sn[10], sn[11],
  511. sn[12], sn[13], sn[14], sn[15]);
  512. }
  513. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  514. static ssize_t dev_show_vendor(struct device *dev,
  515. struct device_attribute *attr,
  516. char *buf)
  517. {
  518. drive_info_struct *drv = to_drv(dev);
  519. struct ctlr_info *h = to_hba(drv->dev.parent);
  520. char vendor[VENDOR_LEN + 1];
  521. unsigned long flags;
  522. int ret = 0;
  523. spin_lock_irqsave(&h->lock, flags);
  524. if (h->busy_configuring)
  525. ret = -EBUSY;
  526. else
  527. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  528. spin_unlock_irqrestore(&h->lock, flags);
  529. if (ret)
  530. return ret;
  531. else
  532. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  533. }
  534. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  535. static ssize_t dev_show_model(struct device *dev,
  536. struct device_attribute *attr,
  537. char *buf)
  538. {
  539. drive_info_struct *drv = to_drv(dev);
  540. struct ctlr_info *h = to_hba(drv->dev.parent);
  541. char model[MODEL_LEN + 1];
  542. unsigned long flags;
  543. int ret = 0;
  544. spin_lock_irqsave(&h->lock, flags);
  545. if (h->busy_configuring)
  546. ret = -EBUSY;
  547. else
  548. memcpy(model, drv->model, MODEL_LEN + 1);
  549. spin_unlock_irqrestore(&h->lock, flags);
  550. if (ret)
  551. return ret;
  552. else
  553. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  554. }
  555. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  556. static ssize_t dev_show_rev(struct device *dev,
  557. struct device_attribute *attr,
  558. char *buf)
  559. {
  560. drive_info_struct *drv = to_drv(dev);
  561. struct ctlr_info *h = to_hba(drv->dev.parent);
  562. char rev[REV_LEN + 1];
  563. unsigned long flags;
  564. int ret = 0;
  565. spin_lock_irqsave(&h->lock, flags);
  566. if (h->busy_configuring)
  567. ret = -EBUSY;
  568. else
  569. memcpy(rev, drv->rev, REV_LEN + 1);
  570. spin_unlock_irqrestore(&h->lock, flags);
  571. if (ret)
  572. return ret;
  573. else
  574. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  575. }
  576. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  577. static ssize_t cciss_show_lunid(struct device *dev,
  578. struct device_attribute *attr, char *buf)
  579. {
  580. drive_info_struct *drv = to_drv(dev);
  581. struct ctlr_info *h = to_hba(drv->dev.parent);
  582. unsigned long flags;
  583. unsigned char lunid[8];
  584. spin_lock_irqsave(&h->lock, flags);
  585. if (h->busy_configuring) {
  586. spin_unlock_irqrestore(&h->lock, flags);
  587. return -EBUSY;
  588. }
  589. if (!drv->heads) {
  590. spin_unlock_irqrestore(&h->lock, flags);
  591. return -ENOTTY;
  592. }
  593. memcpy(lunid, drv->LunID, sizeof(lunid));
  594. spin_unlock_irqrestore(&h->lock, flags);
  595. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  596. lunid[0], lunid[1], lunid[2], lunid[3],
  597. lunid[4], lunid[5], lunid[6], lunid[7]);
  598. }
  599. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  600. static ssize_t cciss_show_raid_level(struct device *dev,
  601. struct device_attribute *attr, char *buf)
  602. {
  603. drive_info_struct *drv = to_drv(dev);
  604. struct ctlr_info *h = to_hba(drv->dev.parent);
  605. int raid;
  606. unsigned long flags;
  607. spin_lock_irqsave(&h->lock, flags);
  608. if (h->busy_configuring) {
  609. spin_unlock_irqrestore(&h->lock, flags);
  610. return -EBUSY;
  611. }
  612. raid = drv->raid_level;
  613. spin_unlock_irqrestore(&h->lock, flags);
  614. if (raid < 0 || raid > RAID_UNKNOWN)
  615. raid = RAID_UNKNOWN;
  616. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  617. raid_label[raid]);
  618. }
  619. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  620. static ssize_t cciss_show_usage_count(struct device *dev,
  621. struct device_attribute *attr, char *buf)
  622. {
  623. drive_info_struct *drv = to_drv(dev);
  624. struct ctlr_info *h = to_hba(drv->dev.parent);
  625. unsigned long flags;
  626. int count;
  627. spin_lock_irqsave(&h->lock, flags);
  628. if (h->busy_configuring) {
  629. spin_unlock_irqrestore(&h->lock, flags);
  630. return -EBUSY;
  631. }
  632. count = drv->usage_count;
  633. spin_unlock_irqrestore(&h->lock, flags);
  634. return snprintf(buf, 20, "%d\n", count);
  635. }
  636. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  637. static struct attribute *cciss_host_attrs[] = {
  638. &dev_attr_rescan.attr,
  639. NULL
  640. };
  641. static struct attribute_group cciss_host_attr_group = {
  642. .attrs = cciss_host_attrs,
  643. };
  644. static const struct attribute_group *cciss_host_attr_groups[] = {
  645. &cciss_host_attr_group,
  646. NULL
  647. };
  648. static struct device_type cciss_host_type = {
  649. .name = "cciss_host",
  650. .groups = cciss_host_attr_groups,
  651. .release = cciss_hba_release,
  652. };
  653. static struct attribute *cciss_dev_attrs[] = {
  654. &dev_attr_unique_id.attr,
  655. &dev_attr_model.attr,
  656. &dev_attr_vendor.attr,
  657. &dev_attr_rev.attr,
  658. &dev_attr_lunid.attr,
  659. &dev_attr_raid_level.attr,
  660. &dev_attr_usage_count.attr,
  661. NULL
  662. };
  663. static struct attribute_group cciss_dev_attr_group = {
  664. .attrs = cciss_dev_attrs,
  665. };
  666. static const struct attribute_group *cciss_dev_attr_groups[] = {
  667. &cciss_dev_attr_group,
  668. NULL
  669. };
  670. static struct device_type cciss_dev_type = {
  671. .name = "cciss_device",
  672. .groups = cciss_dev_attr_groups,
  673. .release = cciss_device_release,
  674. };
  675. static struct bus_type cciss_bus_type = {
  676. .name = "cciss",
  677. };
  678. /*
  679. * cciss_hba_release is called when the reference count
  680. * of h->dev goes to zero.
  681. */
  682. static void cciss_hba_release(struct device *dev)
  683. {
  684. /*
  685. * nothing to do, but need this to avoid a warning
  686. * about not having a release handler from lib/kref.c.
  687. */
  688. }
  689. /*
  690. * Initialize sysfs entry for each controller. This sets up and registers
  691. * the 'cciss#' directory for each individual controller under
  692. * /sys/bus/pci/devices/<dev>/.
  693. */
  694. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  695. {
  696. device_initialize(&h->dev);
  697. h->dev.type = &cciss_host_type;
  698. h->dev.bus = &cciss_bus_type;
  699. dev_set_name(&h->dev, "%s", h->devname);
  700. h->dev.parent = &h->pdev->dev;
  701. return device_add(&h->dev);
  702. }
  703. /*
  704. * Remove sysfs entries for an hba.
  705. */
  706. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  707. {
  708. device_del(&h->dev);
  709. put_device(&h->dev); /* final put. */
  710. }
  711. /* cciss_device_release is called when the reference count
  712. * of h->drv[x]dev goes to zero.
  713. */
  714. static void cciss_device_release(struct device *dev)
  715. {
  716. drive_info_struct *drv = to_drv(dev);
  717. kfree(drv);
  718. }
  719. /*
  720. * Initialize sysfs for each logical drive. This sets up and registers
  721. * the 'c#d#' directory for each individual logical drive under
  722. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  723. * /sys/block/cciss!c#d# to this entry.
  724. */
  725. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  726. int drv_index)
  727. {
  728. struct device *dev;
  729. if (h->drv[drv_index]->device_initialized)
  730. return 0;
  731. dev = &h->drv[drv_index]->dev;
  732. device_initialize(dev);
  733. dev->type = &cciss_dev_type;
  734. dev->bus = &cciss_bus_type;
  735. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  736. dev->parent = &h->dev;
  737. h->drv[drv_index]->device_initialized = 1;
  738. return device_add(dev);
  739. }
  740. /*
  741. * Remove sysfs entries for a logical drive.
  742. */
  743. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  744. int ctlr_exiting)
  745. {
  746. struct device *dev = &h->drv[drv_index]->dev;
  747. /* special case for c*d0, we only destroy it on controller exit */
  748. if (drv_index == 0 && !ctlr_exiting)
  749. return;
  750. device_del(dev);
  751. put_device(dev); /* the "final" put. */
  752. h->drv[drv_index] = NULL;
  753. }
  754. /*
  755. * For operations that cannot sleep, a command block is allocated at init,
  756. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  757. * which ones are free or in use.
  758. */
  759. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  760. {
  761. CommandList_struct *c;
  762. int i;
  763. u64bit temp64;
  764. dma_addr_t cmd_dma_handle, err_dma_handle;
  765. do {
  766. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  767. if (i == h->nr_cmds)
  768. return NULL;
  769. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  770. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  771. c = h->cmd_pool + i;
  772. memset(c, 0, sizeof(CommandList_struct));
  773. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  774. c->err_info = h->errinfo_pool + i;
  775. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  776. err_dma_handle = h->errinfo_pool_dhandle
  777. + i * sizeof(ErrorInfo_struct);
  778. h->nr_allocs++;
  779. c->cmdindex = i;
  780. INIT_HLIST_NODE(&c->list);
  781. c->busaddr = (__u32) cmd_dma_handle;
  782. temp64.val = (__u64) err_dma_handle;
  783. c->ErrDesc.Addr.lower = temp64.val32.lower;
  784. c->ErrDesc.Addr.upper = temp64.val32.upper;
  785. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  786. c->ctlr = h->ctlr;
  787. return c;
  788. }
  789. /* allocate a command using pci_alloc_consistent, used for ioctls,
  790. * etc., not for the main i/o path.
  791. */
  792. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  793. {
  794. CommandList_struct *c;
  795. u64bit temp64;
  796. dma_addr_t cmd_dma_handle, err_dma_handle;
  797. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  798. sizeof(CommandList_struct), &cmd_dma_handle);
  799. if (c == NULL)
  800. return NULL;
  801. memset(c, 0, sizeof(CommandList_struct));
  802. c->cmdindex = -1;
  803. c->err_info = (ErrorInfo_struct *)
  804. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  805. &err_dma_handle);
  806. if (c->err_info == NULL) {
  807. pci_free_consistent(h->pdev,
  808. sizeof(CommandList_struct), c, cmd_dma_handle);
  809. return NULL;
  810. }
  811. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  812. INIT_HLIST_NODE(&c->list);
  813. c->busaddr = (__u32) cmd_dma_handle;
  814. temp64.val = (__u64) err_dma_handle;
  815. c->ErrDesc.Addr.lower = temp64.val32.lower;
  816. c->ErrDesc.Addr.upper = temp64.val32.upper;
  817. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  818. c->ctlr = h->ctlr;
  819. return c;
  820. }
  821. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  822. {
  823. int i;
  824. i = c - h->cmd_pool;
  825. clear_bit(i & (BITS_PER_LONG - 1),
  826. h->cmd_pool_bits + (i / BITS_PER_LONG));
  827. h->nr_frees++;
  828. }
  829. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  830. {
  831. u64bit temp64;
  832. temp64.val32.lower = c->ErrDesc.Addr.lower;
  833. temp64.val32.upper = c->ErrDesc.Addr.upper;
  834. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  835. c->err_info, (dma_addr_t) temp64.val);
  836. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  837. c, (dma_addr_t) c->busaddr);
  838. }
  839. static inline ctlr_info_t *get_host(struct gendisk *disk)
  840. {
  841. return disk->queue->queuedata;
  842. }
  843. static inline drive_info_struct *get_drv(struct gendisk *disk)
  844. {
  845. return disk->private_data;
  846. }
  847. /*
  848. * Open. Make sure the device is really there.
  849. */
  850. static int cciss_open(struct block_device *bdev, fmode_t mode)
  851. {
  852. ctlr_info_t *h = get_host(bdev->bd_disk);
  853. drive_info_struct *drv = get_drv(bdev->bd_disk);
  854. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  855. if (drv->busy_configuring)
  856. return -EBUSY;
  857. /*
  858. * Root is allowed to open raw volume zero even if it's not configured
  859. * so array config can still work. Root is also allowed to open any
  860. * volume that has a LUN ID, so it can issue IOCTL to reread the
  861. * disk information. I don't think I really like this
  862. * but I'm already using way to many device nodes to claim another one
  863. * for "raw controller".
  864. */
  865. if (drv->heads == 0) {
  866. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  867. /* if not node 0 make sure it is a partition = 0 */
  868. if (MINOR(bdev->bd_dev) & 0x0f) {
  869. return -ENXIO;
  870. /* if it is, make sure we have a LUN ID */
  871. } else if (memcmp(drv->LunID, CTLR_LUNID,
  872. sizeof(drv->LunID))) {
  873. return -ENXIO;
  874. }
  875. }
  876. if (!capable(CAP_SYS_ADMIN))
  877. return -EPERM;
  878. }
  879. drv->usage_count++;
  880. h->usage_count++;
  881. return 0;
  882. }
  883. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  884. {
  885. int ret;
  886. mutex_lock(&cciss_mutex);
  887. ret = cciss_open(bdev, mode);
  888. mutex_unlock(&cciss_mutex);
  889. return ret;
  890. }
  891. /*
  892. * Close. Sync first.
  893. */
  894. static int cciss_release(struct gendisk *disk, fmode_t mode)
  895. {
  896. ctlr_info_t *h;
  897. drive_info_struct *drv;
  898. mutex_lock(&cciss_mutex);
  899. h = get_host(disk);
  900. drv = get_drv(disk);
  901. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  902. drv->usage_count--;
  903. h->usage_count--;
  904. mutex_unlock(&cciss_mutex);
  905. return 0;
  906. }
  907. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  908. unsigned cmd, unsigned long arg)
  909. {
  910. int ret;
  911. mutex_lock(&cciss_mutex);
  912. ret = cciss_ioctl(bdev, mode, cmd, arg);
  913. mutex_unlock(&cciss_mutex);
  914. return ret;
  915. }
  916. #ifdef CONFIG_COMPAT
  917. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  918. unsigned cmd, unsigned long arg);
  919. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  920. unsigned cmd, unsigned long arg);
  921. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  922. unsigned cmd, unsigned long arg)
  923. {
  924. switch (cmd) {
  925. case CCISS_GETPCIINFO:
  926. case CCISS_GETINTINFO:
  927. case CCISS_SETINTINFO:
  928. case CCISS_GETNODENAME:
  929. case CCISS_SETNODENAME:
  930. case CCISS_GETHEARTBEAT:
  931. case CCISS_GETBUSTYPES:
  932. case CCISS_GETFIRMVER:
  933. case CCISS_GETDRIVVER:
  934. case CCISS_REVALIDVOLS:
  935. case CCISS_DEREGDISK:
  936. case CCISS_REGNEWDISK:
  937. case CCISS_REGNEWD:
  938. case CCISS_RESCANDISK:
  939. case CCISS_GETLUNINFO:
  940. return do_ioctl(bdev, mode, cmd, arg);
  941. case CCISS_PASSTHRU32:
  942. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  943. case CCISS_BIG_PASSTHRU32:
  944. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  945. default:
  946. return -ENOIOCTLCMD;
  947. }
  948. }
  949. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  950. unsigned cmd, unsigned long arg)
  951. {
  952. IOCTL32_Command_struct __user *arg32 =
  953. (IOCTL32_Command_struct __user *) arg;
  954. IOCTL_Command_struct arg64;
  955. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  956. int err;
  957. u32 cp;
  958. err = 0;
  959. err |=
  960. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  961. sizeof(arg64.LUN_info));
  962. err |=
  963. copy_from_user(&arg64.Request, &arg32->Request,
  964. sizeof(arg64.Request));
  965. err |=
  966. copy_from_user(&arg64.error_info, &arg32->error_info,
  967. sizeof(arg64.error_info));
  968. err |= get_user(arg64.buf_size, &arg32->buf_size);
  969. err |= get_user(cp, &arg32->buf);
  970. arg64.buf = compat_ptr(cp);
  971. err |= copy_to_user(p, &arg64, sizeof(arg64));
  972. if (err)
  973. return -EFAULT;
  974. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  975. if (err)
  976. return err;
  977. err |=
  978. copy_in_user(&arg32->error_info, &p->error_info,
  979. sizeof(arg32->error_info));
  980. if (err)
  981. return -EFAULT;
  982. return err;
  983. }
  984. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  985. unsigned cmd, unsigned long arg)
  986. {
  987. BIG_IOCTL32_Command_struct __user *arg32 =
  988. (BIG_IOCTL32_Command_struct __user *) arg;
  989. BIG_IOCTL_Command_struct arg64;
  990. BIG_IOCTL_Command_struct __user *p =
  991. compat_alloc_user_space(sizeof(arg64));
  992. int err;
  993. u32 cp;
  994. err = 0;
  995. err |=
  996. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  997. sizeof(arg64.LUN_info));
  998. err |=
  999. copy_from_user(&arg64.Request, &arg32->Request,
  1000. sizeof(arg64.Request));
  1001. err |=
  1002. copy_from_user(&arg64.error_info, &arg32->error_info,
  1003. sizeof(arg64.error_info));
  1004. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1005. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1006. err |= get_user(cp, &arg32->buf);
  1007. arg64.buf = compat_ptr(cp);
  1008. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1009. if (err)
  1010. return -EFAULT;
  1011. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1012. if (err)
  1013. return err;
  1014. err |=
  1015. copy_in_user(&arg32->error_info, &p->error_info,
  1016. sizeof(arg32->error_info));
  1017. if (err)
  1018. return -EFAULT;
  1019. return err;
  1020. }
  1021. #endif
  1022. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1023. {
  1024. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1025. if (!drv->cylinders)
  1026. return -ENXIO;
  1027. geo->heads = drv->heads;
  1028. geo->sectors = drv->sectors;
  1029. geo->cylinders = drv->cylinders;
  1030. return 0;
  1031. }
  1032. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1033. {
  1034. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1035. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1036. (void)check_for_unit_attention(h, c);
  1037. }
  1038. static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
  1039. {
  1040. cciss_pci_info_struct pciinfo;
  1041. if (!argp)
  1042. return -EINVAL;
  1043. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1044. pciinfo.bus = h->pdev->bus->number;
  1045. pciinfo.dev_fn = h->pdev->devfn;
  1046. pciinfo.board_id = h->board_id;
  1047. if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1048. return -EFAULT;
  1049. return 0;
  1050. }
  1051. static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
  1052. {
  1053. cciss_coalint_struct intinfo;
  1054. if (!argp)
  1055. return -EINVAL;
  1056. intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1057. intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
  1058. if (copy_to_user
  1059. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1060. return -EFAULT;
  1061. return 0;
  1062. }
  1063. static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
  1064. {
  1065. cciss_coalint_struct intinfo;
  1066. unsigned long flags;
  1067. int i;
  1068. if (!argp)
  1069. return -EINVAL;
  1070. if (!capable(CAP_SYS_ADMIN))
  1071. return -EPERM;
  1072. if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
  1073. return -EFAULT;
  1074. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1075. return -EINVAL;
  1076. spin_lock_irqsave(&h->lock, flags);
  1077. /* Update the field, and then ring the doorbell */
  1078. writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
  1079. writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
  1080. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1081. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1082. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1083. break;
  1084. udelay(1000); /* delay and try again */
  1085. }
  1086. spin_unlock_irqrestore(&h->lock, flags);
  1087. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1088. return -EAGAIN;
  1089. return 0;
  1090. }
  1091. static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
  1092. {
  1093. NodeName_type NodeName;
  1094. int i;
  1095. if (!argp)
  1096. return -EINVAL;
  1097. for (i = 0; i < 16; i++)
  1098. NodeName[i] = readb(&h->cfgtable->ServerName[i]);
  1099. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1100. return -EFAULT;
  1101. return 0;
  1102. }
  1103. static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
  1104. {
  1105. NodeName_type NodeName;
  1106. unsigned long flags;
  1107. int i;
  1108. if (!argp)
  1109. return -EINVAL;
  1110. if (!capable(CAP_SYS_ADMIN))
  1111. return -EPERM;
  1112. if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
  1113. return -EFAULT;
  1114. spin_lock_irqsave(&h->lock, flags);
  1115. /* Update the field, and then ring the doorbell */
  1116. for (i = 0; i < 16; i++)
  1117. writeb(NodeName[i], &h->cfgtable->ServerName[i]);
  1118. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1119. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1120. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1121. break;
  1122. udelay(1000); /* delay and try again */
  1123. }
  1124. spin_unlock_irqrestore(&h->lock, flags);
  1125. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1126. return -EAGAIN;
  1127. return 0;
  1128. }
  1129. static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
  1130. {
  1131. Heartbeat_type heartbeat;
  1132. if (!argp)
  1133. return -EINVAL;
  1134. heartbeat = readl(&h->cfgtable->HeartBeat);
  1135. if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
  1136. return -EFAULT;
  1137. return 0;
  1138. }
  1139. static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
  1140. {
  1141. BusTypes_type BusTypes;
  1142. if (!argp)
  1143. return -EINVAL;
  1144. BusTypes = readl(&h->cfgtable->BusTypes);
  1145. if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
  1146. return -EFAULT;
  1147. return 0;
  1148. }
  1149. static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
  1150. {
  1151. FirmwareVer_type firmware;
  1152. if (!argp)
  1153. return -EINVAL;
  1154. memcpy(firmware, h->firm_ver, 4);
  1155. if (copy_to_user
  1156. (argp, firmware, sizeof(FirmwareVer_type)))
  1157. return -EFAULT;
  1158. return 0;
  1159. }
  1160. static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
  1161. {
  1162. DriverVer_type DriverVer = DRIVER_VERSION;
  1163. if (!argp)
  1164. return -EINVAL;
  1165. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  1166. return -EFAULT;
  1167. return 0;
  1168. }
  1169. static int cciss_getluninfo(ctlr_info_t *h,
  1170. struct gendisk *disk, void __user *argp)
  1171. {
  1172. LogvolInfo_struct luninfo;
  1173. drive_info_struct *drv = get_drv(disk);
  1174. if (!argp)
  1175. return -EINVAL;
  1176. memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
  1177. luninfo.num_opens = drv->usage_count;
  1178. luninfo.num_parts = 0;
  1179. if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
  1180. return -EFAULT;
  1181. return 0;
  1182. }
  1183. static int cciss_passthru(ctlr_info_t *h, void __user *argp)
  1184. {
  1185. IOCTL_Command_struct iocommand;
  1186. CommandList_struct *c;
  1187. char *buff = NULL;
  1188. u64bit temp64;
  1189. DECLARE_COMPLETION_ONSTACK(wait);
  1190. if (!argp)
  1191. return -EINVAL;
  1192. if (!capable(CAP_SYS_RAWIO))
  1193. return -EPERM;
  1194. if (copy_from_user
  1195. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1196. return -EFAULT;
  1197. if ((iocommand.buf_size < 1) &&
  1198. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1199. return -EINVAL;
  1200. }
  1201. if (iocommand.buf_size > 0) {
  1202. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1203. if (buff == NULL)
  1204. return -EFAULT;
  1205. }
  1206. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1207. /* Copy the data into the buffer we created */
  1208. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  1209. kfree(buff);
  1210. return -EFAULT;
  1211. }
  1212. } else {
  1213. memset(buff, 0, iocommand.buf_size);
  1214. }
  1215. c = cmd_special_alloc(h);
  1216. if (!c) {
  1217. kfree(buff);
  1218. return -ENOMEM;
  1219. }
  1220. /* Fill in the command type */
  1221. c->cmd_type = CMD_IOCTL_PEND;
  1222. /* Fill in Command Header */
  1223. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1224. if (iocommand.buf_size > 0) { /* buffer to fill */
  1225. c->Header.SGList = 1;
  1226. c->Header.SGTotal = 1;
  1227. } else { /* no buffers to fill */
  1228. c->Header.SGList = 0;
  1229. c->Header.SGTotal = 0;
  1230. }
  1231. c->Header.LUN = iocommand.LUN_info;
  1232. /* use the kernel address the cmd block for tag */
  1233. c->Header.Tag.lower = c->busaddr;
  1234. /* Fill in Request block */
  1235. c->Request = iocommand.Request;
  1236. /* Fill in the scatter gather information */
  1237. if (iocommand.buf_size > 0) {
  1238. temp64.val = pci_map_single(h->pdev, buff,
  1239. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  1240. c->SG[0].Addr.lower = temp64.val32.lower;
  1241. c->SG[0].Addr.upper = temp64.val32.upper;
  1242. c->SG[0].Len = iocommand.buf_size;
  1243. c->SG[0].Ext = 0; /* we are not chaining */
  1244. }
  1245. c->waiting = &wait;
  1246. enqueue_cmd_and_start_io(h, c);
  1247. wait_for_completion(&wait);
  1248. /* unlock the buffers from DMA */
  1249. temp64.val32.lower = c->SG[0].Addr.lower;
  1250. temp64.val32.upper = c->SG[0].Addr.upper;
  1251. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
  1252. PCI_DMA_BIDIRECTIONAL);
  1253. check_ioctl_unit_attention(h, c);
  1254. /* Copy the error information out */
  1255. iocommand.error_info = *(c->err_info);
  1256. if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1257. kfree(buff);
  1258. cmd_special_free(h, c);
  1259. return -EFAULT;
  1260. }
  1261. if (iocommand.Request.Type.Direction == XFER_READ) {
  1262. /* Copy the data out of the buffer we created */
  1263. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  1264. kfree(buff);
  1265. cmd_special_free(h, c);
  1266. return -EFAULT;
  1267. }
  1268. }
  1269. kfree(buff);
  1270. cmd_special_free(h, c);
  1271. return 0;
  1272. }
  1273. static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
  1274. {
  1275. BIG_IOCTL_Command_struct *ioc;
  1276. CommandList_struct *c;
  1277. unsigned char **buff = NULL;
  1278. int *buff_size = NULL;
  1279. u64bit temp64;
  1280. BYTE sg_used = 0;
  1281. int status = 0;
  1282. int i;
  1283. DECLARE_COMPLETION_ONSTACK(wait);
  1284. __u32 left;
  1285. __u32 sz;
  1286. BYTE __user *data_ptr;
  1287. if (!argp)
  1288. return -EINVAL;
  1289. if (!capable(CAP_SYS_RAWIO))
  1290. return -EPERM;
  1291. ioc = (BIG_IOCTL_Command_struct *)
  1292. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1293. if (!ioc) {
  1294. status = -ENOMEM;
  1295. goto cleanup1;
  1296. }
  1297. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1298. status = -EFAULT;
  1299. goto cleanup1;
  1300. }
  1301. if ((ioc->buf_size < 1) &&
  1302. (ioc->Request.Type.Direction != XFER_NONE)) {
  1303. status = -EINVAL;
  1304. goto cleanup1;
  1305. }
  1306. /* Check kmalloc limits using all SGs */
  1307. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1308. status = -EINVAL;
  1309. goto cleanup1;
  1310. }
  1311. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1312. status = -EINVAL;
  1313. goto cleanup1;
  1314. }
  1315. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1316. if (!buff) {
  1317. status = -ENOMEM;
  1318. goto cleanup1;
  1319. }
  1320. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  1321. if (!buff_size) {
  1322. status = -ENOMEM;
  1323. goto cleanup1;
  1324. }
  1325. left = ioc->buf_size;
  1326. data_ptr = ioc->buf;
  1327. while (left) {
  1328. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  1329. buff_size[sg_used] = sz;
  1330. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1331. if (buff[sg_used] == NULL) {
  1332. status = -ENOMEM;
  1333. goto cleanup1;
  1334. }
  1335. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1336. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  1337. status = -EFAULT;
  1338. goto cleanup1;
  1339. }
  1340. } else {
  1341. memset(buff[sg_used], 0, sz);
  1342. }
  1343. left -= sz;
  1344. data_ptr += sz;
  1345. sg_used++;
  1346. }
  1347. c = cmd_special_alloc(h);
  1348. if (!c) {
  1349. status = -ENOMEM;
  1350. goto cleanup1;
  1351. }
  1352. c->cmd_type = CMD_IOCTL_PEND;
  1353. c->Header.ReplyQueue = 0;
  1354. c->Header.SGList = sg_used;
  1355. c->Header.SGTotal = sg_used;
  1356. c->Header.LUN = ioc->LUN_info;
  1357. c->Header.Tag.lower = c->busaddr;
  1358. c->Request = ioc->Request;
  1359. for (i = 0; i < sg_used; i++) {
  1360. temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
  1361. PCI_DMA_BIDIRECTIONAL);
  1362. c->SG[i].Addr.lower = temp64.val32.lower;
  1363. c->SG[i].Addr.upper = temp64.val32.upper;
  1364. c->SG[i].Len = buff_size[i];
  1365. c->SG[i].Ext = 0; /* we are not chaining */
  1366. }
  1367. c->waiting = &wait;
  1368. enqueue_cmd_and_start_io(h, c);
  1369. wait_for_completion(&wait);
  1370. /* unlock the buffers from DMA */
  1371. for (i = 0; i < sg_used; i++) {
  1372. temp64.val32.lower = c->SG[i].Addr.lower;
  1373. temp64.val32.upper = c->SG[i].Addr.upper;
  1374. pci_unmap_single(h->pdev,
  1375. (dma_addr_t) temp64.val, buff_size[i],
  1376. PCI_DMA_BIDIRECTIONAL);
  1377. }
  1378. check_ioctl_unit_attention(h, c);
  1379. /* Copy the error information out */
  1380. ioc->error_info = *(c->err_info);
  1381. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1382. cmd_special_free(h, c);
  1383. status = -EFAULT;
  1384. goto cleanup1;
  1385. }
  1386. if (ioc->Request.Type.Direction == XFER_READ) {
  1387. /* Copy the data out of the buffer we created */
  1388. BYTE __user *ptr = ioc->buf;
  1389. for (i = 0; i < sg_used; i++) {
  1390. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  1391. cmd_special_free(h, c);
  1392. status = -EFAULT;
  1393. goto cleanup1;
  1394. }
  1395. ptr += buff_size[i];
  1396. }
  1397. }
  1398. cmd_special_free(h, c);
  1399. status = 0;
  1400. cleanup1:
  1401. if (buff) {
  1402. for (i = 0; i < sg_used; i++)
  1403. kfree(buff[i]);
  1404. kfree(buff);
  1405. }
  1406. kfree(buff_size);
  1407. kfree(ioc);
  1408. return status;
  1409. }
  1410. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1411. unsigned int cmd, unsigned long arg)
  1412. {
  1413. struct gendisk *disk = bdev->bd_disk;
  1414. ctlr_info_t *h = get_host(disk);
  1415. void __user *argp = (void __user *)arg;
  1416. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1417. cmd, arg);
  1418. switch (cmd) {
  1419. case CCISS_GETPCIINFO:
  1420. return cciss_getpciinfo(h, argp);
  1421. case CCISS_GETINTINFO:
  1422. return cciss_getintinfo(h, argp);
  1423. case CCISS_SETINTINFO:
  1424. return cciss_setintinfo(h, argp);
  1425. case CCISS_GETNODENAME:
  1426. return cciss_getnodename(h, argp);
  1427. case CCISS_SETNODENAME:
  1428. return cciss_setnodename(h, argp);
  1429. case CCISS_GETHEARTBEAT:
  1430. return cciss_getheartbeat(h, argp);
  1431. case CCISS_GETBUSTYPES:
  1432. return cciss_getbustypes(h, argp);
  1433. case CCISS_GETFIRMVER:
  1434. return cciss_getfirmver(h, argp);
  1435. case CCISS_GETDRIVVER:
  1436. return cciss_getdrivver(h, argp);
  1437. case CCISS_DEREGDISK:
  1438. case CCISS_REGNEWD:
  1439. case CCISS_REVALIDVOLS:
  1440. return rebuild_lun_table(h, 0, 1);
  1441. case CCISS_GETLUNINFO:
  1442. return cciss_getluninfo(h, disk, argp);
  1443. case CCISS_PASSTHRU:
  1444. return cciss_passthru(h, argp);
  1445. case CCISS_BIG_PASSTHRU:
  1446. return cciss_bigpassthru(h, argp);
  1447. /* scsi_cmd_ioctl handles these, below, though some are not */
  1448. /* very meaningful for cciss. SG_IO is the main one people want. */
  1449. case SG_GET_VERSION_NUM:
  1450. case SG_SET_TIMEOUT:
  1451. case SG_GET_TIMEOUT:
  1452. case SG_GET_RESERVED_SIZE:
  1453. case SG_SET_RESERVED_SIZE:
  1454. case SG_EMULATED_HOST:
  1455. case SG_IO:
  1456. case SCSI_IOCTL_SEND_COMMAND:
  1457. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1458. /* scsi_cmd_ioctl would normally handle these, below, but */
  1459. /* they aren't a good fit for cciss, as CD-ROMs are */
  1460. /* not supported, and we don't have any bus/target/lun */
  1461. /* which we present to the kernel. */
  1462. case CDROM_SEND_PACKET:
  1463. case CDROMCLOSETRAY:
  1464. case CDROMEJECT:
  1465. case SCSI_IOCTL_GET_IDLUN:
  1466. case SCSI_IOCTL_GET_BUS_NUMBER:
  1467. default:
  1468. return -ENOTTY;
  1469. }
  1470. }
  1471. static void cciss_check_queues(ctlr_info_t *h)
  1472. {
  1473. int start_queue = h->next_to_run;
  1474. int i;
  1475. /* check to see if we have maxed out the number of commands that can
  1476. * be placed on the queue. If so then exit. We do this check here
  1477. * in case the interrupt we serviced was from an ioctl and did not
  1478. * free any new commands.
  1479. */
  1480. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1481. return;
  1482. /* We have room on the queue for more commands. Now we need to queue
  1483. * them up. We will also keep track of the next queue to run so
  1484. * that every queue gets a chance to be started first.
  1485. */
  1486. for (i = 0; i < h->highest_lun + 1; i++) {
  1487. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1488. /* make sure the disk has been added and the drive is real
  1489. * because this can be called from the middle of init_one.
  1490. */
  1491. if (!h->drv[curr_queue])
  1492. continue;
  1493. if (!(h->drv[curr_queue]->queue) ||
  1494. !(h->drv[curr_queue]->heads))
  1495. continue;
  1496. blk_start_queue(h->gendisk[curr_queue]->queue);
  1497. /* check to see if we have maxed out the number of commands
  1498. * that can be placed on the queue.
  1499. */
  1500. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1501. if (curr_queue == start_queue) {
  1502. h->next_to_run =
  1503. (start_queue + 1) % (h->highest_lun + 1);
  1504. break;
  1505. } else {
  1506. h->next_to_run = curr_queue;
  1507. break;
  1508. }
  1509. }
  1510. }
  1511. }
  1512. static void cciss_softirq_done(struct request *rq)
  1513. {
  1514. CommandList_struct *c = rq->completion_data;
  1515. ctlr_info_t *h = hba[c->ctlr];
  1516. SGDescriptor_struct *curr_sg = c->SG;
  1517. u64bit temp64;
  1518. unsigned long flags;
  1519. int i, ddir;
  1520. int sg_index = 0;
  1521. if (c->Request.Type.Direction == XFER_READ)
  1522. ddir = PCI_DMA_FROMDEVICE;
  1523. else
  1524. ddir = PCI_DMA_TODEVICE;
  1525. /* command did not need to be retried */
  1526. /* unmap the DMA mapping for all the scatter gather elements */
  1527. for (i = 0; i < c->Header.SGList; i++) {
  1528. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1529. cciss_unmap_sg_chain_block(h, c);
  1530. /* Point to the next block */
  1531. curr_sg = h->cmd_sg_list[c->cmdindex];
  1532. sg_index = 0;
  1533. }
  1534. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1535. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1536. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1537. ddir);
  1538. ++sg_index;
  1539. }
  1540. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1541. /* set the residual count for pc requests */
  1542. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1543. rq->resid_len = c->err_info->ResidualCnt;
  1544. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1545. spin_lock_irqsave(&h->lock, flags);
  1546. cmd_free(h, c);
  1547. cciss_check_queues(h);
  1548. spin_unlock_irqrestore(&h->lock, flags);
  1549. }
  1550. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1551. unsigned char scsi3addr[], uint32_t log_unit)
  1552. {
  1553. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1554. sizeof(h->drv[log_unit]->LunID));
  1555. }
  1556. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1557. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1558. * they cannot be read.
  1559. */
  1560. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1561. char *vendor, char *model, char *rev)
  1562. {
  1563. int rc;
  1564. InquiryData_struct *inq_buf;
  1565. unsigned char scsi3addr[8];
  1566. *vendor = '\0';
  1567. *model = '\0';
  1568. *rev = '\0';
  1569. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1570. if (!inq_buf)
  1571. return;
  1572. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1573. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1574. scsi3addr, TYPE_CMD);
  1575. if (rc == IO_OK) {
  1576. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1577. vendor[VENDOR_LEN] = '\0';
  1578. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1579. model[MODEL_LEN] = '\0';
  1580. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1581. rev[REV_LEN] = '\0';
  1582. }
  1583. kfree(inq_buf);
  1584. return;
  1585. }
  1586. /* This function gets the serial number of a logical drive via
  1587. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1588. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1589. * are returned instead.
  1590. */
  1591. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1592. unsigned char *serial_no, int buflen)
  1593. {
  1594. #define PAGE_83_INQ_BYTES 64
  1595. int rc;
  1596. unsigned char *buf;
  1597. unsigned char scsi3addr[8];
  1598. if (buflen > 16)
  1599. buflen = 16;
  1600. memset(serial_no, 0xff, buflen);
  1601. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1602. if (!buf)
  1603. return;
  1604. memset(serial_no, 0, buflen);
  1605. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1606. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1607. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1608. if (rc == IO_OK)
  1609. memcpy(serial_no, &buf[8], buflen);
  1610. kfree(buf);
  1611. return;
  1612. }
  1613. /*
  1614. * cciss_add_disk sets up the block device queue for a logical drive
  1615. */
  1616. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1617. int drv_index)
  1618. {
  1619. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1620. if (!disk->queue)
  1621. goto init_queue_failure;
  1622. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1623. disk->major = h->major;
  1624. disk->first_minor = drv_index << NWD_SHIFT;
  1625. disk->fops = &cciss_fops;
  1626. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1627. goto cleanup_queue;
  1628. disk->private_data = h->drv[drv_index];
  1629. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1630. /* Set up queue information */
  1631. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1632. /* This is a hardware imposed limit. */
  1633. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1634. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1635. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1636. disk->queue->queuedata = h;
  1637. blk_queue_logical_block_size(disk->queue,
  1638. h->drv[drv_index]->block_size);
  1639. /* Make sure all queue data is written out before */
  1640. /* setting h->drv[drv_index]->queue, as setting this */
  1641. /* allows the interrupt handler to start the queue */
  1642. wmb();
  1643. h->drv[drv_index]->queue = disk->queue;
  1644. add_disk(disk);
  1645. return 0;
  1646. cleanup_queue:
  1647. blk_cleanup_queue(disk->queue);
  1648. disk->queue = NULL;
  1649. init_queue_failure:
  1650. return -1;
  1651. }
  1652. /* This function will check the usage_count of the drive to be updated/added.
  1653. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1654. * the drive's capacity, geometry, or serial number has changed,
  1655. * then the drive information will be updated and the disk will be
  1656. * re-registered with the kernel. If these conditions don't hold,
  1657. * then it will be left alone for the next reboot. The exception to this
  1658. * is disk 0 which will always be left registered with the kernel since it
  1659. * is also the controller node. Any changes to disk 0 will show up on
  1660. * the next reboot.
  1661. */
  1662. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1663. int first_time, int via_ioctl)
  1664. {
  1665. struct gendisk *disk;
  1666. InquiryData_struct *inq_buff = NULL;
  1667. unsigned int block_size;
  1668. sector_t total_size;
  1669. unsigned long flags = 0;
  1670. int ret = 0;
  1671. drive_info_struct *drvinfo;
  1672. /* Get information about the disk and modify the driver structure */
  1673. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1674. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1675. if (inq_buff == NULL || drvinfo == NULL)
  1676. goto mem_msg;
  1677. /* testing to see if 16-byte CDBs are already being used */
  1678. if (h->cciss_read == CCISS_READ_16) {
  1679. cciss_read_capacity_16(h, drv_index,
  1680. &total_size, &block_size);
  1681. } else {
  1682. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1683. /* if read_capacity returns all F's this volume is >2TB */
  1684. /* in size so we switch to 16-byte CDB's for all */
  1685. /* read/write ops */
  1686. if (total_size == 0xFFFFFFFFULL) {
  1687. cciss_read_capacity_16(h, drv_index,
  1688. &total_size, &block_size);
  1689. h->cciss_read = CCISS_READ_16;
  1690. h->cciss_write = CCISS_WRITE_16;
  1691. } else {
  1692. h->cciss_read = CCISS_READ_10;
  1693. h->cciss_write = CCISS_WRITE_10;
  1694. }
  1695. }
  1696. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1697. inq_buff, drvinfo);
  1698. drvinfo->block_size = block_size;
  1699. drvinfo->nr_blocks = total_size + 1;
  1700. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1701. drvinfo->model, drvinfo->rev);
  1702. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1703. sizeof(drvinfo->serial_no));
  1704. /* Save the lunid in case we deregister the disk, below. */
  1705. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1706. sizeof(drvinfo->LunID));
  1707. /* Is it the same disk we already know, and nothing's changed? */
  1708. if (h->drv[drv_index]->raid_level != -1 &&
  1709. ((memcmp(drvinfo->serial_no,
  1710. h->drv[drv_index]->serial_no, 16) == 0) &&
  1711. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1712. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1713. drvinfo->heads == h->drv[drv_index]->heads &&
  1714. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1715. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1716. /* The disk is unchanged, nothing to update */
  1717. goto freeret;
  1718. /* If we get here it's not the same disk, or something's changed,
  1719. * so we need to * deregister it, and re-register it, if it's not
  1720. * in use.
  1721. * If the disk already exists then deregister it before proceeding
  1722. * (unless it's the first disk (for the controller node).
  1723. */
  1724. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1725. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1726. spin_lock_irqsave(&h->lock, flags);
  1727. h->drv[drv_index]->busy_configuring = 1;
  1728. spin_unlock_irqrestore(&h->lock, flags);
  1729. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1730. * which keeps the interrupt handler from starting
  1731. * the queue.
  1732. */
  1733. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1734. }
  1735. /* If the disk is in use return */
  1736. if (ret)
  1737. goto freeret;
  1738. /* Save the new information from cciss_geometry_inquiry
  1739. * and serial number inquiry. If the disk was deregistered
  1740. * above, then h->drv[drv_index] will be NULL.
  1741. */
  1742. if (h->drv[drv_index] == NULL) {
  1743. drvinfo->device_initialized = 0;
  1744. h->drv[drv_index] = drvinfo;
  1745. drvinfo = NULL; /* so it won't be freed below. */
  1746. } else {
  1747. /* special case for cxd0 */
  1748. h->drv[drv_index]->block_size = drvinfo->block_size;
  1749. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1750. h->drv[drv_index]->heads = drvinfo->heads;
  1751. h->drv[drv_index]->sectors = drvinfo->sectors;
  1752. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1753. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1754. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1755. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1756. VENDOR_LEN + 1);
  1757. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1758. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1759. }
  1760. ++h->num_luns;
  1761. disk = h->gendisk[drv_index];
  1762. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1763. /* If it's not disk 0 (drv_index != 0)
  1764. * or if it was disk 0, but there was previously
  1765. * no actual corresponding configured logical drive
  1766. * (raid_leve == -1) then we want to update the
  1767. * logical drive's information.
  1768. */
  1769. if (drv_index || first_time) {
  1770. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1771. cciss_free_gendisk(h, drv_index);
  1772. cciss_free_drive_info(h, drv_index);
  1773. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1774. drv_index);
  1775. --h->num_luns;
  1776. }
  1777. }
  1778. freeret:
  1779. kfree(inq_buff);
  1780. kfree(drvinfo);
  1781. return;
  1782. mem_msg:
  1783. dev_err(&h->pdev->dev, "out of memory\n");
  1784. goto freeret;
  1785. }
  1786. /* This function will find the first index of the controllers drive array
  1787. * that has a null drv pointer and allocate the drive info struct and
  1788. * will return that index This is where new drives will be added.
  1789. * If the index to be returned is greater than the highest_lun index for
  1790. * the controller then highest_lun is set * to this new index.
  1791. * If there are no available indexes or if tha allocation fails, then -1
  1792. * is returned. * "controller_node" is used to know if this is a real
  1793. * logical drive, or just the controller node, which determines if this
  1794. * counts towards highest_lun.
  1795. */
  1796. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1797. {
  1798. int i;
  1799. drive_info_struct *drv;
  1800. /* Search for an empty slot for our drive info */
  1801. for (i = 0; i < CISS_MAX_LUN; i++) {
  1802. /* if not cxd0 case, and it's occupied, skip it. */
  1803. if (h->drv[i] && i != 0)
  1804. continue;
  1805. /*
  1806. * If it's cxd0 case, and drv is alloc'ed already, and a
  1807. * disk is configured there, skip it.
  1808. */
  1809. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1810. continue;
  1811. /*
  1812. * We've found an empty slot. Update highest_lun
  1813. * provided this isn't just the fake cxd0 controller node.
  1814. */
  1815. if (i > h->highest_lun && !controller_node)
  1816. h->highest_lun = i;
  1817. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1818. if (i == 0 && h->drv[i] != NULL)
  1819. return i;
  1820. /*
  1821. * Found an empty slot, not already alloc'ed. Allocate it.
  1822. * Mark it with raid_level == -1, so we know it's new later on.
  1823. */
  1824. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1825. if (!drv)
  1826. return -1;
  1827. drv->raid_level = -1; /* so we know it's new */
  1828. h->drv[i] = drv;
  1829. return i;
  1830. }
  1831. return -1;
  1832. }
  1833. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1834. {
  1835. kfree(h->drv[drv_index]);
  1836. h->drv[drv_index] = NULL;
  1837. }
  1838. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1839. {
  1840. put_disk(h->gendisk[drv_index]);
  1841. h->gendisk[drv_index] = NULL;
  1842. }
  1843. /* cciss_add_gendisk finds a free hba[]->drv structure
  1844. * and allocates a gendisk if needed, and sets the lunid
  1845. * in the drvinfo structure. It returns the index into
  1846. * the ->drv[] array, or -1 if none are free.
  1847. * is_controller_node indicates whether highest_lun should
  1848. * count this disk, or if it's only being added to provide
  1849. * a means to talk to the controller in case no logical
  1850. * drives have yet been configured.
  1851. */
  1852. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1853. int controller_node)
  1854. {
  1855. int drv_index;
  1856. drv_index = cciss_alloc_drive_info(h, controller_node);
  1857. if (drv_index == -1)
  1858. return -1;
  1859. /*Check if the gendisk needs to be allocated */
  1860. if (!h->gendisk[drv_index]) {
  1861. h->gendisk[drv_index] =
  1862. alloc_disk(1 << NWD_SHIFT);
  1863. if (!h->gendisk[drv_index]) {
  1864. dev_err(&h->pdev->dev,
  1865. "could not allocate a new disk %d\n",
  1866. drv_index);
  1867. goto err_free_drive_info;
  1868. }
  1869. }
  1870. memcpy(h->drv[drv_index]->LunID, lunid,
  1871. sizeof(h->drv[drv_index]->LunID));
  1872. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1873. goto err_free_disk;
  1874. /* Don't need to mark this busy because nobody */
  1875. /* else knows about this disk yet to contend */
  1876. /* for access to it. */
  1877. h->drv[drv_index]->busy_configuring = 0;
  1878. wmb();
  1879. return drv_index;
  1880. err_free_disk:
  1881. cciss_free_gendisk(h, drv_index);
  1882. err_free_drive_info:
  1883. cciss_free_drive_info(h, drv_index);
  1884. return -1;
  1885. }
  1886. /* This is for the special case of a controller which
  1887. * has no logical drives. In this case, we still need
  1888. * to register a disk so the controller can be accessed
  1889. * by the Array Config Utility.
  1890. */
  1891. static void cciss_add_controller_node(ctlr_info_t *h)
  1892. {
  1893. struct gendisk *disk;
  1894. int drv_index;
  1895. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1896. return;
  1897. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1898. if (drv_index == -1)
  1899. goto error;
  1900. h->drv[drv_index]->block_size = 512;
  1901. h->drv[drv_index]->nr_blocks = 0;
  1902. h->drv[drv_index]->heads = 0;
  1903. h->drv[drv_index]->sectors = 0;
  1904. h->drv[drv_index]->cylinders = 0;
  1905. h->drv[drv_index]->raid_level = -1;
  1906. memset(h->drv[drv_index]->serial_no, 0, 16);
  1907. disk = h->gendisk[drv_index];
  1908. if (cciss_add_disk(h, disk, drv_index) == 0)
  1909. return;
  1910. cciss_free_gendisk(h, drv_index);
  1911. cciss_free_drive_info(h, drv_index);
  1912. error:
  1913. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1914. return;
  1915. }
  1916. /* This function will add and remove logical drives from the Logical
  1917. * drive array of the controller and maintain persistency of ordering
  1918. * so that mount points are preserved until the next reboot. This allows
  1919. * for the removal of logical drives in the middle of the drive array
  1920. * without a re-ordering of those drives.
  1921. * INPUT
  1922. * h = The controller to perform the operations on
  1923. */
  1924. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1925. int via_ioctl)
  1926. {
  1927. int num_luns;
  1928. ReportLunData_struct *ld_buff = NULL;
  1929. int return_code;
  1930. int listlength = 0;
  1931. int i;
  1932. int drv_found;
  1933. int drv_index = 0;
  1934. unsigned char lunid[8] = CTLR_LUNID;
  1935. unsigned long flags;
  1936. if (!capable(CAP_SYS_RAWIO))
  1937. return -EPERM;
  1938. /* Set busy_configuring flag for this operation */
  1939. spin_lock_irqsave(&h->lock, flags);
  1940. if (h->busy_configuring) {
  1941. spin_unlock_irqrestore(&h->lock, flags);
  1942. return -EBUSY;
  1943. }
  1944. h->busy_configuring = 1;
  1945. spin_unlock_irqrestore(&h->lock, flags);
  1946. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1947. if (ld_buff == NULL)
  1948. goto mem_msg;
  1949. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  1950. sizeof(ReportLunData_struct),
  1951. 0, CTLR_LUNID, TYPE_CMD);
  1952. if (return_code == IO_OK)
  1953. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1954. else { /* reading number of logical volumes failed */
  1955. dev_warn(&h->pdev->dev,
  1956. "report logical volume command failed\n");
  1957. listlength = 0;
  1958. goto freeret;
  1959. }
  1960. num_luns = listlength / 8; /* 8 bytes per entry */
  1961. if (num_luns > CISS_MAX_LUN) {
  1962. num_luns = CISS_MAX_LUN;
  1963. dev_warn(&h->pdev->dev, "more luns configured"
  1964. " on controller than can be handled by"
  1965. " this driver.\n");
  1966. }
  1967. if (num_luns == 0)
  1968. cciss_add_controller_node(h);
  1969. /* Compare controller drive array to driver's drive array
  1970. * to see if any drives are missing on the controller due
  1971. * to action of Array Config Utility (user deletes drive)
  1972. * and deregister logical drives which have disappeared.
  1973. */
  1974. for (i = 0; i <= h->highest_lun; i++) {
  1975. int j;
  1976. drv_found = 0;
  1977. /* skip holes in the array from already deleted drives */
  1978. if (h->drv[i] == NULL)
  1979. continue;
  1980. for (j = 0; j < num_luns; j++) {
  1981. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  1982. if (memcmp(h->drv[i]->LunID, lunid,
  1983. sizeof(lunid)) == 0) {
  1984. drv_found = 1;
  1985. break;
  1986. }
  1987. }
  1988. if (!drv_found) {
  1989. /* Deregister it from the OS, it's gone. */
  1990. spin_lock_irqsave(&h->lock, flags);
  1991. h->drv[i]->busy_configuring = 1;
  1992. spin_unlock_irqrestore(&h->lock, flags);
  1993. return_code = deregister_disk(h, i, 1, via_ioctl);
  1994. if (h->drv[i] != NULL)
  1995. h->drv[i]->busy_configuring = 0;
  1996. }
  1997. }
  1998. /* Compare controller drive array to driver's drive array.
  1999. * Check for updates in the drive information and any new drives
  2000. * on the controller due to ACU adding logical drives, or changing
  2001. * a logical drive's size, etc. Reregister any new/changed drives
  2002. */
  2003. for (i = 0; i < num_luns; i++) {
  2004. int j;
  2005. drv_found = 0;
  2006. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2007. /* Find if the LUN is already in the drive array
  2008. * of the driver. If so then update its info
  2009. * if not in use. If it does not exist then find
  2010. * the first free index and add it.
  2011. */
  2012. for (j = 0; j <= h->highest_lun; j++) {
  2013. if (h->drv[j] != NULL &&
  2014. memcmp(h->drv[j]->LunID, lunid,
  2015. sizeof(h->drv[j]->LunID)) == 0) {
  2016. drv_index = j;
  2017. drv_found = 1;
  2018. break;
  2019. }
  2020. }
  2021. /* check if the drive was found already in the array */
  2022. if (!drv_found) {
  2023. drv_index = cciss_add_gendisk(h, lunid, 0);
  2024. if (drv_index == -1)
  2025. goto freeret;
  2026. }
  2027. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2028. } /* end for */
  2029. freeret:
  2030. kfree(ld_buff);
  2031. h->busy_configuring = 0;
  2032. /* We return -1 here to tell the ACU that we have registered/updated
  2033. * all of the drives that we can and to keep it from calling us
  2034. * additional times.
  2035. */
  2036. return -1;
  2037. mem_msg:
  2038. dev_err(&h->pdev->dev, "out of memory\n");
  2039. h->busy_configuring = 0;
  2040. goto freeret;
  2041. }
  2042. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2043. {
  2044. /* zero out the disk size info */
  2045. drive_info->nr_blocks = 0;
  2046. drive_info->block_size = 0;
  2047. drive_info->heads = 0;
  2048. drive_info->sectors = 0;
  2049. drive_info->cylinders = 0;
  2050. drive_info->raid_level = -1;
  2051. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2052. memset(drive_info->model, 0, sizeof(drive_info->model));
  2053. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2054. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2055. /*
  2056. * don't clear the LUNID though, we need to remember which
  2057. * one this one is.
  2058. */
  2059. }
  2060. /* This function will deregister the disk and it's queue from the
  2061. * kernel. It must be called with the controller lock held and the
  2062. * drv structures busy_configuring flag set. It's parameters are:
  2063. *
  2064. * disk = This is the disk to be deregistered
  2065. * drv = This is the drive_info_struct associated with the disk to be
  2066. * deregistered. It contains information about the disk used
  2067. * by the driver.
  2068. * clear_all = This flag determines whether or not the disk information
  2069. * is going to be completely cleared out and the highest_lun
  2070. * reset. Sometimes we want to clear out information about
  2071. * the disk in preparation for re-adding it. In this case
  2072. * the highest_lun should be left unchanged and the LunID
  2073. * should not be cleared.
  2074. * via_ioctl
  2075. * This indicates whether we've reached this path via ioctl.
  2076. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2077. * If this path is reached via ioctl(), then the max_usage_count will
  2078. * be 1, as the process calling ioctl() has got to have the device open.
  2079. * If we get here via sysfs, then the max usage count will be zero.
  2080. */
  2081. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2082. int clear_all, int via_ioctl)
  2083. {
  2084. int i;
  2085. struct gendisk *disk;
  2086. drive_info_struct *drv;
  2087. int recalculate_highest_lun;
  2088. if (!capable(CAP_SYS_RAWIO))
  2089. return -EPERM;
  2090. drv = h->drv[drv_index];
  2091. disk = h->gendisk[drv_index];
  2092. /* make sure logical volume is NOT is use */
  2093. if (clear_all || (h->gendisk[0] == disk)) {
  2094. if (drv->usage_count > via_ioctl)
  2095. return -EBUSY;
  2096. } else if (drv->usage_count > 0)
  2097. return -EBUSY;
  2098. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2099. /* invalidate the devices and deregister the disk. If it is disk
  2100. * zero do not deregister it but just zero out it's values. This
  2101. * allows us to delete disk zero but keep the controller registered.
  2102. */
  2103. if (h->gendisk[0] != disk) {
  2104. struct request_queue *q = disk->queue;
  2105. if (disk->flags & GENHD_FL_UP) {
  2106. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2107. del_gendisk(disk);
  2108. }
  2109. if (q)
  2110. blk_cleanup_queue(q);
  2111. /* If clear_all is set then we are deleting the logical
  2112. * drive, not just refreshing its info. For drives
  2113. * other than disk 0 we will call put_disk. We do not
  2114. * do this for disk 0 as we need it to be able to
  2115. * configure the controller.
  2116. */
  2117. if (clear_all){
  2118. /* This isn't pretty, but we need to find the
  2119. * disk in our array and NULL our the pointer.
  2120. * This is so that we will call alloc_disk if
  2121. * this index is used again later.
  2122. */
  2123. for (i=0; i < CISS_MAX_LUN; i++){
  2124. if (h->gendisk[i] == disk) {
  2125. h->gendisk[i] = NULL;
  2126. break;
  2127. }
  2128. }
  2129. put_disk(disk);
  2130. }
  2131. } else {
  2132. set_capacity(disk, 0);
  2133. cciss_clear_drive_info(drv);
  2134. }
  2135. --h->num_luns;
  2136. /* if it was the last disk, find the new hightest lun */
  2137. if (clear_all && recalculate_highest_lun) {
  2138. int newhighest = -1;
  2139. for (i = 0; i <= h->highest_lun; i++) {
  2140. /* if the disk has size > 0, it is available */
  2141. if (h->drv[i] && h->drv[i]->heads)
  2142. newhighest = i;
  2143. }
  2144. h->highest_lun = newhighest;
  2145. }
  2146. return 0;
  2147. }
  2148. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2149. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2150. int cmd_type)
  2151. {
  2152. u64bit buff_dma_handle;
  2153. int status = IO_OK;
  2154. c->cmd_type = CMD_IOCTL_PEND;
  2155. c->Header.ReplyQueue = 0;
  2156. if (buff != NULL) {
  2157. c->Header.SGList = 1;
  2158. c->Header.SGTotal = 1;
  2159. } else {
  2160. c->Header.SGList = 0;
  2161. c->Header.SGTotal = 0;
  2162. }
  2163. c->Header.Tag.lower = c->busaddr;
  2164. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2165. c->Request.Type.Type = cmd_type;
  2166. if (cmd_type == TYPE_CMD) {
  2167. switch (cmd) {
  2168. case CISS_INQUIRY:
  2169. /* are we trying to read a vital product page */
  2170. if (page_code != 0) {
  2171. c->Request.CDB[1] = 0x01;
  2172. c->Request.CDB[2] = page_code;
  2173. }
  2174. c->Request.CDBLen = 6;
  2175. c->Request.Type.Attribute = ATTR_SIMPLE;
  2176. c->Request.Type.Direction = XFER_READ;
  2177. c->Request.Timeout = 0;
  2178. c->Request.CDB[0] = CISS_INQUIRY;
  2179. c->Request.CDB[4] = size & 0xFF;
  2180. break;
  2181. case CISS_REPORT_LOG:
  2182. case CISS_REPORT_PHYS:
  2183. /* Talking to controller so It's a physical command
  2184. mode = 00 target = 0. Nothing to write.
  2185. */
  2186. c->Request.CDBLen = 12;
  2187. c->Request.Type.Attribute = ATTR_SIMPLE;
  2188. c->Request.Type.Direction = XFER_READ;
  2189. c->Request.Timeout = 0;
  2190. c->Request.CDB[0] = cmd;
  2191. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2192. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2193. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2194. c->Request.CDB[9] = size & 0xFF;
  2195. break;
  2196. case CCISS_READ_CAPACITY:
  2197. c->Request.CDBLen = 10;
  2198. c->Request.Type.Attribute = ATTR_SIMPLE;
  2199. c->Request.Type.Direction = XFER_READ;
  2200. c->Request.Timeout = 0;
  2201. c->Request.CDB[0] = cmd;
  2202. break;
  2203. case CCISS_READ_CAPACITY_16:
  2204. c->Request.CDBLen = 16;
  2205. c->Request.Type.Attribute = ATTR_SIMPLE;
  2206. c->Request.Type.Direction = XFER_READ;
  2207. c->Request.Timeout = 0;
  2208. c->Request.CDB[0] = cmd;
  2209. c->Request.CDB[1] = 0x10;
  2210. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2211. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2212. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2213. c->Request.CDB[13] = size & 0xFF;
  2214. c->Request.Timeout = 0;
  2215. c->Request.CDB[0] = cmd;
  2216. break;
  2217. case CCISS_CACHE_FLUSH:
  2218. c->Request.CDBLen = 12;
  2219. c->Request.Type.Attribute = ATTR_SIMPLE;
  2220. c->Request.Type.Direction = XFER_WRITE;
  2221. c->Request.Timeout = 0;
  2222. c->Request.CDB[0] = BMIC_WRITE;
  2223. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2224. break;
  2225. case TEST_UNIT_READY:
  2226. c->Request.CDBLen = 6;
  2227. c->Request.Type.Attribute = ATTR_SIMPLE;
  2228. c->Request.Type.Direction = XFER_NONE;
  2229. c->Request.Timeout = 0;
  2230. break;
  2231. default:
  2232. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2233. return IO_ERROR;
  2234. }
  2235. } else if (cmd_type == TYPE_MSG) {
  2236. switch (cmd) {
  2237. case 0: /* ABORT message */
  2238. c->Request.CDBLen = 12;
  2239. c->Request.Type.Attribute = ATTR_SIMPLE;
  2240. c->Request.Type.Direction = XFER_WRITE;
  2241. c->Request.Timeout = 0;
  2242. c->Request.CDB[0] = cmd; /* abort */
  2243. c->Request.CDB[1] = 0; /* abort a command */
  2244. /* buff contains the tag of the command to abort */
  2245. memcpy(&c->Request.CDB[4], buff, 8);
  2246. break;
  2247. case 1: /* RESET message */
  2248. c->Request.CDBLen = 16;
  2249. c->Request.Type.Attribute = ATTR_SIMPLE;
  2250. c->Request.Type.Direction = XFER_NONE;
  2251. c->Request.Timeout = 0;
  2252. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2253. c->Request.CDB[0] = cmd; /* reset */
  2254. c->Request.CDB[1] = 0x03; /* reset a target */
  2255. break;
  2256. case 3: /* No-Op message */
  2257. c->Request.CDBLen = 1;
  2258. c->Request.Type.Attribute = ATTR_SIMPLE;
  2259. c->Request.Type.Direction = XFER_WRITE;
  2260. c->Request.Timeout = 0;
  2261. c->Request.CDB[0] = cmd;
  2262. break;
  2263. default:
  2264. dev_warn(&h->pdev->dev,
  2265. "unknown message type %d\n", cmd);
  2266. return IO_ERROR;
  2267. }
  2268. } else {
  2269. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2270. return IO_ERROR;
  2271. }
  2272. /* Fill in the scatter gather information */
  2273. if (size > 0) {
  2274. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2275. buff, size,
  2276. PCI_DMA_BIDIRECTIONAL);
  2277. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2278. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2279. c->SG[0].Len = size;
  2280. c->SG[0].Ext = 0; /* we are not chaining */
  2281. }
  2282. return status;
  2283. }
  2284. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2285. {
  2286. switch (c->err_info->ScsiStatus) {
  2287. case SAM_STAT_GOOD:
  2288. return IO_OK;
  2289. case SAM_STAT_CHECK_CONDITION:
  2290. switch (0xf & c->err_info->SenseInfo[2]) {
  2291. case 0: return IO_OK; /* no sense */
  2292. case 1: return IO_OK; /* recovered error */
  2293. default:
  2294. if (check_for_unit_attention(h, c))
  2295. return IO_NEEDS_RETRY;
  2296. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2297. "check condition, sense key = 0x%02x\n",
  2298. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2299. }
  2300. break;
  2301. default:
  2302. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2303. "scsi status = 0x%02x\n",
  2304. c->Request.CDB[0], c->err_info->ScsiStatus);
  2305. break;
  2306. }
  2307. return IO_ERROR;
  2308. }
  2309. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2310. {
  2311. int return_status = IO_OK;
  2312. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2313. return IO_OK;
  2314. switch (c->err_info->CommandStatus) {
  2315. case CMD_TARGET_STATUS:
  2316. return_status = check_target_status(h, c);
  2317. break;
  2318. case CMD_DATA_UNDERRUN:
  2319. case CMD_DATA_OVERRUN:
  2320. /* expected for inquiry and report lun commands */
  2321. break;
  2322. case CMD_INVALID:
  2323. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2324. "reported invalid\n", c->Request.CDB[0]);
  2325. return_status = IO_ERROR;
  2326. break;
  2327. case CMD_PROTOCOL_ERR:
  2328. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2329. "protocol error\n", c->Request.CDB[0]);
  2330. return_status = IO_ERROR;
  2331. break;
  2332. case CMD_HARDWARE_ERR:
  2333. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2334. " hardware error\n", c->Request.CDB[0]);
  2335. return_status = IO_ERROR;
  2336. break;
  2337. case CMD_CONNECTION_LOST:
  2338. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2339. "connection lost\n", c->Request.CDB[0]);
  2340. return_status = IO_ERROR;
  2341. break;
  2342. case CMD_ABORTED:
  2343. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2344. "aborted\n", c->Request.CDB[0]);
  2345. return_status = IO_ERROR;
  2346. break;
  2347. case CMD_ABORT_FAILED:
  2348. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2349. "abort failed\n", c->Request.CDB[0]);
  2350. return_status = IO_ERROR;
  2351. break;
  2352. case CMD_UNSOLICITED_ABORT:
  2353. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2354. c->Request.CDB[0]);
  2355. return_status = IO_NEEDS_RETRY;
  2356. break;
  2357. default:
  2358. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2359. "unknown status %x\n", c->Request.CDB[0],
  2360. c->err_info->CommandStatus);
  2361. return_status = IO_ERROR;
  2362. }
  2363. return return_status;
  2364. }
  2365. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2366. int attempt_retry)
  2367. {
  2368. DECLARE_COMPLETION_ONSTACK(wait);
  2369. u64bit buff_dma_handle;
  2370. int return_status = IO_OK;
  2371. resend_cmd2:
  2372. c->waiting = &wait;
  2373. enqueue_cmd_and_start_io(h, c);
  2374. wait_for_completion(&wait);
  2375. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2376. goto command_done;
  2377. return_status = process_sendcmd_error(h, c);
  2378. if (return_status == IO_NEEDS_RETRY &&
  2379. c->retry_count < MAX_CMD_RETRIES) {
  2380. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2381. c->Request.CDB[0]);
  2382. c->retry_count++;
  2383. /* erase the old error information */
  2384. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2385. return_status = IO_OK;
  2386. INIT_COMPLETION(wait);
  2387. goto resend_cmd2;
  2388. }
  2389. command_done:
  2390. /* unlock the buffers from DMA */
  2391. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2392. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2393. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2394. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2395. return return_status;
  2396. }
  2397. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2398. __u8 page_code, unsigned char scsi3addr[],
  2399. int cmd_type)
  2400. {
  2401. CommandList_struct *c;
  2402. int return_status;
  2403. c = cmd_special_alloc(h);
  2404. if (!c)
  2405. return -ENOMEM;
  2406. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2407. scsi3addr, cmd_type);
  2408. if (return_status == IO_OK)
  2409. return_status = sendcmd_withirq_core(h, c, 1);
  2410. cmd_special_free(h, c);
  2411. return return_status;
  2412. }
  2413. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2414. sector_t total_size,
  2415. unsigned int block_size,
  2416. InquiryData_struct *inq_buff,
  2417. drive_info_struct *drv)
  2418. {
  2419. int return_code;
  2420. unsigned long t;
  2421. unsigned char scsi3addr[8];
  2422. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2423. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2424. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2425. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2426. if (return_code == IO_OK) {
  2427. if (inq_buff->data_byte[8] == 0xFF) {
  2428. dev_warn(&h->pdev->dev,
  2429. "reading geometry failed, volume "
  2430. "does not support reading geometry\n");
  2431. drv->heads = 255;
  2432. drv->sectors = 32; /* Sectors per track */
  2433. drv->cylinders = total_size + 1;
  2434. drv->raid_level = RAID_UNKNOWN;
  2435. } else {
  2436. drv->heads = inq_buff->data_byte[6];
  2437. drv->sectors = inq_buff->data_byte[7];
  2438. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2439. drv->cylinders += inq_buff->data_byte[5];
  2440. drv->raid_level = inq_buff->data_byte[8];
  2441. }
  2442. drv->block_size = block_size;
  2443. drv->nr_blocks = total_size + 1;
  2444. t = drv->heads * drv->sectors;
  2445. if (t > 1) {
  2446. sector_t real_size = total_size + 1;
  2447. unsigned long rem = sector_div(real_size, t);
  2448. if (rem)
  2449. real_size++;
  2450. drv->cylinders = real_size;
  2451. }
  2452. } else { /* Get geometry failed */
  2453. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2454. }
  2455. }
  2456. static void
  2457. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2458. unsigned int *block_size)
  2459. {
  2460. ReadCapdata_struct *buf;
  2461. int return_code;
  2462. unsigned char scsi3addr[8];
  2463. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2464. if (!buf) {
  2465. dev_warn(&h->pdev->dev, "out of memory\n");
  2466. return;
  2467. }
  2468. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2469. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2470. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2471. if (return_code == IO_OK) {
  2472. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2473. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2474. } else { /* read capacity command failed */
  2475. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2476. *total_size = 0;
  2477. *block_size = BLOCK_SIZE;
  2478. }
  2479. kfree(buf);
  2480. }
  2481. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2482. sector_t *total_size, unsigned int *block_size)
  2483. {
  2484. ReadCapdata_struct_16 *buf;
  2485. int return_code;
  2486. unsigned char scsi3addr[8];
  2487. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2488. if (!buf) {
  2489. dev_warn(&h->pdev->dev, "out of memory\n");
  2490. return;
  2491. }
  2492. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2493. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2494. buf, sizeof(ReadCapdata_struct_16),
  2495. 0, scsi3addr, TYPE_CMD);
  2496. if (return_code == IO_OK) {
  2497. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2498. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2499. } else { /* read capacity command failed */
  2500. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2501. *total_size = 0;
  2502. *block_size = BLOCK_SIZE;
  2503. }
  2504. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2505. (unsigned long long)*total_size+1, *block_size);
  2506. kfree(buf);
  2507. }
  2508. static int cciss_revalidate(struct gendisk *disk)
  2509. {
  2510. ctlr_info_t *h = get_host(disk);
  2511. drive_info_struct *drv = get_drv(disk);
  2512. int logvol;
  2513. int FOUND = 0;
  2514. unsigned int block_size;
  2515. sector_t total_size;
  2516. InquiryData_struct *inq_buff = NULL;
  2517. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2518. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2519. sizeof(drv->LunID)) == 0) {
  2520. FOUND = 1;
  2521. break;
  2522. }
  2523. }
  2524. if (!FOUND)
  2525. return 1;
  2526. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2527. if (inq_buff == NULL) {
  2528. dev_warn(&h->pdev->dev, "out of memory\n");
  2529. return 1;
  2530. }
  2531. if (h->cciss_read == CCISS_READ_10) {
  2532. cciss_read_capacity(h, logvol,
  2533. &total_size, &block_size);
  2534. } else {
  2535. cciss_read_capacity_16(h, logvol,
  2536. &total_size, &block_size);
  2537. }
  2538. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2539. inq_buff, drv);
  2540. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2541. set_capacity(disk, drv->nr_blocks);
  2542. kfree(inq_buff);
  2543. return 0;
  2544. }
  2545. /*
  2546. * Map (physical) PCI mem into (virtual) kernel space
  2547. */
  2548. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2549. {
  2550. ulong page_base = ((ulong) base) & PAGE_MASK;
  2551. ulong page_offs = ((ulong) base) - page_base;
  2552. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2553. return page_remapped ? (page_remapped + page_offs) : NULL;
  2554. }
  2555. /*
  2556. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2557. * the Q to wait for completion.
  2558. */
  2559. static void start_io(ctlr_info_t *h)
  2560. {
  2561. CommandList_struct *c;
  2562. while (!hlist_empty(&h->reqQ)) {
  2563. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2564. /* can't do anything if fifo is full */
  2565. if ((h->access.fifo_full(h))) {
  2566. dev_warn(&h->pdev->dev, "fifo full\n");
  2567. break;
  2568. }
  2569. /* Get the first entry from the Request Q */
  2570. removeQ(c);
  2571. h->Qdepth--;
  2572. /* Tell the controller execute command */
  2573. h->access.submit_command(h, c);
  2574. /* Put job onto the completed Q */
  2575. addQ(&h->cmpQ, c);
  2576. }
  2577. }
  2578. /* Assumes that h->lock is held. */
  2579. /* Zeros out the error record and then resends the command back */
  2580. /* to the controller */
  2581. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2582. {
  2583. /* erase the old error information */
  2584. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2585. /* add it to software queue and then send it to the controller */
  2586. addQ(&h->reqQ, c);
  2587. h->Qdepth++;
  2588. if (h->Qdepth > h->maxQsinceinit)
  2589. h->maxQsinceinit = h->Qdepth;
  2590. start_io(h);
  2591. }
  2592. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2593. unsigned int msg_byte, unsigned int host_byte,
  2594. unsigned int driver_byte)
  2595. {
  2596. /* inverse of macros in scsi.h */
  2597. return (scsi_status_byte & 0xff) |
  2598. ((msg_byte & 0xff) << 8) |
  2599. ((host_byte & 0xff) << 16) |
  2600. ((driver_byte & 0xff) << 24);
  2601. }
  2602. static inline int evaluate_target_status(ctlr_info_t *h,
  2603. CommandList_struct *cmd, int *retry_cmd)
  2604. {
  2605. unsigned char sense_key;
  2606. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2607. int error_value;
  2608. *retry_cmd = 0;
  2609. /* If we get in here, it means we got "target status", that is, scsi status */
  2610. status_byte = cmd->err_info->ScsiStatus;
  2611. driver_byte = DRIVER_OK;
  2612. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2613. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2614. host_byte = DID_PASSTHROUGH;
  2615. else
  2616. host_byte = DID_OK;
  2617. error_value = make_status_bytes(status_byte, msg_byte,
  2618. host_byte, driver_byte);
  2619. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2620. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2621. dev_warn(&h->pdev->dev, "cmd %p "
  2622. "has SCSI Status 0x%x\n",
  2623. cmd, cmd->err_info->ScsiStatus);
  2624. return error_value;
  2625. }
  2626. /* check the sense key */
  2627. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2628. /* no status or recovered error */
  2629. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2630. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2631. error_value = 0;
  2632. if (check_for_unit_attention(h, cmd)) {
  2633. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2634. return 0;
  2635. }
  2636. /* Not SG_IO or similar? */
  2637. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2638. if (error_value != 0)
  2639. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2640. " sense key = 0x%x\n", cmd, sense_key);
  2641. return error_value;
  2642. }
  2643. /* SG_IO or similar, copy sense data back */
  2644. if (cmd->rq->sense) {
  2645. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2646. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2647. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2648. cmd->rq->sense_len);
  2649. } else
  2650. cmd->rq->sense_len = 0;
  2651. return error_value;
  2652. }
  2653. /* checks the status of the job and calls complete buffers to mark all
  2654. * buffers for the completed job. Note that this function does not need
  2655. * to hold the hba/queue lock.
  2656. */
  2657. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2658. int timeout)
  2659. {
  2660. int retry_cmd = 0;
  2661. struct request *rq = cmd->rq;
  2662. rq->errors = 0;
  2663. if (timeout)
  2664. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2665. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2666. goto after_error_processing;
  2667. switch (cmd->err_info->CommandStatus) {
  2668. case CMD_TARGET_STATUS:
  2669. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2670. break;
  2671. case CMD_DATA_UNDERRUN:
  2672. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2673. dev_warn(&h->pdev->dev, "cmd %p has"
  2674. " completed with data underrun "
  2675. "reported\n", cmd);
  2676. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2677. }
  2678. break;
  2679. case CMD_DATA_OVERRUN:
  2680. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2681. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2682. " completed with data overrun "
  2683. "reported\n", cmd);
  2684. break;
  2685. case CMD_INVALID:
  2686. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2687. "reported invalid\n", cmd);
  2688. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2689. cmd->err_info->CommandStatus, DRIVER_OK,
  2690. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2691. DID_PASSTHROUGH : DID_ERROR);
  2692. break;
  2693. case CMD_PROTOCOL_ERR:
  2694. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2695. "protocol error\n", cmd);
  2696. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2697. cmd->err_info->CommandStatus, DRIVER_OK,
  2698. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2699. DID_PASSTHROUGH : DID_ERROR);
  2700. break;
  2701. case CMD_HARDWARE_ERR:
  2702. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2703. " hardware error\n", cmd);
  2704. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2705. cmd->err_info->CommandStatus, DRIVER_OK,
  2706. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2707. DID_PASSTHROUGH : DID_ERROR);
  2708. break;
  2709. case CMD_CONNECTION_LOST:
  2710. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2711. "connection lost\n", cmd);
  2712. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2713. cmd->err_info->CommandStatus, DRIVER_OK,
  2714. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2715. DID_PASSTHROUGH : DID_ERROR);
  2716. break;
  2717. case CMD_ABORTED:
  2718. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2719. "aborted\n", cmd);
  2720. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2721. cmd->err_info->CommandStatus, DRIVER_OK,
  2722. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2723. DID_PASSTHROUGH : DID_ABORT);
  2724. break;
  2725. case CMD_ABORT_FAILED:
  2726. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2727. "abort failed\n", cmd);
  2728. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2729. cmd->err_info->CommandStatus, DRIVER_OK,
  2730. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2731. DID_PASSTHROUGH : DID_ERROR);
  2732. break;
  2733. case CMD_UNSOLICITED_ABORT:
  2734. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2735. "abort %p\n", h->ctlr, cmd);
  2736. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2737. retry_cmd = 1;
  2738. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2739. cmd->retry_count++;
  2740. } else
  2741. dev_warn(&h->pdev->dev,
  2742. "%p retried too many times\n", cmd);
  2743. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2744. cmd->err_info->CommandStatus, DRIVER_OK,
  2745. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2746. DID_PASSTHROUGH : DID_ABORT);
  2747. break;
  2748. case CMD_TIMEOUT:
  2749. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2750. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2751. cmd->err_info->CommandStatus, DRIVER_OK,
  2752. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2753. DID_PASSTHROUGH : DID_ERROR);
  2754. break;
  2755. default:
  2756. dev_warn(&h->pdev->dev, "cmd %p returned "
  2757. "unknown status %x\n", cmd,
  2758. cmd->err_info->CommandStatus);
  2759. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2760. cmd->err_info->CommandStatus, DRIVER_OK,
  2761. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2762. DID_PASSTHROUGH : DID_ERROR);
  2763. }
  2764. after_error_processing:
  2765. /* We need to return this command */
  2766. if (retry_cmd) {
  2767. resend_cciss_cmd(h, cmd);
  2768. return;
  2769. }
  2770. cmd->rq->completion_data = cmd;
  2771. blk_complete_request(cmd->rq);
  2772. }
  2773. static inline u32 cciss_tag_contains_index(u32 tag)
  2774. {
  2775. #define DIRECT_LOOKUP_BIT 0x10
  2776. return tag & DIRECT_LOOKUP_BIT;
  2777. }
  2778. static inline u32 cciss_tag_to_index(u32 tag)
  2779. {
  2780. #define DIRECT_LOOKUP_SHIFT 5
  2781. return tag >> DIRECT_LOOKUP_SHIFT;
  2782. }
  2783. static inline u32 cciss_tag_discard_error_bits(u32 tag)
  2784. {
  2785. #define CCISS_ERROR_BITS 0x03
  2786. return tag & ~CCISS_ERROR_BITS;
  2787. }
  2788. static inline void cciss_mark_tag_indexed(u32 *tag)
  2789. {
  2790. *tag |= DIRECT_LOOKUP_BIT;
  2791. }
  2792. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2793. {
  2794. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2795. }
  2796. /*
  2797. * Get a request and submit it to the controller.
  2798. */
  2799. static void do_cciss_request(struct request_queue *q)
  2800. {
  2801. ctlr_info_t *h = q->queuedata;
  2802. CommandList_struct *c;
  2803. sector_t start_blk;
  2804. int seg;
  2805. struct request *creq;
  2806. u64bit temp64;
  2807. struct scatterlist *tmp_sg;
  2808. SGDescriptor_struct *curr_sg;
  2809. drive_info_struct *drv;
  2810. int i, dir;
  2811. int sg_index = 0;
  2812. int chained = 0;
  2813. /* We call start_io here in case there is a command waiting on the
  2814. * queue that has not been sent.
  2815. */
  2816. if (blk_queue_plugged(q))
  2817. goto startio;
  2818. queue:
  2819. creq = blk_peek_request(q);
  2820. if (!creq)
  2821. goto startio;
  2822. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2823. c = cmd_alloc(h);
  2824. if (!c)
  2825. goto full;
  2826. blk_start_request(creq);
  2827. tmp_sg = h->scatter_list[c->cmdindex];
  2828. spin_unlock_irq(q->queue_lock);
  2829. c->cmd_type = CMD_RWREQ;
  2830. c->rq = creq;
  2831. /* fill in the request */
  2832. drv = creq->rq_disk->private_data;
  2833. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2834. /* got command from pool, so use the command block index instead */
  2835. /* for direct lookups. */
  2836. /* The first 2 bits are reserved for controller error reporting. */
  2837. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2838. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2839. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2840. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2841. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2842. c->Request.Type.Attribute = ATTR_SIMPLE;
  2843. c->Request.Type.Direction =
  2844. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2845. c->Request.Timeout = 0; /* Don't time out */
  2846. c->Request.CDB[0] =
  2847. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2848. start_blk = blk_rq_pos(creq);
  2849. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2850. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2851. sg_init_table(tmp_sg, h->maxsgentries);
  2852. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2853. /* get the DMA records for the setup */
  2854. if (c->Request.Type.Direction == XFER_READ)
  2855. dir = PCI_DMA_FROMDEVICE;
  2856. else
  2857. dir = PCI_DMA_TODEVICE;
  2858. curr_sg = c->SG;
  2859. sg_index = 0;
  2860. chained = 0;
  2861. for (i = 0; i < seg; i++) {
  2862. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2863. !chained && ((seg - i) > 1)) {
  2864. /* Point to next chain block. */
  2865. curr_sg = h->cmd_sg_list[c->cmdindex];
  2866. sg_index = 0;
  2867. chained = 1;
  2868. }
  2869. curr_sg[sg_index].Len = tmp_sg[i].length;
  2870. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2871. tmp_sg[i].offset,
  2872. tmp_sg[i].length, dir);
  2873. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2874. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2875. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2876. ++sg_index;
  2877. }
  2878. if (chained)
  2879. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2880. (seg - (h->max_cmd_sgentries - 1)) *
  2881. sizeof(SGDescriptor_struct));
  2882. /* track how many SG entries we are using */
  2883. if (seg > h->maxSG)
  2884. h->maxSG = seg;
  2885. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2886. "chained[%d]\n",
  2887. blk_rq_sectors(creq), seg, chained);
  2888. c->Header.SGTotal = seg + chained;
  2889. if (seg <= h->max_cmd_sgentries)
  2890. c->Header.SGList = c->Header.SGTotal;
  2891. else
  2892. c->Header.SGList = h->max_cmd_sgentries;
  2893. set_performant_mode(h, c);
  2894. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2895. if(h->cciss_read == CCISS_READ_10) {
  2896. c->Request.CDB[1] = 0;
  2897. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2898. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2899. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2900. c->Request.CDB[5] = start_blk & 0xff;
  2901. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2902. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2903. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2904. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2905. } else {
  2906. u32 upper32 = upper_32_bits(start_blk);
  2907. c->Request.CDBLen = 16;
  2908. c->Request.CDB[1]= 0;
  2909. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2910. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2911. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2912. c->Request.CDB[5]= upper32 & 0xff;
  2913. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2914. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2915. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2916. c->Request.CDB[9]= start_blk & 0xff;
  2917. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2918. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2919. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2920. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2921. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2922. }
  2923. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2924. c->Request.CDBLen = creq->cmd_len;
  2925. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2926. } else {
  2927. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2928. creq->cmd_type);
  2929. BUG();
  2930. }
  2931. spin_lock_irq(q->queue_lock);
  2932. addQ(&h->reqQ, c);
  2933. h->Qdepth++;
  2934. if (h->Qdepth > h->maxQsinceinit)
  2935. h->maxQsinceinit = h->Qdepth;
  2936. goto queue;
  2937. full:
  2938. blk_stop_queue(q);
  2939. startio:
  2940. /* We will already have the driver lock here so not need
  2941. * to lock it.
  2942. */
  2943. start_io(h);
  2944. }
  2945. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2946. {
  2947. return h->access.command_completed(h);
  2948. }
  2949. static inline int interrupt_pending(ctlr_info_t *h)
  2950. {
  2951. return h->access.intr_pending(h);
  2952. }
  2953. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2954. {
  2955. return ((h->access.intr_pending(h) == 0) ||
  2956. (h->interrupts_enabled == 0));
  2957. }
  2958. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  2959. u32 raw_tag)
  2960. {
  2961. if (unlikely(tag_index >= h->nr_cmds)) {
  2962. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2963. return 1;
  2964. }
  2965. return 0;
  2966. }
  2967. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  2968. u32 raw_tag)
  2969. {
  2970. removeQ(c);
  2971. if (likely(c->cmd_type == CMD_RWREQ))
  2972. complete_command(h, c, 0);
  2973. else if (c->cmd_type == CMD_IOCTL_PEND)
  2974. complete(c->waiting);
  2975. #ifdef CONFIG_CISS_SCSI_TAPE
  2976. else if (c->cmd_type == CMD_SCSI)
  2977. complete_scsi_command(c, 0, raw_tag);
  2978. #endif
  2979. }
  2980. static inline u32 next_command(ctlr_info_t *h)
  2981. {
  2982. u32 a;
  2983. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  2984. return h->access.command_completed(h);
  2985. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  2986. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  2987. (h->reply_pool_head)++;
  2988. h->commands_outstanding--;
  2989. } else {
  2990. a = FIFO_EMPTY;
  2991. }
  2992. /* Check for wraparound */
  2993. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  2994. h->reply_pool_head = h->reply_pool;
  2995. h->reply_pool_wraparound ^= 1;
  2996. }
  2997. return a;
  2998. }
  2999. /* process completion of an indexed ("direct lookup") command */
  3000. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3001. {
  3002. u32 tag_index;
  3003. CommandList_struct *c;
  3004. tag_index = cciss_tag_to_index(raw_tag);
  3005. if (bad_tag(h, tag_index, raw_tag))
  3006. return next_command(h);
  3007. c = h->cmd_pool + tag_index;
  3008. finish_cmd(h, c, raw_tag);
  3009. return next_command(h);
  3010. }
  3011. /* process completion of a non-indexed command */
  3012. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3013. {
  3014. u32 tag;
  3015. CommandList_struct *c = NULL;
  3016. struct hlist_node *tmp;
  3017. __u32 busaddr_masked, tag_masked;
  3018. tag = cciss_tag_discard_error_bits(raw_tag);
  3019. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  3020. busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
  3021. tag_masked = cciss_tag_discard_error_bits(tag);
  3022. if (busaddr_masked == tag_masked) {
  3023. finish_cmd(h, c, raw_tag);
  3024. return next_command(h);
  3025. }
  3026. }
  3027. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3028. return next_command(h);
  3029. }
  3030. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3031. {
  3032. ctlr_info_t *h = dev_id;
  3033. unsigned long flags;
  3034. u32 raw_tag;
  3035. if (interrupt_not_for_us(h))
  3036. return IRQ_NONE;
  3037. spin_lock_irqsave(&h->lock, flags);
  3038. while (interrupt_pending(h)) {
  3039. raw_tag = get_next_completion(h);
  3040. while (raw_tag != FIFO_EMPTY) {
  3041. if (cciss_tag_contains_index(raw_tag))
  3042. raw_tag = process_indexed_cmd(h, raw_tag);
  3043. else
  3044. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3045. }
  3046. }
  3047. spin_unlock_irqrestore(&h->lock, flags);
  3048. return IRQ_HANDLED;
  3049. }
  3050. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3051. * check the interrupt pending register because it is not set.
  3052. */
  3053. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3054. {
  3055. ctlr_info_t *h = dev_id;
  3056. unsigned long flags;
  3057. u32 raw_tag;
  3058. spin_lock_irqsave(&h->lock, flags);
  3059. raw_tag = get_next_completion(h);
  3060. while (raw_tag != FIFO_EMPTY) {
  3061. if (cciss_tag_contains_index(raw_tag))
  3062. raw_tag = process_indexed_cmd(h, raw_tag);
  3063. else
  3064. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3065. }
  3066. spin_unlock_irqrestore(&h->lock, flags);
  3067. return IRQ_HANDLED;
  3068. }
  3069. /**
  3070. * add_to_scan_list() - add controller to rescan queue
  3071. * @h: Pointer to the controller.
  3072. *
  3073. * Adds the controller to the rescan queue if not already on the queue.
  3074. *
  3075. * returns 1 if added to the queue, 0 if skipped (could be on the
  3076. * queue already, or the controller could be initializing or shutting
  3077. * down).
  3078. **/
  3079. static int add_to_scan_list(struct ctlr_info *h)
  3080. {
  3081. struct ctlr_info *test_h;
  3082. int found = 0;
  3083. int ret = 0;
  3084. if (h->busy_initializing)
  3085. return 0;
  3086. if (!mutex_trylock(&h->busy_shutting_down))
  3087. return 0;
  3088. mutex_lock(&scan_mutex);
  3089. list_for_each_entry(test_h, &scan_q, scan_list) {
  3090. if (test_h == h) {
  3091. found = 1;
  3092. break;
  3093. }
  3094. }
  3095. if (!found && !h->busy_scanning) {
  3096. INIT_COMPLETION(h->scan_wait);
  3097. list_add_tail(&h->scan_list, &scan_q);
  3098. ret = 1;
  3099. }
  3100. mutex_unlock(&scan_mutex);
  3101. mutex_unlock(&h->busy_shutting_down);
  3102. return ret;
  3103. }
  3104. /**
  3105. * remove_from_scan_list() - remove controller from rescan queue
  3106. * @h: Pointer to the controller.
  3107. *
  3108. * Removes the controller from the rescan queue if present. Blocks if
  3109. * the controller is currently conducting a rescan. The controller
  3110. * can be in one of three states:
  3111. * 1. Doesn't need a scan
  3112. * 2. On the scan list, but not scanning yet (we remove it)
  3113. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3114. * the scan to complete to make sure the scanning thread for this
  3115. * controller is completely idle.
  3116. **/
  3117. static void remove_from_scan_list(struct ctlr_info *h)
  3118. {
  3119. struct ctlr_info *test_h, *tmp_h;
  3120. mutex_lock(&scan_mutex);
  3121. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3122. if (test_h == h) { /* state 2. */
  3123. list_del(&h->scan_list);
  3124. complete_all(&h->scan_wait);
  3125. mutex_unlock(&scan_mutex);
  3126. return;
  3127. }
  3128. }
  3129. if (h->busy_scanning) { /* state 3. */
  3130. mutex_unlock(&scan_mutex);
  3131. wait_for_completion(&h->scan_wait);
  3132. } else { /* state 1, nothing to do. */
  3133. mutex_unlock(&scan_mutex);
  3134. }
  3135. }
  3136. /**
  3137. * scan_thread() - kernel thread used to rescan controllers
  3138. * @data: Ignored.
  3139. *
  3140. * A kernel thread used scan for drive topology changes on
  3141. * controllers. The thread processes only one controller at a time
  3142. * using a queue. Controllers are added to the queue using
  3143. * add_to_scan_list() and removed from the queue either after done
  3144. * processing or using remove_from_scan_list().
  3145. *
  3146. * returns 0.
  3147. **/
  3148. static int scan_thread(void *data)
  3149. {
  3150. struct ctlr_info *h;
  3151. while (1) {
  3152. set_current_state(TASK_INTERRUPTIBLE);
  3153. schedule();
  3154. if (kthread_should_stop())
  3155. break;
  3156. while (1) {
  3157. mutex_lock(&scan_mutex);
  3158. if (list_empty(&scan_q)) {
  3159. mutex_unlock(&scan_mutex);
  3160. break;
  3161. }
  3162. h = list_entry(scan_q.next,
  3163. struct ctlr_info,
  3164. scan_list);
  3165. list_del(&h->scan_list);
  3166. h->busy_scanning = 1;
  3167. mutex_unlock(&scan_mutex);
  3168. rebuild_lun_table(h, 0, 0);
  3169. complete_all(&h->scan_wait);
  3170. mutex_lock(&scan_mutex);
  3171. h->busy_scanning = 0;
  3172. mutex_unlock(&scan_mutex);
  3173. }
  3174. }
  3175. return 0;
  3176. }
  3177. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3178. {
  3179. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3180. return 0;
  3181. switch (c->err_info->SenseInfo[12]) {
  3182. case STATE_CHANGED:
  3183. dev_warn(&h->pdev->dev, "a state change "
  3184. "detected, command retried\n");
  3185. return 1;
  3186. break;
  3187. case LUN_FAILED:
  3188. dev_warn(&h->pdev->dev, "LUN failure "
  3189. "detected, action required\n");
  3190. return 1;
  3191. break;
  3192. case REPORT_LUNS_CHANGED:
  3193. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3194. /*
  3195. * Here, we could call add_to_scan_list and wake up the scan thread,
  3196. * except that it's quite likely that we will get more than one
  3197. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3198. * that those which occur after the first one will likely happen
  3199. * *during* the scan_thread's rescan. And the rescan code is not
  3200. * robust enough to restart in the middle, undoing what it has already
  3201. * done, and it's not clear that it's even possible to do this, since
  3202. * part of what it does is notify the block layer, which starts
  3203. * doing it's own i/o to read partition tables and so on, and the
  3204. * driver doesn't have visibility to know what might need undoing.
  3205. * In any event, if possible, it is horribly complicated to get right
  3206. * so we just don't do it for now.
  3207. *
  3208. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3209. */
  3210. return 1;
  3211. break;
  3212. case POWER_OR_RESET:
  3213. dev_warn(&h->pdev->dev,
  3214. "a power on or device reset detected\n");
  3215. return 1;
  3216. break;
  3217. case UNIT_ATTENTION_CLEARED:
  3218. dev_warn(&h->pdev->dev,
  3219. "unit attention cleared by another initiator\n");
  3220. return 1;
  3221. break;
  3222. default:
  3223. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3224. return 1;
  3225. }
  3226. }
  3227. /*
  3228. * We cannot read the structure directly, for portability we must use
  3229. * the io functions.
  3230. * This is for debug only.
  3231. */
  3232. static void print_cfg_table(ctlr_info_t *h)
  3233. {
  3234. int i;
  3235. char temp_name[17];
  3236. CfgTable_struct *tb = h->cfgtable;
  3237. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3238. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3239. for (i = 0; i < 4; i++)
  3240. temp_name[i] = readb(&(tb->Signature[i]));
  3241. temp_name[4] = '\0';
  3242. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3243. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3244. readl(&(tb->SpecValence)));
  3245. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3246. readl(&(tb->TransportSupport)));
  3247. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3248. readl(&(tb->TransportActive)));
  3249. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3250. readl(&(tb->HostWrite.TransportRequest)));
  3251. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3252. readl(&(tb->HostWrite.CoalIntDelay)));
  3253. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3254. readl(&(tb->HostWrite.CoalIntCount)));
  3255. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3256. readl(&(tb->CmdsOutMax)));
  3257. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3258. readl(&(tb->BusTypes)));
  3259. for (i = 0; i < 16; i++)
  3260. temp_name[i] = readb(&(tb->ServerName[i]));
  3261. temp_name[16] = '\0';
  3262. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3263. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3264. readl(&(tb->HeartBeat)));
  3265. }
  3266. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3267. {
  3268. int i, offset, mem_type, bar_type;
  3269. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3270. return 0;
  3271. offset = 0;
  3272. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3273. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3274. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3275. offset += 4;
  3276. else {
  3277. mem_type = pci_resource_flags(pdev, i) &
  3278. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3279. switch (mem_type) {
  3280. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3281. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3282. offset += 4; /* 32 bit */
  3283. break;
  3284. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3285. offset += 8;
  3286. break;
  3287. default: /* reserved in PCI 2.2 */
  3288. dev_warn(&pdev->dev,
  3289. "Base address is invalid\n");
  3290. return -1;
  3291. break;
  3292. }
  3293. }
  3294. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3295. return i + 1;
  3296. }
  3297. return -1;
  3298. }
  3299. /* Fill in bucket_map[], given nsgs (the max number of
  3300. * scatter gather elements supported) and bucket[],
  3301. * which is an array of 8 integers. The bucket[] array
  3302. * contains 8 different DMA transfer sizes (in 16
  3303. * byte increments) which the controller uses to fetch
  3304. * commands. This function fills in bucket_map[], which
  3305. * maps a given number of scatter gather elements to one of
  3306. * the 8 DMA transfer sizes. The point of it is to allow the
  3307. * controller to only do as much DMA as needed to fetch the
  3308. * command, with the DMA transfer size encoded in the lower
  3309. * bits of the command address.
  3310. */
  3311. static void calc_bucket_map(int bucket[], int num_buckets,
  3312. int nsgs, int *bucket_map)
  3313. {
  3314. int i, j, b, size;
  3315. /* even a command with 0 SGs requires 4 blocks */
  3316. #define MINIMUM_TRANSFER_BLOCKS 4
  3317. #define NUM_BUCKETS 8
  3318. /* Note, bucket_map must have nsgs+1 entries. */
  3319. for (i = 0; i <= nsgs; i++) {
  3320. /* Compute size of a command with i SG entries */
  3321. size = i + MINIMUM_TRANSFER_BLOCKS;
  3322. b = num_buckets; /* Assume the biggest bucket */
  3323. /* Find the bucket that is just big enough */
  3324. for (j = 0; j < 8; j++) {
  3325. if (bucket[j] >= size) {
  3326. b = j;
  3327. break;
  3328. }
  3329. }
  3330. /* for a command with i SG entries, use bucket b. */
  3331. bucket_map[i] = b;
  3332. }
  3333. }
  3334. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3335. {
  3336. int i;
  3337. /* under certain very rare conditions, this can take awhile.
  3338. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3339. * as we enter this code.) */
  3340. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3341. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3342. break;
  3343. usleep_range(10000, 20000);
  3344. }
  3345. }
  3346. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
  3347. {
  3348. /* This is a bit complicated. There are 8 registers on
  3349. * the controller which we write to to tell it 8 different
  3350. * sizes of commands which there may be. It's a way of
  3351. * reducing the DMA done to fetch each command. Encoded into
  3352. * each command's tag are 3 bits which communicate to the controller
  3353. * which of the eight sizes that command fits within. The size of
  3354. * each command depends on how many scatter gather entries there are.
  3355. * Each SG entry requires 16 bytes. The eight registers are programmed
  3356. * with the number of 16-byte blocks a command of that size requires.
  3357. * The smallest command possible requires 5 such 16 byte blocks.
  3358. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3359. * blocks. Note, this only extends to the SG entries contained
  3360. * within the command block, and does not extend to chained blocks
  3361. * of SG elements. bft[] contains the eight values we write to
  3362. * the registers. They are not evenly distributed, but have more
  3363. * sizes for small commands, and fewer sizes for larger commands.
  3364. */
  3365. __u32 trans_offset;
  3366. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3367. /*
  3368. * 5 = 1 s/g entry or 4k
  3369. * 6 = 2 s/g entry or 8k
  3370. * 8 = 4 s/g entry or 16k
  3371. * 10 = 6 s/g entry or 24k
  3372. */
  3373. unsigned long register_value;
  3374. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3375. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3376. /* Controller spec: zero out this buffer. */
  3377. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3378. h->reply_pool_head = h->reply_pool;
  3379. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3380. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3381. h->blockFetchTable);
  3382. writel(bft[0], &h->transtable->BlockFetch0);
  3383. writel(bft[1], &h->transtable->BlockFetch1);
  3384. writel(bft[2], &h->transtable->BlockFetch2);
  3385. writel(bft[3], &h->transtable->BlockFetch3);
  3386. writel(bft[4], &h->transtable->BlockFetch4);
  3387. writel(bft[5], &h->transtable->BlockFetch5);
  3388. writel(bft[6], &h->transtable->BlockFetch6);
  3389. writel(bft[7], &h->transtable->BlockFetch7);
  3390. /* size of controller ring buffer */
  3391. writel(h->max_commands, &h->transtable->RepQSize);
  3392. writel(1, &h->transtable->RepQCount);
  3393. writel(0, &h->transtable->RepQCtrAddrLow32);
  3394. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3395. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3396. writel(0, &h->transtable->RepQAddr0High32);
  3397. writel(CFGTBL_Trans_Performant,
  3398. &(h->cfgtable->HostWrite.TransportRequest));
  3399. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3400. cciss_wait_for_mode_change_ack(h);
  3401. register_value = readl(&(h->cfgtable->TransportActive));
  3402. if (!(register_value & CFGTBL_Trans_Performant))
  3403. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3404. " performant mode\n");
  3405. }
  3406. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3407. {
  3408. __u32 trans_support;
  3409. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3410. /* Attempt to put controller into performant mode if supported */
  3411. /* Does board support performant mode? */
  3412. trans_support = readl(&(h->cfgtable->TransportSupport));
  3413. if (!(trans_support & PERFORMANT_MODE))
  3414. return;
  3415. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3416. /* Performant mode demands commands on a 32 byte boundary
  3417. * pci_alloc_consistent aligns on page boundarys already.
  3418. * Just need to check if divisible by 32
  3419. */
  3420. if ((sizeof(CommandList_struct) % 32) != 0) {
  3421. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3422. "cciss info: command size[",
  3423. (int)sizeof(CommandList_struct),
  3424. "] not divisible by 32, no performant mode..\n");
  3425. return;
  3426. }
  3427. /* Performant mode ring buffer and supporting data structures */
  3428. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3429. h->pdev, h->max_commands * sizeof(__u64),
  3430. &(h->reply_pool_dhandle));
  3431. /* Need a block fetch table for performant mode */
  3432. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3433. sizeof(__u32)), GFP_KERNEL);
  3434. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3435. goto clean_up;
  3436. cciss_enter_performant_mode(h);
  3437. /* Change the access methods to the performant access methods */
  3438. h->access = SA5_performant_access;
  3439. h->transMethod = CFGTBL_Trans_Performant;
  3440. return;
  3441. clean_up:
  3442. kfree(h->blockFetchTable);
  3443. if (h->reply_pool)
  3444. pci_free_consistent(h->pdev,
  3445. h->max_commands * sizeof(__u64),
  3446. h->reply_pool,
  3447. h->reply_pool_dhandle);
  3448. return;
  3449. } /* cciss_put_controller_into_performant_mode */
  3450. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3451. * controllers that are capable. If not, we use IO-APIC mode.
  3452. */
  3453. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3454. {
  3455. #ifdef CONFIG_PCI_MSI
  3456. int err;
  3457. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3458. {0, 2}, {0, 3}
  3459. };
  3460. /* Some boards advertise MSI but don't really support it */
  3461. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3462. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3463. goto default_int_mode;
  3464. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3465. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3466. if (!err) {
  3467. h->intr[0] = cciss_msix_entries[0].vector;
  3468. h->intr[1] = cciss_msix_entries[1].vector;
  3469. h->intr[2] = cciss_msix_entries[2].vector;
  3470. h->intr[3] = cciss_msix_entries[3].vector;
  3471. h->msix_vector = 1;
  3472. return;
  3473. }
  3474. if (err > 0) {
  3475. dev_warn(&h->pdev->dev,
  3476. "only %d MSI-X vectors available\n", err);
  3477. goto default_int_mode;
  3478. } else {
  3479. dev_warn(&h->pdev->dev,
  3480. "MSI-X init failed %d\n", err);
  3481. goto default_int_mode;
  3482. }
  3483. }
  3484. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3485. if (!pci_enable_msi(h->pdev))
  3486. h->msi_vector = 1;
  3487. else
  3488. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3489. }
  3490. default_int_mode:
  3491. #endif /* CONFIG_PCI_MSI */
  3492. /* if we get here we're going to use the default interrupt mode */
  3493. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3494. return;
  3495. }
  3496. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3497. {
  3498. int i;
  3499. u32 subsystem_vendor_id, subsystem_device_id;
  3500. subsystem_vendor_id = pdev->subsystem_vendor;
  3501. subsystem_device_id = pdev->subsystem_device;
  3502. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3503. subsystem_vendor_id;
  3504. for (i = 0; i < ARRAY_SIZE(products); i++)
  3505. if (*board_id == products[i].board_id)
  3506. return i;
  3507. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3508. *board_id);
  3509. return -ENODEV;
  3510. }
  3511. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3512. {
  3513. u16 command;
  3514. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3515. return ((command & PCI_COMMAND_MEMORY) == 0);
  3516. }
  3517. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3518. unsigned long *memory_bar)
  3519. {
  3520. int i;
  3521. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3522. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3523. /* addressing mode bits already removed */
  3524. *memory_bar = pci_resource_start(pdev, i);
  3525. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3526. *memory_bar);
  3527. return 0;
  3528. }
  3529. dev_warn(&pdev->dev, "no memory BAR found\n");
  3530. return -ENODEV;
  3531. }
  3532. static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
  3533. void __iomem *vaddr, int wait_for_ready)
  3534. #define BOARD_READY 1
  3535. #define BOARD_NOT_READY 0
  3536. {
  3537. int i, iterations;
  3538. u32 scratchpad;
  3539. if (wait_for_ready)
  3540. iterations = CCISS_BOARD_READY_ITERATIONS;
  3541. else
  3542. iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
  3543. for (i = 0; i < iterations; i++) {
  3544. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3545. if (wait_for_ready) {
  3546. if (scratchpad == CCISS_FIRMWARE_READY)
  3547. return 0;
  3548. } else {
  3549. if (scratchpad != CCISS_FIRMWARE_READY)
  3550. return 0;
  3551. }
  3552. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3553. }
  3554. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3555. return -ENODEV;
  3556. }
  3557. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3558. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3559. u64 *cfg_offset)
  3560. {
  3561. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3562. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3563. *cfg_base_addr &= (u32) 0x0000ffff;
  3564. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3565. if (*cfg_base_addr_index == -1) {
  3566. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3567. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3568. return -ENODEV;
  3569. }
  3570. return 0;
  3571. }
  3572. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3573. {
  3574. u64 cfg_offset;
  3575. u32 cfg_base_addr;
  3576. u64 cfg_base_addr_index;
  3577. u32 trans_offset;
  3578. int rc;
  3579. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3580. &cfg_base_addr_index, &cfg_offset);
  3581. if (rc)
  3582. return rc;
  3583. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3584. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3585. if (!h->cfgtable)
  3586. return -ENOMEM;
  3587. /* Find performant mode table. */
  3588. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3589. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3590. cfg_base_addr_index)+cfg_offset+trans_offset,
  3591. sizeof(*h->transtable));
  3592. if (!h->transtable)
  3593. return -ENOMEM;
  3594. return 0;
  3595. }
  3596. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3597. {
  3598. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3599. /* Limit commands in memory limited kdump scenario. */
  3600. if (reset_devices && h->max_commands > 32)
  3601. h->max_commands = 32;
  3602. if (h->max_commands < 16) {
  3603. dev_warn(&h->pdev->dev, "Controller reports "
  3604. "max supported commands of %d, an obvious lie. "
  3605. "Using 16. Ensure that firmware is up to date.\n",
  3606. h->max_commands);
  3607. h->max_commands = 16;
  3608. }
  3609. }
  3610. /* Interrogate the hardware for some limits:
  3611. * max commands, max SG elements without chaining, and with chaining,
  3612. * SG chain block size, etc.
  3613. */
  3614. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3615. {
  3616. cciss_get_max_perf_mode_cmds(h);
  3617. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3618. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3619. /*
  3620. * Limit in-command s/g elements to 32 save dma'able memory.
  3621. * Howvever spec says if 0, use 31
  3622. */
  3623. h->max_cmd_sgentries = 31;
  3624. if (h->maxsgentries > 512) {
  3625. h->max_cmd_sgentries = 32;
  3626. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3627. h->maxsgentries--; /* save one for chain pointer */
  3628. } else {
  3629. h->maxsgentries = 31; /* default to traditional values */
  3630. h->chainsize = 0;
  3631. }
  3632. }
  3633. static inline bool CISS_signature_present(ctlr_info_t *h)
  3634. {
  3635. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3636. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3637. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3638. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3639. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3640. return false;
  3641. }
  3642. return true;
  3643. }
  3644. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3645. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3646. {
  3647. #ifdef CONFIG_X86
  3648. u32 prefetch;
  3649. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3650. prefetch |= 0x100;
  3651. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3652. #endif
  3653. }
  3654. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3655. * in a prefetch beyond physical memory.
  3656. */
  3657. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3658. {
  3659. u32 dma_prefetch;
  3660. __u32 dma_refetch;
  3661. if (h->board_id != 0x3225103C)
  3662. return;
  3663. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3664. dma_prefetch |= 0x8000;
  3665. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3666. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3667. dma_refetch |= 0x1;
  3668. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3669. }
  3670. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3671. {
  3672. int prod_index, err;
  3673. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3674. if (prod_index < 0)
  3675. return -ENODEV;
  3676. h->product_name = products[prod_index].product_name;
  3677. h->access = *(products[prod_index].access);
  3678. if (cciss_board_disabled(h)) {
  3679. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3680. return -ENODEV;
  3681. }
  3682. err = pci_enable_device(h->pdev);
  3683. if (err) {
  3684. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3685. return err;
  3686. }
  3687. err = pci_request_regions(h->pdev, "cciss");
  3688. if (err) {
  3689. dev_warn(&h->pdev->dev,
  3690. "Cannot obtain PCI resources, aborting\n");
  3691. return err;
  3692. }
  3693. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3694. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3695. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3696. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3697. */
  3698. cciss_interrupt_mode(h);
  3699. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3700. if (err)
  3701. goto err_out_free_res;
  3702. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3703. if (!h->vaddr) {
  3704. err = -ENOMEM;
  3705. goto err_out_free_res;
  3706. }
  3707. err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3708. if (err)
  3709. goto err_out_free_res;
  3710. err = cciss_find_cfgtables(h);
  3711. if (err)
  3712. goto err_out_free_res;
  3713. print_cfg_table(h);
  3714. cciss_find_board_params(h);
  3715. if (!CISS_signature_present(h)) {
  3716. err = -ENODEV;
  3717. goto err_out_free_res;
  3718. }
  3719. cciss_enable_scsi_prefetch(h);
  3720. cciss_p600_dma_prefetch_quirk(h);
  3721. cciss_put_controller_into_performant_mode(h);
  3722. return 0;
  3723. err_out_free_res:
  3724. /*
  3725. * Deliberately omit pci_disable_device(): it does something nasty to
  3726. * Smart Array controllers that pci_enable_device does not undo
  3727. */
  3728. if (h->transtable)
  3729. iounmap(h->transtable);
  3730. if (h->cfgtable)
  3731. iounmap(h->cfgtable);
  3732. if (h->vaddr)
  3733. iounmap(h->vaddr);
  3734. pci_release_regions(h->pdev);
  3735. return err;
  3736. }
  3737. /* Function to find the first free pointer into our hba[] array
  3738. * Returns -1 if no free entries are left.
  3739. */
  3740. static int alloc_cciss_hba(struct pci_dev *pdev)
  3741. {
  3742. int i;
  3743. for (i = 0; i < MAX_CTLR; i++) {
  3744. if (!hba[i]) {
  3745. ctlr_info_t *h;
  3746. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3747. if (!h)
  3748. goto Enomem;
  3749. hba[i] = h;
  3750. return i;
  3751. }
  3752. }
  3753. dev_warn(&pdev->dev, "This driver supports a maximum"
  3754. " of %d controllers.\n", MAX_CTLR);
  3755. return -1;
  3756. Enomem:
  3757. dev_warn(&pdev->dev, "out of memory.\n");
  3758. return -1;
  3759. }
  3760. static void free_hba(ctlr_info_t *h)
  3761. {
  3762. int i;
  3763. hba[h->ctlr] = NULL;
  3764. for (i = 0; i < h->highest_lun + 1; i++)
  3765. if (h->gendisk[i] != NULL)
  3766. put_disk(h->gendisk[i]);
  3767. kfree(h);
  3768. }
  3769. /* Send a message CDB to the firmware. */
  3770. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3771. {
  3772. typedef struct {
  3773. CommandListHeader_struct CommandHeader;
  3774. RequestBlock_struct Request;
  3775. ErrDescriptor_struct ErrorDescriptor;
  3776. } Command;
  3777. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3778. Command *cmd;
  3779. dma_addr_t paddr64;
  3780. uint32_t paddr32, tag;
  3781. void __iomem *vaddr;
  3782. int i, err;
  3783. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3784. if (vaddr == NULL)
  3785. return -ENOMEM;
  3786. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3787. CCISS commands, so they must be allocated from the lower 4GiB of
  3788. memory. */
  3789. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3790. if (err) {
  3791. iounmap(vaddr);
  3792. return -ENOMEM;
  3793. }
  3794. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3795. if (cmd == NULL) {
  3796. iounmap(vaddr);
  3797. return -ENOMEM;
  3798. }
  3799. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3800. although there's no guarantee, we assume that the address is at
  3801. least 4-byte aligned (most likely, it's page-aligned). */
  3802. paddr32 = paddr64;
  3803. cmd->CommandHeader.ReplyQueue = 0;
  3804. cmd->CommandHeader.SGList = 0;
  3805. cmd->CommandHeader.SGTotal = 0;
  3806. cmd->CommandHeader.Tag.lower = paddr32;
  3807. cmd->CommandHeader.Tag.upper = 0;
  3808. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3809. cmd->Request.CDBLen = 16;
  3810. cmd->Request.Type.Type = TYPE_MSG;
  3811. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3812. cmd->Request.Type.Direction = XFER_NONE;
  3813. cmd->Request.Timeout = 0; /* Don't time out */
  3814. cmd->Request.CDB[0] = opcode;
  3815. cmd->Request.CDB[1] = type;
  3816. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3817. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3818. cmd->ErrorDescriptor.Addr.upper = 0;
  3819. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3820. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3821. for (i = 0; i < 10; i++) {
  3822. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3823. if ((tag & ~3) == paddr32)
  3824. break;
  3825. schedule_timeout_uninterruptible(HZ);
  3826. }
  3827. iounmap(vaddr);
  3828. /* we leak the DMA buffer here ... no choice since the controller could
  3829. still complete the command. */
  3830. if (i == 10) {
  3831. dev_err(&pdev->dev,
  3832. "controller message %02x:%02x timed out\n",
  3833. opcode, type);
  3834. return -ETIMEDOUT;
  3835. }
  3836. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3837. if (tag & 2) {
  3838. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3839. opcode, type);
  3840. return -EIO;
  3841. }
  3842. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3843. opcode, type);
  3844. return 0;
  3845. }
  3846. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3847. #define cciss_noop(p) cciss_message(p, 3, 0)
  3848. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3849. void * __iomem vaddr, bool use_doorbell)
  3850. {
  3851. u16 pmcsr;
  3852. int pos;
  3853. if (use_doorbell) {
  3854. /* For everything after the P600, the PCI power state method
  3855. * of resetting the controller doesn't work, so we have this
  3856. * other way using the doorbell register.
  3857. */
  3858. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3859. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3860. msleep(1000);
  3861. } else { /* Try to do it the PCI power state way */
  3862. /* Quoting from the Open CISS Specification: "The Power
  3863. * Management Control/Status Register (CSR) controls the power
  3864. * state of the device. The normal operating state is D0,
  3865. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3866. * the controller, place the interface device in D3 then to D0,
  3867. * this causes a secondary PCI reset which will reset the
  3868. * controller." */
  3869. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3870. if (pos == 0) {
  3871. dev_err(&pdev->dev,
  3872. "cciss_controller_hard_reset: "
  3873. "PCI PM not supported\n");
  3874. return -ENODEV;
  3875. }
  3876. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3877. /* enter the D3hot power management state */
  3878. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3879. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3880. pmcsr |= PCI_D3hot;
  3881. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3882. msleep(500);
  3883. /* enter the D0 power management state */
  3884. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3885. pmcsr |= PCI_D0;
  3886. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3887. msleep(500);
  3888. }
  3889. return 0;
  3890. }
  3891. /* This does a hard reset of the controller using PCI power management
  3892. * states or using the doorbell register. */
  3893. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3894. {
  3895. u64 cfg_offset;
  3896. u32 cfg_base_addr;
  3897. u64 cfg_base_addr_index;
  3898. void __iomem *vaddr;
  3899. unsigned long paddr;
  3900. u32 misc_fw_support, active_transport;
  3901. int rc;
  3902. CfgTable_struct __iomem *cfgtable;
  3903. bool use_doorbell;
  3904. u32 board_id;
  3905. u16 command_register;
  3906. /* For controllers as old a the p600, this is very nearly
  3907. * the same thing as
  3908. *
  3909. * pci_save_state(pci_dev);
  3910. * pci_set_power_state(pci_dev, PCI_D3hot);
  3911. * pci_set_power_state(pci_dev, PCI_D0);
  3912. * pci_restore_state(pci_dev);
  3913. *
  3914. * For controllers newer than the P600, the pci power state
  3915. * method of resetting doesn't work so we have another way
  3916. * using the doorbell register.
  3917. */
  3918. /* Exclude 640x boards. These are two pci devices in one slot
  3919. * which share a battery backed cache module. One controls the
  3920. * cache, the other accesses the cache through the one that controls
  3921. * it. If we reset the one controlling the cache, the other will
  3922. * likely not be happy. Just forbid resetting this conjoined mess.
  3923. */
  3924. cciss_lookup_board_id(pdev, &board_id);
  3925. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  3926. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  3927. "due to shared cache module.");
  3928. return -ENODEV;
  3929. }
  3930. /* Save the PCI command register */
  3931. pci_read_config_word(pdev, 4, &command_register);
  3932. /* Turn the board off. This is so that later pci_restore_state()
  3933. * won't turn the board on before the rest of config space is ready.
  3934. */
  3935. pci_disable_device(pdev);
  3936. pci_save_state(pdev);
  3937. /* find the first memory BAR, so we can find the cfg table */
  3938. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  3939. if (rc)
  3940. return rc;
  3941. vaddr = remap_pci_mem(paddr, 0x250);
  3942. if (!vaddr)
  3943. return -ENOMEM;
  3944. /* find cfgtable in order to check if reset via doorbell is supported */
  3945. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3946. &cfg_base_addr_index, &cfg_offset);
  3947. if (rc)
  3948. goto unmap_vaddr;
  3949. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3950. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3951. if (!cfgtable) {
  3952. rc = -ENOMEM;
  3953. goto unmap_vaddr;
  3954. }
  3955. /* If reset via doorbell register is supported, use that. */
  3956. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3957. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3958. /* The doorbell reset seems to cause lockups on some Smart
  3959. * Arrays (e.g. P410, P410i, maybe others). Until this is
  3960. * fixed or at least isolated, avoid the doorbell reset.
  3961. */
  3962. use_doorbell = 0;
  3963. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  3964. if (rc)
  3965. goto unmap_cfgtable;
  3966. pci_restore_state(pdev);
  3967. rc = pci_enable_device(pdev);
  3968. if (rc) {
  3969. dev_warn(&pdev->dev, "failed to enable device.\n");
  3970. goto unmap_cfgtable;
  3971. }
  3972. pci_write_config_word(pdev, 4, command_register);
  3973. /* Some devices (notably the HP Smart Array 5i Controller)
  3974. need a little pause here */
  3975. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  3976. /* Wait for board to become not ready, then ready. */
  3977. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  3978. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3979. if (rc) /* Don't bail, might be E500, etc. which can't be reset */
  3980. dev_warn(&pdev->dev,
  3981. "failed waiting for board to become not ready\n");
  3982. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3983. if (rc) {
  3984. dev_warn(&pdev->dev,
  3985. "failed waiting for board to become ready\n");
  3986. goto unmap_cfgtable;
  3987. }
  3988. dev_info(&pdev->dev, "board ready.\n");
  3989. /* Controller should be in simple mode at this point. If it's not,
  3990. * It means we're on one of those controllers which doesn't support
  3991. * the doorbell reset method and on which the PCI power management reset
  3992. * method doesn't work (P800, for example.)
  3993. * In those cases, don't try to proceed, as it generally doesn't work.
  3994. */
  3995. active_transport = readl(&cfgtable->TransportActive);
  3996. if (active_transport & PERFORMANT_MODE) {
  3997. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  3998. " Ignoring controller.\n");
  3999. rc = -ENODEV;
  4000. }
  4001. unmap_cfgtable:
  4002. iounmap(cfgtable);
  4003. unmap_vaddr:
  4004. iounmap(vaddr);
  4005. return rc;
  4006. }
  4007. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4008. {
  4009. int rc, i;
  4010. if (!reset_devices)
  4011. return 0;
  4012. /* Reset the controller with a PCI power-cycle or via doorbell */
  4013. rc = cciss_kdump_hard_reset_controller(pdev);
  4014. /* -ENOTSUPP here means we cannot reset the controller
  4015. * but it's already (and still) up and running in
  4016. * "performant mode". Or, it might be 640x, which can't reset
  4017. * due to concerns about shared bbwc between 6402/6404 pair.
  4018. */
  4019. if (rc == -ENOTSUPP)
  4020. return 0; /* just try to do the kdump anyhow. */
  4021. if (rc)
  4022. return -ENODEV;
  4023. /* Now try to get the controller to respond to a no-op */
  4024. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4025. if (cciss_noop(pdev) == 0)
  4026. break;
  4027. else
  4028. dev_warn(&pdev->dev, "no-op failed%s\n",
  4029. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4030. "; re-trying" : ""));
  4031. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4032. }
  4033. return 0;
  4034. }
  4035. /*
  4036. * This is it. Find all the controllers and register them. I really hate
  4037. * stealing all these major device numbers.
  4038. * returns the number of block devices registered.
  4039. */
  4040. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4041. const struct pci_device_id *ent)
  4042. {
  4043. int i;
  4044. int j = 0;
  4045. int k = 0;
  4046. int rc;
  4047. int dac, return_code;
  4048. InquiryData_struct *inq_buff;
  4049. ctlr_info_t *h;
  4050. rc = cciss_init_reset_devices(pdev);
  4051. if (rc)
  4052. return rc;
  4053. i = alloc_cciss_hba(pdev);
  4054. if (i < 0)
  4055. return -1;
  4056. h = hba[i];
  4057. h->pdev = pdev;
  4058. h->busy_initializing = 1;
  4059. INIT_HLIST_HEAD(&h->cmpQ);
  4060. INIT_HLIST_HEAD(&h->reqQ);
  4061. mutex_init(&h->busy_shutting_down);
  4062. if (cciss_pci_init(h) != 0)
  4063. goto clean_no_release_regions;
  4064. sprintf(h->devname, "cciss%d", i);
  4065. h->ctlr = i;
  4066. init_completion(&h->scan_wait);
  4067. if (cciss_create_hba_sysfs_entry(h))
  4068. goto clean0;
  4069. /* configure PCI DMA stuff */
  4070. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4071. dac = 1;
  4072. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4073. dac = 0;
  4074. else {
  4075. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4076. goto clean1;
  4077. }
  4078. /*
  4079. * register with the major number, or get a dynamic major number
  4080. * by passing 0 as argument. This is done for greater than
  4081. * 8 controller support.
  4082. */
  4083. if (i < MAX_CTLR_ORIG)
  4084. h->major = COMPAQ_CISS_MAJOR + i;
  4085. rc = register_blkdev(h->major, h->devname);
  4086. if (rc == -EBUSY || rc == -EINVAL) {
  4087. dev_err(&h->pdev->dev,
  4088. "Unable to get major number %d for %s "
  4089. "on hba %d\n", h->major, h->devname, i);
  4090. goto clean1;
  4091. } else {
  4092. if (i >= MAX_CTLR_ORIG)
  4093. h->major = rc;
  4094. }
  4095. /* make sure the board interrupts are off */
  4096. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4097. if (h->msi_vector || h->msix_vector) {
  4098. if (request_irq(h->intr[PERF_MODE_INT],
  4099. do_cciss_msix_intr,
  4100. IRQF_DISABLED, h->devname, h)) {
  4101. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4102. h->intr[PERF_MODE_INT], h->devname);
  4103. goto clean2;
  4104. }
  4105. } else {
  4106. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4107. IRQF_DISABLED, h->devname, h)) {
  4108. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4109. h->intr[PERF_MODE_INT], h->devname);
  4110. goto clean2;
  4111. }
  4112. }
  4113. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4114. h->devname, pdev->device, pci_name(pdev),
  4115. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4116. h->cmd_pool_bits =
  4117. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4118. * sizeof(unsigned long), GFP_KERNEL);
  4119. h->cmd_pool = (CommandList_struct *)
  4120. pci_alloc_consistent(h->pdev,
  4121. h->nr_cmds * sizeof(CommandList_struct),
  4122. &(h->cmd_pool_dhandle));
  4123. h->errinfo_pool = (ErrorInfo_struct *)
  4124. pci_alloc_consistent(h->pdev,
  4125. h->nr_cmds * sizeof(ErrorInfo_struct),
  4126. &(h->errinfo_pool_dhandle));
  4127. if ((h->cmd_pool_bits == NULL)
  4128. || (h->cmd_pool == NULL)
  4129. || (h->errinfo_pool == NULL)) {
  4130. dev_err(&h->pdev->dev, "out of memory");
  4131. goto clean4;
  4132. }
  4133. /* Need space for temp scatter list */
  4134. h->scatter_list = kmalloc(h->max_commands *
  4135. sizeof(struct scatterlist *),
  4136. GFP_KERNEL);
  4137. if (!h->scatter_list)
  4138. goto clean4;
  4139. for (k = 0; k < h->nr_cmds; k++) {
  4140. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4141. h->maxsgentries,
  4142. GFP_KERNEL);
  4143. if (h->scatter_list[k] == NULL) {
  4144. dev_err(&h->pdev->dev,
  4145. "could not allocate s/g lists\n");
  4146. goto clean4;
  4147. }
  4148. }
  4149. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4150. h->chainsize, h->nr_cmds);
  4151. if (!h->cmd_sg_list && h->chainsize > 0)
  4152. goto clean4;
  4153. spin_lock_init(&h->lock);
  4154. /* Initialize the pdev driver private data.
  4155. have it point to h. */
  4156. pci_set_drvdata(pdev, h);
  4157. /* command and error info recs zeroed out before
  4158. they are used */
  4159. memset(h->cmd_pool_bits, 0,
  4160. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4161. * sizeof(unsigned long));
  4162. h->num_luns = 0;
  4163. h->highest_lun = -1;
  4164. for (j = 0; j < CISS_MAX_LUN; j++) {
  4165. h->drv[j] = NULL;
  4166. h->gendisk[j] = NULL;
  4167. }
  4168. cciss_scsi_setup(h);
  4169. /* Turn the interrupts on so we can service requests */
  4170. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4171. /* Get the firmware version */
  4172. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4173. if (inq_buff == NULL) {
  4174. dev_err(&h->pdev->dev, "out of memory\n");
  4175. goto clean4;
  4176. }
  4177. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4178. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4179. if (return_code == IO_OK) {
  4180. h->firm_ver[0] = inq_buff->data_byte[32];
  4181. h->firm_ver[1] = inq_buff->data_byte[33];
  4182. h->firm_ver[2] = inq_buff->data_byte[34];
  4183. h->firm_ver[3] = inq_buff->data_byte[35];
  4184. } else { /* send command failed */
  4185. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4186. " version of controller\n");
  4187. }
  4188. kfree(inq_buff);
  4189. cciss_procinit(h);
  4190. h->cciss_max_sectors = 8192;
  4191. rebuild_lun_table(h, 1, 0);
  4192. h->busy_initializing = 0;
  4193. return 1;
  4194. clean4:
  4195. kfree(h->cmd_pool_bits);
  4196. /* Free up sg elements */
  4197. for (k-- ; k >= 0; k--)
  4198. kfree(h->scatter_list[k]);
  4199. kfree(h->scatter_list);
  4200. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4201. if (h->cmd_pool)
  4202. pci_free_consistent(h->pdev,
  4203. h->nr_cmds * sizeof(CommandList_struct),
  4204. h->cmd_pool, h->cmd_pool_dhandle);
  4205. if (h->errinfo_pool)
  4206. pci_free_consistent(h->pdev,
  4207. h->nr_cmds * sizeof(ErrorInfo_struct),
  4208. h->errinfo_pool,
  4209. h->errinfo_pool_dhandle);
  4210. free_irq(h->intr[PERF_MODE_INT], h);
  4211. clean2:
  4212. unregister_blkdev(h->major, h->devname);
  4213. clean1:
  4214. cciss_destroy_hba_sysfs_entry(h);
  4215. clean0:
  4216. pci_release_regions(pdev);
  4217. clean_no_release_regions:
  4218. h->busy_initializing = 0;
  4219. /*
  4220. * Deliberately omit pci_disable_device(): it does something nasty to
  4221. * Smart Array controllers that pci_enable_device does not undo
  4222. */
  4223. pci_set_drvdata(pdev, NULL);
  4224. free_hba(h);
  4225. return -1;
  4226. }
  4227. static void cciss_shutdown(struct pci_dev *pdev)
  4228. {
  4229. ctlr_info_t *h;
  4230. char *flush_buf;
  4231. int return_code;
  4232. h = pci_get_drvdata(pdev);
  4233. flush_buf = kzalloc(4, GFP_KERNEL);
  4234. if (!flush_buf) {
  4235. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4236. return;
  4237. }
  4238. /* write all data in the battery backed cache to disk */
  4239. memset(flush_buf, 0, 4);
  4240. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4241. 4, 0, CTLR_LUNID, TYPE_CMD);
  4242. kfree(flush_buf);
  4243. if (return_code != IO_OK)
  4244. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4245. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4246. free_irq(h->intr[PERF_MODE_INT], h);
  4247. }
  4248. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4249. {
  4250. ctlr_info_t *h;
  4251. int i, j;
  4252. if (pci_get_drvdata(pdev) == NULL) {
  4253. dev_err(&pdev->dev, "Unable to remove device\n");
  4254. return;
  4255. }
  4256. h = pci_get_drvdata(pdev);
  4257. i = h->ctlr;
  4258. if (hba[i] == NULL) {
  4259. dev_err(&pdev->dev, "device appears to already be removed\n");
  4260. return;
  4261. }
  4262. mutex_lock(&h->busy_shutting_down);
  4263. remove_from_scan_list(h);
  4264. remove_proc_entry(h->devname, proc_cciss);
  4265. unregister_blkdev(h->major, h->devname);
  4266. /* remove it from the disk list */
  4267. for (j = 0; j < CISS_MAX_LUN; j++) {
  4268. struct gendisk *disk = h->gendisk[j];
  4269. if (disk) {
  4270. struct request_queue *q = disk->queue;
  4271. if (disk->flags & GENHD_FL_UP) {
  4272. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4273. del_gendisk(disk);
  4274. }
  4275. if (q)
  4276. blk_cleanup_queue(q);
  4277. }
  4278. }
  4279. #ifdef CONFIG_CISS_SCSI_TAPE
  4280. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4281. #endif
  4282. cciss_shutdown(pdev);
  4283. #ifdef CONFIG_PCI_MSI
  4284. if (h->msix_vector)
  4285. pci_disable_msix(h->pdev);
  4286. else if (h->msi_vector)
  4287. pci_disable_msi(h->pdev);
  4288. #endif /* CONFIG_PCI_MSI */
  4289. iounmap(h->transtable);
  4290. iounmap(h->cfgtable);
  4291. iounmap(h->vaddr);
  4292. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4293. h->cmd_pool, h->cmd_pool_dhandle);
  4294. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4295. h->errinfo_pool, h->errinfo_pool_dhandle);
  4296. kfree(h->cmd_pool_bits);
  4297. /* Free up sg elements */
  4298. for (j = 0; j < h->nr_cmds; j++)
  4299. kfree(h->scatter_list[j]);
  4300. kfree(h->scatter_list);
  4301. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4302. /*
  4303. * Deliberately omit pci_disable_device(): it does something nasty to
  4304. * Smart Array controllers that pci_enable_device does not undo
  4305. */
  4306. pci_release_regions(pdev);
  4307. pci_set_drvdata(pdev, NULL);
  4308. cciss_destroy_hba_sysfs_entry(h);
  4309. mutex_unlock(&h->busy_shutting_down);
  4310. free_hba(h);
  4311. }
  4312. static struct pci_driver cciss_pci_driver = {
  4313. .name = "cciss",
  4314. .probe = cciss_init_one,
  4315. .remove = __devexit_p(cciss_remove_one),
  4316. .id_table = cciss_pci_device_id, /* id_table */
  4317. .shutdown = cciss_shutdown,
  4318. };
  4319. /*
  4320. * This is it. Register the PCI driver information for the cards we control
  4321. * the OS will call our registered routines when it finds one of our cards.
  4322. */
  4323. static int __init cciss_init(void)
  4324. {
  4325. int err;
  4326. /*
  4327. * The hardware requires that commands are aligned on a 64-bit
  4328. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4329. * array of them, the size must be a multiple of 8 bytes.
  4330. */
  4331. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4332. printk(KERN_INFO DRIVER_NAME "\n");
  4333. err = bus_register(&cciss_bus_type);
  4334. if (err)
  4335. return err;
  4336. /* Start the scan thread */
  4337. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4338. if (IS_ERR(cciss_scan_thread)) {
  4339. err = PTR_ERR(cciss_scan_thread);
  4340. goto err_bus_unregister;
  4341. }
  4342. /* Register for our PCI devices */
  4343. err = pci_register_driver(&cciss_pci_driver);
  4344. if (err)
  4345. goto err_thread_stop;
  4346. return err;
  4347. err_thread_stop:
  4348. kthread_stop(cciss_scan_thread);
  4349. err_bus_unregister:
  4350. bus_unregister(&cciss_bus_type);
  4351. return err;
  4352. }
  4353. static void __exit cciss_cleanup(void)
  4354. {
  4355. int i;
  4356. pci_unregister_driver(&cciss_pci_driver);
  4357. /* double check that all controller entrys have been removed */
  4358. for (i = 0; i < MAX_CTLR; i++) {
  4359. if (hba[i] != NULL) {
  4360. dev_warn(&hba[i]->pdev->dev,
  4361. "had to remove controller\n");
  4362. cciss_remove_one(hba[i]->pdev);
  4363. }
  4364. }
  4365. kthread_stop(cciss_scan_thread);
  4366. remove_proc_entry("driver/cciss", NULL);
  4367. bus_unregister(&cciss_bus_type);
  4368. }
  4369. module_init(cciss_init);
  4370. module_exit(cciss_cleanup);