mwl8k.c 100 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Register definitions */
  30. #define MWL8K_HIU_GEN_PTR 0x00000c10
  31. #define MWL8K_MODE_STA 0x0000005a
  32. #define MWL8K_MODE_AP 0x000000a5
  33. #define MWL8K_HIU_INT_CODE 0x00000c14
  34. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  35. #define MWL8K_FWAP_READY 0xf1f2f4a5
  36. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  37. #define MWL8K_HIU_SCRATCH 0x00000c40
  38. /* Host->device communications */
  39. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  40. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  41. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  42. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  43. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  44. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  45. #define MWL8K_H2A_INT_RESET (1 << 15)
  46. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  47. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  48. /* Device->host communications */
  49. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  50. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  51. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  52. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  53. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  54. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  55. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  56. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  57. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  58. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  59. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  60. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  61. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  62. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  63. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  64. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  65. MWL8K_A2H_INT_CHNL_SWITCHED | \
  66. MWL8K_A2H_INT_QUEUE_EMPTY | \
  67. MWL8K_A2H_INT_RADAR_DETECT | \
  68. MWL8K_A2H_INT_RADIO_ON | \
  69. MWL8K_A2H_INT_RADIO_OFF | \
  70. MWL8K_A2H_INT_MAC_EVENT | \
  71. MWL8K_A2H_INT_OPC_DONE | \
  72. MWL8K_A2H_INT_RX_READY | \
  73. MWL8K_A2H_INT_TX_DONE)
  74. #define MWL8K_RX_QUEUES 1
  75. #define MWL8K_TX_QUEUES 4
  76. struct rxd_ops {
  77. int rxd_size;
  78. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  79. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  80. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  81. __le16 *qos, s8 *noise);
  82. };
  83. struct mwl8k_device_info {
  84. char *part_name;
  85. char *helper_image;
  86. char *fw_image;
  87. struct rxd_ops *ap_rxd_ops;
  88. };
  89. struct mwl8k_rx_queue {
  90. int rxd_count;
  91. /* hw receives here */
  92. int head;
  93. /* refill descs here */
  94. int tail;
  95. void *rxd;
  96. dma_addr_t rxd_dma;
  97. struct {
  98. struct sk_buff *skb;
  99. DEFINE_DMA_UNMAP_ADDR(dma);
  100. } *buf;
  101. };
  102. struct mwl8k_tx_queue {
  103. /* hw transmits here */
  104. int head;
  105. /* sw appends here */
  106. int tail;
  107. unsigned int len;
  108. struct mwl8k_tx_desc *txd;
  109. dma_addr_t txd_dma;
  110. struct sk_buff **skb;
  111. };
  112. struct mwl8k_priv {
  113. struct ieee80211_hw *hw;
  114. struct pci_dev *pdev;
  115. struct mwl8k_device_info *device_info;
  116. void __iomem *sram;
  117. void __iomem *regs;
  118. /* firmware */
  119. struct firmware *fw_helper;
  120. struct firmware *fw_ucode;
  121. /* hardware/firmware parameters */
  122. bool ap_fw;
  123. struct rxd_ops *rxd_ops;
  124. struct ieee80211_supported_band band_24;
  125. struct ieee80211_channel channels_24[14];
  126. struct ieee80211_rate rates_24[14];
  127. struct ieee80211_supported_band band_50;
  128. struct ieee80211_channel channels_50[4];
  129. struct ieee80211_rate rates_50[9];
  130. u32 ap_macids_supported;
  131. u32 sta_macids_supported;
  132. /* firmware access */
  133. struct mutex fw_mutex;
  134. struct task_struct *fw_mutex_owner;
  135. int fw_mutex_depth;
  136. struct completion *hostcmd_wait;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  140. struct completion *tx_wait;
  141. /* List of interfaces. */
  142. u32 macids_used;
  143. struct list_head vif_list;
  144. /* power management status cookie from firmware */
  145. u32 *cookie;
  146. dma_addr_t cookie_dma;
  147. u16 num_mcaddrs;
  148. u8 hw_rev;
  149. u32 fw_rev;
  150. /*
  151. * Running count of TX packets in flight, to avoid
  152. * iterating over the transmit rings each time.
  153. */
  154. int pending_tx_pkts;
  155. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  156. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool sniffer_enabled;
  160. bool wmm_enabled;
  161. /* XXX need to convert this to handle multiple interfaces */
  162. bool capture_beacon;
  163. u8 capture_bssid[ETH_ALEN];
  164. struct sk_buff *beacon_skb;
  165. /*
  166. * This FJ worker has to be global as it is scheduled from the
  167. * RX handler. At this point we don't know which interface it
  168. * belongs to until the list of bssids waiting to complete join
  169. * is checked.
  170. */
  171. struct work_struct finalize_join_worker;
  172. /* Tasklet to perform TX reclaim. */
  173. struct tasklet_struct poll_tx_task;
  174. /* Tasklet to perform RX. */
  175. struct tasklet_struct poll_rx_task;
  176. /* Most recently reported noise in dBm */
  177. s8 noise;
  178. };
  179. /* Per interface specific private data */
  180. struct mwl8k_vif {
  181. struct list_head list;
  182. struct ieee80211_vif *vif;
  183. /* Firmware macid for this vif. */
  184. int macid;
  185. /* Non AMPDU sequence number assigned by driver. */
  186. u16 seqno;
  187. };
  188. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  189. struct mwl8k_sta {
  190. /* Index into station database. Returned by UPDATE_STADB. */
  191. u8 peer_id;
  192. };
  193. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  194. static const struct ieee80211_channel mwl8k_channels_24[] = {
  195. { .center_freq = 2412, .hw_value = 1, },
  196. { .center_freq = 2417, .hw_value = 2, },
  197. { .center_freq = 2422, .hw_value = 3, },
  198. { .center_freq = 2427, .hw_value = 4, },
  199. { .center_freq = 2432, .hw_value = 5, },
  200. { .center_freq = 2437, .hw_value = 6, },
  201. { .center_freq = 2442, .hw_value = 7, },
  202. { .center_freq = 2447, .hw_value = 8, },
  203. { .center_freq = 2452, .hw_value = 9, },
  204. { .center_freq = 2457, .hw_value = 10, },
  205. { .center_freq = 2462, .hw_value = 11, },
  206. { .center_freq = 2467, .hw_value = 12, },
  207. { .center_freq = 2472, .hw_value = 13, },
  208. { .center_freq = 2484, .hw_value = 14, },
  209. };
  210. static const struct ieee80211_rate mwl8k_rates_24[] = {
  211. { .bitrate = 10, .hw_value = 2, },
  212. { .bitrate = 20, .hw_value = 4, },
  213. { .bitrate = 55, .hw_value = 11, },
  214. { .bitrate = 110, .hw_value = 22, },
  215. { .bitrate = 220, .hw_value = 44, },
  216. { .bitrate = 60, .hw_value = 12, },
  217. { .bitrate = 90, .hw_value = 18, },
  218. { .bitrate = 120, .hw_value = 24, },
  219. { .bitrate = 180, .hw_value = 36, },
  220. { .bitrate = 240, .hw_value = 48, },
  221. { .bitrate = 360, .hw_value = 72, },
  222. { .bitrate = 480, .hw_value = 96, },
  223. { .bitrate = 540, .hw_value = 108, },
  224. { .bitrate = 720, .hw_value = 144, },
  225. };
  226. static const struct ieee80211_channel mwl8k_channels_50[] = {
  227. { .center_freq = 5180, .hw_value = 36, },
  228. { .center_freq = 5200, .hw_value = 40, },
  229. { .center_freq = 5220, .hw_value = 44, },
  230. { .center_freq = 5240, .hw_value = 48, },
  231. };
  232. static const struct ieee80211_rate mwl8k_rates_50[] = {
  233. { .bitrate = 60, .hw_value = 12, },
  234. { .bitrate = 90, .hw_value = 18, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. { .bitrate = 720, .hw_value = 144, },
  242. };
  243. /* Set or get info from Firmware */
  244. #define MWL8K_CMD_GET 0x0000
  245. #define MWL8K_CMD_SET 0x0001
  246. #define MWL8K_CMD_SET_LIST 0x0002
  247. /* Firmware command codes */
  248. #define MWL8K_CMD_CODE_DNLD 0x0001
  249. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  250. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  251. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  252. #define MWL8K_CMD_GET_STAT 0x0014
  253. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  254. #define MWL8K_CMD_RF_TX_POWER 0x001e
  255. #define MWL8K_CMD_TX_POWER 0x001f
  256. #define MWL8K_CMD_RF_ANTENNA 0x0020
  257. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  258. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  259. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  260. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  261. #define MWL8K_CMD_SET_AID 0x010d
  262. #define MWL8K_CMD_SET_RATE 0x0110
  263. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  264. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  265. #define MWL8K_CMD_SET_SLOT 0x0114
  266. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  267. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  268. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  269. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  270. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  271. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  272. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  273. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  274. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  275. #define MWL8K_CMD_UPDATE_STADB 0x1123
  276. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  277. {
  278. u16 command = le16_to_cpu(cmd);
  279. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  280. snprintf(buf, bufsize, "%s", #x);\
  281. return buf;\
  282. } while (0)
  283. switch (command & ~0x8000) {
  284. MWL8K_CMDNAME(CODE_DNLD);
  285. MWL8K_CMDNAME(GET_HW_SPEC);
  286. MWL8K_CMDNAME(SET_HW_SPEC);
  287. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  288. MWL8K_CMDNAME(GET_STAT);
  289. MWL8K_CMDNAME(RADIO_CONTROL);
  290. MWL8K_CMDNAME(RF_TX_POWER);
  291. MWL8K_CMDNAME(TX_POWER);
  292. MWL8K_CMDNAME(RF_ANTENNA);
  293. MWL8K_CMDNAME(SET_BEACON);
  294. MWL8K_CMDNAME(SET_PRE_SCAN);
  295. MWL8K_CMDNAME(SET_POST_SCAN);
  296. MWL8K_CMDNAME(SET_RF_CHANNEL);
  297. MWL8K_CMDNAME(SET_AID);
  298. MWL8K_CMDNAME(SET_RATE);
  299. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  300. MWL8K_CMDNAME(RTS_THRESHOLD);
  301. MWL8K_CMDNAME(SET_SLOT);
  302. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  303. MWL8K_CMDNAME(SET_WMM_MODE);
  304. MWL8K_CMDNAME(MIMO_CONFIG);
  305. MWL8K_CMDNAME(USE_FIXED_RATE);
  306. MWL8K_CMDNAME(ENABLE_SNIFFER);
  307. MWL8K_CMDNAME(SET_MAC_ADDR);
  308. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  309. MWL8K_CMDNAME(BSS_START);
  310. MWL8K_CMDNAME(SET_NEW_STN);
  311. MWL8K_CMDNAME(UPDATE_STADB);
  312. default:
  313. snprintf(buf, bufsize, "0x%x", cmd);
  314. }
  315. #undef MWL8K_CMDNAME
  316. return buf;
  317. }
  318. /* Hardware and firmware reset */
  319. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  320. {
  321. iowrite32(MWL8K_H2A_INT_RESET,
  322. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  323. iowrite32(MWL8K_H2A_INT_RESET,
  324. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  325. msleep(20);
  326. }
  327. /* Release fw image */
  328. static void mwl8k_release_fw(struct firmware **fw)
  329. {
  330. if (*fw == NULL)
  331. return;
  332. release_firmware(*fw);
  333. *fw = NULL;
  334. }
  335. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  336. {
  337. mwl8k_release_fw(&priv->fw_ucode);
  338. mwl8k_release_fw(&priv->fw_helper);
  339. }
  340. /* Request fw image */
  341. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  342. const char *fname, struct firmware **fw)
  343. {
  344. /* release current image */
  345. if (*fw != NULL)
  346. mwl8k_release_fw(fw);
  347. return request_firmware((const struct firmware **)fw,
  348. fname, &priv->pdev->dev);
  349. }
  350. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  351. {
  352. struct mwl8k_device_info *di = priv->device_info;
  353. int rc;
  354. if (di->helper_image != NULL) {
  355. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  356. if (rc) {
  357. printk(KERN_ERR "%s: Error requesting helper "
  358. "firmware file %s\n", pci_name(priv->pdev),
  359. di->helper_image);
  360. return rc;
  361. }
  362. }
  363. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  364. if (rc) {
  365. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  366. pci_name(priv->pdev), di->fw_image);
  367. mwl8k_release_fw(&priv->fw_helper);
  368. return rc;
  369. }
  370. return 0;
  371. }
  372. struct mwl8k_cmd_pkt {
  373. __le16 code;
  374. __le16 length;
  375. __u8 seq_num;
  376. __u8 macid;
  377. __le16 result;
  378. char payload[0];
  379. } __packed;
  380. /*
  381. * Firmware loading.
  382. */
  383. static int
  384. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  385. {
  386. void __iomem *regs = priv->regs;
  387. dma_addr_t dma_addr;
  388. int loops;
  389. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  390. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  391. return -ENOMEM;
  392. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  393. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  394. iowrite32(MWL8K_H2A_INT_DOORBELL,
  395. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  396. iowrite32(MWL8K_H2A_INT_DUMMY,
  397. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  398. loops = 1000;
  399. do {
  400. u32 int_code;
  401. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  402. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  403. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  404. break;
  405. }
  406. cond_resched();
  407. udelay(1);
  408. } while (--loops);
  409. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  410. return loops ? 0 : -ETIMEDOUT;
  411. }
  412. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  413. const u8 *data, size_t length)
  414. {
  415. struct mwl8k_cmd_pkt *cmd;
  416. int done;
  417. int rc = 0;
  418. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  419. if (cmd == NULL)
  420. return -ENOMEM;
  421. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  422. cmd->seq_num = 0;
  423. cmd->macid = 0;
  424. cmd->result = 0;
  425. done = 0;
  426. while (length) {
  427. int block_size = length > 256 ? 256 : length;
  428. memcpy(cmd->payload, data + done, block_size);
  429. cmd->length = cpu_to_le16(block_size);
  430. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  431. sizeof(*cmd) + block_size);
  432. if (rc)
  433. break;
  434. done += block_size;
  435. length -= block_size;
  436. }
  437. if (!rc) {
  438. cmd->length = 0;
  439. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  440. }
  441. kfree(cmd);
  442. return rc;
  443. }
  444. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  445. const u8 *data, size_t length)
  446. {
  447. unsigned char *buffer;
  448. int may_continue, rc = 0;
  449. u32 done, prev_block_size;
  450. buffer = kmalloc(1024, GFP_KERNEL);
  451. if (buffer == NULL)
  452. return -ENOMEM;
  453. done = 0;
  454. prev_block_size = 0;
  455. may_continue = 1000;
  456. while (may_continue > 0) {
  457. u32 block_size;
  458. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  459. if (block_size & 1) {
  460. block_size &= ~1;
  461. may_continue--;
  462. } else {
  463. done += prev_block_size;
  464. length -= prev_block_size;
  465. }
  466. if (block_size > 1024 || block_size > length) {
  467. rc = -EOVERFLOW;
  468. break;
  469. }
  470. if (length == 0) {
  471. rc = 0;
  472. break;
  473. }
  474. if (block_size == 0) {
  475. rc = -EPROTO;
  476. may_continue--;
  477. udelay(1);
  478. continue;
  479. }
  480. prev_block_size = block_size;
  481. memcpy(buffer, data + done, block_size);
  482. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  483. if (rc)
  484. break;
  485. }
  486. if (!rc && length != 0)
  487. rc = -EREMOTEIO;
  488. kfree(buffer);
  489. return rc;
  490. }
  491. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  492. {
  493. struct mwl8k_priv *priv = hw->priv;
  494. struct firmware *fw = priv->fw_ucode;
  495. int rc;
  496. int loops;
  497. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  498. struct firmware *helper = priv->fw_helper;
  499. if (helper == NULL) {
  500. printk(KERN_ERR "%s: helper image needed but none "
  501. "given\n", pci_name(priv->pdev));
  502. return -EINVAL;
  503. }
  504. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  505. if (rc) {
  506. printk(KERN_ERR "%s: unable to load firmware "
  507. "helper image\n", pci_name(priv->pdev));
  508. return rc;
  509. }
  510. msleep(5);
  511. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  512. } else {
  513. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  514. }
  515. if (rc) {
  516. printk(KERN_ERR "%s: unable to load firmware image\n",
  517. pci_name(priv->pdev));
  518. return rc;
  519. }
  520. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  521. loops = 500000;
  522. do {
  523. u32 ready_code;
  524. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  525. if (ready_code == MWL8K_FWAP_READY) {
  526. priv->ap_fw = 1;
  527. break;
  528. } else if (ready_code == MWL8K_FWSTA_READY) {
  529. priv->ap_fw = 0;
  530. break;
  531. }
  532. cond_resched();
  533. udelay(1);
  534. } while (--loops);
  535. return loops ? 0 : -ETIMEDOUT;
  536. }
  537. /* DMA header used by firmware and hardware. */
  538. struct mwl8k_dma_data {
  539. __le16 fwlen;
  540. struct ieee80211_hdr wh;
  541. char data[0];
  542. } __packed;
  543. /* Routines to add/remove DMA header from skb. */
  544. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  545. {
  546. struct mwl8k_dma_data *tr;
  547. int hdrlen;
  548. tr = (struct mwl8k_dma_data *)skb->data;
  549. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  550. if (hdrlen != sizeof(tr->wh)) {
  551. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  552. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  553. *((__le16 *)(tr->data - 2)) = qos;
  554. } else {
  555. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  556. }
  557. }
  558. if (hdrlen != sizeof(*tr))
  559. skb_pull(skb, sizeof(*tr) - hdrlen);
  560. }
  561. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  562. {
  563. struct ieee80211_hdr *wh;
  564. int hdrlen;
  565. struct mwl8k_dma_data *tr;
  566. /*
  567. * Add a firmware DMA header; the firmware requires that we
  568. * present a 2-byte payload length followed by a 4-address
  569. * header (without QoS field), followed (optionally) by any
  570. * WEP/ExtIV header (but only filled in for CCMP).
  571. */
  572. wh = (struct ieee80211_hdr *)skb->data;
  573. hdrlen = ieee80211_hdrlen(wh->frame_control);
  574. if (hdrlen != sizeof(*tr))
  575. skb_push(skb, sizeof(*tr) - hdrlen);
  576. if (ieee80211_is_data_qos(wh->frame_control))
  577. hdrlen -= 2;
  578. tr = (struct mwl8k_dma_data *)skb->data;
  579. if (wh != &tr->wh)
  580. memmove(&tr->wh, wh, hdrlen);
  581. if (hdrlen != sizeof(tr->wh))
  582. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  583. /*
  584. * Firmware length is the length of the fully formed "802.11
  585. * payload". That is, everything except for the 802.11 header.
  586. * This includes all crypto material including the MIC.
  587. */
  588. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  589. }
  590. /*
  591. * Packet reception for 88w8366 AP firmware.
  592. */
  593. struct mwl8k_rxd_8366_ap {
  594. __le16 pkt_len;
  595. __u8 sq2;
  596. __u8 rate;
  597. __le32 pkt_phys_addr;
  598. __le32 next_rxd_phys_addr;
  599. __le16 qos_control;
  600. __le16 htsig2;
  601. __le32 hw_rssi_info;
  602. __le32 hw_noise_floor_info;
  603. __u8 noise_floor;
  604. __u8 pad0[3];
  605. __u8 rssi;
  606. __u8 rx_status;
  607. __u8 channel;
  608. __u8 rx_ctrl;
  609. } __packed;
  610. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  611. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  612. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  613. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  614. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  615. {
  616. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  617. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  618. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  619. }
  620. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  621. {
  622. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  623. rxd->pkt_len = cpu_to_le16(len);
  624. rxd->pkt_phys_addr = cpu_to_le32(addr);
  625. wmb();
  626. rxd->rx_ctrl = 0;
  627. }
  628. static int
  629. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  630. __le16 *qos, s8 *noise)
  631. {
  632. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  633. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  634. return -1;
  635. rmb();
  636. memset(status, 0, sizeof(*status));
  637. status->signal = -rxd->rssi;
  638. *noise = -rxd->noise_floor;
  639. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  640. status->flag |= RX_FLAG_HT;
  641. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  642. status->flag |= RX_FLAG_40MHZ;
  643. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  644. } else {
  645. int i;
  646. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  647. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  648. status->rate_idx = i;
  649. break;
  650. }
  651. }
  652. }
  653. if (rxd->channel > 14) {
  654. status->band = IEEE80211_BAND_5GHZ;
  655. if (!(status->flag & RX_FLAG_HT))
  656. status->rate_idx -= 5;
  657. } else {
  658. status->band = IEEE80211_BAND_2GHZ;
  659. }
  660. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  661. *qos = rxd->qos_control;
  662. return le16_to_cpu(rxd->pkt_len);
  663. }
  664. static struct rxd_ops rxd_8366_ap_ops = {
  665. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  666. .rxd_init = mwl8k_rxd_8366_ap_init,
  667. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  668. .rxd_process = mwl8k_rxd_8366_ap_process,
  669. };
  670. /*
  671. * Packet reception for STA firmware.
  672. */
  673. struct mwl8k_rxd_sta {
  674. __le16 pkt_len;
  675. __u8 link_quality;
  676. __u8 noise_level;
  677. __le32 pkt_phys_addr;
  678. __le32 next_rxd_phys_addr;
  679. __le16 qos_control;
  680. __le16 rate_info;
  681. __le32 pad0[4];
  682. __u8 rssi;
  683. __u8 channel;
  684. __le16 pad1;
  685. __u8 rx_ctrl;
  686. __u8 rx_status;
  687. __u8 pad2[2];
  688. } __packed;
  689. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  690. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  691. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  692. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  693. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  694. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  695. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  696. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  697. {
  698. struct mwl8k_rxd_sta *rxd = _rxd;
  699. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  700. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  701. }
  702. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  703. {
  704. struct mwl8k_rxd_sta *rxd = _rxd;
  705. rxd->pkt_len = cpu_to_le16(len);
  706. rxd->pkt_phys_addr = cpu_to_le32(addr);
  707. wmb();
  708. rxd->rx_ctrl = 0;
  709. }
  710. static int
  711. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  712. __le16 *qos, s8 *noise)
  713. {
  714. struct mwl8k_rxd_sta *rxd = _rxd;
  715. u16 rate_info;
  716. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  717. return -1;
  718. rmb();
  719. rate_info = le16_to_cpu(rxd->rate_info);
  720. memset(status, 0, sizeof(*status));
  721. status->signal = -rxd->rssi;
  722. *noise = -rxd->noise_level;
  723. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  724. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  725. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  726. status->flag |= RX_FLAG_SHORTPRE;
  727. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  728. status->flag |= RX_FLAG_40MHZ;
  729. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  730. status->flag |= RX_FLAG_SHORT_GI;
  731. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  732. status->flag |= RX_FLAG_HT;
  733. if (rxd->channel > 14) {
  734. status->band = IEEE80211_BAND_5GHZ;
  735. if (!(status->flag & RX_FLAG_HT))
  736. status->rate_idx -= 5;
  737. } else {
  738. status->band = IEEE80211_BAND_2GHZ;
  739. }
  740. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  741. *qos = rxd->qos_control;
  742. return le16_to_cpu(rxd->pkt_len);
  743. }
  744. static struct rxd_ops rxd_sta_ops = {
  745. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  746. .rxd_init = mwl8k_rxd_sta_init,
  747. .rxd_refill = mwl8k_rxd_sta_refill,
  748. .rxd_process = mwl8k_rxd_sta_process,
  749. };
  750. #define MWL8K_RX_DESCS 256
  751. #define MWL8K_RX_MAXSZ 3800
  752. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  753. {
  754. struct mwl8k_priv *priv = hw->priv;
  755. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  756. int size;
  757. int i;
  758. rxq->rxd_count = 0;
  759. rxq->head = 0;
  760. rxq->tail = 0;
  761. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  762. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  763. if (rxq->rxd == NULL) {
  764. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  765. return -ENOMEM;
  766. }
  767. memset(rxq->rxd, 0, size);
  768. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  769. if (rxq->buf == NULL) {
  770. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  771. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  772. return -ENOMEM;
  773. }
  774. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  775. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  776. int desc_size;
  777. void *rxd;
  778. int nexti;
  779. dma_addr_t next_dma_addr;
  780. desc_size = priv->rxd_ops->rxd_size;
  781. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  782. nexti = i + 1;
  783. if (nexti == MWL8K_RX_DESCS)
  784. nexti = 0;
  785. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  786. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  787. }
  788. return 0;
  789. }
  790. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  791. {
  792. struct mwl8k_priv *priv = hw->priv;
  793. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  794. int refilled;
  795. refilled = 0;
  796. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  797. struct sk_buff *skb;
  798. dma_addr_t addr;
  799. int rx;
  800. void *rxd;
  801. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  802. if (skb == NULL)
  803. break;
  804. addr = pci_map_single(priv->pdev, skb->data,
  805. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  806. rxq->rxd_count++;
  807. rx = rxq->tail++;
  808. if (rxq->tail == MWL8K_RX_DESCS)
  809. rxq->tail = 0;
  810. rxq->buf[rx].skb = skb;
  811. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  812. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  813. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  814. refilled++;
  815. }
  816. return refilled;
  817. }
  818. /* Must be called only when the card's reception is completely halted */
  819. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  820. {
  821. struct mwl8k_priv *priv = hw->priv;
  822. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  823. int i;
  824. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  825. if (rxq->buf[i].skb != NULL) {
  826. pci_unmap_single(priv->pdev,
  827. dma_unmap_addr(&rxq->buf[i], dma),
  828. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  829. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  830. kfree_skb(rxq->buf[i].skb);
  831. rxq->buf[i].skb = NULL;
  832. }
  833. }
  834. kfree(rxq->buf);
  835. rxq->buf = NULL;
  836. pci_free_consistent(priv->pdev,
  837. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  838. rxq->rxd, rxq->rxd_dma);
  839. rxq->rxd = NULL;
  840. }
  841. /*
  842. * Scan a list of BSSIDs to process for finalize join.
  843. * Allows for extension to process multiple BSSIDs.
  844. */
  845. static inline int
  846. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  847. {
  848. return priv->capture_beacon &&
  849. ieee80211_is_beacon(wh->frame_control) &&
  850. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  851. }
  852. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  853. struct sk_buff *skb)
  854. {
  855. struct mwl8k_priv *priv = hw->priv;
  856. priv->capture_beacon = false;
  857. memset(priv->capture_bssid, 0, ETH_ALEN);
  858. /*
  859. * Use GFP_ATOMIC as rxq_process is called from
  860. * the primary interrupt handler, memory allocation call
  861. * must not sleep.
  862. */
  863. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  864. if (priv->beacon_skb != NULL)
  865. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  866. }
  867. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  868. {
  869. struct mwl8k_priv *priv = hw->priv;
  870. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  871. int processed;
  872. processed = 0;
  873. while (rxq->rxd_count && limit--) {
  874. struct sk_buff *skb;
  875. void *rxd;
  876. int pkt_len;
  877. struct ieee80211_rx_status status;
  878. __le16 qos;
  879. skb = rxq->buf[rxq->head].skb;
  880. if (skb == NULL)
  881. break;
  882. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  883. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  884. &priv->noise);
  885. if (pkt_len < 0)
  886. break;
  887. rxq->buf[rxq->head].skb = NULL;
  888. pci_unmap_single(priv->pdev,
  889. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  890. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  891. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  892. rxq->head++;
  893. if (rxq->head == MWL8K_RX_DESCS)
  894. rxq->head = 0;
  895. rxq->rxd_count--;
  896. skb_put(skb, pkt_len);
  897. mwl8k_remove_dma_header(skb, qos);
  898. /*
  899. * Check for a pending join operation. Save a
  900. * copy of the beacon and schedule a tasklet to
  901. * send a FINALIZE_JOIN command to the firmware.
  902. */
  903. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  904. mwl8k_save_beacon(hw, skb);
  905. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  906. ieee80211_rx_irqsafe(hw, skb);
  907. processed++;
  908. }
  909. return processed;
  910. }
  911. /*
  912. * Packet transmission.
  913. */
  914. #define MWL8K_TXD_STATUS_OK 0x00000001
  915. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  916. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  917. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  918. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  919. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  920. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  921. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  922. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  923. #define MWL8K_QOS_EOSP 0x0010
  924. struct mwl8k_tx_desc {
  925. __le32 status;
  926. __u8 data_rate;
  927. __u8 tx_priority;
  928. __le16 qos_control;
  929. __le32 pkt_phys_addr;
  930. __le16 pkt_len;
  931. __u8 dest_MAC_addr[ETH_ALEN];
  932. __le32 next_txd_phys_addr;
  933. __le32 reserved;
  934. __le16 rate_info;
  935. __u8 peer_id;
  936. __u8 tx_frag_cnt;
  937. } __packed;
  938. #define MWL8K_TX_DESCS 128
  939. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  940. {
  941. struct mwl8k_priv *priv = hw->priv;
  942. struct mwl8k_tx_queue *txq = priv->txq + index;
  943. int size;
  944. int i;
  945. txq->len = 0;
  946. txq->head = 0;
  947. txq->tail = 0;
  948. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  949. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  950. if (txq->txd == NULL) {
  951. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  952. return -ENOMEM;
  953. }
  954. memset(txq->txd, 0, size);
  955. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  956. if (txq->skb == NULL) {
  957. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  958. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  959. return -ENOMEM;
  960. }
  961. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  962. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  963. struct mwl8k_tx_desc *tx_desc;
  964. int nexti;
  965. tx_desc = txq->txd + i;
  966. nexti = (i + 1) % MWL8K_TX_DESCS;
  967. tx_desc->status = 0;
  968. tx_desc->next_txd_phys_addr =
  969. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  970. }
  971. return 0;
  972. }
  973. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  974. {
  975. iowrite32(MWL8K_H2A_INT_PPA_READY,
  976. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  977. iowrite32(MWL8K_H2A_INT_DUMMY,
  978. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  979. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  980. }
  981. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  982. {
  983. struct mwl8k_priv *priv = hw->priv;
  984. int i;
  985. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  986. struct mwl8k_tx_queue *txq = priv->txq + i;
  987. int fw_owned = 0;
  988. int drv_owned = 0;
  989. int unused = 0;
  990. int desc;
  991. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  992. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  993. u32 status;
  994. status = le32_to_cpu(tx_desc->status);
  995. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  996. fw_owned++;
  997. else
  998. drv_owned++;
  999. if (tx_desc->pkt_len == 0)
  1000. unused++;
  1001. }
  1002. wiphy_err(hw->wiphy,
  1003. "txq[%d] len=%d head=%d tail=%d "
  1004. "fw_owned=%d drv_owned=%d unused=%d\n",
  1005. i,
  1006. txq->len, txq->head, txq->tail,
  1007. fw_owned, drv_owned, unused);
  1008. }
  1009. }
  1010. /*
  1011. * Must be called with priv->fw_mutex held and tx queues stopped.
  1012. */
  1013. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1014. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1015. {
  1016. struct mwl8k_priv *priv = hw->priv;
  1017. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1018. int retry;
  1019. int rc;
  1020. might_sleep();
  1021. /*
  1022. * The TX queues are stopped at this point, so this test
  1023. * doesn't need to take ->tx_lock.
  1024. */
  1025. if (!priv->pending_tx_pkts)
  1026. return 0;
  1027. retry = 0;
  1028. rc = 0;
  1029. spin_lock_bh(&priv->tx_lock);
  1030. priv->tx_wait = &tx_wait;
  1031. while (!rc) {
  1032. int oldcount;
  1033. unsigned long timeout;
  1034. oldcount = priv->pending_tx_pkts;
  1035. spin_unlock_bh(&priv->tx_lock);
  1036. timeout = wait_for_completion_timeout(&tx_wait,
  1037. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1038. spin_lock_bh(&priv->tx_lock);
  1039. if (timeout) {
  1040. WARN_ON(priv->pending_tx_pkts);
  1041. if (retry) {
  1042. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1043. }
  1044. break;
  1045. }
  1046. if (priv->pending_tx_pkts < oldcount) {
  1047. wiphy_notice(hw->wiphy,
  1048. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1049. oldcount, priv->pending_tx_pkts);
  1050. retry = 1;
  1051. continue;
  1052. }
  1053. priv->tx_wait = NULL;
  1054. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1055. MWL8K_TX_WAIT_TIMEOUT_MS);
  1056. mwl8k_dump_tx_rings(hw);
  1057. rc = -ETIMEDOUT;
  1058. }
  1059. spin_unlock_bh(&priv->tx_lock);
  1060. return rc;
  1061. }
  1062. #define MWL8K_TXD_SUCCESS(status) \
  1063. ((status) & (MWL8K_TXD_STATUS_OK | \
  1064. MWL8K_TXD_STATUS_OK_RETRY | \
  1065. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1066. static int
  1067. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1068. {
  1069. struct mwl8k_priv *priv = hw->priv;
  1070. struct mwl8k_tx_queue *txq = priv->txq + index;
  1071. int processed;
  1072. processed = 0;
  1073. while (txq->len > 0 && limit--) {
  1074. int tx;
  1075. struct mwl8k_tx_desc *tx_desc;
  1076. unsigned long addr;
  1077. int size;
  1078. struct sk_buff *skb;
  1079. struct ieee80211_tx_info *info;
  1080. u32 status;
  1081. tx = txq->head;
  1082. tx_desc = txq->txd + tx;
  1083. status = le32_to_cpu(tx_desc->status);
  1084. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1085. if (!force)
  1086. break;
  1087. tx_desc->status &=
  1088. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1089. }
  1090. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1091. BUG_ON(txq->len == 0);
  1092. txq->len--;
  1093. priv->pending_tx_pkts--;
  1094. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1095. size = le16_to_cpu(tx_desc->pkt_len);
  1096. skb = txq->skb[tx];
  1097. txq->skb[tx] = NULL;
  1098. BUG_ON(skb == NULL);
  1099. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1100. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1101. /* Mark descriptor as unused */
  1102. tx_desc->pkt_phys_addr = 0;
  1103. tx_desc->pkt_len = 0;
  1104. info = IEEE80211_SKB_CB(skb);
  1105. ieee80211_tx_info_clear_status(info);
  1106. if (MWL8K_TXD_SUCCESS(status))
  1107. info->flags |= IEEE80211_TX_STAT_ACK;
  1108. ieee80211_tx_status_irqsafe(hw, skb);
  1109. processed++;
  1110. }
  1111. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1112. ieee80211_wake_queue(hw, index);
  1113. return processed;
  1114. }
  1115. /* must be called only when the card's transmit is completely halted */
  1116. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1117. {
  1118. struct mwl8k_priv *priv = hw->priv;
  1119. struct mwl8k_tx_queue *txq = priv->txq + index;
  1120. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1121. kfree(txq->skb);
  1122. txq->skb = NULL;
  1123. pci_free_consistent(priv->pdev,
  1124. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1125. txq->txd, txq->txd_dma);
  1126. txq->txd = NULL;
  1127. }
  1128. static int
  1129. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1130. {
  1131. struct mwl8k_priv *priv = hw->priv;
  1132. struct ieee80211_tx_info *tx_info;
  1133. struct mwl8k_vif *mwl8k_vif;
  1134. struct ieee80211_hdr *wh;
  1135. struct mwl8k_tx_queue *txq;
  1136. struct mwl8k_tx_desc *tx;
  1137. dma_addr_t dma;
  1138. u32 txstatus;
  1139. u8 txdatarate;
  1140. u16 qos;
  1141. wh = (struct ieee80211_hdr *)skb->data;
  1142. if (ieee80211_is_data_qos(wh->frame_control))
  1143. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1144. else
  1145. qos = 0;
  1146. mwl8k_add_dma_header(skb);
  1147. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1148. tx_info = IEEE80211_SKB_CB(skb);
  1149. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1150. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1151. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1152. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1153. mwl8k_vif->seqno += 0x10;
  1154. }
  1155. /* Setup firmware control bit fields for each frame type. */
  1156. txstatus = 0;
  1157. txdatarate = 0;
  1158. if (ieee80211_is_mgmt(wh->frame_control) ||
  1159. ieee80211_is_ctl(wh->frame_control)) {
  1160. txdatarate = 0;
  1161. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1162. } else if (ieee80211_is_data(wh->frame_control)) {
  1163. txdatarate = 1;
  1164. if (is_multicast_ether_addr(wh->addr1))
  1165. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1166. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1167. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1168. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1169. else
  1170. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1171. }
  1172. dma = pci_map_single(priv->pdev, skb->data,
  1173. skb->len, PCI_DMA_TODEVICE);
  1174. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1175. wiphy_debug(hw->wiphy,
  1176. "failed to dma map skb, dropping TX frame.\n");
  1177. dev_kfree_skb(skb);
  1178. return NETDEV_TX_OK;
  1179. }
  1180. spin_lock_bh(&priv->tx_lock);
  1181. txq = priv->txq + index;
  1182. BUG_ON(txq->skb[txq->tail] != NULL);
  1183. txq->skb[txq->tail] = skb;
  1184. tx = txq->txd + txq->tail;
  1185. tx->data_rate = txdatarate;
  1186. tx->tx_priority = index;
  1187. tx->qos_control = cpu_to_le16(qos);
  1188. tx->pkt_phys_addr = cpu_to_le32(dma);
  1189. tx->pkt_len = cpu_to_le16(skb->len);
  1190. tx->rate_info = 0;
  1191. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1192. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1193. else
  1194. tx->peer_id = 0;
  1195. wmb();
  1196. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1197. txq->len++;
  1198. priv->pending_tx_pkts++;
  1199. txq->tail++;
  1200. if (txq->tail == MWL8K_TX_DESCS)
  1201. txq->tail = 0;
  1202. if (txq->head == txq->tail)
  1203. ieee80211_stop_queue(hw, index);
  1204. mwl8k_tx_start(priv);
  1205. spin_unlock_bh(&priv->tx_lock);
  1206. return NETDEV_TX_OK;
  1207. }
  1208. /*
  1209. * Firmware access.
  1210. *
  1211. * We have the following requirements for issuing firmware commands:
  1212. * - Some commands require that the packet transmit path is idle when
  1213. * the command is issued. (For simplicity, we'll just quiesce the
  1214. * transmit path for every command.)
  1215. * - There are certain sequences of commands that need to be issued to
  1216. * the hardware sequentially, with no other intervening commands.
  1217. *
  1218. * This leads to an implementation of a "firmware lock" as a mutex that
  1219. * can be taken recursively, and which is taken by both the low-level
  1220. * command submission function (mwl8k_post_cmd) as well as any users of
  1221. * that function that require issuing of an atomic sequence of commands,
  1222. * and quiesces the transmit path whenever it's taken.
  1223. */
  1224. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1225. {
  1226. struct mwl8k_priv *priv = hw->priv;
  1227. if (priv->fw_mutex_owner != current) {
  1228. int rc;
  1229. mutex_lock(&priv->fw_mutex);
  1230. ieee80211_stop_queues(hw);
  1231. rc = mwl8k_tx_wait_empty(hw);
  1232. if (rc) {
  1233. ieee80211_wake_queues(hw);
  1234. mutex_unlock(&priv->fw_mutex);
  1235. return rc;
  1236. }
  1237. priv->fw_mutex_owner = current;
  1238. }
  1239. priv->fw_mutex_depth++;
  1240. return 0;
  1241. }
  1242. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1243. {
  1244. struct mwl8k_priv *priv = hw->priv;
  1245. if (!--priv->fw_mutex_depth) {
  1246. ieee80211_wake_queues(hw);
  1247. priv->fw_mutex_owner = NULL;
  1248. mutex_unlock(&priv->fw_mutex);
  1249. }
  1250. }
  1251. /*
  1252. * Command processing.
  1253. */
  1254. /* Timeout firmware commands after 10s */
  1255. #define MWL8K_CMD_TIMEOUT_MS 10000
  1256. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1257. {
  1258. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1259. struct mwl8k_priv *priv = hw->priv;
  1260. void __iomem *regs = priv->regs;
  1261. dma_addr_t dma_addr;
  1262. unsigned int dma_size;
  1263. int rc;
  1264. unsigned long timeout = 0;
  1265. u8 buf[32];
  1266. cmd->result = (__force __le16) 0xffff;
  1267. dma_size = le16_to_cpu(cmd->length);
  1268. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1269. PCI_DMA_BIDIRECTIONAL);
  1270. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1271. return -ENOMEM;
  1272. rc = mwl8k_fw_lock(hw);
  1273. if (rc) {
  1274. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1275. PCI_DMA_BIDIRECTIONAL);
  1276. return rc;
  1277. }
  1278. priv->hostcmd_wait = &cmd_wait;
  1279. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1280. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1281. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1282. iowrite32(MWL8K_H2A_INT_DUMMY,
  1283. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1284. timeout = wait_for_completion_timeout(&cmd_wait,
  1285. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1286. priv->hostcmd_wait = NULL;
  1287. mwl8k_fw_unlock(hw);
  1288. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1289. PCI_DMA_BIDIRECTIONAL);
  1290. if (!timeout) {
  1291. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1292. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1293. MWL8K_CMD_TIMEOUT_MS);
  1294. rc = -ETIMEDOUT;
  1295. } else {
  1296. int ms;
  1297. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1298. rc = cmd->result ? -EINVAL : 0;
  1299. if (rc)
  1300. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1301. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1302. le16_to_cpu(cmd->result));
  1303. else if (ms > 2000)
  1304. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1305. mwl8k_cmd_name(cmd->code,
  1306. buf, sizeof(buf)),
  1307. ms);
  1308. }
  1309. return rc;
  1310. }
  1311. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1312. struct ieee80211_vif *vif,
  1313. struct mwl8k_cmd_pkt *cmd)
  1314. {
  1315. if (vif != NULL)
  1316. cmd->macid = MWL8K_VIF(vif)->macid;
  1317. return mwl8k_post_cmd(hw, cmd);
  1318. }
  1319. /*
  1320. * Setup code shared between STA and AP firmware images.
  1321. */
  1322. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1323. {
  1324. struct mwl8k_priv *priv = hw->priv;
  1325. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1326. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1327. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1328. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1329. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1330. priv->band_24.channels = priv->channels_24;
  1331. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1332. priv->band_24.bitrates = priv->rates_24;
  1333. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1334. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1335. }
  1336. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1337. {
  1338. struct mwl8k_priv *priv = hw->priv;
  1339. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1340. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1341. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1342. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1343. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1344. priv->band_50.channels = priv->channels_50;
  1345. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1346. priv->band_50.bitrates = priv->rates_50;
  1347. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1348. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1349. }
  1350. /*
  1351. * CMD_GET_HW_SPEC (STA version).
  1352. */
  1353. struct mwl8k_cmd_get_hw_spec_sta {
  1354. struct mwl8k_cmd_pkt header;
  1355. __u8 hw_rev;
  1356. __u8 host_interface;
  1357. __le16 num_mcaddrs;
  1358. __u8 perm_addr[ETH_ALEN];
  1359. __le16 region_code;
  1360. __le32 fw_rev;
  1361. __le32 ps_cookie;
  1362. __le32 caps;
  1363. __u8 mcs_bitmap[16];
  1364. __le32 rx_queue_ptr;
  1365. __le32 num_tx_queues;
  1366. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1367. __le32 caps2;
  1368. __le32 num_tx_desc_per_queue;
  1369. __le32 total_rxd;
  1370. } __packed;
  1371. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1372. #define MWL8K_CAP_GREENFIELD 0x08000000
  1373. #define MWL8K_CAP_AMPDU 0x04000000
  1374. #define MWL8K_CAP_RX_STBC 0x01000000
  1375. #define MWL8K_CAP_TX_STBC 0x00800000
  1376. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1377. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1378. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1379. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1380. #define MWL8K_CAP_DELAY_BA 0x00003000
  1381. #define MWL8K_CAP_MIMO 0x00000200
  1382. #define MWL8K_CAP_40MHZ 0x00000100
  1383. #define MWL8K_CAP_BAND_MASK 0x00000007
  1384. #define MWL8K_CAP_5GHZ 0x00000004
  1385. #define MWL8K_CAP_2GHZ4 0x00000001
  1386. static void
  1387. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1388. struct ieee80211_supported_band *band, u32 cap)
  1389. {
  1390. int rx_streams;
  1391. int tx_streams;
  1392. band->ht_cap.ht_supported = 1;
  1393. if (cap & MWL8K_CAP_MAX_AMSDU)
  1394. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1395. if (cap & MWL8K_CAP_GREENFIELD)
  1396. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1397. if (cap & MWL8K_CAP_AMPDU) {
  1398. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1399. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1400. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1401. }
  1402. if (cap & MWL8K_CAP_RX_STBC)
  1403. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1404. if (cap & MWL8K_CAP_TX_STBC)
  1405. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1406. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1407. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1408. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1409. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1410. if (cap & MWL8K_CAP_DELAY_BA)
  1411. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1412. if (cap & MWL8K_CAP_40MHZ)
  1413. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1414. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1415. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1416. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1417. if (rx_streams >= 2)
  1418. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1419. if (rx_streams >= 3)
  1420. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1421. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1422. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1423. if (rx_streams != tx_streams) {
  1424. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1425. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1426. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1427. }
  1428. }
  1429. static void
  1430. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1431. {
  1432. struct mwl8k_priv *priv = hw->priv;
  1433. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1434. mwl8k_setup_2ghz_band(hw);
  1435. if (caps & MWL8K_CAP_MIMO)
  1436. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1437. }
  1438. if (caps & MWL8K_CAP_5GHZ) {
  1439. mwl8k_setup_5ghz_band(hw);
  1440. if (caps & MWL8K_CAP_MIMO)
  1441. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1442. }
  1443. }
  1444. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1445. {
  1446. struct mwl8k_priv *priv = hw->priv;
  1447. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1448. int rc;
  1449. int i;
  1450. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1451. if (cmd == NULL)
  1452. return -ENOMEM;
  1453. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1454. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1455. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1456. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1457. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1458. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1459. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1460. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1461. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1462. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1463. rc = mwl8k_post_cmd(hw, &cmd->header);
  1464. if (!rc) {
  1465. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1466. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1467. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1468. priv->hw_rev = cmd->hw_rev;
  1469. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1470. priv->ap_macids_supported = 0x00000000;
  1471. priv->sta_macids_supported = 0x00000001;
  1472. }
  1473. kfree(cmd);
  1474. return rc;
  1475. }
  1476. /*
  1477. * CMD_GET_HW_SPEC (AP version).
  1478. */
  1479. struct mwl8k_cmd_get_hw_spec_ap {
  1480. struct mwl8k_cmd_pkt header;
  1481. __u8 hw_rev;
  1482. __u8 host_interface;
  1483. __le16 num_wcb;
  1484. __le16 num_mcaddrs;
  1485. __u8 perm_addr[ETH_ALEN];
  1486. __le16 region_code;
  1487. __le16 num_antenna;
  1488. __le32 fw_rev;
  1489. __le32 wcbbase0;
  1490. __le32 rxwrptr;
  1491. __le32 rxrdptr;
  1492. __le32 ps_cookie;
  1493. __le32 wcbbase1;
  1494. __le32 wcbbase2;
  1495. __le32 wcbbase3;
  1496. } __packed;
  1497. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1498. {
  1499. struct mwl8k_priv *priv = hw->priv;
  1500. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1501. int rc;
  1502. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1503. if (cmd == NULL)
  1504. return -ENOMEM;
  1505. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1506. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1507. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1508. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1509. rc = mwl8k_post_cmd(hw, &cmd->header);
  1510. if (!rc) {
  1511. int off;
  1512. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1513. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1514. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1515. priv->hw_rev = cmd->hw_rev;
  1516. mwl8k_setup_2ghz_band(hw);
  1517. priv->ap_macids_supported = 0x000000ff;
  1518. priv->sta_macids_supported = 0x00000000;
  1519. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1520. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1521. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1522. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1523. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1524. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1525. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1526. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1527. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1528. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1529. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1530. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1531. }
  1532. kfree(cmd);
  1533. return rc;
  1534. }
  1535. /*
  1536. * CMD_SET_HW_SPEC.
  1537. */
  1538. struct mwl8k_cmd_set_hw_spec {
  1539. struct mwl8k_cmd_pkt header;
  1540. __u8 hw_rev;
  1541. __u8 host_interface;
  1542. __le16 num_mcaddrs;
  1543. __u8 perm_addr[ETH_ALEN];
  1544. __le16 region_code;
  1545. __le32 fw_rev;
  1546. __le32 ps_cookie;
  1547. __le32 caps;
  1548. __le32 rx_queue_ptr;
  1549. __le32 num_tx_queues;
  1550. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1551. __le32 flags;
  1552. __le32 num_tx_desc_per_queue;
  1553. __le32 total_rxd;
  1554. } __packed;
  1555. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1556. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1557. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1558. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1559. {
  1560. struct mwl8k_priv *priv = hw->priv;
  1561. struct mwl8k_cmd_set_hw_spec *cmd;
  1562. int rc;
  1563. int i;
  1564. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1565. if (cmd == NULL)
  1566. return -ENOMEM;
  1567. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1568. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1569. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1570. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1571. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1572. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1573. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1574. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1575. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1576. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1577. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1578. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1579. rc = mwl8k_post_cmd(hw, &cmd->header);
  1580. kfree(cmd);
  1581. return rc;
  1582. }
  1583. /*
  1584. * CMD_MAC_MULTICAST_ADR.
  1585. */
  1586. struct mwl8k_cmd_mac_multicast_adr {
  1587. struct mwl8k_cmd_pkt header;
  1588. __le16 action;
  1589. __le16 numaddr;
  1590. __u8 addr[0][ETH_ALEN];
  1591. };
  1592. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1593. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1594. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1595. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1596. static struct mwl8k_cmd_pkt *
  1597. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1598. struct netdev_hw_addr_list *mc_list)
  1599. {
  1600. struct mwl8k_priv *priv = hw->priv;
  1601. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1602. int size;
  1603. int mc_count = 0;
  1604. if (mc_list)
  1605. mc_count = netdev_hw_addr_list_count(mc_list);
  1606. if (allmulti || mc_count > priv->num_mcaddrs) {
  1607. allmulti = 1;
  1608. mc_count = 0;
  1609. }
  1610. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1611. cmd = kzalloc(size, GFP_ATOMIC);
  1612. if (cmd == NULL)
  1613. return NULL;
  1614. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1615. cmd->header.length = cpu_to_le16(size);
  1616. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1617. MWL8K_ENABLE_RX_BROADCAST);
  1618. if (allmulti) {
  1619. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1620. } else if (mc_count) {
  1621. struct netdev_hw_addr *ha;
  1622. int i = 0;
  1623. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1624. cmd->numaddr = cpu_to_le16(mc_count);
  1625. netdev_hw_addr_list_for_each(ha, mc_list) {
  1626. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1627. }
  1628. }
  1629. return &cmd->header;
  1630. }
  1631. /*
  1632. * CMD_GET_STAT.
  1633. */
  1634. struct mwl8k_cmd_get_stat {
  1635. struct mwl8k_cmd_pkt header;
  1636. __le32 stats[64];
  1637. } __packed;
  1638. #define MWL8K_STAT_ACK_FAILURE 9
  1639. #define MWL8K_STAT_RTS_FAILURE 12
  1640. #define MWL8K_STAT_FCS_ERROR 24
  1641. #define MWL8K_STAT_RTS_SUCCESS 11
  1642. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1643. struct ieee80211_low_level_stats *stats)
  1644. {
  1645. struct mwl8k_cmd_get_stat *cmd;
  1646. int rc;
  1647. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1648. if (cmd == NULL)
  1649. return -ENOMEM;
  1650. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1651. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1652. rc = mwl8k_post_cmd(hw, &cmd->header);
  1653. if (!rc) {
  1654. stats->dot11ACKFailureCount =
  1655. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1656. stats->dot11RTSFailureCount =
  1657. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1658. stats->dot11FCSErrorCount =
  1659. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1660. stats->dot11RTSSuccessCount =
  1661. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1662. }
  1663. kfree(cmd);
  1664. return rc;
  1665. }
  1666. /*
  1667. * CMD_RADIO_CONTROL.
  1668. */
  1669. struct mwl8k_cmd_radio_control {
  1670. struct mwl8k_cmd_pkt header;
  1671. __le16 action;
  1672. __le16 control;
  1673. __le16 radio_on;
  1674. } __packed;
  1675. static int
  1676. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1677. {
  1678. struct mwl8k_priv *priv = hw->priv;
  1679. struct mwl8k_cmd_radio_control *cmd;
  1680. int rc;
  1681. if (enable == priv->radio_on && !force)
  1682. return 0;
  1683. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1684. if (cmd == NULL)
  1685. return -ENOMEM;
  1686. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1687. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1688. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1689. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1690. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1691. rc = mwl8k_post_cmd(hw, &cmd->header);
  1692. kfree(cmd);
  1693. if (!rc)
  1694. priv->radio_on = enable;
  1695. return rc;
  1696. }
  1697. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1698. {
  1699. return mwl8k_cmd_radio_control(hw, 0, 0);
  1700. }
  1701. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1702. {
  1703. return mwl8k_cmd_radio_control(hw, 1, 0);
  1704. }
  1705. static int
  1706. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1707. {
  1708. struct mwl8k_priv *priv = hw->priv;
  1709. priv->radio_short_preamble = short_preamble;
  1710. return mwl8k_cmd_radio_control(hw, 1, 1);
  1711. }
  1712. /*
  1713. * CMD_RF_TX_POWER.
  1714. */
  1715. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  1716. struct mwl8k_cmd_rf_tx_power {
  1717. struct mwl8k_cmd_pkt header;
  1718. __le16 action;
  1719. __le16 support_level;
  1720. __le16 current_level;
  1721. __le16 reserved;
  1722. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  1723. } __packed;
  1724. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1725. {
  1726. struct mwl8k_cmd_rf_tx_power *cmd;
  1727. int rc;
  1728. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1729. if (cmd == NULL)
  1730. return -ENOMEM;
  1731. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1732. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1733. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1734. cmd->support_level = cpu_to_le16(dBm);
  1735. rc = mwl8k_post_cmd(hw, &cmd->header);
  1736. kfree(cmd);
  1737. return rc;
  1738. }
  1739. /*
  1740. * CMD_TX_POWER.
  1741. */
  1742. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  1743. struct mwl8k_cmd_tx_power {
  1744. struct mwl8k_cmd_pkt header;
  1745. __le16 action;
  1746. __le16 band;
  1747. __le16 channel;
  1748. __le16 bw;
  1749. __le16 sub_ch;
  1750. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1751. } __attribute__((packed));
  1752. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  1753. struct ieee80211_conf *conf,
  1754. unsigned short pwr)
  1755. {
  1756. struct ieee80211_channel *channel = conf->channel;
  1757. struct mwl8k_cmd_tx_power *cmd;
  1758. int rc;
  1759. int i;
  1760. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1761. if (cmd == NULL)
  1762. return -ENOMEM;
  1763. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  1764. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1765. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  1766. if (channel->band == IEEE80211_BAND_2GHZ)
  1767. cmd->band = cpu_to_le16(0x1);
  1768. else if (channel->band == IEEE80211_BAND_5GHZ)
  1769. cmd->band = cpu_to_le16(0x4);
  1770. cmd->channel = channel->hw_value;
  1771. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1772. conf->channel_type == NL80211_CHAN_HT20) {
  1773. cmd->bw = cpu_to_le16(0x2);
  1774. } else {
  1775. cmd->bw = cpu_to_le16(0x4);
  1776. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1777. cmd->sub_ch = cpu_to_le16(0x3);
  1778. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1779. cmd->sub_ch = cpu_to_le16(0x1);
  1780. }
  1781. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  1782. cmd->power_level_list[i] = cpu_to_le16(pwr);
  1783. rc = mwl8k_post_cmd(hw, &cmd->header);
  1784. kfree(cmd);
  1785. return rc;
  1786. }
  1787. /*
  1788. * CMD_RF_ANTENNA.
  1789. */
  1790. struct mwl8k_cmd_rf_antenna {
  1791. struct mwl8k_cmd_pkt header;
  1792. __le16 antenna;
  1793. __le16 mode;
  1794. } __packed;
  1795. #define MWL8K_RF_ANTENNA_RX 1
  1796. #define MWL8K_RF_ANTENNA_TX 2
  1797. static int
  1798. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1799. {
  1800. struct mwl8k_cmd_rf_antenna *cmd;
  1801. int rc;
  1802. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1803. if (cmd == NULL)
  1804. return -ENOMEM;
  1805. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1806. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1807. cmd->antenna = cpu_to_le16(antenna);
  1808. cmd->mode = cpu_to_le16(mask);
  1809. rc = mwl8k_post_cmd(hw, &cmd->header);
  1810. kfree(cmd);
  1811. return rc;
  1812. }
  1813. /*
  1814. * CMD_SET_BEACON.
  1815. */
  1816. struct mwl8k_cmd_set_beacon {
  1817. struct mwl8k_cmd_pkt header;
  1818. __le16 beacon_len;
  1819. __u8 beacon[0];
  1820. };
  1821. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1822. struct ieee80211_vif *vif, u8 *beacon, int len)
  1823. {
  1824. struct mwl8k_cmd_set_beacon *cmd;
  1825. int rc;
  1826. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1827. if (cmd == NULL)
  1828. return -ENOMEM;
  1829. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1830. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1831. cmd->beacon_len = cpu_to_le16(len);
  1832. memcpy(cmd->beacon, beacon, len);
  1833. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1834. kfree(cmd);
  1835. return rc;
  1836. }
  1837. /*
  1838. * CMD_SET_PRE_SCAN.
  1839. */
  1840. struct mwl8k_cmd_set_pre_scan {
  1841. struct mwl8k_cmd_pkt header;
  1842. } __packed;
  1843. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1844. {
  1845. struct mwl8k_cmd_set_pre_scan *cmd;
  1846. int rc;
  1847. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1848. if (cmd == NULL)
  1849. return -ENOMEM;
  1850. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1851. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1852. rc = mwl8k_post_cmd(hw, &cmd->header);
  1853. kfree(cmd);
  1854. return rc;
  1855. }
  1856. /*
  1857. * CMD_SET_POST_SCAN.
  1858. */
  1859. struct mwl8k_cmd_set_post_scan {
  1860. struct mwl8k_cmd_pkt header;
  1861. __le32 isibss;
  1862. __u8 bssid[ETH_ALEN];
  1863. } __packed;
  1864. static int
  1865. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1866. {
  1867. struct mwl8k_cmd_set_post_scan *cmd;
  1868. int rc;
  1869. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1870. if (cmd == NULL)
  1871. return -ENOMEM;
  1872. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1873. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1874. cmd->isibss = 0;
  1875. memcpy(cmd->bssid, mac, ETH_ALEN);
  1876. rc = mwl8k_post_cmd(hw, &cmd->header);
  1877. kfree(cmd);
  1878. return rc;
  1879. }
  1880. /*
  1881. * CMD_SET_RF_CHANNEL.
  1882. */
  1883. struct mwl8k_cmd_set_rf_channel {
  1884. struct mwl8k_cmd_pkt header;
  1885. __le16 action;
  1886. __u8 current_channel;
  1887. __le32 channel_flags;
  1888. } __packed;
  1889. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1890. struct ieee80211_conf *conf)
  1891. {
  1892. struct ieee80211_channel *channel = conf->channel;
  1893. struct mwl8k_cmd_set_rf_channel *cmd;
  1894. int rc;
  1895. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1896. if (cmd == NULL)
  1897. return -ENOMEM;
  1898. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1899. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1900. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1901. cmd->current_channel = channel->hw_value;
  1902. if (channel->band == IEEE80211_BAND_2GHZ)
  1903. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1904. else if (channel->band == IEEE80211_BAND_5GHZ)
  1905. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1906. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1907. conf->channel_type == NL80211_CHAN_HT20)
  1908. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1909. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1910. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1911. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1912. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1913. rc = mwl8k_post_cmd(hw, &cmd->header);
  1914. kfree(cmd);
  1915. return rc;
  1916. }
  1917. /*
  1918. * CMD_SET_AID.
  1919. */
  1920. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1921. #define MWL8K_FRAME_PROT_11G 0x07
  1922. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1923. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1924. struct mwl8k_cmd_update_set_aid {
  1925. struct mwl8k_cmd_pkt header;
  1926. __le16 aid;
  1927. /* AP's MAC address (BSSID) */
  1928. __u8 bssid[ETH_ALEN];
  1929. __le16 protection_mode;
  1930. __u8 supp_rates[14];
  1931. } __packed;
  1932. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1933. {
  1934. int i;
  1935. int j;
  1936. /*
  1937. * Clear nonstandard rates 4 and 13.
  1938. */
  1939. mask &= 0x1fef;
  1940. for (i = 0, j = 0; i < 14; i++) {
  1941. if (mask & (1 << i))
  1942. rates[j++] = mwl8k_rates_24[i].hw_value;
  1943. }
  1944. }
  1945. static int
  1946. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1947. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1948. {
  1949. struct mwl8k_cmd_update_set_aid *cmd;
  1950. u16 prot_mode;
  1951. int rc;
  1952. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1953. if (cmd == NULL)
  1954. return -ENOMEM;
  1955. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1956. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1957. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1958. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1959. if (vif->bss_conf.use_cts_prot) {
  1960. prot_mode = MWL8K_FRAME_PROT_11G;
  1961. } else {
  1962. switch (vif->bss_conf.ht_operation_mode &
  1963. IEEE80211_HT_OP_MODE_PROTECTION) {
  1964. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1965. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1966. break;
  1967. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1968. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1969. break;
  1970. default:
  1971. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1972. break;
  1973. }
  1974. }
  1975. cmd->protection_mode = cpu_to_le16(prot_mode);
  1976. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1977. rc = mwl8k_post_cmd(hw, &cmd->header);
  1978. kfree(cmd);
  1979. return rc;
  1980. }
  1981. /*
  1982. * CMD_SET_RATE.
  1983. */
  1984. struct mwl8k_cmd_set_rate {
  1985. struct mwl8k_cmd_pkt header;
  1986. __u8 legacy_rates[14];
  1987. /* Bitmap for supported MCS codes. */
  1988. __u8 mcs_set[16];
  1989. __u8 reserved[16];
  1990. } __packed;
  1991. static int
  1992. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1993. u32 legacy_rate_mask, u8 *mcs_rates)
  1994. {
  1995. struct mwl8k_cmd_set_rate *cmd;
  1996. int rc;
  1997. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1998. if (cmd == NULL)
  1999. return -ENOMEM;
  2000. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2001. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2002. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2003. memcpy(cmd->mcs_set, mcs_rates, 16);
  2004. rc = mwl8k_post_cmd(hw, &cmd->header);
  2005. kfree(cmd);
  2006. return rc;
  2007. }
  2008. /*
  2009. * CMD_FINALIZE_JOIN.
  2010. */
  2011. #define MWL8K_FJ_BEACON_MAXLEN 128
  2012. struct mwl8k_cmd_finalize_join {
  2013. struct mwl8k_cmd_pkt header;
  2014. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2015. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2016. } __packed;
  2017. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2018. int framelen, int dtim)
  2019. {
  2020. struct mwl8k_cmd_finalize_join *cmd;
  2021. struct ieee80211_mgmt *payload = frame;
  2022. int payload_len;
  2023. int rc;
  2024. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2025. if (cmd == NULL)
  2026. return -ENOMEM;
  2027. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2028. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2029. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2030. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2031. if (payload_len < 0)
  2032. payload_len = 0;
  2033. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2034. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2035. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2036. rc = mwl8k_post_cmd(hw, &cmd->header);
  2037. kfree(cmd);
  2038. return rc;
  2039. }
  2040. /*
  2041. * CMD_SET_RTS_THRESHOLD.
  2042. */
  2043. struct mwl8k_cmd_set_rts_threshold {
  2044. struct mwl8k_cmd_pkt header;
  2045. __le16 action;
  2046. __le16 threshold;
  2047. } __packed;
  2048. static int
  2049. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2050. {
  2051. struct mwl8k_cmd_set_rts_threshold *cmd;
  2052. int rc;
  2053. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2054. if (cmd == NULL)
  2055. return -ENOMEM;
  2056. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2057. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2058. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2059. cmd->threshold = cpu_to_le16(rts_thresh);
  2060. rc = mwl8k_post_cmd(hw, &cmd->header);
  2061. kfree(cmd);
  2062. return rc;
  2063. }
  2064. /*
  2065. * CMD_SET_SLOT.
  2066. */
  2067. struct mwl8k_cmd_set_slot {
  2068. struct mwl8k_cmd_pkt header;
  2069. __le16 action;
  2070. __u8 short_slot;
  2071. } __packed;
  2072. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2073. {
  2074. struct mwl8k_cmd_set_slot *cmd;
  2075. int rc;
  2076. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2077. if (cmd == NULL)
  2078. return -ENOMEM;
  2079. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2080. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2081. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2082. cmd->short_slot = short_slot_time;
  2083. rc = mwl8k_post_cmd(hw, &cmd->header);
  2084. kfree(cmd);
  2085. return rc;
  2086. }
  2087. /*
  2088. * CMD_SET_EDCA_PARAMS.
  2089. */
  2090. struct mwl8k_cmd_set_edca_params {
  2091. struct mwl8k_cmd_pkt header;
  2092. /* See MWL8K_SET_EDCA_XXX below */
  2093. __le16 action;
  2094. /* TX opportunity in units of 32 us */
  2095. __le16 txop;
  2096. union {
  2097. struct {
  2098. /* Log exponent of max contention period: 0...15 */
  2099. __le32 log_cw_max;
  2100. /* Log exponent of min contention period: 0...15 */
  2101. __le32 log_cw_min;
  2102. /* Adaptive interframe spacing in units of 32us */
  2103. __u8 aifs;
  2104. /* TX queue to configure */
  2105. __u8 txq;
  2106. } ap;
  2107. struct {
  2108. /* Log exponent of max contention period: 0...15 */
  2109. __u8 log_cw_max;
  2110. /* Log exponent of min contention period: 0...15 */
  2111. __u8 log_cw_min;
  2112. /* Adaptive interframe spacing in units of 32us */
  2113. __u8 aifs;
  2114. /* TX queue to configure */
  2115. __u8 txq;
  2116. } sta;
  2117. };
  2118. } __packed;
  2119. #define MWL8K_SET_EDCA_CW 0x01
  2120. #define MWL8K_SET_EDCA_TXOP 0x02
  2121. #define MWL8K_SET_EDCA_AIFS 0x04
  2122. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2123. MWL8K_SET_EDCA_TXOP | \
  2124. MWL8K_SET_EDCA_AIFS)
  2125. static int
  2126. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2127. __u16 cw_min, __u16 cw_max,
  2128. __u8 aifs, __u16 txop)
  2129. {
  2130. struct mwl8k_priv *priv = hw->priv;
  2131. struct mwl8k_cmd_set_edca_params *cmd;
  2132. int rc;
  2133. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2134. if (cmd == NULL)
  2135. return -ENOMEM;
  2136. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2137. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2138. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2139. cmd->txop = cpu_to_le16(txop);
  2140. if (priv->ap_fw) {
  2141. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2142. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2143. cmd->ap.aifs = aifs;
  2144. cmd->ap.txq = qnum;
  2145. } else {
  2146. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2147. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2148. cmd->sta.aifs = aifs;
  2149. cmd->sta.txq = qnum;
  2150. }
  2151. rc = mwl8k_post_cmd(hw, &cmd->header);
  2152. kfree(cmd);
  2153. return rc;
  2154. }
  2155. /*
  2156. * CMD_SET_WMM_MODE.
  2157. */
  2158. struct mwl8k_cmd_set_wmm_mode {
  2159. struct mwl8k_cmd_pkt header;
  2160. __le16 action;
  2161. } __packed;
  2162. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2163. {
  2164. struct mwl8k_priv *priv = hw->priv;
  2165. struct mwl8k_cmd_set_wmm_mode *cmd;
  2166. int rc;
  2167. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2168. if (cmd == NULL)
  2169. return -ENOMEM;
  2170. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2171. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2172. cmd->action = cpu_to_le16(!!enable);
  2173. rc = mwl8k_post_cmd(hw, &cmd->header);
  2174. kfree(cmd);
  2175. if (!rc)
  2176. priv->wmm_enabled = enable;
  2177. return rc;
  2178. }
  2179. /*
  2180. * CMD_MIMO_CONFIG.
  2181. */
  2182. struct mwl8k_cmd_mimo_config {
  2183. struct mwl8k_cmd_pkt header;
  2184. __le32 action;
  2185. __u8 rx_antenna_map;
  2186. __u8 tx_antenna_map;
  2187. } __packed;
  2188. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2189. {
  2190. struct mwl8k_cmd_mimo_config *cmd;
  2191. int rc;
  2192. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2193. if (cmd == NULL)
  2194. return -ENOMEM;
  2195. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2196. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2197. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2198. cmd->rx_antenna_map = rx;
  2199. cmd->tx_antenna_map = tx;
  2200. rc = mwl8k_post_cmd(hw, &cmd->header);
  2201. kfree(cmd);
  2202. return rc;
  2203. }
  2204. /*
  2205. * CMD_USE_FIXED_RATE (STA version).
  2206. */
  2207. struct mwl8k_cmd_use_fixed_rate_sta {
  2208. struct mwl8k_cmd_pkt header;
  2209. __le32 action;
  2210. __le32 allow_rate_drop;
  2211. __le32 num_rates;
  2212. struct {
  2213. __le32 is_ht_rate;
  2214. __le32 enable_retry;
  2215. __le32 rate;
  2216. __le32 retry_count;
  2217. } rate_entry[8];
  2218. __le32 rate_type;
  2219. __le32 reserved1;
  2220. __le32 reserved2;
  2221. } __packed;
  2222. #define MWL8K_USE_AUTO_RATE 0x0002
  2223. #define MWL8K_UCAST_RATE 0
  2224. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2225. {
  2226. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2227. int rc;
  2228. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2229. if (cmd == NULL)
  2230. return -ENOMEM;
  2231. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2232. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2233. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2234. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2235. rc = mwl8k_post_cmd(hw, &cmd->header);
  2236. kfree(cmd);
  2237. return rc;
  2238. }
  2239. /*
  2240. * CMD_USE_FIXED_RATE (AP version).
  2241. */
  2242. struct mwl8k_cmd_use_fixed_rate_ap {
  2243. struct mwl8k_cmd_pkt header;
  2244. __le32 action;
  2245. __le32 allow_rate_drop;
  2246. __le32 num_rates;
  2247. struct mwl8k_rate_entry_ap {
  2248. __le32 is_ht_rate;
  2249. __le32 enable_retry;
  2250. __le32 rate;
  2251. __le32 retry_count;
  2252. } rate_entry[4];
  2253. u8 multicast_rate;
  2254. u8 multicast_rate_type;
  2255. u8 management_rate;
  2256. } __packed;
  2257. static int
  2258. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2259. {
  2260. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2261. int rc;
  2262. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2263. if (cmd == NULL)
  2264. return -ENOMEM;
  2265. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2266. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2267. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2268. cmd->multicast_rate = mcast;
  2269. cmd->management_rate = mgmt;
  2270. rc = mwl8k_post_cmd(hw, &cmd->header);
  2271. kfree(cmd);
  2272. return rc;
  2273. }
  2274. /*
  2275. * CMD_ENABLE_SNIFFER.
  2276. */
  2277. struct mwl8k_cmd_enable_sniffer {
  2278. struct mwl8k_cmd_pkt header;
  2279. __le32 action;
  2280. } __packed;
  2281. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2282. {
  2283. struct mwl8k_cmd_enable_sniffer *cmd;
  2284. int rc;
  2285. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2286. if (cmd == NULL)
  2287. return -ENOMEM;
  2288. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2289. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2290. cmd->action = cpu_to_le32(!!enable);
  2291. rc = mwl8k_post_cmd(hw, &cmd->header);
  2292. kfree(cmd);
  2293. return rc;
  2294. }
  2295. /*
  2296. * CMD_SET_MAC_ADDR.
  2297. */
  2298. struct mwl8k_cmd_set_mac_addr {
  2299. struct mwl8k_cmd_pkt header;
  2300. union {
  2301. struct {
  2302. __le16 mac_type;
  2303. __u8 mac_addr[ETH_ALEN];
  2304. } mbss;
  2305. __u8 mac_addr[ETH_ALEN];
  2306. };
  2307. } __packed;
  2308. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2309. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2310. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2311. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2312. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2313. struct ieee80211_vif *vif, u8 *mac)
  2314. {
  2315. struct mwl8k_priv *priv = hw->priv;
  2316. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2317. struct mwl8k_cmd_set_mac_addr *cmd;
  2318. int mac_type;
  2319. int rc;
  2320. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2321. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2322. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2323. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2324. else
  2325. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2326. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2327. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2328. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2329. else
  2330. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2331. }
  2332. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2333. if (cmd == NULL)
  2334. return -ENOMEM;
  2335. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2336. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2337. if (priv->ap_fw) {
  2338. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2339. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2340. } else {
  2341. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2342. }
  2343. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2344. kfree(cmd);
  2345. return rc;
  2346. }
  2347. /*
  2348. * CMD_SET_RATEADAPT_MODE.
  2349. */
  2350. struct mwl8k_cmd_set_rate_adapt_mode {
  2351. struct mwl8k_cmd_pkt header;
  2352. __le16 action;
  2353. __le16 mode;
  2354. } __packed;
  2355. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2356. {
  2357. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2358. int rc;
  2359. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2360. if (cmd == NULL)
  2361. return -ENOMEM;
  2362. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2363. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2364. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2365. cmd->mode = cpu_to_le16(mode);
  2366. rc = mwl8k_post_cmd(hw, &cmd->header);
  2367. kfree(cmd);
  2368. return rc;
  2369. }
  2370. /*
  2371. * CMD_BSS_START.
  2372. */
  2373. struct mwl8k_cmd_bss_start {
  2374. struct mwl8k_cmd_pkt header;
  2375. __le32 enable;
  2376. } __packed;
  2377. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2378. struct ieee80211_vif *vif, int enable)
  2379. {
  2380. struct mwl8k_cmd_bss_start *cmd;
  2381. int rc;
  2382. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2383. if (cmd == NULL)
  2384. return -ENOMEM;
  2385. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2386. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2387. cmd->enable = cpu_to_le32(enable);
  2388. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2389. kfree(cmd);
  2390. return rc;
  2391. }
  2392. /*
  2393. * CMD_SET_NEW_STN.
  2394. */
  2395. struct mwl8k_cmd_set_new_stn {
  2396. struct mwl8k_cmd_pkt header;
  2397. __le16 aid;
  2398. __u8 mac_addr[6];
  2399. __le16 stn_id;
  2400. __le16 action;
  2401. __le16 rsvd;
  2402. __le32 legacy_rates;
  2403. __u8 ht_rates[4];
  2404. __le16 cap_info;
  2405. __le16 ht_capabilities_info;
  2406. __u8 mac_ht_param_info;
  2407. __u8 rev;
  2408. __u8 control_channel;
  2409. __u8 add_channel;
  2410. __le16 op_mode;
  2411. __le16 stbc;
  2412. __u8 add_qos_info;
  2413. __u8 is_qos_sta;
  2414. __le32 fw_sta_ptr;
  2415. } __packed;
  2416. #define MWL8K_STA_ACTION_ADD 0
  2417. #define MWL8K_STA_ACTION_REMOVE 2
  2418. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2419. struct ieee80211_vif *vif,
  2420. struct ieee80211_sta *sta)
  2421. {
  2422. struct mwl8k_cmd_set_new_stn *cmd;
  2423. u32 rates;
  2424. int rc;
  2425. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2426. if (cmd == NULL)
  2427. return -ENOMEM;
  2428. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2429. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2430. cmd->aid = cpu_to_le16(sta->aid);
  2431. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2432. cmd->stn_id = cpu_to_le16(sta->aid);
  2433. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2434. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2435. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2436. else
  2437. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2438. cmd->legacy_rates = cpu_to_le32(rates);
  2439. if (sta->ht_cap.ht_supported) {
  2440. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2441. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2442. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2443. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2444. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2445. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2446. ((sta->ht_cap.ampdu_density & 7) << 2);
  2447. cmd->is_qos_sta = 1;
  2448. }
  2449. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2450. kfree(cmd);
  2451. return rc;
  2452. }
  2453. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2454. struct ieee80211_vif *vif)
  2455. {
  2456. struct mwl8k_cmd_set_new_stn *cmd;
  2457. int rc;
  2458. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2459. if (cmd == NULL)
  2460. return -ENOMEM;
  2461. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2462. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2463. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2464. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2465. kfree(cmd);
  2466. return rc;
  2467. }
  2468. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2469. struct ieee80211_vif *vif, u8 *addr)
  2470. {
  2471. struct mwl8k_cmd_set_new_stn *cmd;
  2472. int rc;
  2473. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2474. if (cmd == NULL)
  2475. return -ENOMEM;
  2476. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2477. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2478. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2479. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2480. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2481. kfree(cmd);
  2482. return rc;
  2483. }
  2484. /*
  2485. * CMD_UPDATE_STADB.
  2486. */
  2487. struct ewc_ht_info {
  2488. __le16 control1;
  2489. __le16 control2;
  2490. __le16 control3;
  2491. } __packed;
  2492. struct peer_capability_info {
  2493. /* Peer type - AP vs. STA. */
  2494. __u8 peer_type;
  2495. /* Basic 802.11 capabilities from assoc resp. */
  2496. __le16 basic_caps;
  2497. /* Set if peer supports 802.11n high throughput (HT). */
  2498. __u8 ht_support;
  2499. /* Valid if HT is supported. */
  2500. __le16 ht_caps;
  2501. __u8 extended_ht_caps;
  2502. struct ewc_ht_info ewc_info;
  2503. /* Legacy rate table. Intersection of our rates and peer rates. */
  2504. __u8 legacy_rates[12];
  2505. /* HT rate table. Intersection of our rates and peer rates. */
  2506. __u8 ht_rates[16];
  2507. __u8 pad[16];
  2508. /* If set, interoperability mode, no proprietary extensions. */
  2509. __u8 interop;
  2510. __u8 pad2;
  2511. __u8 station_id;
  2512. __le16 amsdu_enabled;
  2513. } __packed;
  2514. struct mwl8k_cmd_update_stadb {
  2515. struct mwl8k_cmd_pkt header;
  2516. /* See STADB_ACTION_TYPE */
  2517. __le32 action;
  2518. /* Peer MAC address */
  2519. __u8 peer_addr[ETH_ALEN];
  2520. __le32 reserved;
  2521. /* Peer info - valid during add/update. */
  2522. struct peer_capability_info peer_info;
  2523. } __packed;
  2524. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2525. #define MWL8K_STA_DB_DEL_ENTRY 2
  2526. /* Peer Entry flags - used to define the type of the peer node */
  2527. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2528. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2529. struct ieee80211_vif *vif,
  2530. struct ieee80211_sta *sta)
  2531. {
  2532. struct mwl8k_cmd_update_stadb *cmd;
  2533. struct peer_capability_info *p;
  2534. u32 rates;
  2535. int rc;
  2536. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2537. if (cmd == NULL)
  2538. return -ENOMEM;
  2539. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2540. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2541. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2542. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2543. p = &cmd->peer_info;
  2544. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2545. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2546. p->ht_support = sta->ht_cap.ht_supported;
  2547. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2548. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2549. ((sta->ht_cap.ampdu_density & 7) << 2);
  2550. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2551. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2552. else
  2553. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2554. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2555. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2556. p->interop = 1;
  2557. p->amsdu_enabled = 0;
  2558. rc = mwl8k_post_cmd(hw, &cmd->header);
  2559. kfree(cmd);
  2560. return rc ? rc : p->station_id;
  2561. }
  2562. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2563. struct ieee80211_vif *vif, u8 *addr)
  2564. {
  2565. struct mwl8k_cmd_update_stadb *cmd;
  2566. int rc;
  2567. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2568. if (cmd == NULL)
  2569. return -ENOMEM;
  2570. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2571. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2572. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2573. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2574. rc = mwl8k_post_cmd(hw, &cmd->header);
  2575. kfree(cmd);
  2576. return rc;
  2577. }
  2578. /*
  2579. * Interrupt handling.
  2580. */
  2581. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2582. {
  2583. struct ieee80211_hw *hw = dev_id;
  2584. struct mwl8k_priv *priv = hw->priv;
  2585. u32 status;
  2586. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2587. if (!status)
  2588. return IRQ_NONE;
  2589. if (status & MWL8K_A2H_INT_TX_DONE) {
  2590. status &= ~MWL8K_A2H_INT_TX_DONE;
  2591. tasklet_schedule(&priv->poll_tx_task);
  2592. }
  2593. if (status & MWL8K_A2H_INT_RX_READY) {
  2594. status &= ~MWL8K_A2H_INT_RX_READY;
  2595. tasklet_schedule(&priv->poll_rx_task);
  2596. }
  2597. if (status)
  2598. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2599. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2600. if (priv->hostcmd_wait != NULL)
  2601. complete(priv->hostcmd_wait);
  2602. }
  2603. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2604. if (!mutex_is_locked(&priv->fw_mutex) &&
  2605. priv->radio_on && priv->pending_tx_pkts)
  2606. mwl8k_tx_start(priv);
  2607. }
  2608. return IRQ_HANDLED;
  2609. }
  2610. static void mwl8k_tx_poll(unsigned long data)
  2611. {
  2612. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2613. struct mwl8k_priv *priv = hw->priv;
  2614. int limit;
  2615. int i;
  2616. limit = 32;
  2617. spin_lock_bh(&priv->tx_lock);
  2618. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2619. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2620. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2621. complete(priv->tx_wait);
  2622. priv->tx_wait = NULL;
  2623. }
  2624. spin_unlock_bh(&priv->tx_lock);
  2625. if (limit) {
  2626. writel(~MWL8K_A2H_INT_TX_DONE,
  2627. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2628. } else {
  2629. tasklet_schedule(&priv->poll_tx_task);
  2630. }
  2631. }
  2632. static void mwl8k_rx_poll(unsigned long data)
  2633. {
  2634. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2635. struct mwl8k_priv *priv = hw->priv;
  2636. int limit;
  2637. limit = 32;
  2638. limit -= rxq_process(hw, 0, limit);
  2639. limit -= rxq_refill(hw, 0, limit);
  2640. if (limit) {
  2641. writel(~MWL8K_A2H_INT_RX_READY,
  2642. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2643. } else {
  2644. tasklet_schedule(&priv->poll_rx_task);
  2645. }
  2646. }
  2647. /*
  2648. * Core driver operations.
  2649. */
  2650. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2651. {
  2652. struct mwl8k_priv *priv = hw->priv;
  2653. int index = skb_get_queue_mapping(skb);
  2654. int rc;
  2655. if (!priv->radio_on) {
  2656. wiphy_debug(hw->wiphy,
  2657. "dropped TX frame since radio disabled\n");
  2658. dev_kfree_skb(skb);
  2659. return NETDEV_TX_OK;
  2660. }
  2661. rc = mwl8k_txq_xmit(hw, index, skb);
  2662. return rc;
  2663. }
  2664. static int mwl8k_start(struct ieee80211_hw *hw)
  2665. {
  2666. struct mwl8k_priv *priv = hw->priv;
  2667. int rc;
  2668. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2669. IRQF_SHARED, MWL8K_NAME, hw);
  2670. if (rc) {
  2671. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2672. return -EIO;
  2673. }
  2674. /* Enable TX reclaim and RX tasklets. */
  2675. tasklet_enable(&priv->poll_tx_task);
  2676. tasklet_enable(&priv->poll_rx_task);
  2677. /* Enable interrupts */
  2678. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2679. rc = mwl8k_fw_lock(hw);
  2680. if (!rc) {
  2681. rc = mwl8k_cmd_radio_enable(hw);
  2682. if (!priv->ap_fw) {
  2683. if (!rc)
  2684. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2685. if (!rc)
  2686. rc = mwl8k_cmd_set_pre_scan(hw);
  2687. if (!rc)
  2688. rc = mwl8k_cmd_set_post_scan(hw,
  2689. "\x00\x00\x00\x00\x00\x00");
  2690. }
  2691. if (!rc)
  2692. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2693. if (!rc)
  2694. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2695. mwl8k_fw_unlock(hw);
  2696. }
  2697. if (rc) {
  2698. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2699. free_irq(priv->pdev->irq, hw);
  2700. tasklet_disable(&priv->poll_tx_task);
  2701. tasklet_disable(&priv->poll_rx_task);
  2702. }
  2703. return rc;
  2704. }
  2705. static void mwl8k_stop(struct ieee80211_hw *hw)
  2706. {
  2707. struct mwl8k_priv *priv = hw->priv;
  2708. int i;
  2709. mwl8k_cmd_radio_disable(hw);
  2710. ieee80211_stop_queues(hw);
  2711. /* Disable interrupts */
  2712. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2713. free_irq(priv->pdev->irq, hw);
  2714. /* Stop finalize join worker */
  2715. cancel_work_sync(&priv->finalize_join_worker);
  2716. if (priv->beacon_skb != NULL)
  2717. dev_kfree_skb(priv->beacon_skb);
  2718. /* Stop TX reclaim and RX tasklets. */
  2719. tasklet_disable(&priv->poll_tx_task);
  2720. tasklet_disable(&priv->poll_rx_task);
  2721. /* Return all skbs to mac80211 */
  2722. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2723. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2724. }
  2725. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2726. struct ieee80211_vif *vif)
  2727. {
  2728. struct mwl8k_priv *priv = hw->priv;
  2729. struct mwl8k_vif *mwl8k_vif;
  2730. u32 macids_supported;
  2731. int macid;
  2732. /*
  2733. * Reject interface creation if sniffer mode is active, as
  2734. * STA operation is mutually exclusive with hardware sniffer
  2735. * mode. (Sniffer mode is only used on STA firmware.)
  2736. */
  2737. if (priv->sniffer_enabled) {
  2738. wiphy_info(hw->wiphy,
  2739. "unable to create STA interface because sniffer mode is enabled\n");
  2740. return -EINVAL;
  2741. }
  2742. switch (vif->type) {
  2743. case NL80211_IFTYPE_AP:
  2744. macids_supported = priv->ap_macids_supported;
  2745. break;
  2746. case NL80211_IFTYPE_STATION:
  2747. macids_supported = priv->sta_macids_supported;
  2748. break;
  2749. default:
  2750. return -EINVAL;
  2751. }
  2752. macid = ffs(macids_supported & ~priv->macids_used);
  2753. if (!macid--)
  2754. return -EBUSY;
  2755. /* Setup driver private area. */
  2756. mwl8k_vif = MWL8K_VIF(vif);
  2757. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2758. mwl8k_vif->vif = vif;
  2759. mwl8k_vif->macid = macid;
  2760. mwl8k_vif->seqno = 0;
  2761. /* Set the mac address. */
  2762. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2763. if (priv->ap_fw)
  2764. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2765. priv->macids_used |= 1 << mwl8k_vif->macid;
  2766. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2767. return 0;
  2768. }
  2769. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2770. struct ieee80211_vif *vif)
  2771. {
  2772. struct mwl8k_priv *priv = hw->priv;
  2773. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2774. if (priv->ap_fw)
  2775. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2776. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2777. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2778. list_del(&mwl8k_vif->list);
  2779. }
  2780. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2781. {
  2782. struct ieee80211_conf *conf = &hw->conf;
  2783. struct mwl8k_priv *priv = hw->priv;
  2784. int rc;
  2785. if (conf->flags & IEEE80211_CONF_IDLE) {
  2786. mwl8k_cmd_radio_disable(hw);
  2787. return 0;
  2788. }
  2789. rc = mwl8k_fw_lock(hw);
  2790. if (rc)
  2791. return rc;
  2792. rc = mwl8k_cmd_radio_enable(hw);
  2793. if (rc)
  2794. goto out;
  2795. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2796. if (rc)
  2797. goto out;
  2798. if (conf->power_level > 18)
  2799. conf->power_level = 18;
  2800. if (priv->ap_fw) {
  2801. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  2802. if (rc)
  2803. goto out;
  2804. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2805. if (!rc)
  2806. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2807. } else {
  2808. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2809. if (rc)
  2810. goto out;
  2811. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2812. }
  2813. out:
  2814. mwl8k_fw_unlock(hw);
  2815. return rc;
  2816. }
  2817. static void
  2818. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2819. struct ieee80211_bss_conf *info, u32 changed)
  2820. {
  2821. struct mwl8k_priv *priv = hw->priv;
  2822. u32 ap_legacy_rates;
  2823. u8 ap_mcs_rates[16];
  2824. int rc;
  2825. if (mwl8k_fw_lock(hw))
  2826. return;
  2827. /*
  2828. * No need to capture a beacon if we're no longer associated.
  2829. */
  2830. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2831. priv->capture_beacon = false;
  2832. /*
  2833. * Get the AP's legacy and MCS rates.
  2834. */
  2835. if (vif->bss_conf.assoc) {
  2836. struct ieee80211_sta *ap;
  2837. rcu_read_lock();
  2838. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2839. if (ap == NULL) {
  2840. rcu_read_unlock();
  2841. goto out;
  2842. }
  2843. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2844. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2845. } else {
  2846. ap_legacy_rates =
  2847. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2848. }
  2849. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2850. rcu_read_unlock();
  2851. }
  2852. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2853. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2854. if (rc)
  2855. goto out;
  2856. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2857. if (rc)
  2858. goto out;
  2859. }
  2860. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2861. rc = mwl8k_set_radio_preamble(hw,
  2862. vif->bss_conf.use_short_preamble);
  2863. if (rc)
  2864. goto out;
  2865. }
  2866. if (changed & BSS_CHANGED_ERP_SLOT) {
  2867. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2868. if (rc)
  2869. goto out;
  2870. }
  2871. if (vif->bss_conf.assoc &&
  2872. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2873. BSS_CHANGED_HT))) {
  2874. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2875. if (rc)
  2876. goto out;
  2877. }
  2878. if (vif->bss_conf.assoc &&
  2879. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2880. /*
  2881. * Finalize the join. Tell rx handler to process
  2882. * next beacon from our BSSID.
  2883. */
  2884. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2885. priv->capture_beacon = true;
  2886. }
  2887. out:
  2888. mwl8k_fw_unlock(hw);
  2889. }
  2890. static void
  2891. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2892. struct ieee80211_bss_conf *info, u32 changed)
  2893. {
  2894. int rc;
  2895. if (mwl8k_fw_lock(hw))
  2896. return;
  2897. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2898. rc = mwl8k_set_radio_preamble(hw,
  2899. vif->bss_conf.use_short_preamble);
  2900. if (rc)
  2901. goto out;
  2902. }
  2903. if (changed & BSS_CHANGED_BASIC_RATES) {
  2904. int idx;
  2905. int rate;
  2906. /*
  2907. * Use lowest supported basic rate for multicasts
  2908. * and management frames (such as probe responses --
  2909. * beacons will always go out at 1 Mb/s).
  2910. */
  2911. idx = ffs(vif->bss_conf.basic_rates);
  2912. if (idx)
  2913. idx--;
  2914. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2915. rate = mwl8k_rates_24[idx].hw_value;
  2916. else
  2917. rate = mwl8k_rates_50[idx].hw_value;
  2918. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2919. }
  2920. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2921. struct sk_buff *skb;
  2922. skb = ieee80211_beacon_get(hw, vif);
  2923. if (skb != NULL) {
  2924. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2925. kfree_skb(skb);
  2926. }
  2927. }
  2928. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2929. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2930. out:
  2931. mwl8k_fw_unlock(hw);
  2932. }
  2933. static void
  2934. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2935. struct ieee80211_bss_conf *info, u32 changed)
  2936. {
  2937. struct mwl8k_priv *priv = hw->priv;
  2938. if (!priv->ap_fw)
  2939. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2940. else
  2941. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2942. }
  2943. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2944. struct netdev_hw_addr_list *mc_list)
  2945. {
  2946. struct mwl8k_cmd_pkt *cmd;
  2947. /*
  2948. * Synthesize and return a command packet that programs the
  2949. * hardware multicast address filter. At this point we don't
  2950. * know whether FIF_ALLMULTI is being requested, but if it is,
  2951. * we'll end up throwing this packet away and creating a new
  2952. * one in mwl8k_configure_filter().
  2953. */
  2954. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2955. return (unsigned long)cmd;
  2956. }
  2957. static int
  2958. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2959. unsigned int changed_flags,
  2960. unsigned int *total_flags)
  2961. {
  2962. struct mwl8k_priv *priv = hw->priv;
  2963. /*
  2964. * Hardware sniffer mode is mutually exclusive with STA
  2965. * operation, so refuse to enable sniffer mode if a STA
  2966. * interface is active.
  2967. */
  2968. if (!list_empty(&priv->vif_list)) {
  2969. if (net_ratelimit())
  2970. wiphy_info(hw->wiphy,
  2971. "not enabling sniffer mode because STA interface is active\n");
  2972. return 0;
  2973. }
  2974. if (!priv->sniffer_enabled) {
  2975. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2976. return 0;
  2977. priv->sniffer_enabled = true;
  2978. }
  2979. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2980. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2981. FIF_OTHER_BSS;
  2982. return 1;
  2983. }
  2984. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2985. {
  2986. if (!list_empty(&priv->vif_list))
  2987. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2988. return NULL;
  2989. }
  2990. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2991. unsigned int changed_flags,
  2992. unsigned int *total_flags,
  2993. u64 multicast)
  2994. {
  2995. struct mwl8k_priv *priv = hw->priv;
  2996. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2997. /*
  2998. * AP firmware doesn't allow fine-grained control over
  2999. * the receive filter.
  3000. */
  3001. if (priv->ap_fw) {
  3002. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3003. kfree(cmd);
  3004. return;
  3005. }
  3006. /*
  3007. * Enable hardware sniffer mode if FIF_CONTROL or
  3008. * FIF_OTHER_BSS is requested.
  3009. */
  3010. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3011. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3012. kfree(cmd);
  3013. return;
  3014. }
  3015. /* Clear unsupported feature flags */
  3016. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3017. if (mwl8k_fw_lock(hw)) {
  3018. kfree(cmd);
  3019. return;
  3020. }
  3021. if (priv->sniffer_enabled) {
  3022. mwl8k_cmd_enable_sniffer(hw, 0);
  3023. priv->sniffer_enabled = false;
  3024. }
  3025. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3026. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3027. /*
  3028. * Disable the BSS filter.
  3029. */
  3030. mwl8k_cmd_set_pre_scan(hw);
  3031. } else {
  3032. struct mwl8k_vif *mwl8k_vif;
  3033. const u8 *bssid;
  3034. /*
  3035. * Enable the BSS filter.
  3036. *
  3037. * If there is an active STA interface, use that
  3038. * interface's BSSID, otherwise use a dummy one
  3039. * (where the OUI part needs to be nonzero for
  3040. * the BSSID to be accepted by POST_SCAN).
  3041. */
  3042. mwl8k_vif = mwl8k_first_vif(priv);
  3043. if (mwl8k_vif != NULL)
  3044. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3045. else
  3046. bssid = "\x01\x00\x00\x00\x00\x00";
  3047. mwl8k_cmd_set_post_scan(hw, bssid);
  3048. }
  3049. }
  3050. /*
  3051. * If FIF_ALLMULTI is being requested, throw away the command
  3052. * packet that ->prepare_multicast() built and replace it with
  3053. * a command packet that enables reception of all multicast
  3054. * packets.
  3055. */
  3056. if (*total_flags & FIF_ALLMULTI) {
  3057. kfree(cmd);
  3058. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3059. }
  3060. if (cmd != NULL) {
  3061. mwl8k_post_cmd(hw, cmd);
  3062. kfree(cmd);
  3063. }
  3064. mwl8k_fw_unlock(hw);
  3065. }
  3066. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3067. {
  3068. return mwl8k_cmd_set_rts_threshold(hw, value);
  3069. }
  3070. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3071. struct ieee80211_vif *vif,
  3072. struct ieee80211_sta *sta)
  3073. {
  3074. struct mwl8k_priv *priv = hw->priv;
  3075. if (priv->ap_fw)
  3076. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3077. else
  3078. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3079. }
  3080. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3081. struct ieee80211_vif *vif,
  3082. struct ieee80211_sta *sta)
  3083. {
  3084. struct mwl8k_priv *priv = hw->priv;
  3085. int ret;
  3086. if (!priv->ap_fw) {
  3087. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3088. if (ret >= 0) {
  3089. MWL8K_STA(sta)->peer_id = ret;
  3090. return 0;
  3091. }
  3092. return ret;
  3093. }
  3094. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3095. }
  3096. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3097. const struct ieee80211_tx_queue_params *params)
  3098. {
  3099. struct mwl8k_priv *priv = hw->priv;
  3100. int rc;
  3101. rc = mwl8k_fw_lock(hw);
  3102. if (!rc) {
  3103. if (!priv->wmm_enabled)
  3104. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3105. if (!rc)
  3106. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3107. params->cw_min,
  3108. params->cw_max,
  3109. params->aifs,
  3110. params->txop);
  3111. mwl8k_fw_unlock(hw);
  3112. }
  3113. return rc;
  3114. }
  3115. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3116. struct ieee80211_low_level_stats *stats)
  3117. {
  3118. return mwl8k_cmd_get_stat(hw, stats);
  3119. }
  3120. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3121. struct survey_info *survey)
  3122. {
  3123. struct mwl8k_priv *priv = hw->priv;
  3124. struct ieee80211_conf *conf = &hw->conf;
  3125. if (idx != 0)
  3126. return -ENOENT;
  3127. survey->channel = conf->channel;
  3128. survey->filled = SURVEY_INFO_NOISE_DBM;
  3129. survey->noise = priv->noise;
  3130. return 0;
  3131. }
  3132. static int
  3133. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3134. enum ieee80211_ampdu_mlme_action action,
  3135. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3136. {
  3137. switch (action) {
  3138. case IEEE80211_AMPDU_RX_START:
  3139. case IEEE80211_AMPDU_RX_STOP:
  3140. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3141. return -ENOTSUPP;
  3142. return 0;
  3143. default:
  3144. return -ENOTSUPP;
  3145. }
  3146. }
  3147. static const struct ieee80211_ops mwl8k_ops = {
  3148. .tx = mwl8k_tx,
  3149. .start = mwl8k_start,
  3150. .stop = mwl8k_stop,
  3151. .add_interface = mwl8k_add_interface,
  3152. .remove_interface = mwl8k_remove_interface,
  3153. .config = mwl8k_config,
  3154. .bss_info_changed = mwl8k_bss_info_changed,
  3155. .prepare_multicast = mwl8k_prepare_multicast,
  3156. .configure_filter = mwl8k_configure_filter,
  3157. .set_rts_threshold = mwl8k_set_rts_threshold,
  3158. .sta_add = mwl8k_sta_add,
  3159. .sta_remove = mwl8k_sta_remove,
  3160. .conf_tx = mwl8k_conf_tx,
  3161. .get_stats = mwl8k_get_stats,
  3162. .get_survey = mwl8k_get_survey,
  3163. .ampdu_action = mwl8k_ampdu_action,
  3164. };
  3165. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3166. {
  3167. struct mwl8k_priv *priv =
  3168. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3169. struct sk_buff *skb = priv->beacon_skb;
  3170. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3171. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3172. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3173. mgmt->u.beacon.variable, len);
  3174. int dtim_period = 1;
  3175. if (tim && tim[1] >= 2)
  3176. dtim_period = tim[3];
  3177. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3178. dev_kfree_skb(skb);
  3179. priv->beacon_skb = NULL;
  3180. }
  3181. enum {
  3182. MWL8363 = 0,
  3183. MWL8687,
  3184. MWL8366,
  3185. };
  3186. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3187. [MWL8363] = {
  3188. .part_name = "88w8363",
  3189. .helper_image = "mwl8k/helper_8363.fw",
  3190. .fw_image = "mwl8k/fmimage_8363.fw",
  3191. },
  3192. [MWL8687] = {
  3193. .part_name = "88w8687",
  3194. .helper_image = "mwl8k/helper_8687.fw",
  3195. .fw_image = "mwl8k/fmimage_8687.fw",
  3196. },
  3197. [MWL8366] = {
  3198. .part_name = "88w8366",
  3199. .helper_image = "mwl8k/helper_8366.fw",
  3200. .fw_image = "mwl8k/fmimage_8366.fw",
  3201. .ap_rxd_ops = &rxd_8366_ap_ops,
  3202. },
  3203. };
  3204. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3205. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3206. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3207. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3208. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3209. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3210. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3211. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3212. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3213. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3214. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3215. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3216. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3217. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3218. { },
  3219. };
  3220. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3221. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3222. const struct pci_device_id *id)
  3223. {
  3224. static int printed_version = 0;
  3225. struct ieee80211_hw *hw;
  3226. struct mwl8k_priv *priv;
  3227. int rc;
  3228. int i;
  3229. if (!printed_version) {
  3230. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3231. printed_version = 1;
  3232. }
  3233. rc = pci_enable_device(pdev);
  3234. if (rc) {
  3235. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3236. MWL8K_NAME);
  3237. return rc;
  3238. }
  3239. rc = pci_request_regions(pdev, MWL8K_NAME);
  3240. if (rc) {
  3241. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3242. MWL8K_NAME);
  3243. goto err_disable_device;
  3244. }
  3245. pci_set_master(pdev);
  3246. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3247. if (hw == NULL) {
  3248. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3249. rc = -ENOMEM;
  3250. goto err_free_reg;
  3251. }
  3252. SET_IEEE80211_DEV(hw, &pdev->dev);
  3253. pci_set_drvdata(pdev, hw);
  3254. priv = hw->priv;
  3255. priv->hw = hw;
  3256. priv->pdev = pdev;
  3257. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3258. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3259. if (priv->sram == NULL) {
  3260. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3261. goto err_iounmap;
  3262. }
  3263. /*
  3264. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3265. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3266. */
  3267. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3268. if (priv->regs == NULL) {
  3269. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3270. if (priv->regs == NULL) {
  3271. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3272. goto err_iounmap;
  3273. }
  3274. }
  3275. /* Reset firmware and hardware */
  3276. mwl8k_hw_reset(priv);
  3277. /* Ask userland hotplug daemon for the device firmware */
  3278. rc = mwl8k_request_firmware(priv);
  3279. if (rc) {
  3280. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3281. goto err_stop_firmware;
  3282. }
  3283. /* Load firmware into hardware */
  3284. rc = mwl8k_load_firmware(hw);
  3285. if (rc) {
  3286. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3287. goto err_stop_firmware;
  3288. }
  3289. /* Reclaim memory once firmware is successfully loaded */
  3290. mwl8k_release_firmware(priv);
  3291. if (priv->ap_fw) {
  3292. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3293. if (priv->rxd_ops == NULL) {
  3294. wiphy_err(hw->wiphy,
  3295. "Driver does not have AP firmware image support for this hardware\n");
  3296. goto err_stop_firmware;
  3297. }
  3298. } else {
  3299. priv->rxd_ops = &rxd_sta_ops;
  3300. }
  3301. priv->sniffer_enabled = false;
  3302. priv->wmm_enabled = false;
  3303. priv->pending_tx_pkts = 0;
  3304. /*
  3305. * Extra headroom is the size of the required DMA header
  3306. * minus the size of the smallest 802.11 frame (CTS frame).
  3307. */
  3308. hw->extra_tx_headroom =
  3309. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3310. hw->channel_change_time = 10;
  3311. hw->queues = MWL8K_TX_QUEUES;
  3312. /* Set rssi values to dBm */
  3313. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3314. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3315. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3316. priv->macids_used = 0;
  3317. INIT_LIST_HEAD(&priv->vif_list);
  3318. /* Set default radio state and preamble */
  3319. priv->radio_on = 0;
  3320. priv->radio_short_preamble = 0;
  3321. /* Finalize join worker */
  3322. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3323. /* TX reclaim and RX tasklets. */
  3324. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3325. tasklet_disable(&priv->poll_tx_task);
  3326. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3327. tasklet_disable(&priv->poll_rx_task);
  3328. /* Power management cookie */
  3329. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3330. if (priv->cookie == NULL)
  3331. goto err_stop_firmware;
  3332. rc = mwl8k_rxq_init(hw, 0);
  3333. if (rc)
  3334. goto err_free_cookie;
  3335. rxq_refill(hw, 0, INT_MAX);
  3336. mutex_init(&priv->fw_mutex);
  3337. priv->fw_mutex_owner = NULL;
  3338. priv->fw_mutex_depth = 0;
  3339. priv->hostcmd_wait = NULL;
  3340. spin_lock_init(&priv->tx_lock);
  3341. priv->tx_wait = NULL;
  3342. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3343. rc = mwl8k_txq_init(hw, i);
  3344. if (rc)
  3345. goto err_free_queues;
  3346. }
  3347. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3348. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3349. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3350. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3351. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3352. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3353. IRQF_SHARED, MWL8K_NAME, hw);
  3354. if (rc) {
  3355. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3356. goto err_free_queues;
  3357. }
  3358. /*
  3359. * Temporarily enable interrupts. Initial firmware host
  3360. * commands use interrupts and avoid polling. Disable
  3361. * interrupts when done.
  3362. */
  3363. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3364. /* Get config data, mac addrs etc */
  3365. if (priv->ap_fw) {
  3366. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3367. if (!rc)
  3368. rc = mwl8k_cmd_set_hw_spec(hw);
  3369. } else {
  3370. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3371. }
  3372. if (rc) {
  3373. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3374. goto err_free_irq;
  3375. }
  3376. hw->wiphy->interface_modes = 0;
  3377. if (priv->ap_macids_supported)
  3378. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3379. if (priv->sta_macids_supported)
  3380. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3381. /* Turn radio off */
  3382. rc = mwl8k_cmd_radio_disable(hw);
  3383. if (rc) {
  3384. wiphy_err(hw->wiphy, "Cannot disable\n");
  3385. goto err_free_irq;
  3386. }
  3387. /* Clear MAC address */
  3388. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3389. if (rc) {
  3390. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3391. goto err_free_irq;
  3392. }
  3393. /* Disable interrupts */
  3394. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3395. free_irq(priv->pdev->irq, hw);
  3396. rc = ieee80211_register_hw(hw);
  3397. if (rc) {
  3398. wiphy_err(hw->wiphy, "Cannot register device\n");
  3399. goto err_free_queues;
  3400. }
  3401. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3402. priv->device_info->part_name,
  3403. priv->hw_rev, hw->wiphy->perm_addr,
  3404. priv->ap_fw ? "AP" : "STA",
  3405. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3406. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3407. return 0;
  3408. err_free_irq:
  3409. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3410. free_irq(priv->pdev->irq, hw);
  3411. err_free_queues:
  3412. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3413. mwl8k_txq_deinit(hw, i);
  3414. mwl8k_rxq_deinit(hw, 0);
  3415. err_free_cookie:
  3416. if (priv->cookie != NULL)
  3417. pci_free_consistent(priv->pdev, 4,
  3418. priv->cookie, priv->cookie_dma);
  3419. err_stop_firmware:
  3420. mwl8k_hw_reset(priv);
  3421. mwl8k_release_firmware(priv);
  3422. err_iounmap:
  3423. if (priv->regs != NULL)
  3424. pci_iounmap(pdev, priv->regs);
  3425. if (priv->sram != NULL)
  3426. pci_iounmap(pdev, priv->sram);
  3427. pci_set_drvdata(pdev, NULL);
  3428. ieee80211_free_hw(hw);
  3429. err_free_reg:
  3430. pci_release_regions(pdev);
  3431. err_disable_device:
  3432. pci_disable_device(pdev);
  3433. return rc;
  3434. }
  3435. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3436. {
  3437. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3438. }
  3439. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3440. {
  3441. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3442. struct mwl8k_priv *priv;
  3443. int i;
  3444. if (hw == NULL)
  3445. return;
  3446. priv = hw->priv;
  3447. ieee80211_stop_queues(hw);
  3448. ieee80211_unregister_hw(hw);
  3449. /* Remove TX reclaim and RX tasklets. */
  3450. tasklet_kill(&priv->poll_tx_task);
  3451. tasklet_kill(&priv->poll_rx_task);
  3452. /* Stop hardware */
  3453. mwl8k_hw_reset(priv);
  3454. /* Return all skbs to mac80211 */
  3455. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3456. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3457. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3458. mwl8k_txq_deinit(hw, i);
  3459. mwl8k_rxq_deinit(hw, 0);
  3460. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3461. pci_iounmap(pdev, priv->regs);
  3462. pci_iounmap(pdev, priv->sram);
  3463. pci_set_drvdata(pdev, NULL);
  3464. ieee80211_free_hw(hw);
  3465. pci_release_regions(pdev);
  3466. pci_disable_device(pdev);
  3467. }
  3468. static struct pci_driver mwl8k_driver = {
  3469. .name = MWL8K_NAME,
  3470. .id_table = mwl8k_pci_id_table,
  3471. .probe = mwl8k_probe,
  3472. .remove = __devexit_p(mwl8k_remove),
  3473. .shutdown = __devexit_p(mwl8k_shutdown),
  3474. };
  3475. static int __init mwl8k_init(void)
  3476. {
  3477. return pci_register_driver(&mwl8k_driver);
  3478. }
  3479. static void __exit mwl8k_exit(void)
  3480. {
  3481. pci_unregister_driver(&mwl8k_driver);
  3482. }
  3483. module_init(mwl8k_init);
  3484. module_exit(mwl8k_exit);
  3485. MODULE_DESCRIPTION(MWL8K_DESC);
  3486. MODULE_VERSION(MWL8K_VERSION);
  3487. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3488. MODULE_LICENSE("GPL");