fimc-lite.c 41 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/slab.h>
  23. #include <linux/videodev2.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-ioctl.h>
  26. #include <media/v4l2-mem2mem.h>
  27. #include <media/videobuf2-core.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <media/s5p_fimc.h>
  30. #include "fimc-mdevice.h"
  31. #include "fimc-core.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-lite-reg.h"
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. static const struct fimc_fmt fimc_lite_formats[] = {
  37. {
  38. .name = "YUV 4:2:2 packed, YCbYCr",
  39. .fourcc = V4L2_PIX_FMT_YUYV,
  40. .depth = { 16 },
  41. .color = FIMC_FMT_YCBYCR422,
  42. .memplanes = 1,
  43. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  44. }, {
  45. .name = "YUV 4:2:2 packed, CbYCrY",
  46. .fourcc = V4L2_PIX_FMT_UYVY,
  47. .depth = { 16 },
  48. .color = FIMC_FMT_CBYCRY422,
  49. .memplanes = 1,
  50. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  51. }, {
  52. .name = "YUV 4:2:2 packed, CrYCbY",
  53. .fourcc = V4L2_PIX_FMT_VYUY,
  54. .depth = { 16 },
  55. .color = FIMC_FMT_CRYCBY422,
  56. .memplanes = 1,
  57. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  58. }, {
  59. .name = "YUV 4:2:2 packed, YCrYCb",
  60. .fourcc = V4L2_PIX_FMT_YVYU,
  61. .depth = { 16 },
  62. .color = FIMC_FMT_YCRYCB422,
  63. .memplanes = 1,
  64. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  65. }, {
  66. .name = "RAW8 (GRBG)",
  67. .fourcc = V4L2_PIX_FMT_SGRBG8,
  68. .depth = { 8 },
  69. .color = FIMC_FMT_RAW8,
  70. .memplanes = 1,
  71. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  72. }, {
  73. .name = "RAW10 (GRBG)",
  74. .fourcc = V4L2_PIX_FMT_SGRBG10,
  75. .depth = { 10 },
  76. .color = FIMC_FMT_RAW10,
  77. .memplanes = 1,
  78. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  79. }, {
  80. .name = "RAW12 (GRBG)",
  81. .fourcc = V4L2_PIX_FMT_SGRBG12,
  82. .depth = { 12 },
  83. .color = FIMC_FMT_RAW12,
  84. .memplanes = 1,
  85. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  86. },
  87. };
  88. /**
  89. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  90. * @pixelformat: fourcc to match, ignored if null
  91. * @mbus_code: media bus code to match, ignored if null
  92. * @index: index to the fimc_lite_formats array, ignored if negative
  93. */
  94. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  95. const u32 *mbus_code, int index)
  96. {
  97. const struct fimc_fmt *fmt, *def_fmt = NULL;
  98. unsigned int i;
  99. int id = 0;
  100. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  101. return NULL;
  102. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  103. fmt = &fimc_lite_formats[i];
  104. if (pixelformat && fmt->fourcc == *pixelformat)
  105. return fmt;
  106. if (mbus_code && fmt->mbus_code == *mbus_code)
  107. return fmt;
  108. if (index == id)
  109. def_fmt = fmt;
  110. id++;
  111. }
  112. return def_fmt;
  113. }
  114. static int fimc_lite_hw_init(struct fimc_lite *fimc)
  115. {
  116. struct fimc_pipeline *pipeline = &fimc->pipeline;
  117. struct fimc_sensor_info *sensor;
  118. unsigned long flags;
  119. if (pipeline->subdevs[IDX_SENSOR] == NULL)
  120. return -ENXIO;
  121. if (fimc->fmt == NULL)
  122. return -EINVAL;
  123. sensor = v4l2_get_subdev_hostdata(pipeline->subdevs[IDX_SENSOR]);
  124. spin_lock_irqsave(&fimc->slock, flags);
  125. flite_hw_set_camera_bus(fimc, &sensor->pdata);
  126. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  127. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  128. flite_hw_set_output_dma(fimc, &fimc->out_frame, true);
  129. flite_hw_set_interrupt_mask(fimc);
  130. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  131. if (debug > 0)
  132. flite_hw_dump_regs(fimc, __func__);
  133. spin_unlock_irqrestore(&fimc->slock, flags);
  134. return 0;
  135. }
  136. /*
  137. * Reinitialize the driver so it is ready to start the streaming again.
  138. * Set fimc->state to indicate stream off and the hardware shut down state.
  139. * If not suspending (@suspend is false), return any buffers to videobuf2.
  140. * Otherwise put any owned buffers onto the pending buffers queue, so they
  141. * can be re-spun when the device is being resumed. Also perform FIMC
  142. * software reset and disable streaming on the whole pipeline if required.
  143. */
  144. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  145. {
  146. struct flite_buffer *buf;
  147. unsigned long flags;
  148. bool streaming;
  149. spin_lock_irqsave(&fimc->slock, flags);
  150. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  151. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  152. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  153. if (suspend)
  154. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  155. else
  156. fimc->state &= ~(1 << ST_FLITE_PENDING |
  157. 1 << ST_FLITE_SUSPENDED);
  158. /* Release unused buffers */
  159. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  160. buf = fimc_lite_pending_queue_pop(fimc);
  161. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  162. }
  163. /* If suspending put unused buffers onto pending queue */
  164. while (!list_empty(&fimc->active_buf_q)) {
  165. buf = fimc_lite_active_queue_pop(fimc);
  166. if (suspend)
  167. fimc_lite_pending_queue_add(fimc, buf);
  168. else
  169. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  170. }
  171. spin_unlock_irqrestore(&fimc->slock, flags);
  172. flite_hw_reset(fimc);
  173. if (!streaming)
  174. return 0;
  175. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  176. }
  177. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  178. {
  179. unsigned long flags;
  180. if (!fimc_lite_active(fimc))
  181. return 0;
  182. spin_lock_irqsave(&fimc->slock, flags);
  183. set_bit(ST_FLITE_OFF, &fimc->state);
  184. flite_hw_capture_stop(fimc);
  185. spin_unlock_irqrestore(&fimc->slock, flags);
  186. wait_event_timeout(fimc->irq_queue,
  187. !test_bit(ST_FLITE_OFF, &fimc->state),
  188. (2*HZ/10)); /* 200 ms */
  189. return fimc_lite_reinit(fimc, suspend);
  190. }
  191. /* Must be called with fimc.slock spinlock held. */
  192. static void fimc_lite_config_update(struct fimc_lite *fimc)
  193. {
  194. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  195. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  196. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  197. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  198. }
  199. static irqreturn_t flite_irq_handler(int irq, void *priv)
  200. {
  201. struct fimc_lite *fimc = priv;
  202. struct flite_buffer *vbuf;
  203. unsigned long flags;
  204. struct timeval *tv;
  205. struct timespec ts;
  206. u32 intsrc;
  207. spin_lock_irqsave(&fimc->slock, flags);
  208. intsrc = flite_hw_get_interrupt_source(fimc);
  209. flite_hw_clear_pending_irq(fimc);
  210. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  211. wake_up(&fimc->irq_queue);
  212. goto done;
  213. }
  214. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  215. clear_bit(ST_FLITE_RUN, &fimc->state);
  216. fimc->events.data_overflow++;
  217. }
  218. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  219. flite_hw_clear_last_capture_end(fimc);
  220. clear_bit(ST_FLITE_STREAM, &fimc->state);
  221. wake_up(&fimc->irq_queue);
  222. }
  223. if (fimc->out_path != FIMC_IO_DMA)
  224. goto done;
  225. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  226. test_bit(ST_FLITE_RUN, &fimc->state) &&
  227. !list_empty(&fimc->active_buf_q) &&
  228. !list_empty(&fimc->pending_buf_q)) {
  229. vbuf = fimc_lite_active_queue_pop(fimc);
  230. ktime_get_ts(&ts);
  231. tv = &vbuf->vb.v4l2_buf.timestamp;
  232. tv->tv_sec = ts.tv_sec;
  233. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  234. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  235. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  236. vbuf = fimc_lite_pending_queue_pop(fimc);
  237. flite_hw_set_output_addr(fimc, vbuf->paddr);
  238. fimc_lite_active_queue_add(fimc, vbuf);
  239. }
  240. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  241. fimc_lite_config_update(fimc);
  242. if (list_empty(&fimc->pending_buf_q)) {
  243. flite_hw_capture_stop(fimc);
  244. clear_bit(ST_FLITE_STREAM, &fimc->state);
  245. }
  246. done:
  247. set_bit(ST_FLITE_RUN, &fimc->state);
  248. spin_unlock_irqrestore(&fimc->slock, flags);
  249. return IRQ_HANDLED;
  250. }
  251. static int start_streaming(struct vb2_queue *q, unsigned int count)
  252. {
  253. struct fimc_lite *fimc = q->drv_priv;
  254. int ret;
  255. fimc->frame_count = 0;
  256. ret = fimc_lite_hw_init(fimc);
  257. if (ret) {
  258. fimc_lite_reinit(fimc, false);
  259. return ret;
  260. }
  261. set_bit(ST_FLITE_PENDING, &fimc->state);
  262. if (!list_empty(&fimc->active_buf_q) &&
  263. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  264. flite_hw_capture_start(fimc);
  265. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  266. fimc_pipeline_call(fimc, set_stream,
  267. &fimc->pipeline, 1);
  268. }
  269. if (debug > 0)
  270. flite_hw_dump_regs(fimc, __func__);
  271. return 0;
  272. }
  273. static int stop_streaming(struct vb2_queue *q)
  274. {
  275. struct fimc_lite *fimc = q->drv_priv;
  276. if (!fimc_lite_active(fimc))
  277. return -EINVAL;
  278. return fimc_lite_stop_capture(fimc, false);
  279. }
  280. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  281. unsigned int *num_buffers, unsigned int *num_planes,
  282. unsigned int sizes[], void *allocators[])
  283. {
  284. const struct v4l2_pix_format_mplane *pixm = NULL;
  285. struct fimc_lite *fimc = vq->drv_priv;
  286. struct flite_frame *frame = &fimc->out_frame;
  287. const struct fimc_fmt *fmt = fimc->fmt;
  288. unsigned long wh;
  289. int i;
  290. if (pfmt) {
  291. pixm = &pfmt->fmt.pix_mp;
  292. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
  293. wh = pixm->width * pixm->height;
  294. } else {
  295. wh = frame->f_width * frame->f_height;
  296. }
  297. if (fmt == NULL)
  298. return -EINVAL;
  299. *num_planes = fmt->memplanes;
  300. for (i = 0; i < fmt->memplanes; i++) {
  301. unsigned int size = (wh * fmt->depth[i]) / 8;
  302. if (pixm)
  303. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  304. else
  305. sizes[i] = size;
  306. allocators[i] = fimc->alloc_ctx;
  307. }
  308. return 0;
  309. }
  310. static int buffer_prepare(struct vb2_buffer *vb)
  311. {
  312. struct vb2_queue *vq = vb->vb2_queue;
  313. struct fimc_lite *fimc = vq->drv_priv;
  314. int i;
  315. if (fimc->fmt == NULL)
  316. return -EINVAL;
  317. for (i = 0; i < fimc->fmt->memplanes; i++) {
  318. unsigned long size = fimc->payload[i];
  319. if (vb2_plane_size(vb, i) < size) {
  320. v4l2_err(&fimc->vfd,
  321. "User buffer too small (%ld < %ld)\n",
  322. vb2_plane_size(vb, i), size);
  323. return -EINVAL;
  324. }
  325. vb2_set_plane_payload(vb, i, size);
  326. }
  327. return 0;
  328. }
  329. static void buffer_queue(struct vb2_buffer *vb)
  330. {
  331. struct flite_buffer *buf
  332. = container_of(vb, struct flite_buffer, vb);
  333. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  334. unsigned long flags;
  335. spin_lock_irqsave(&fimc->slock, flags);
  336. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  337. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  338. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  339. list_empty(&fimc->active_buf_q)) {
  340. flite_hw_set_output_addr(fimc, buf->paddr);
  341. fimc_lite_active_queue_add(fimc, buf);
  342. } else {
  343. fimc_lite_pending_queue_add(fimc, buf);
  344. }
  345. if (vb2_is_streaming(&fimc->vb_queue) &&
  346. !list_empty(&fimc->pending_buf_q) &&
  347. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  348. flite_hw_capture_start(fimc);
  349. spin_unlock_irqrestore(&fimc->slock, flags);
  350. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  351. fimc_pipeline_call(fimc, set_stream,
  352. &fimc->pipeline, 1);
  353. return;
  354. }
  355. spin_unlock_irqrestore(&fimc->slock, flags);
  356. }
  357. static void fimc_lock(struct vb2_queue *vq)
  358. {
  359. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  360. mutex_lock(&fimc->lock);
  361. }
  362. static void fimc_unlock(struct vb2_queue *vq)
  363. {
  364. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  365. mutex_unlock(&fimc->lock);
  366. }
  367. static const struct vb2_ops fimc_lite_qops = {
  368. .queue_setup = queue_setup,
  369. .buf_prepare = buffer_prepare,
  370. .buf_queue = buffer_queue,
  371. .wait_prepare = fimc_unlock,
  372. .wait_finish = fimc_lock,
  373. .start_streaming = start_streaming,
  374. .stop_streaming = stop_streaming,
  375. };
  376. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  377. {
  378. unsigned long flags;
  379. spin_lock_irqsave(&fimc->slock, flags);
  380. memset(&fimc->events, 0, sizeof(fimc->events));
  381. spin_unlock_irqrestore(&fimc->slock, flags);
  382. }
  383. static int fimc_lite_open(struct file *file)
  384. {
  385. struct fimc_lite *fimc = video_drvdata(file);
  386. int ret;
  387. if (mutex_lock_interruptible(&fimc->lock))
  388. return -ERESTARTSYS;
  389. set_bit(ST_FLITE_IN_USE, &fimc->state);
  390. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  391. if (ret < 0)
  392. goto done;
  393. ret = v4l2_fh_open(file);
  394. if (ret < 0)
  395. goto done;
  396. if (++fimc->ref_count == 1 && fimc->out_path == FIMC_IO_DMA) {
  397. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  398. &fimc->vfd.entity, true);
  399. if (ret < 0) {
  400. pm_runtime_put_sync(&fimc->pdev->dev);
  401. fimc->ref_count--;
  402. v4l2_fh_release(file);
  403. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  404. }
  405. fimc_lite_clear_event_counters(fimc);
  406. }
  407. done:
  408. mutex_unlock(&fimc->lock);
  409. return ret;
  410. }
  411. static int fimc_lite_close(struct file *file)
  412. {
  413. struct fimc_lite *fimc = video_drvdata(file);
  414. int ret;
  415. if (mutex_lock_interruptible(&fimc->lock))
  416. return -ERESTARTSYS;
  417. if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) {
  418. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  419. fimc_lite_stop_capture(fimc, false);
  420. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  421. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  422. }
  423. pm_runtime_put(&fimc->pdev->dev);
  424. if (fimc->ref_count == 0)
  425. vb2_queue_release(&fimc->vb_queue);
  426. ret = v4l2_fh_release(file);
  427. mutex_unlock(&fimc->lock);
  428. return ret;
  429. }
  430. static unsigned int fimc_lite_poll(struct file *file,
  431. struct poll_table_struct *wait)
  432. {
  433. struct fimc_lite *fimc = video_drvdata(file);
  434. int ret;
  435. if (mutex_lock_interruptible(&fimc->lock))
  436. return POLL_ERR;
  437. ret = vb2_poll(&fimc->vb_queue, file, wait);
  438. mutex_unlock(&fimc->lock);
  439. return ret;
  440. }
  441. static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)
  442. {
  443. struct fimc_lite *fimc = video_drvdata(file);
  444. int ret;
  445. if (mutex_lock_interruptible(&fimc->lock))
  446. return -ERESTARTSYS;
  447. ret = vb2_mmap(&fimc->vb_queue, vma);
  448. mutex_unlock(&fimc->lock);
  449. return ret;
  450. }
  451. static const struct v4l2_file_operations fimc_lite_fops = {
  452. .owner = THIS_MODULE,
  453. .open = fimc_lite_open,
  454. .release = fimc_lite_close,
  455. .poll = fimc_lite_poll,
  456. .unlocked_ioctl = video_ioctl2,
  457. .mmap = fimc_lite_mmap,
  458. };
  459. /*
  460. * Format and crop negotiation helpers
  461. */
  462. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  463. u32 *width, u32 *height,
  464. u32 *code, u32 *fourcc, int pad)
  465. {
  466. struct flite_variant *variant = fimc->variant;
  467. const struct fimc_fmt *fmt;
  468. fmt = fimc_lite_find_format(fourcc, code, 0);
  469. if (WARN_ON(!fmt))
  470. return NULL;
  471. if (code)
  472. *code = fmt->mbus_code;
  473. if (fourcc)
  474. *fourcc = fmt->fourcc;
  475. if (pad == FLITE_SD_PAD_SINK) {
  476. v4l_bound_align_image(width, 8, variant->max_width,
  477. ffs(variant->out_width_align) - 1,
  478. height, 0, variant->max_height, 0, 0);
  479. } else {
  480. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  481. ffs(variant->out_width_align) - 1,
  482. height, 0, fimc->inp_frame.rect.height,
  483. 0, 0);
  484. }
  485. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  486. code ? *code : 0, *width, *height);
  487. return fmt;
  488. }
  489. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  490. {
  491. struct flite_frame *frame = &fimc->inp_frame;
  492. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  493. &r->height, 0, frame->f_height, 0, 0);
  494. /* Adjust left/top if cropping rectangle got out of bounds */
  495. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  496. r->left = round_down(r->left, fimc->variant->win_hor_offs_align);
  497. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  498. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",
  499. r->left, r->top, r->width, r->height,
  500. frame->f_width, frame->f_height);
  501. }
  502. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  503. {
  504. struct flite_frame *frame = &fimc->out_frame;
  505. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  506. /* Scaling is not supported so we enforce compose rectangle size
  507. same as size of the sink crop rectangle. */
  508. r->width = crop_rect->width;
  509. r->height = crop_rect->height;
  510. /* Adjust left/top if the composing rectangle got out of bounds */
  511. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  512. r->left = round_down(r->left, fimc->variant->out_hor_offs_align);
  513. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  514. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",
  515. r->left, r->top, r->width, r->height,
  516. frame->f_width, frame->f_height);
  517. }
  518. /*
  519. * Video node ioctl operations
  520. */
  521. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  522. struct v4l2_capability *cap)
  523. {
  524. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  525. cap->bus_info[0] = 0;
  526. cap->card[0] = 0;
  527. cap->capabilities = V4L2_CAP_STREAMING;
  528. return 0;
  529. }
  530. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  531. struct v4l2_fmtdesc *f)
  532. {
  533. const struct fimc_fmt *fmt;
  534. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  535. return -EINVAL;
  536. fmt = &fimc_lite_formats[f->index];
  537. strlcpy(f->description, fmt->name, sizeof(f->description));
  538. f->pixelformat = fmt->fourcc;
  539. return 0;
  540. }
  541. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  542. struct v4l2_format *f)
  543. {
  544. struct fimc_lite *fimc = video_drvdata(file);
  545. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  546. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  547. struct flite_frame *frame = &fimc->out_frame;
  548. const struct fimc_fmt *fmt = fimc->fmt;
  549. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  550. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  551. pixm->num_planes = fmt->memplanes;
  552. pixm->pixelformat = fmt->fourcc;
  553. pixm->width = frame->f_width;
  554. pixm->height = frame->f_height;
  555. pixm->field = V4L2_FIELD_NONE;
  556. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  557. return 0;
  558. }
  559. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  560. struct v4l2_pix_format_mplane *pixm,
  561. const struct fimc_fmt **ffmt)
  562. {
  563. struct flite_variant *variant = fimc->variant;
  564. u32 bpl = pixm->plane_fmt[0].bytesperline;
  565. const struct fimc_fmt *fmt;
  566. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
  567. if (WARN_ON(fmt == NULL))
  568. return -EINVAL;
  569. if (ffmt)
  570. *ffmt = fmt;
  571. v4l_bound_align_image(&pixm->width, 8, variant->max_width,
  572. ffs(variant->out_width_align) - 1,
  573. &pixm->height, 0, variant->max_height, 0, 0);
  574. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  575. pixm->plane_fmt[0].bytesperline = (pixm->width *
  576. fmt->depth[0]) / 8;
  577. if (pixm->plane_fmt[0].sizeimage == 0)
  578. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  579. fmt->depth[0]) / 8;
  580. pixm->num_planes = fmt->memplanes;
  581. pixm->pixelformat = fmt->fourcc;
  582. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  583. pixm->field = V4L2_FIELD_NONE;
  584. return 0;
  585. }
  586. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  587. struct v4l2_format *f)
  588. {
  589. struct fimc_lite *fimc = video_drvdata(file);
  590. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  591. }
  592. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  593. struct v4l2_format *f)
  594. {
  595. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  596. struct fimc_lite *fimc = video_drvdata(file);
  597. struct flite_frame *frame = &fimc->out_frame;
  598. const struct fimc_fmt *fmt = NULL;
  599. int ret;
  600. if (vb2_is_busy(&fimc->vb_queue))
  601. return -EBUSY;
  602. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  603. if (ret < 0)
  604. return ret;
  605. fimc->fmt = fmt;
  606. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  607. pixm->plane_fmt[0].sizeimage);
  608. frame->f_width = pixm->width;
  609. frame->f_height = pixm->height;
  610. return 0;
  611. }
  612. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  613. {
  614. struct v4l2_subdev *sd = &fimc->subdev;
  615. struct v4l2_subdev_format sink_fmt, src_fmt;
  616. struct media_pad *pad;
  617. int ret;
  618. while (1) {
  619. /* Retrieve format at the sink pad */
  620. pad = &sd->entity.pads[0];
  621. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  622. break;
  623. /* Don't call FIMC subdev operation to avoid nested locking */
  624. if (sd == &fimc->subdev) {
  625. struct flite_frame *ff = &fimc->out_frame;
  626. sink_fmt.format.width = ff->f_width;
  627. sink_fmt.format.height = ff->f_height;
  628. sink_fmt.format.code = fimc->fmt->mbus_code;
  629. } else {
  630. sink_fmt.pad = pad->index;
  631. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  632. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  633. &sink_fmt);
  634. if (ret < 0 && ret != -ENOIOCTLCMD)
  635. return -EPIPE;
  636. }
  637. /* Retrieve format at the source pad */
  638. pad = media_entity_remote_source(pad);
  639. if (pad == NULL ||
  640. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  641. break;
  642. sd = media_entity_to_v4l2_subdev(pad->entity);
  643. src_fmt.pad = pad->index;
  644. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  645. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  646. if (ret < 0 && ret != -ENOIOCTLCMD)
  647. return -EPIPE;
  648. if (src_fmt.format.width != sink_fmt.format.width ||
  649. src_fmt.format.height != sink_fmt.format.height ||
  650. src_fmt.format.code != sink_fmt.format.code)
  651. return -EPIPE;
  652. }
  653. return 0;
  654. }
  655. static int fimc_lite_streamon(struct file *file, void *priv,
  656. enum v4l2_buf_type type)
  657. {
  658. struct fimc_lite *fimc = video_drvdata(file);
  659. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  660. struct fimc_pipeline *p = &fimc->pipeline;
  661. int ret;
  662. if (fimc_lite_active(fimc))
  663. return -EBUSY;
  664. ret = media_entity_pipeline_start(&sensor->entity, p->m_pipeline);
  665. if (ret < 0)
  666. return ret;
  667. ret = fimc_pipeline_validate(fimc);
  668. if (ret) {
  669. media_entity_pipeline_stop(&sensor->entity);
  670. return ret;
  671. }
  672. return vb2_streamon(&fimc->vb_queue, type);
  673. }
  674. static int fimc_lite_streamoff(struct file *file, void *priv,
  675. enum v4l2_buf_type type)
  676. {
  677. struct fimc_lite *fimc = video_drvdata(file);
  678. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  679. int ret;
  680. ret = vb2_streamoff(&fimc->vb_queue, type);
  681. if (ret == 0)
  682. media_entity_pipeline_stop(&sd->entity);
  683. return ret;
  684. }
  685. static int fimc_lite_reqbufs(struct file *file, void *priv,
  686. struct v4l2_requestbuffers *reqbufs)
  687. {
  688. struct fimc_lite *fimc = video_drvdata(file);
  689. int ret;
  690. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  691. ret = vb2_reqbufs(&fimc->vb_queue, reqbufs);
  692. if (!ret)
  693. fimc->reqbufs_count = reqbufs->count;
  694. return ret;
  695. }
  696. static int fimc_lite_querybuf(struct file *file, void *priv,
  697. struct v4l2_buffer *buf)
  698. {
  699. struct fimc_lite *fimc = video_drvdata(file);
  700. return vb2_querybuf(&fimc->vb_queue, buf);
  701. }
  702. static int fimc_lite_qbuf(struct file *file, void *priv,
  703. struct v4l2_buffer *buf)
  704. {
  705. struct fimc_lite *fimc = video_drvdata(file);
  706. return vb2_qbuf(&fimc->vb_queue, buf);
  707. }
  708. static int fimc_lite_dqbuf(struct file *file, void *priv,
  709. struct v4l2_buffer *buf)
  710. {
  711. struct fimc_lite *fimc = video_drvdata(file);
  712. return vb2_dqbuf(&fimc->vb_queue, buf, file->f_flags & O_NONBLOCK);
  713. }
  714. static int fimc_lite_create_bufs(struct file *file, void *priv,
  715. struct v4l2_create_buffers *create)
  716. {
  717. struct fimc_lite *fimc = video_drvdata(file);
  718. return vb2_create_bufs(&fimc->vb_queue, create);
  719. }
  720. static int fimc_lite_prepare_buf(struct file *file, void *priv,
  721. struct v4l2_buffer *b)
  722. {
  723. struct fimc_lite *fimc = video_drvdata(file);
  724. return vb2_prepare_buf(&fimc->vb_queue, b);
  725. }
  726. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  727. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  728. {
  729. if (a->left < b->left || a->top < b->top)
  730. return 0;
  731. if (a->left + a->width > b->left + b->width)
  732. return 0;
  733. if (a->top + a->height > b->top + b->height)
  734. return 0;
  735. return 1;
  736. }
  737. static int fimc_lite_g_selection(struct file *file, void *fh,
  738. struct v4l2_selection *sel)
  739. {
  740. struct fimc_lite *fimc = video_drvdata(file);
  741. struct flite_frame *f = &fimc->out_frame;
  742. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  743. return -EINVAL;
  744. switch (sel->target) {
  745. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  746. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  747. sel->r.left = 0;
  748. sel->r.top = 0;
  749. sel->r.width = f->f_width;
  750. sel->r.height = f->f_height;
  751. return 0;
  752. case V4L2_SEL_TGT_COMPOSE:
  753. sel->r = f->rect;
  754. return 0;
  755. }
  756. return -EINVAL;
  757. }
  758. static int fimc_lite_s_selection(struct file *file, void *fh,
  759. struct v4l2_selection *sel)
  760. {
  761. struct fimc_lite *fimc = video_drvdata(file);
  762. struct flite_frame *f = &fimc->out_frame;
  763. struct v4l2_rect rect = sel->r;
  764. unsigned long flags;
  765. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  766. sel->target != V4L2_SEL_TGT_COMPOSE)
  767. return -EINVAL;
  768. fimc_lite_try_compose(fimc, &rect);
  769. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  770. !enclosed_rectangle(&rect, &sel->r))
  771. return -ERANGE;
  772. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  773. !enclosed_rectangle(&sel->r, &rect))
  774. return -ERANGE;
  775. sel->r = rect;
  776. spin_lock_irqsave(&fimc->slock, flags);
  777. f->rect = rect;
  778. set_bit(ST_FLITE_CONFIG, &fimc->state);
  779. spin_unlock_irqrestore(&fimc->slock, flags);
  780. return 0;
  781. }
  782. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  783. .vidioc_querycap = fimc_vidioc_querycap_capture,
  784. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  785. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  786. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  787. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  788. .vidioc_g_selection = fimc_lite_g_selection,
  789. .vidioc_s_selection = fimc_lite_s_selection,
  790. .vidioc_reqbufs = fimc_lite_reqbufs,
  791. .vidioc_querybuf = fimc_lite_querybuf,
  792. .vidioc_prepare_buf = fimc_lite_prepare_buf,
  793. .vidioc_create_bufs = fimc_lite_create_bufs,
  794. .vidioc_qbuf = fimc_lite_qbuf,
  795. .vidioc_dqbuf = fimc_lite_dqbuf,
  796. .vidioc_streamon = fimc_lite_streamon,
  797. .vidioc_streamoff = fimc_lite_streamoff,
  798. };
  799. /* Capture subdev media entity operations */
  800. static int fimc_lite_link_setup(struct media_entity *entity,
  801. const struct media_pad *local,
  802. const struct media_pad *remote, u32 flags)
  803. {
  804. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  805. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  806. unsigned int remote_ent_type = media_entity_type(remote->entity);
  807. if (WARN_ON(fimc == NULL))
  808. return 0;
  809. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x",
  810. __func__, local->entity->name, remote->entity->name,
  811. flags, fimc->source_subdev_grp_id);
  812. switch (local->index) {
  813. case FIMC_SD_PAD_SINK:
  814. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)
  815. return -EINVAL;
  816. if (flags & MEDIA_LNK_FL_ENABLED) {
  817. if (fimc->source_subdev_grp_id != 0)
  818. return -EBUSY;
  819. fimc->source_subdev_grp_id = sd->grp_id;
  820. return 0;
  821. }
  822. fimc->source_subdev_grp_id = 0;
  823. break;
  824. case FIMC_SD_PAD_SOURCE:
  825. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  826. fimc->out_path = FIMC_IO_NONE;
  827. return 0;
  828. }
  829. if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  830. fimc->out_path = FIMC_IO_ISP;
  831. else
  832. fimc->out_path = FIMC_IO_DMA;
  833. break;
  834. default:
  835. v4l2_err(sd, "Invalid pad index\n");
  836. return -EINVAL;
  837. }
  838. return 0;
  839. }
  840. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  841. .link_setup = fimc_lite_link_setup,
  842. };
  843. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  844. struct v4l2_subdev_fh *fh,
  845. struct v4l2_subdev_mbus_code_enum *code)
  846. {
  847. const struct fimc_fmt *fmt;
  848. fmt = fimc_lite_find_format(NULL, NULL, code->index);
  849. if (!fmt)
  850. return -EINVAL;
  851. code->code = fmt->mbus_code;
  852. return 0;
  853. }
  854. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  855. struct v4l2_subdev_fh *fh,
  856. struct v4l2_subdev_format *fmt)
  857. {
  858. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  859. struct v4l2_mbus_framefmt *mf = &fmt->format;
  860. struct flite_frame *f = &fimc->out_frame;
  861. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  862. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  863. fmt->format = *mf;
  864. return 0;
  865. }
  866. mf->colorspace = V4L2_COLORSPACE_JPEG;
  867. mutex_lock(&fimc->lock);
  868. mf->code = fimc->fmt->mbus_code;
  869. if (fmt->pad == FLITE_SD_PAD_SINK) {
  870. /* full camera input frame size */
  871. mf->width = f->f_width;
  872. mf->height = f->f_height;
  873. } else {
  874. /* crop size */
  875. mf->width = f->rect.width;
  876. mf->height = f->rect.height;
  877. }
  878. mutex_unlock(&fimc->lock);
  879. return 0;
  880. }
  881. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  882. struct v4l2_subdev_fh *fh,
  883. struct v4l2_subdev_format *fmt)
  884. {
  885. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  886. struct v4l2_mbus_framefmt *mf = &fmt->format;
  887. struct flite_frame *sink = &fimc->inp_frame;
  888. struct flite_frame *source = &fimc->out_frame;
  889. const struct fimc_fmt *ffmt;
  890. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",
  891. fmt->pad, mf->code, mf->width, mf->height);
  892. mf->colorspace = V4L2_COLORSPACE_JPEG;
  893. mutex_lock(&fimc->lock);
  894. if ((fimc->out_path == FIMC_IO_ISP && sd->entity.stream_count > 0) ||
  895. (fimc->out_path == FIMC_IO_DMA && vb2_is_busy(&fimc->vb_queue))) {
  896. mutex_unlock(&fimc->lock);
  897. return -EBUSY;
  898. }
  899. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  900. &mf->code, NULL, fmt->pad);
  901. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  902. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  903. *mf = fmt->format;
  904. mutex_unlock(&fimc->lock);
  905. return 0;
  906. }
  907. if (fmt->pad == FLITE_SD_PAD_SINK) {
  908. sink->f_width = mf->width;
  909. sink->f_height = mf->height;
  910. fimc->fmt = ffmt;
  911. /* Set sink crop rectangle */
  912. sink->rect.width = mf->width;
  913. sink->rect.height = mf->height;
  914. sink->rect.left = 0;
  915. sink->rect.top = 0;
  916. /* Reset source format and crop rectangle */
  917. source->rect = sink->rect;
  918. source->f_width = mf->width;
  919. source->f_height = mf->height;
  920. } else {
  921. /* Allow changing format only on sink pad */
  922. mf->code = fimc->fmt->mbus_code;
  923. mf->width = sink->rect.width;
  924. mf->height = sink->rect.height;
  925. }
  926. mutex_unlock(&fimc->lock);
  927. return 0;
  928. }
  929. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  930. struct v4l2_subdev_fh *fh,
  931. struct v4l2_subdev_selection *sel)
  932. {
  933. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  934. struct flite_frame *f = &fimc->inp_frame;
  935. if ((sel->target != V4L2_SEL_TGT_CROP &&
  936. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  937. sel->pad != FLITE_SD_PAD_SINK)
  938. return -EINVAL;
  939. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  940. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  941. return 0;
  942. }
  943. mutex_lock(&fimc->lock);
  944. if (sel->target == V4L2_SEL_TGT_CROP) {
  945. sel->r = f->rect;
  946. } else {
  947. sel->r.left = 0;
  948. sel->r.top = 0;
  949. sel->r.width = f->f_width;
  950. sel->r.height = f->f_height;
  951. }
  952. mutex_unlock(&fimc->lock);
  953. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  954. __func__, f->rect.left, f->rect.top, f->rect.width,
  955. f->rect.height, f->f_width, f->f_height);
  956. return 0;
  957. }
  958. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  959. struct v4l2_subdev_fh *fh,
  960. struct v4l2_subdev_selection *sel)
  961. {
  962. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  963. struct flite_frame *f = &fimc->inp_frame;
  964. int ret = 0;
  965. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  966. return -EINVAL;
  967. mutex_lock(&fimc->lock);
  968. fimc_lite_try_crop(fimc, &sel->r);
  969. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  970. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  971. } else {
  972. unsigned long flags;
  973. spin_lock_irqsave(&fimc->slock, flags);
  974. f->rect = sel->r;
  975. /* Same crop rectangle on the source pad */
  976. fimc->out_frame.rect = sel->r;
  977. set_bit(ST_FLITE_CONFIG, &fimc->state);
  978. spin_unlock_irqrestore(&fimc->slock, flags);
  979. }
  980. mutex_unlock(&fimc->lock);
  981. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  982. __func__, f->rect.left, f->rect.top, f->rect.width,
  983. f->rect.height, f->f_width, f->f_height);
  984. return ret;
  985. }
  986. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  987. {
  988. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  989. if (fimc->out_path == FIMC_IO_DMA)
  990. return -ENOIOCTLCMD;
  991. /* TODO: */
  992. return 0;
  993. }
  994. static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)
  995. {
  996. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  997. if (fimc->out_path == FIMC_IO_DMA)
  998. return -ENOIOCTLCMD;
  999. /* TODO: */
  1000. return 0;
  1001. }
  1002. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1003. {
  1004. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1005. flite_hw_dump_regs(fimc, __func__);
  1006. return 0;
  1007. }
  1008. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1009. {
  1010. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1011. struct vb2_queue *q = &fimc->vb_queue;
  1012. struct video_device *vfd = &fimc->vfd;
  1013. int ret;
  1014. memset(vfd, 0, sizeof(*vfd));
  1015. fimc->fmt = &fimc_lite_formats[0];
  1016. fimc->out_path = FIMC_IO_DMA;
  1017. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1018. fimc->index);
  1019. vfd->fops = &fimc_lite_fops;
  1020. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1021. vfd->v4l2_dev = sd->v4l2_dev;
  1022. vfd->minor = -1;
  1023. vfd->release = video_device_release_empty;
  1024. vfd->lock = &fimc->lock;
  1025. fimc->ref_count = 0;
  1026. fimc->reqbufs_count = 0;
  1027. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1028. INIT_LIST_HEAD(&fimc->active_buf_q);
  1029. memset(q, 0, sizeof(*q));
  1030. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1031. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1032. q->ops = &fimc_lite_qops;
  1033. q->mem_ops = &vb2_dma_contig_memops;
  1034. q->buf_struct_size = sizeof(struct flite_buffer);
  1035. q->drv_priv = fimc;
  1036. ret = vb2_queue_init(q);
  1037. if (ret < 0)
  1038. return ret;
  1039. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1040. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1041. if (ret < 0)
  1042. return ret;
  1043. video_set_drvdata(vfd, fimc);
  1044. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1045. if (ret < 0) {
  1046. media_entity_cleanup(&vfd->entity);
  1047. return ret;
  1048. }
  1049. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1050. vfd->name, video_device_node_name(vfd));
  1051. return 0;
  1052. }
  1053. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1054. {
  1055. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1056. if (fimc == NULL)
  1057. return;
  1058. if (video_is_registered(&fimc->vfd)) {
  1059. video_unregister_device(&fimc->vfd);
  1060. media_entity_cleanup(&fimc->vfd.entity);
  1061. }
  1062. }
  1063. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1064. .registered = fimc_lite_subdev_registered,
  1065. .unregistered = fimc_lite_subdev_unregistered,
  1066. };
  1067. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1068. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1069. .get_selection = fimc_lite_subdev_get_selection,
  1070. .set_selection = fimc_lite_subdev_set_selection,
  1071. .get_fmt = fimc_lite_subdev_get_fmt,
  1072. .set_fmt = fimc_lite_subdev_set_fmt,
  1073. };
  1074. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1075. .s_stream = fimc_lite_subdev_s_stream,
  1076. };
  1077. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1078. .s_power = fimc_lite_subdev_s_power,
  1079. .log_status = fimc_lite_log_status,
  1080. };
  1081. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1082. .core = &fimc_lite_core_ops,
  1083. .video = &fimc_lite_subdev_video_ops,
  1084. .pad = &fimc_lite_subdev_pad_ops,
  1085. };
  1086. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1087. {
  1088. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1089. ctrl_handler);
  1090. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1091. return 0;
  1092. }
  1093. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1094. .s_ctrl = fimc_lite_s_ctrl,
  1095. };
  1096. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1097. .ops = &fimc_lite_ctrl_ops,
  1098. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1099. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1100. .name = "Test Pattern 640x480",
  1101. };
  1102. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1103. {
  1104. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1105. struct v4l2_subdev *sd = &fimc->subdev;
  1106. int ret;
  1107. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1108. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1109. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1110. fimc->subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1111. fimc->subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1112. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1113. fimc->subdev_pads, 0);
  1114. if (ret)
  1115. return ret;
  1116. v4l2_ctrl_handler_init(handler, 1);
  1117. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1118. NULL);
  1119. if (handler->error) {
  1120. media_entity_cleanup(&sd->entity);
  1121. return handler->error;
  1122. }
  1123. sd->ctrl_handler = handler;
  1124. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1125. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1126. v4l2_set_subdevdata(sd, fimc);
  1127. return 0;
  1128. }
  1129. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1130. {
  1131. struct v4l2_subdev *sd = &fimc->subdev;
  1132. v4l2_device_unregister_subdev(sd);
  1133. media_entity_cleanup(&sd->entity);
  1134. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1135. v4l2_set_subdevdata(sd, NULL);
  1136. }
  1137. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1138. {
  1139. if (IS_ERR_OR_NULL(fimc->clock))
  1140. return;
  1141. clk_unprepare(fimc->clock);
  1142. clk_put(fimc->clock);
  1143. fimc->clock = NULL;
  1144. }
  1145. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1146. {
  1147. int ret;
  1148. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1149. if (IS_ERR(fimc->clock))
  1150. return PTR_ERR(fimc->clock);
  1151. ret = clk_prepare(fimc->clock);
  1152. if (ret < 0) {
  1153. clk_put(fimc->clock);
  1154. fimc->clock = NULL;
  1155. }
  1156. return ret;
  1157. }
  1158. static int __devinit fimc_lite_probe(struct platform_device *pdev)
  1159. {
  1160. struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);
  1161. struct fimc_lite *fimc;
  1162. struct resource *res;
  1163. int ret;
  1164. fimc = devm_kzalloc(&pdev->dev, sizeof(*fimc), GFP_KERNEL);
  1165. if (!fimc)
  1166. return -ENOMEM;
  1167. fimc->index = pdev->id;
  1168. fimc->variant = drv_data->variant[fimc->index];
  1169. fimc->pdev = pdev;
  1170. init_waitqueue_head(&fimc->irq_queue);
  1171. spin_lock_init(&fimc->slock);
  1172. mutex_init(&fimc->lock);
  1173. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1174. fimc->regs = devm_request_and_ioremap(&pdev->dev, res);
  1175. if (fimc->regs == NULL) {
  1176. dev_err(&pdev->dev, "Failed to obtain io memory\n");
  1177. return -ENOENT;
  1178. }
  1179. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1180. if (res == NULL) {
  1181. dev_err(&pdev->dev, "Failed to get IRQ resource\n");
  1182. return -ENXIO;
  1183. }
  1184. ret = fimc_lite_clk_get(fimc);
  1185. if (ret)
  1186. return ret;
  1187. ret = devm_request_irq(&pdev->dev, res->start, flite_irq_handler,
  1188. 0, dev_name(&pdev->dev), fimc);
  1189. if (ret) {
  1190. dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
  1191. goto err_clk;
  1192. }
  1193. /* The video node will be created within the subdev's registered() op */
  1194. ret = fimc_lite_create_capture_subdev(fimc);
  1195. if (ret)
  1196. goto err_clk;
  1197. platform_set_drvdata(pdev, fimc);
  1198. pm_runtime_enable(&pdev->dev);
  1199. ret = pm_runtime_get_sync(&pdev->dev);
  1200. if (ret < 0)
  1201. goto err_sd;
  1202. fimc->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1203. if (IS_ERR(fimc->alloc_ctx)) {
  1204. ret = PTR_ERR(fimc->alloc_ctx);
  1205. goto err_pm;
  1206. }
  1207. pm_runtime_put(&pdev->dev);
  1208. dev_dbg(&pdev->dev, "FIMC-LITE.%d registered successfully\n",
  1209. fimc->index);
  1210. return 0;
  1211. err_pm:
  1212. pm_runtime_put(&pdev->dev);
  1213. err_sd:
  1214. fimc_lite_unregister_capture_subdev(fimc);
  1215. err_clk:
  1216. fimc_lite_clk_put(fimc);
  1217. return ret;
  1218. }
  1219. static int fimc_lite_runtime_resume(struct device *dev)
  1220. {
  1221. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1222. clk_enable(fimc->clock);
  1223. return 0;
  1224. }
  1225. static int fimc_lite_runtime_suspend(struct device *dev)
  1226. {
  1227. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1228. clk_disable(fimc->clock);
  1229. return 0;
  1230. }
  1231. #ifdef CONFIG_PM_SLEEP
  1232. static int fimc_lite_resume(struct device *dev)
  1233. {
  1234. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1235. struct flite_buffer *buf;
  1236. unsigned long flags;
  1237. int i;
  1238. spin_lock_irqsave(&fimc->slock, flags);
  1239. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1240. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1241. spin_unlock_irqrestore(&fimc->slock, flags);
  1242. return 0;
  1243. }
  1244. flite_hw_reset(fimc);
  1245. spin_unlock_irqrestore(&fimc->slock, flags);
  1246. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1247. return 0;
  1248. INIT_LIST_HEAD(&fimc->active_buf_q);
  1249. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1250. &fimc->vfd.entity, false);
  1251. fimc_lite_hw_init(fimc);
  1252. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1253. for (i = 0; i < fimc->reqbufs_count; i++) {
  1254. if (list_empty(&fimc->pending_buf_q))
  1255. break;
  1256. buf = fimc_lite_pending_queue_pop(fimc);
  1257. buffer_queue(&buf->vb);
  1258. }
  1259. return 0;
  1260. }
  1261. static int fimc_lite_suspend(struct device *dev)
  1262. {
  1263. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1264. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1265. int ret;
  1266. if (test_and_set_bit(ST_LPM, &fimc->state))
  1267. return 0;
  1268. ret = fimc_lite_stop_capture(fimc, suspend);
  1269. if (ret < 0 || !fimc_lite_active(fimc))
  1270. return ret;
  1271. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1272. }
  1273. #endif /* CONFIG_PM_SLEEP */
  1274. static int __devexit fimc_lite_remove(struct platform_device *pdev)
  1275. {
  1276. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1277. struct device *dev = &pdev->dev;
  1278. pm_runtime_disable(dev);
  1279. pm_runtime_set_suspended(dev);
  1280. fimc_lite_unregister_capture_subdev(fimc);
  1281. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1282. fimc_lite_clk_put(fimc);
  1283. dev_info(dev, "Driver unloaded\n");
  1284. return 0;
  1285. }
  1286. static struct flite_variant fimc_lite0_variant_exynos4 = {
  1287. .max_width = 8192,
  1288. .max_height = 8192,
  1289. .out_width_align = 8,
  1290. .win_hor_offs_align = 2,
  1291. .out_hor_offs_align = 8,
  1292. };
  1293. /* EXYNOS4212, EXYNOS4412 */
  1294. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1295. .variant = {
  1296. [0] = &fimc_lite0_variant_exynos4,
  1297. [1] = &fimc_lite0_variant_exynos4,
  1298. },
  1299. };
  1300. static struct platform_device_id fimc_lite_driver_ids[] = {
  1301. {
  1302. .name = "exynos-fimc-lite",
  1303. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1304. },
  1305. { /* sentinel */ },
  1306. };
  1307. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1308. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1309. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1310. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1311. NULL)
  1312. };
  1313. static struct platform_driver fimc_lite_driver = {
  1314. .probe = fimc_lite_probe,
  1315. .remove = __devexit_p(fimc_lite_remove),
  1316. .id_table = fimc_lite_driver_ids,
  1317. .driver = {
  1318. .name = FIMC_LITE_DRV_NAME,
  1319. .owner = THIS_MODULE,
  1320. .pm = &fimc_lite_pm_ops,
  1321. }
  1322. };
  1323. module_platform_driver(fimc_lite_driver);
  1324. MODULE_LICENSE("GPL");
  1325. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);