en_netdev.c 63 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/busy_poll.h>
  41. #include <linux/mlx4/driver.h>
  42. #include <linux/mlx4/device.h>
  43. #include <linux/mlx4/cmd.h>
  44. #include <linux/mlx4/cq.h>
  45. #include "mlx4_en.h"
  46. #include "en_port.h"
  47. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  48. {
  49. struct mlx4_en_priv *priv = netdev_priv(dev);
  50. int i;
  51. unsigned int offset = 0;
  52. if (up && up != MLX4_EN_NUM_UP)
  53. return -EINVAL;
  54. netdev_set_num_tc(dev, up);
  55. /* Partition Tx queues evenly amongst UP's */
  56. for (i = 0; i < up; i++) {
  57. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  58. offset += priv->num_tx_rings_p_up;
  59. }
  60. return 0;
  61. }
  62. #ifdef CONFIG_NET_RX_BUSY_POLL
  63. /* must be called with local_bh_disable()d */
  64. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  65. {
  66. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  67. struct net_device *dev = cq->dev;
  68. struct mlx4_en_priv *priv = netdev_priv(dev);
  69. struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
  70. int done;
  71. if (!priv->port_up)
  72. return LL_FLUSH_FAILED;
  73. if (!mlx4_en_cq_lock_poll(cq))
  74. return LL_FLUSH_BUSY;
  75. done = mlx4_en_process_rx_cq(dev, cq, 4);
  76. if (likely(done))
  77. rx_ring->cleaned += done;
  78. else
  79. rx_ring->misses++;
  80. mlx4_en_cq_unlock_poll(cq);
  81. return done;
  82. }
  83. #endif /* CONFIG_NET_RX_BUSY_POLL */
  84. #ifdef CONFIG_RFS_ACCEL
  85. struct mlx4_en_filter {
  86. struct list_head next;
  87. struct work_struct work;
  88. u8 ip_proto;
  89. __be32 src_ip;
  90. __be32 dst_ip;
  91. __be16 src_port;
  92. __be16 dst_port;
  93. int rxq_index;
  94. struct mlx4_en_priv *priv;
  95. u32 flow_id; /* RFS infrastructure id */
  96. int id; /* mlx4_en driver id */
  97. u64 reg_id; /* Flow steering API id */
  98. u8 activated; /* Used to prevent expiry before filter
  99. * is attached
  100. */
  101. struct hlist_node filter_chain;
  102. };
  103. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  104. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  105. {
  106. switch (ip_proto) {
  107. case IPPROTO_UDP:
  108. return MLX4_NET_TRANS_RULE_ID_UDP;
  109. case IPPROTO_TCP:
  110. return MLX4_NET_TRANS_RULE_ID_TCP;
  111. default:
  112. return -EPROTONOSUPPORT;
  113. }
  114. };
  115. static void mlx4_en_filter_work(struct work_struct *work)
  116. {
  117. struct mlx4_en_filter *filter = container_of(work,
  118. struct mlx4_en_filter,
  119. work);
  120. struct mlx4_en_priv *priv = filter->priv;
  121. struct mlx4_spec_list spec_tcp_udp = {
  122. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  123. {
  124. .tcp_udp = {
  125. .dst_port = filter->dst_port,
  126. .dst_port_msk = (__force __be16)-1,
  127. .src_port = filter->src_port,
  128. .src_port_msk = (__force __be16)-1,
  129. },
  130. },
  131. };
  132. struct mlx4_spec_list spec_ip = {
  133. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  134. {
  135. .ipv4 = {
  136. .dst_ip = filter->dst_ip,
  137. .dst_ip_msk = (__force __be32)-1,
  138. .src_ip = filter->src_ip,
  139. .src_ip_msk = (__force __be32)-1,
  140. },
  141. },
  142. };
  143. struct mlx4_spec_list spec_eth = {
  144. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  145. };
  146. struct mlx4_net_trans_rule rule = {
  147. .list = LIST_HEAD_INIT(rule.list),
  148. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  149. .exclusive = 1,
  150. .allow_loopback = 1,
  151. .promisc_mode = MLX4_FS_REGULAR,
  152. .port = priv->port,
  153. .priority = MLX4_DOMAIN_RFS,
  154. };
  155. int rc;
  156. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  157. if (spec_tcp_udp.id < 0) {
  158. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  159. filter->ip_proto);
  160. goto ignore;
  161. }
  162. list_add_tail(&spec_eth.list, &rule.list);
  163. list_add_tail(&spec_ip.list, &rule.list);
  164. list_add_tail(&spec_tcp_udp.list, &rule.list);
  165. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  166. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  167. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  168. filter->activated = 0;
  169. if (filter->reg_id) {
  170. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  171. if (rc && rc != -ENOENT)
  172. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  173. }
  174. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  175. if (rc)
  176. en_err(priv, "Error attaching flow. err = %d\n", rc);
  177. ignore:
  178. mlx4_en_filter_rfs_expire(priv);
  179. filter->activated = 1;
  180. }
  181. static inline struct hlist_head *
  182. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  183. __be16 src_port, __be16 dst_port)
  184. {
  185. unsigned long l;
  186. int bucket_idx;
  187. l = (__force unsigned long)src_port |
  188. ((__force unsigned long)dst_port << 2);
  189. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  190. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  191. return &priv->filter_hash[bucket_idx];
  192. }
  193. static struct mlx4_en_filter *
  194. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  195. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  196. __be16 dst_port, u32 flow_id)
  197. {
  198. struct mlx4_en_filter *filter = NULL;
  199. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  200. if (!filter)
  201. return NULL;
  202. filter->priv = priv;
  203. filter->rxq_index = rxq_index;
  204. INIT_WORK(&filter->work, mlx4_en_filter_work);
  205. filter->src_ip = src_ip;
  206. filter->dst_ip = dst_ip;
  207. filter->ip_proto = ip_proto;
  208. filter->src_port = src_port;
  209. filter->dst_port = dst_port;
  210. filter->flow_id = flow_id;
  211. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  212. list_add_tail(&filter->next, &priv->filters);
  213. hlist_add_head(&filter->filter_chain,
  214. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  215. dst_port));
  216. return filter;
  217. }
  218. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  219. {
  220. struct mlx4_en_priv *priv = filter->priv;
  221. int rc;
  222. list_del(&filter->next);
  223. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  224. if (rc && rc != -ENOENT)
  225. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  226. kfree(filter);
  227. }
  228. static inline struct mlx4_en_filter *
  229. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  230. u8 ip_proto, __be16 src_port, __be16 dst_port)
  231. {
  232. struct mlx4_en_filter *filter;
  233. struct mlx4_en_filter *ret = NULL;
  234. hlist_for_each_entry(filter,
  235. filter_hash_bucket(priv, src_ip, dst_ip,
  236. src_port, dst_port),
  237. filter_chain) {
  238. if (filter->src_ip == src_ip &&
  239. filter->dst_ip == dst_ip &&
  240. filter->ip_proto == ip_proto &&
  241. filter->src_port == src_port &&
  242. filter->dst_port == dst_port) {
  243. ret = filter;
  244. break;
  245. }
  246. }
  247. return ret;
  248. }
  249. static int
  250. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  251. u16 rxq_index, u32 flow_id)
  252. {
  253. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  254. struct mlx4_en_filter *filter;
  255. const struct iphdr *ip;
  256. const __be16 *ports;
  257. u8 ip_proto;
  258. __be32 src_ip;
  259. __be32 dst_ip;
  260. __be16 src_port;
  261. __be16 dst_port;
  262. int nhoff = skb_network_offset(skb);
  263. int ret = 0;
  264. if (skb->protocol != htons(ETH_P_IP))
  265. return -EPROTONOSUPPORT;
  266. ip = (const struct iphdr *)(skb->data + nhoff);
  267. if (ip_is_fragment(ip))
  268. return -EPROTONOSUPPORT;
  269. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  270. return -EPROTONOSUPPORT;
  271. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  272. ip_proto = ip->protocol;
  273. src_ip = ip->saddr;
  274. dst_ip = ip->daddr;
  275. src_port = ports[0];
  276. dst_port = ports[1];
  277. spin_lock_bh(&priv->filters_lock);
  278. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  279. src_port, dst_port);
  280. if (filter) {
  281. if (filter->rxq_index == rxq_index)
  282. goto out;
  283. filter->rxq_index = rxq_index;
  284. } else {
  285. filter = mlx4_en_filter_alloc(priv, rxq_index,
  286. src_ip, dst_ip, ip_proto,
  287. src_port, dst_port, flow_id);
  288. if (!filter) {
  289. ret = -ENOMEM;
  290. goto err;
  291. }
  292. }
  293. queue_work(priv->mdev->workqueue, &filter->work);
  294. out:
  295. ret = filter->id;
  296. err:
  297. spin_unlock_bh(&priv->filters_lock);
  298. return ret;
  299. }
  300. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  301. {
  302. struct mlx4_en_filter *filter, *tmp;
  303. LIST_HEAD(del_list);
  304. spin_lock_bh(&priv->filters_lock);
  305. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  306. list_move(&filter->next, &del_list);
  307. hlist_del(&filter->filter_chain);
  308. }
  309. spin_unlock_bh(&priv->filters_lock);
  310. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  311. cancel_work_sync(&filter->work);
  312. mlx4_en_filter_free(filter);
  313. }
  314. }
  315. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  316. {
  317. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  318. LIST_HEAD(del_list);
  319. int i = 0;
  320. spin_lock_bh(&priv->filters_lock);
  321. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  322. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  323. break;
  324. if (filter->activated &&
  325. !work_pending(&filter->work) &&
  326. rps_may_expire_flow(priv->dev,
  327. filter->rxq_index, filter->flow_id,
  328. filter->id)) {
  329. list_move(&filter->next, &del_list);
  330. hlist_del(&filter->filter_chain);
  331. } else
  332. last_filter = filter;
  333. i++;
  334. }
  335. if (last_filter && (&last_filter->next != priv->filters.next))
  336. list_move(&priv->filters, &last_filter->next);
  337. spin_unlock_bh(&priv->filters_lock);
  338. list_for_each_entry_safe(filter, tmp, &del_list, next)
  339. mlx4_en_filter_free(filter);
  340. }
  341. #endif
  342. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  343. __be16 proto, u16 vid)
  344. {
  345. struct mlx4_en_priv *priv = netdev_priv(dev);
  346. struct mlx4_en_dev *mdev = priv->mdev;
  347. int err;
  348. int idx;
  349. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  350. set_bit(vid, priv->active_vlans);
  351. /* Add VID to port VLAN filter */
  352. mutex_lock(&mdev->state_lock);
  353. if (mdev->device_up && priv->port_up) {
  354. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  355. if (err)
  356. en_err(priv, "Failed configuring VLAN filter\n");
  357. }
  358. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  359. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  360. mutex_unlock(&mdev->state_lock);
  361. return 0;
  362. }
  363. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  364. __be16 proto, u16 vid)
  365. {
  366. struct mlx4_en_priv *priv = netdev_priv(dev);
  367. struct mlx4_en_dev *mdev = priv->mdev;
  368. int err;
  369. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  370. clear_bit(vid, priv->active_vlans);
  371. /* Remove VID from port VLAN filter */
  372. mutex_lock(&mdev->state_lock);
  373. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  374. if (mdev->device_up && priv->port_up) {
  375. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  376. if (err)
  377. en_err(priv, "Failed configuring VLAN filter\n");
  378. }
  379. mutex_unlock(&mdev->state_lock);
  380. return 0;
  381. }
  382. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  383. {
  384. int i;
  385. for (i = ETH_ALEN - 1; i >= 0; --i) {
  386. dst_mac[i] = src_mac & 0xff;
  387. src_mac >>= 8;
  388. }
  389. memset(&dst_mac[ETH_ALEN], 0, 2);
  390. }
  391. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  392. unsigned char *mac, int *qpn, u64 *reg_id)
  393. {
  394. struct mlx4_en_dev *mdev = priv->mdev;
  395. struct mlx4_dev *dev = mdev->dev;
  396. int err;
  397. switch (dev->caps.steering_mode) {
  398. case MLX4_STEERING_MODE_B0: {
  399. struct mlx4_qp qp;
  400. u8 gid[16] = {0};
  401. qp.qpn = *qpn;
  402. memcpy(&gid[10], mac, ETH_ALEN);
  403. gid[5] = priv->port;
  404. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  405. break;
  406. }
  407. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  408. struct mlx4_spec_list spec_eth = { {NULL} };
  409. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  410. struct mlx4_net_trans_rule rule = {
  411. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  412. .exclusive = 0,
  413. .allow_loopback = 1,
  414. .promisc_mode = MLX4_FS_REGULAR,
  415. .priority = MLX4_DOMAIN_NIC,
  416. };
  417. rule.port = priv->port;
  418. rule.qpn = *qpn;
  419. INIT_LIST_HEAD(&rule.list);
  420. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  421. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  422. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  423. list_add_tail(&spec_eth.list, &rule.list);
  424. err = mlx4_flow_attach(dev, &rule, reg_id);
  425. break;
  426. }
  427. default:
  428. return -EINVAL;
  429. }
  430. if (err)
  431. en_warn(priv, "Failed Attaching Unicast\n");
  432. return err;
  433. }
  434. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  435. unsigned char *mac, int qpn, u64 reg_id)
  436. {
  437. struct mlx4_en_dev *mdev = priv->mdev;
  438. struct mlx4_dev *dev = mdev->dev;
  439. switch (dev->caps.steering_mode) {
  440. case MLX4_STEERING_MODE_B0: {
  441. struct mlx4_qp qp;
  442. u8 gid[16] = {0};
  443. qp.qpn = qpn;
  444. memcpy(&gid[10], mac, ETH_ALEN);
  445. gid[5] = priv->port;
  446. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  447. break;
  448. }
  449. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  450. mlx4_flow_detach(dev, reg_id);
  451. break;
  452. }
  453. default:
  454. en_err(priv, "Invalid steering mode.\n");
  455. }
  456. }
  457. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  458. {
  459. struct mlx4_en_dev *mdev = priv->mdev;
  460. struct mlx4_dev *dev = mdev->dev;
  461. struct mlx4_mac_entry *entry;
  462. int index = 0;
  463. int err = 0;
  464. u64 reg_id;
  465. int *qpn = &priv->base_qpn;
  466. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  467. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  468. priv->dev->dev_addr);
  469. index = mlx4_register_mac(dev, priv->port, mac);
  470. if (index < 0) {
  471. err = index;
  472. en_err(priv, "Failed adding MAC: %pM\n",
  473. priv->dev->dev_addr);
  474. return err;
  475. }
  476. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  477. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  478. *qpn = base_qpn + index;
  479. return 0;
  480. }
  481. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  482. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  483. if (err) {
  484. en_err(priv, "Failed to reserve qp for mac registration\n");
  485. goto qp_err;
  486. }
  487. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  488. if (err)
  489. goto steer_err;
  490. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  491. if (!entry) {
  492. err = -ENOMEM;
  493. goto alloc_err;
  494. }
  495. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  496. entry->reg_id = reg_id;
  497. hlist_add_head_rcu(&entry->hlist,
  498. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  499. return 0;
  500. alloc_err:
  501. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  502. steer_err:
  503. mlx4_qp_release_range(dev, *qpn, 1);
  504. qp_err:
  505. mlx4_unregister_mac(dev, priv->port, mac);
  506. return err;
  507. }
  508. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  509. {
  510. struct mlx4_en_dev *mdev = priv->mdev;
  511. struct mlx4_dev *dev = mdev->dev;
  512. int qpn = priv->base_qpn;
  513. u64 mac;
  514. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  515. mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  516. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  517. priv->dev->dev_addr);
  518. mlx4_unregister_mac(dev, priv->port, mac);
  519. } else {
  520. struct mlx4_mac_entry *entry;
  521. struct hlist_node *tmp;
  522. struct hlist_head *bucket;
  523. unsigned int i;
  524. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  525. bucket = &priv->mac_hash[i];
  526. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  527. mac = mlx4_en_mac_to_u64(entry->mac);
  528. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  529. entry->mac);
  530. mlx4_en_uc_steer_release(priv, entry->mac,
  531. qpn, entry->reg_id);
  532. mlx4_unregister_mac(dev, priv->port, mac);
  533. hlist_del_rcu(&entry->hlist);
  534. kfree_rcu(entry, rcu);
  535. }
  536. }
  537. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  538. priv->port, qpn);
  539. mlx4_qp_release_range(dev, qpn, 1);
  540. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  541. }
  542. }
  543. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  544. unsigned char *new_mac, unsigned char *prev_mac)
  545. {
  546. struct mlx4_en_dev *mdev = priv->mdev;
  547. struct mlx4_dev *dev = mdev->dev;
  548. int err = 0;
  549. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  550. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  551. struct hlist_head *bucket;
  552. unsigned int mac_hash;
  553. struct mlx4_mac_entry *entry;
  554. struct hlist_node *tmp;
  555. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  556. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  557. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  558. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  559. mlx4_en_uc_steer_release(priv, entry->mac,
  560. qpn, entry->reg_id);
  561. mlx4_unregister_mac(dev, priv->port,
  562. prev_mac_u64);
  563. hlist_del_rcu(&entry->hlist);
  564. synchronize_rcu();
  565. memcpy(entry->mac, new_mac, ETH_ALEN);
  566. entry->reg_id = 0;
  567. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  568. hlist_add_head_rcu(&entry->hlist,
  569. &priv->mac_hash[mac_hash]);
  570. mlx4_register_mac(dev, priv->port, new_mac_u64);
  571. err = mlx4_en_uc_steer_add(priv, new_mac,
  572. &qpn,
  573. &entry->reg_id);
  574. return err;
  575. }
  576. }
  577. return -EINVAL;
  578. }
  579. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  580. }
  581. u64 mlx4_en_mac_to_u64(u8 *addr)
  582. {
  583. u64 mac = 0;
  584. int i;
  585. for (i = 0; i < ETH_ALEN; i++) {
  586. mac <<= 8;
  587. mac |= addr[i];
  588. }
  589. return mac;
  590. }
  591. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
  592. {
  593. int err = 0;
  594. if (priv->port_up) {
  595. /* Remove old MAC and insert the new one */
  596. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  597. priv->dev->dev_addr, priv->prev_mac);
  598. if (err)
  599. en_err(priv, "Failed changing HW MAC address\n");
  600. memcpy(priv->prev_mac, priv->dev->dev_addr,
  601. sizeof(priv->prev_mac));
  602. } else
  603. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  604. return err;
  605. }
  606. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  607. {
  608. struct mlx4_en_priv *priv = netdev_priv(dev);
  609. struct mlx4_en_dev *mdev = priv->mdev;
  610. struct sockaddr *saddr = addr;
  611. int err;
  612. if (!is_valid_ether_addr(saddr->sa_data))
  613. return -EADDRNOTAVAIL;
  614. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  615. mutex_lock(&mdev->state_lock);
  616. err = mlx4_en_do_set_mac(priv);
  617. mutex_unlock(&mdev->state_lock);
  618. return err;
  619. }
  620. static void mlx4_en_clear_list(struct net_device *dev)
  621. {
  622. struct mlx4_en_priv *priv = netdev_priv(dev);
  623. struct mlx4_en_mc_list *tmp, *mc_to_del;
  624. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  625. list_del(&mc_to_del->list);
  626. kfree(mc_to_del);
  627. }
  628. }
  629. static void mlx4_en_cache_mclist(struct net_device *dev)
  630. {
  631. struct mlx4_en_priv *priv = netdev_priv(dev);
  632. struct netdev_hw_addr *ha;
  633. struct mlx4_en_mc_list *tmp;
  634. mlx4_en_clear_list(dev);
  635. netdev_for_each_mc_addr(ha, dev) {
  636. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  637. if (!tmp) {
  638. mlx4_en_clear_list(dev);
  639. return;
  640. }
  641. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  642. list_add_tail(&tmp->list, &priv->mc_list);
  643. }
  644. }
  645. static void update_mclist_flags(struct mlx4_en_priv *priv,
  646. struct list_head *dst,
  647. struct list_head *src)
  648. {
  649. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  650. bool found;
  651. /* Find all the entries that should be removed from dst,
  652. * These are the entries that are not found in src
  653. */
  654. list_for_each_entry(dst_tmp, dst, list) {
  655. found = false;
  656. list_for_each_entry(src_tmp, src, list) {
  657. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  658. found = true;
  659. break;
  660. }
  661. }
  662. if (!found)
  663. dst_tmp->action = MCLIST_REM;
  664. }
  665. /* Add entries that exist in src but not in dst
  666. * mark them as need to add
  667. */
  668. list_for_each_entry(src_tmp, src, list) {
  669. found = false;
  670. list_for_each_entry(dst_tmp, dst, list) {
  671. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  672. dst_tmp->action = MCLIST_NONE;
  673. found = true;
  674. break;
  675. }
  676. }
  677. if (!found) {
  678. new_mc = kmemdup(src_tmp,
  679. sizeof(struct mlx4_en_mc_list),
  680. GFP_KERNEL);
  681. if (!new_mc)
  682. return;
  683. new_mc->action = MCLIST_ADD;
  684. list_add_tail(&new_mc->list, dst);
  685. }
  686. }
  687. }
  688. static void mlx4_en_set_rx_mode(struct net_device *dev)
  689. {
  690. struct mlx4_en_priv *priv = netdev_priv(dev);
  691. if (!priv->port_up)
  692. return;
  693. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  694. }
  695. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  696. struct mlx4_en_dev *mdev)
  697. {
  698. int err = 0;
  699. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  700. if (netif_msg_rx_status(priv))
  701. en_warn(priv, "Entering promiscuous mode\n");
  702. priv->flags |= MLX4_EN_FLAG_PROMISC;
  703. /* Enable promiscouos mode */
  704. switch (mdev->dev->caps.steering_mode) {
  705. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  706. err = mlx4_flow_steer_promisc_add(mdev->dev,
  707. priv->port,
  708. priv->base_qpn,
  709. MLX4_FS_ALL_DEFAULT);
  710. if (err)
  711. en_err(priv, "Failed enabling promiscuous mode\n");
  712. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  713. break;
  714. case MLX4_STEERING_MODE_B0:
  715. err = mlx4_unicast_promisc_add(mdev->dev,
  716. priv->base_qpn,
  717. priv->port);
  718. if (err)
  719. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  720. /* Add the default qp number as multicast
  721. * promisc
  722. */
  723. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  724. err = mlx4_multicast_promisc_add(mdev->dev,
  725. priv->base_qpn,
  726. priv->port);
  727. if (err)
  728. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  729. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  730. }
  731. break;
  732. case MLX4_STEERING_MODE_A0:
  733. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  734. priv->port,
  735. priv->base_qpn,
  736. 1);
  737. if (err)
  738. en_err(priv, "Failed enabling promiscuous mode\n");
  739. break;
  740. }
  741. /* Disable port multicast filter (unconditionally) */
  742. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  743. 0, MLX4_MCAST_DISABLE);
  744. if (err)
  745. en_err(priv, "Failed disabling multicast filter\n");
  746. /* Disable port VLAN filter */
  747. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  748. if (err)
  749. en_err(priv, "Failed disabling VLAN filter\n");
  750. }
  751. }
  752. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  753. struct mlx4_en_dev *mdev)
  754. {
  755. int err = 0;
  756. if (netif_msg_rx_status(priv))
  757. en_warn(priv, "Leaving promiscuous mode\n");
  758. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  759. /* Disable promiscouos mode */
  760. switch (mdev->dev->caps.steering_mode) {
  761. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  762. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  763. priv->port,
  764. MLX4_FS_ALL_DEFAULT);
  765. if (err)
  766. en_err(priv, "Failed disabling promiscuous mode\n");
  767. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  768. break;
  769. case MLX4_STEERING_MODE_B0:
  770. err = mlx4_unicast_promisc_remove(mdev->dev,
  771. priv->base_qpn,
  772. priv->port);
  773. if (err)
  774. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  775. /* Disable Multicast promisc */
  776. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  777. err = mlx4_multicast_promisc_remove(mdev->dev,
  778. priv->base_qpn,
  779. priv->port);
  780. if (err)
  781. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  782. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  783. }
  784. break;
  785. case MLX4_STEERING_MODE_A0:
  786. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  787. priv->port,
  788. priv->base_qpn, 0);
  789. if (err)
  790. en_err(priv, "Failed disabling promiscuous mode\n");
  791. break;
  792. }
  793. /* Enable port VLAN filter */
  794. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  795. if (err)
  796. en_err(priv, "Failed enabling VLAN filter\n");
  797. }
  798. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  799. struct net_device *dev,
  800. struct mlx4_en_dev *mdev)
  801. {
  802. struct mlx4_en_mc_list *mclist, *tmp;
  803. u64 mcast_addr = 0;
  804. u8 mc_list[16] = {0};
  805. int err = 0;
  806. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  807. if (dev->flags & IFF_ALLMULTI) {
  808. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  809. 0, MLX4_MCAST_DISABLE);
  810. if (err)
  811. en_err(priv, "Failed disabling multicast filter\n");
  812. /* Add the default qp number as multicast promisc */
  813. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  814. switch (mdev->dev->caps.steering_mode) {
  815. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  816. err = mlx4_flow_steer_promisc_add(mdev->dev,
  817. priv->port,
  818. priv->base_qpn,
  819. MLX4_FS_MC_DEFAULT);
  820. break;
  821. case MLX4_STEERING_MODE_B0:
  822. err = mlx4_multicast_promisc_add(mdev->dev,
  823. priv->base_qpn,
  824. priv->port);
  825. break;
  826. case MLX4_STEERING_MODE_A0:
  827. break;
  828. }
  829. if (err)
  830. en_err(priv, "Failed entering multicast promisc mode\n");
  831. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  832. }
  833. } else {
  834. /* Disable Multicast promisc */
  835. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  836. switch (mdev->dev->caps.steering_mode) {
  837. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  838. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  839. priv->port,
  840. MLX4_FS_MC_DEFAULT);
  841. break;
  842. case MLX4_STEERING_MODE_B0:
  843. err = mlx4_multicast_promisc_remove(mdev->dev,
  844. priv->base_qpn,
  845. priv->port);
  846. break;
  847. case MLX4_STEERING_MODE_A0:
  848. break;
  849. }
  850. if (err)
  851. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  852. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  853. }
  854. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  855. 0, MLX4_MCAST_DISABLE);
  856. if (err)
  857. en_err(priv, "Failed disabling multicast filter\n");
  858. /* Flush mcast filter and init it with broadcast address */
  859. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  860. 1, MLX4_MCAST_CONFIG);
  861. /* Update multicast list - we cache all addresses so they won't
  862. * change while HW is updated holding the command semaphor */
  863. netif_addr_lock_bh(dev);
  864. mlx4_en_cache_mclist(dev);
  865. netif_addr_unlock_bh(dev);
  866. list_for_each_entry(mclist, &priv->mc_list, list) {
  867. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  868. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  869. mcast_addr, 0, MLX4_MCAST_CONFIG);
  870. }
  871. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  872. 0, MLX4_MCAST_ENABLE);
  873. if (err)
  874. en_err(priv, "Failed enabling multicast filter\n");
  875. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  876. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  877. if (mclist->action == MCLIST_REM) {
  878. /* detach this address and delete from list */
  879. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  880. mc_list[5] = priv->port;
  881. err = mlx4_multicast_detach(mdev->dev,
  882. &priv->rss_map.indir_qp,
  883. mc_list,
  884. MLX4_PROT_ETH,
  885. mclist->reg_id);
  886. if (err)
  887. en_err(priv, "Fail to detach multicast address\n");
  888. /* remove from list */
  889. list_del(&mclist->list);
  890. kfree(mclist);
  891. } else if (mclist->action == MCLIST_ADD) {
  892. /* attach the address */
  893. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  894. /* needed for B0 steering support */
  895. mc_list[5] = priv->port;
  896. err = mlx4_multicast_attach(mdev->dev,
  897. &priv->rss_map.indir_qp,
  898. mc_list,
  899. priv->port, 0,
  900. MLX4_PROT_ETH,
  901. &mclist->reg_id);
  902. if (err)
  903. en_err(priv, "Fail to attach multicast address\n");
  904. }
  905. }
  906. }
  907. }
  908. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  909. struct net_device *dev,
  910. struct mlx4_en_dev *mdev)
  911. {
  912. struct netdev_hw_addr *ha;
  913. struct mlx4_mac_entry *entry;
  914. struct hlist_node *tmp;
  915. bool found;
  916. u64 mac;
  917. int err = 0;
  918. struct hlist_head *bucket;
  919. unsigned int i;
  920. int removed = 0;
  921. u32 prev_flags;
  922. /* Note that we do not need to protect our mac_hash traversal with rcu,
  923. * since all modification code is protected by mdev->state_lock
  924. */
  925. /* find what to remove */
  926. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  927. bucket = &priv->mac_hash[i];
  928. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  929. found = false;
  930. netdev_for_each_uc_addr(ha, dev) {
  931. if (ether_addr_equal_64bits(entry->mac,
  932. ha->addr)) {
  933. found = true;
  934. break;
  935. }
  936. }
  937. /* MAC address of the port is not in uc list */
  938. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  939. found = true;
  940. if (!found) {
  941. mac = mlx4_en_mac_to_u64(entry->mac);
  942. mlx4_en_uc_steer_release(priv, entry->mac,
  943. priv->base_qpn,
  944. entry->reg_id);
  945. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  946. hlist_del_rcu(&entry->hlist);
  947. kfree_rcu(entry, rcu);
  948. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  949. entry->mac, priv->port);
  950. ++removed;
  951. }
  952. }
  953. }
  954. /* if we didn't remove anything, there is no use in trying to add
  955. * again once we are in a forced promisc mode state
  956. */
  957. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  958. return;
  959. prev_flags = priv->flags;
  960. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  961. /* find what to add */
  962. netdev_for_each_uc_addr(ha, dev) {
  963. found = false;
  964. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  965. hlist_for_each_entry(entry, bucket, hlist) {
  966. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  967. found = true;
  968. break;
  969. }
  970. }
  971. if (!found) {
  972. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  973. if (!entry) {
  974. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  975. ha->addr, priv->port);
  976. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  977. break;
  978. }
  979. mac = mlx4_en_mac_to_u64(ha->addr);
  980. memcpy(entry->mac, ha->addr, ETH_ALEN);
  981. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  982. if (err < 0) {
  983. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  984. ha->addr, priv->port, err);
  985. kfree(entry);
  986. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  987. break;
  988. }
  989. err = mlx4_en_uc_steer_add(priv, ha->addr,
  990. &priv->base_qpn,
  991. &entry->reg_id);
  992. if (err) {
  993. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  994. ha->addr, priv->port, err);
  995. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  996. kfree(entry);
  997. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  998. break;
  999. } else {
  1000. unsigned int mac_hash;
  1001. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1002. ha->addr, priv->port);
  1003. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1004. bucket = &priv->mac_hash[mac_hash];
  1005. hlist_add_head_rcu(&entry->hlist, bucket);
  1006. }
  1007. }
  1008. }
  1009. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1010. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1011. priv->port);
  1012. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1013. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1014. priv->port);
  1015. }
  1016. }
  1017. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1018. {
  1019. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1020. rx_mode_task);
  1021. struct mlx4_en_dev *mdev = priv->mdev;
  1022. struct net_device *dev = priv->dev;
  1023. mutex_lock(&mdev->state_lock);
  1024. if (!mdev->device_up) {
  1025. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1026. goto out;
  1027. }
  1028. if (!priv->port_up) {
  1029. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1030. goto out;
  1031. }
  1032. if (!netif_carrier_ok(dev)) {
  1033. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1034. if (priv->port_state.link_state) {
  1035. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1036. netif_carrier_on(dev);
  1037. en_dbg(LINK, priv, "Link Up\n");
  1038. }
  1039. }
  1040. }
  1041. if (dev->priv_flags & IFF_UNICAST_FLT)
  1042. mlx4_en_do_uc_filter(priv, dev, mdev);
  1043. /* Promsicuous mode: disable all filters */
  1044. if ((dev->flags & IFF_PROMISC) ||
  1045. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1046. mlx4_en_set_promisc_mode(priv, mdev);
  1047. goto out;
  1048. }
  1049. /* Not in promiscuous mode */
  1050. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1051. mlx4_en_clear_promisc_mode(priv, mdev);
  1052. mlx4_en_do_multicast(priv, dev, mdev);
  1053. out:
  1054. mutex_unlock(&mdev->state_lock);
  1055. }
  1056. #ifdef CONFIG_NET_POLL_CONTROLLER
  1057. static void mlx4_en_netpoll(struct net_device *dev)
  1058. {
  1059. struct mlx4_en_priv *priv = netdev_priv(dev);
  1060. struct mlx4_en_cq *cq;
  1061. unsigned long flags;
  1062. int i;
  1063. for (i = 0; i < priv->rx_ring_num; i++) {
  1064. cq = priv->rx_cq[i];
  1065. spin_lock_irqsave(&cq->lock, flags);
  1066. napi_synchronize(&cq->napi);
  1067. mlx4_en_process_rx_cq(dev, cq, 0);
  1068. spin_unlock_irqrestore(&cq->lock, flags);
  1069. }
  1070. }
  1071. #endif
  1072. static void mlx4_en_tx_timeout(struct net_device *dev)
  1073. {
  1074. struct mlx4_en_priv *priv = netdev_priv(dev);
  1075. struct mlx4_en_dev *mdev = priv->mdev;
  1076. int i;
  1077. if (netif_msg_timer(priv))
  1078. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1079. for (i = 0; i < priv->tx_ring_num; i++) {
  1080. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1081. continue;
  1082. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1083. i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
  1084. priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
  1085. }
  1086. priv->port_stats.tx_timeout++;
  1087. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1088. queue_work(mdev->workqueue, &priv->watchdog_task);
  1089. }
  1090. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1091. {
  1092. struct mlx4_en_priv *priv = netdev_priv(dev);
  1093. spin_lock_bh(&priv->stats_lock);
  1094. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1095. spin_unlock_bh(&priv->stats_lock);
  1096. return &priv->ret_stats;
  1097. }
  1098. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1099. {
  1100. struct mlx4_en_cq *cq;
  1101. int i;
  1102. /* If we haven't received a specific coalescing setting
  1103. * (module param), we set the moderation parameters as follows:
  1104. * - moder_cnt is set to the number of mtu sized packets to
  1105. * satisfy our coalescing target.
  1106. * - moder_time is set to a fixed value.
  1107. */
  1108. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1109. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1110. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1111. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1112. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1113. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1114. /* Setup cq moderation params */
  1115. for (i = 0; i < priv->rx_ring_num; i++) {
  1116. cq = priv->rx_cq[i];
  1117. cq->moder_cnt = priv->rx_frames;
  1118. cq->moder_time = priv->rx_usecs;
  1119. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1120. priv->last_moder_packets[i] = 0;
  1121. priv->last_moder_bytes[i] = 0;
  1122. }
  1123. for (i = 0; i < priv->tx_ring_num; i++) {
  1124. cq = priv->tx_cq[i];
  1125. cq->moder_cnt = priv->tx_frames;
  1126. cq->moder_time = priv->tx_usecs;
  1127. }
  1128. /* Reset auto-moderation params */
  1129. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1130. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1131. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1132. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1133. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1134. priv->adaptive_rx_coal = 1;
  1135. priv->last_moder_jiffies = 0;
  1136. priv->last_moder_tx_packets = 0;
  1137. }
  1138. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1139. {
  1140. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1141. struct mlx4_en_cq *cq;
  1142. unsigned long packets;
  1143. unsigned long rate;
  1144. unsigned long avg_pkt_size;
  1145. unsigned long rx_packets;
  1146. unsigned long rx_bytes;
  1147. unsigned long rx_pkt_diff;
  1148. int moder_time;
  1149. int ring, err;
  1150. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1151. return;
  1152. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1153. spin_lock_bh(&priv->stats_lock);
  1154. rx_packets = priv->rx_ring[ring]->packets;
  1155. rx_bytes = priv->rx_ring[ring]->bytes;
  1156. spin_unlock_bh(&priv->stats_lock);
  1157. rx_pkt_diff = ((unsigned long) (rx_packets -
  1158. priv->last_moder_packets[ring]));
  1159. packets = rx_pkt_diff;
  1160. rate = packets * HZ / period;
  1161. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1162. priv->last_moder_bytes[ring])) / packets : 0;
  1163. /* Apply auto-moderation only when packet rate
  1164. * exceeds a rate that it matters */
  1165. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1166. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1167. if (rate < priv->pkt_rate_low)
  1168. moder_time = priv->rx_usecs_low;
  1169. else if (rate > priv->pkt_rate_high)
  1170. moder_time = priv->rx_usecs_high;
  1171. else
  1172. moder_time = (rate - priv->pkt_rate_low) *
  1173. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1174. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1175. priv->rx_usecs_low;
  1176. } else {
  1177. moder_time = priv->rx_usecs_low;
  1178. }
  1179. if (moder_time != priv->last_moder_time[ring]) {
  1180. priv->last_moder_time[ring] = moder_time;
  1181. cq = priv->rx_cq[ring];
  1182. cq->moder_time = moder_time;
  1183. cq->moder_cnt = priv->rx_frames;
  1184. err = mlx4_en_set_cq_moder(priv, cq);
  1185. if (err)
  1186. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1187. ring);
  1188. }
  1189. priv->last_moder_packets[ring] = rx_packets;
  1190. priv->last_moder_bytes[ring] = rx_bytes;
  1191. }
  1192. priv->last_moder_jiffies = jiffies;
  1193. }
  1194. static void mlx4_en_do_get_stats(struct work_struct *work)
  1195. {
  1196. struct delayed_work *delay = to_delayed_work(work);
  1197. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1198. stats_task);
  1199. struct mlx4_en_dev *mdev = priv->mdev;
  1200. int err;
  1201. mutex_lock(&mdev->state_lock);
  1202. if (mdev->device_up) {
  1203. if (priv->port_up) {
  1204. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1205. if (err)
  1206. en_dbg(HW, priv, "Could not update stats\n");
  1207. mlx4_en_auto_moderation(priv);
  1208. }
  1209. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1210. }
  1211. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1212. mlx4_en_do_set_mac(priv);
  1213. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1214. }
  1215. mutex_unlock(&mdev->state_lock);
  1216. }
  1217. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1218. * periodically
  1219. */
  1220. static void mlx4_en_service_task(struct work_struct *work)
  1221. {
  1222. struct delayed_work *delay = to_delayed_work(work);
  1223. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1224. service_task);
  1225. struct mlx4_en_dev *mdev = priv->mdev;
  1226. mutex_lock(&mdev->state_lock);
  1227. if (mdev->device_up) {
  1228. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1229. mlx4_en_ptp_overflow_check(mdev);
  1230. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1231. SERVICE_TASK_DELAY);
  1232. }
  1233. mutex_unlock(&mdev->state_lock);
  1234. }
  1235. static void mlx4_en_linkstate(struct work_struct *work)
  1236. {
  1237. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1238. linkstate_task);
  1239. struct mlx4_en_dev *mdev = priv->mdev;
  1240. int linkstate = priv->link_state;
  1241. mutex_lock(&mdev->state_lock);
  1242. /* If observable port state changed set carrier state and
  1243. * report to system log */
  1244. if (priv->last_link_state != linkstate) {
  1245. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1246. en_info(priv, "Link Down\n");
  1247. netif_carrier_off(priv->dev);
  1248. } else {
  1249. en_info(priv, "Link Up\n");
  1250. netif_carrier_on(priv->dev);
  1251. }
  1252. }
  1253. priv->last_link_state = linkstate;
  1254. mutex_unlock(&mdev->state_lock);
  1255. }
  1256. int mlx4_en_start_port(struct net_device *dev)
  1257. {
  1258. struct mlx4_en_priv *priv = netdev_priv(dev);
  1259. struct mlx4_en_dev *mdev = priv->mdev;
  1260. struct mlx4_en_cq *cq;
  1261. struct mlx4_en_tx_ring *tx_ring;
  1262. int rx_index = 0;
  1263. int tx_index = 0;
  1264. int err = 0;
  1265. int i;
  1266. int j;
  1267. u8 mc_list[16] = {0};
  1268. if (priv->port_up) {
  1269. en_dbg(DRV, priv, "start port called while port already up\n");
  1270. return 0;
  1271. }
  1272. INIT_LIST_HEAD(&priv->mc_list);
  1273. INIT_LIST_HEAD(&priv->curr_list);
  1274. INIT_LIST_HEAD(&priv->ethtool_list);
  1275. memset(&priv->ethtool_rules[0], 0,
  1276. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1277. /* Calculate Rx buf size */
  1278. dev->mtu = min(dev->mtu, priv->max_mtu);
  1279. mlx4_en_calc_rx_buf(dev);
  1280. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1281. /* Configure rx cq's and rings */
  1282. err = mlx4_en_activate_rx_rings(priv);
  1283. if (err) {
  1284. en_err(priv, "Failed to activate RX rings\n");
  1285. return err;
  1286. }
  1287. for (i = 0; i < priv->rx_ring_num; i++) {
  1288. cq = priv->rx_cq[i];
  1289. mlx4_en_cq_init_lock(cq);
  1290. err = mlx4_en_activate_cq(priv, cq, i);
  1291. if (err) {
  1292. en_err(priv, "Failed activating Rx CQ\n");
  1293. goto cq_err;
  1294. }
  1295. for (j = 0; j < cq->size; j++)
  1296. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1297. err = mlx4_en_set_cq_moder(priv, cq);
  1298. if (err) {
  1299. en_err(priv, "Failed setting cq moderation parameters");
  1300. mlx4_en_deactivate_cq(priv, cq);
  1301. goto cq_err;
  1302. }
  1303. mlx4_en_arm_cq(priv, cq);
  1304. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1305. ++rx_index;
  1306. }
  1307. /* Set qp number */
  1308. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1309. err = mlx4_en_get_qp(priv);
  1310. if (err) {
  1311. en_err(priv, "Failed getting eth qp\n");
  1312. goto cq_err;
  1313. }
  1314. mdev->mac_removed[priv->port] = 0;
  1315. err = mlx4_en_config_rss_steer(priv);
  1316. if (err) {
  1317. en_err(priv, "Failed configuring rss steering\n");
  1318. goto mac_err;
  1319. }
  1320. err = mlx4_en_create_drop_qp(priv);
  1321. if (err)
  1322. goto rss_err;
  1323. /* Configure tx cq's and rings */
  1324. for (i = 0; i < priv->tx_ring_num; i++) {
  1325. /* Configure cq */
  1326. cq = priv->tx_cq[i];
  1327. err = mlx4_en_activate_cq(priv, cq, i);
  1328. if (err) {
  1329. en_err(priv, "Failed allocating Tx CQ\n");
  1330. goto tx_err;
  1331. }
  1332. err = mlx4_en_set_cq_moder(priv, cq);
  1333. if (err) {
  1334. en_err(priv, "Failed setting cq moderation parameters");
  1335. mlx4_en_deactivate_cq(priv, cq);
  1336. goto tx_err;
  1337. }
  1338. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1339. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1340. /* Configure ring */
  1341. tx_ring = priv->tx_ring[i];
  1342. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1343. i / priv->num_tx_rings_p_up);
  1344. if (err) {
  1345. en_err(priv, "Failed allocating Tx ring\n");
  1346. mlx4_en_deactivate_cq(priv, cq);
  1347. goto tx_err;
  1348. }
  1349. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1350. /* Arm CQ for TX completions */
  1351. mlx4_en_arm_cq(priv, cq);
  1352. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1353. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1354. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1355. ++tx_index;
  1356. }
  1357. /* Configure port */
  1358. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1359. priv->rx_skb_size + ETH_FCS_LEN,
  1360. priv->prof->tx_pause,
  1361. priv->prof->tx_ppp,
  1362. priv->prof->rx_pause,
  1363. priv->prof->rx_ppp);
  1364. if (err) {
  1365. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1366. priv->port, err);
  1367. goto tx_err;
  1368. }
  1369. /* Set default qp number */
  1370. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1371. if (err) {
  1372. en_err(priv, "Failed setting default qp numbers\n");
  1373. goto tx_err;
  1374. }
  1375. /* Init port */
  1376. en_dbg(HW, priv, "Initializing port\n");
  1377. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1378. if (err) {
  1379. en_err(priv, "Failed Initializing port\n");
  1380. goto tx_err;
  1381. }
  1382. /* Attach rx QP to bradcast address */
  1383. memset(&mc_list[10], 0xff, ETH_ALEN);
  1384. mc_list[5] = priv->port; /* needed for B0 steering support */
  1385. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1386. priv->port, 0, MLX4_PROT_ETH,
  1387. &priv->broadcast_id))
  1388. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1389. /* Must redo promiscuous mode setup. */
  1390. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1391. /* Schedule multicast task to populate multicast list */
  1392. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1393. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1394. priv->port_up = true;
  1395. netif_tx_start_all_queues(dev);
  1396. netif_device_attach(dev);
  1397. return 0;
  1398. tx_err:
  1399. while (tx_index--) {
  1400. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1401. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1402. }
  1403. mlx4_en_destroy_drop_qp(priv);
  1404. rss_err:
  1405. mlx4_en_release_rss_steer(priv);
  1406. mac_err:
  1407. mlx4_en_put_qp(priv);
  1408. cq_err:
  1409. while (rx_index--)
  1410. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1411. for (i = 0; i < priv->rx_ring_num; i++)
  1412. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1413. return err; /* need to close devices */
  1414. }
  1415. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1416. {
  1417. struct mlx4_en_priv *priv = netdev_priv(dev);
  1418. struct mlx4_en_dev *mdev = priv->mdev;
  1419. struct mlx4_en_mc_list *mclist, *tmp;
  1420. struct ethtool_flow_id *flow, *tmp_flow;
  1421. int i;
  1422. u8 mc_list[16] = {0};
  1423. if (!priv->port_up) {
  1424. en_dbg(DRV, priv, "stop port called while port already down\n");
  1425. return;
  1426. }
  1427. /* close port*/
  1428. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1429. /* Synchronize with tx routine */
  1430. netif_tx_lock_bh(dev);
  1431. if (detach)
  1432. netif_device_detach(dev);
  1433. netif_tx_stop_all_queues(dev);
  1434. netif_tx_unlock_bh(dev);
  1435. netif_tx_disable(dev);
  1436. /* Set port as not active */
  1437. priv->port_up = false;
  1438. /* Promsicuous mode */
  1439. if (mdev->dev->caps.steering_mode ==
  1440. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1441. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1442. MLX4_EN_FLAG_MC_PROMISC);
  1443. mlx4_flow_steer_promisc_remove(mdev->dev,
  1444. priv->port,
  1445. MLX4_FS_ALL_DEFAULT);
  1446. mlx4_flow_steer_promisc_remove(mdev->dev,
  1447. priv->port,
  1448. MLX4_FS_MC_DEFAULT);
  1449. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1450. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1451. /* Disable promiscouos mode */
  1452. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1453. priv->port);
  1454. /* Disable Multicast promisc */
  1455. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1456. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1457. priv->port);
  1458. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1459. }
  1460. }
  1461. /* Detach All multicasts */
  1462. memset(&mc_list[10], 0xff, ETH_ALEN);
  1463. mc_list[5] = priv->port; /* needed for B0 steering support */
  1464. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1465. MLX4_PROT_ETH, priv->broadcast_id);
  1466. list_for_each_entry(mclist, &priv->curr_list, list) {
  1467. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1468. mc_list[5] = priv->port;
  1469. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1470. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1471. }
  1472. mlx4_en_clear_list(dev);
  1473. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1474. list_del(&mclist->list);
  1475. kfree(mclist);
  1476. }
  1477. /* Flush multicast filter */
  1478. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1479. /* Remove flow steering rules for the port*/
  1480. if (mdev->dev->caps.steering_mode ==
  1481. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1482. ASSERT_RTNL();
  1483. list_for_each_entry_safe(flow, tmp_flow,
  1484. &priv->ethtool_list, list) {
  1485. mlx4_flow_detach(mdev->dev, flow->id);
  1486. list_del(&flow->list);
  1487. }
  1488. }
  1489. mlx4_en_destroy_drop_qp(priv);
  1490. /* Free TX Rings */
  1491. for (i = 0; i < priv->tx_ring_num; i++) {
  1492. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1493. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1494. }
  1495. msleep(10);
  1496. for (i = 0; i < priv->tx_ring_num; i++)
  1497. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1498. /* Free RSS qps */
  1499. mlx4_en_release_rss_steer(priv);
  1500. /* Unregister Mac address for the port */
  1501. mlx4_en_put_qp(priv);
  1502. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1503. mdev->mac_removed[priv->port] = 1;
  1504. /* Free RX Rings */
  1505. for (i = 0; i < priv->rx_ring_num; i++) {
  1506. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1507. local_bh_disable();
  1508. while (!mlx4_en_cq_lock_napi(cq)) {
  1509. pr_info("CQ %d locked\n", i);
  1510. mdelay(1);
  1511. }
  1512. local_bh_enable();
  1513. while (test_bit(NAPI_STATE_SCHED, &cq->napi.state))
  1514. msleep(1);
  1515. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1516. mlx4_en_deactivate_cq(priv, cq);
  1517. }
  1518. }
  1519. static void mlx4_en_restart(struct work_struct *work)
  1520. {
  1521. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1522. watchdog_task);
  1523. struct mlx4_en_dev *mdev = priv->mdev;
  1524. struct net_device *dev = priv->dev;
  1525. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1526. mutex_lock(&mdev->state_lock);
  1527. if (priv->port_up) {
  1528. mlx4_en_stop_port(dev, 1);
  1529. if (mlx4_en_start_port(dev))
  1530. en_err(priv, "Failed restarting port %d\n", priv->port);
  1531. }
  1532. mutex_unlock(&mdev->state_lock);
  1533. }
  1534. static void mlx4_en_clear_stats(struct net_device *dev)
  1535. {
  1536. struct mlx4_en_priv *priv = netdev_priv(dev);
  1537. struct mlx4_en_dev *mdev = priv->mdev;
  1538. int i;
  1539. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1540. en_dbg(HW, priv, "Failed dumping statistics\n");
  1541. memset(&priv->stats, 0, sizeof(priv->stats));
  1542. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1543. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1544. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1545. for (i = 0; i < priv->tx_ring_num; i++) {
  1546. priv->tx_ring[i]->bytes = 0;
  1547. priv->tx_ring[i]->packets = 0;
  1548. priv->tx_ring[i]->tx_csum = 0;
  1549. }
  1550. for (i = 0; i < priv->rx_ring_num; i++) {
  1551. priv->rx_ring[i]->bytes = 0;
  1552. priv->rx_ring[i]->packets = 0;
  1553. priv->rx_ring[i]->csum_ok = 0;
  1554. priv->rx_ring[i]->csum_none = 0;
  1555. }
  1556. }
  1557. static int mlx4_en_open(struct net_device *dev)
  1558. {
  1559. struct mlx4_en_priv *priv = netdev_priv(dev);
  1560. struct mlx4_en_dev *mdev = priv->mdev;
  1561. int err = 0;
  1562. mutex_lock(&mdev->state_lock);
  1563. if (!mdev->device_up) {
  1564. en_err(priv, "Cannot open - device down/disabled\n");
  1565. err = -EBUSY;
  1566. goto out;
  1567. }
  1568. /* Reset HW statistics and SW counters */
  1569. mlx4_en_clear_stats(dev);
  1570. err = mlx4_en_start_port(dev);
  1571. if (err)
  1572. en_err(priv, "Failed starting port:%d\n", priv->port);
  1573. out:
  1574. mutex_unlock(&mdev->state_lock);
  1575. return err;
  1576. }
  1577. static int mlx4_en_close(struct net_device *dev)
  1578. {
  1579. struct mlx4_en_priv *priv = netdev_priv(dev);
  1580. struct mlx4_en_dev *mdev = priv->mdev;
  1581. en_dbg(IFDOWN, priv, "Close port called\n");
  1582. mutex_lock(&mdev->state_lock);
  1583. mlx4_en_stop_port(dev, 0);
  1584. netif_carrier_off(dev);
  1585. mutex_unlock(&mdev->state_lock);
  1586. return 0;
  1587. }
  1588. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1589. {
  1590. int i;
  1591. #ifdef CONFIG_RFS_ACCEL
  1592. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1593. priv->dev->rx_cpu_rmap = NULL;
  1594. #endif
  1595. for (i = 0; i < priv->tx_ring_num; i++) {
  1596. if (priv->tx_ring && priv->tx_ring[i])
  1597. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1598. if (priv->tx_cq && priv->tx_cq[i])
  1599. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1600. }
  1601. for (i = 0; i < priv->rx_ring_num; i++) {
  1602. if (priv->rx_ring[i])
  1603. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1604. priv->prof->rx_ring_size, priv->stride);
  1605. if (priv->rx_cq[i])
  1606. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1607. }
  1608. if (priv->base_tx_qpn) {
  1609. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1610. priv->base_tx_qpn = 0;
  1611. }
  1612. }
  1613. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1614. {
  1615. struct mlx4_en_port_profile *prof = priv->prof;
  1616. int i;
  1617. int err;
  1618. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1619. if (err) {
  1620. en_err(priv, "failed reserving range for TX rings\n");
  1621. return err;
  1622. }
  1623. /* Create tx Rings */
  1624. for (i = 0; i < priv->tx_ring_num; i++) {
  1625. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1626. prof->tx_ring_size, i, TX))
  1627. goto err;
  1628. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1629. prof->tx_ring_size, TXBB_SIZE))
  1630. goto err;
  1631. }
  1632. /* Create rx Rings */
  1633. for (i = 0; i < priv->rx_ring_num; i++) {
  1634. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1635. prof->rx_ring_size, i, RX))
  1636. goto err;
  1637. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1638. prof->rx_ring_size, priv->stride))
  1639. goto err;
  1640. }
  1641. #ifdef CONFIG_RFS_ACCEL
  1642. if (priv->mdev->dev->caps.comp_pool) {
  1643. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1644. if (!priv->dev->rx_cpu_rmap)
  1645. goto err;
  1646. }
  1647. #endif
  1648. return 0;
  1649. err:
  1650. en_err(priv, "Failed to allocate NIC resources\n");
  1651. for (i = 0; i < priv->rx_ring_num; i++) {
  1652. if (priv->rx_ring[i])
  1653. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1654. prof->rx_ring_size,
  1655. priv->stride);
  1656. if (priv->rx_cq[i])
  1657. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1658. }
  1659. for (i = 0; i < priv->tx_ring_num; i++) {
  1660. if (priv->tx_ring[i])
  1661. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1662. if (priv->tx_cq[i])
  1663. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1664. }
  1665. return -ENOMEM;
  1666. }
  1667. void mlx4_en_destroy_netdev(struct net_device *dev)
  1668. {
  1669. struct mlx4_en_priv *priv = netdev_priv(dev);
  1670. struct mlx4_en_dev *mdev = priv->mdev;
  1671. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1672. /* Unregister device - this will close the port if it was up */
  1673. if (priv->registered)
  1674. unregister_netdev(dev);
  1675. if (priv->allocated)
  1676. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1677. cancel_delayed_work(&priv->stats_task);
  1678. cancel_delayed_work(&priv->service_task);
  1679. /* flush any pending task for this netdev */
  1680. flush_workqueue(mdev->workqueue);
  1681. /* Detach the netdev so tasks would not attempt to access it */
  1682. mutex_lock(&mdev->state_lock);
  1683. mdev->pndev[priv->port] = NULL;
  1684. mutex_unlock(&mdev->state_lock);
  1685. mlx4_en_free_resources(priv);
  1686. kfree(priv->tx_ring);
  1687. kfree(priv->tx_cq);
  1688. free_netdev(dev);
  1689. }
  1690. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1691. {
  1692. struct mlx4_en_priv *priv = netdev_priv(dev);
  1693. struct mlx4_en_dev *mdev = priv->mdev;
  1694. int err = 0;
  1695. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1696. dev->mtu, new_mtu);
  1697. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1698. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1699. return -EPERM;
  1700. }
  1701. dev->mtu = new_mtu;
  1702. if (netif_running(dev)) {
  1703. mutex_lock(&mdev->state_lock);
  1704. if (!mdev->device_up) {
  1705. /* NIC is probably restarting - let watchdog task reset
  1706. * the port */
  1707. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1708. } else {
  1709. mlx4_en_stop_port(dev, 1);
  1710. err = mlx4_en_start_port(dev);
  1711. if (err) {
  1712. en_err(priv, "Failed restarting port:%d\n",
  1713. priv->port);
  1714. queue_work(mdev->workqueue, &priv->watchdog_task);
  1715. }
  1716. }
  1717. mutex_unlock(&mdev->state_lock);
  1718. }
  1719. return 0;
  1720. }
  1721. static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
  1722. {
  1723. struct mlx4_en_priv *priv = netdev_priv(dev);
  1724. struct mlx4_en_dev *mdev = priv->mdev;
  1725. struct hwtstamp_config config;
  1726. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1727. return -EFAULT;
  1728. /* reserved for future extensions */
  1729. if (config.flags)
  1730. return -EINVAL;
  1731. /* device doesn't support time stamping */
  1732. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1733. return -EINVAL;
  1734. /* TX HW timestamp */
  1735. switch (config.tx_type) {
  1736. case HWTSTAMP_TX_OFF:
  1737. case HWTSTAMP_TX_ON:
  1738. break;
  1739. default:
  1740. return -ERANGE;
  1741. }
  1742. /* RX HW timestamp */
  1743. switch (config.rx_filter) {
  1744. case HWTSTAMP_FILTER_NONE:
  1745. break;
  1746. case HWTSTAMP_FILTER_ALL:
  1747. case HWTSTAMP_FILTER_SOME:
  1748. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1749. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1750. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1751. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1752. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1753. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1754. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1755. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1756. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1757. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1758. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1759. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1760. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1761. break;
  1762. default:
  1763. return -ERANGE;
  1764. }
  1765. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1766. config.tx_type = HWTSTAMP_TX_OFF;
  1767. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1768. }
  1769. return copy_to_user(ifr->ifr_data, &config,
  1770. sizeof(config)) ? -EFAULT : 0;
  1771. }
  1772. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1773. {
  1774. switch (cmd) {
  1775. case SIOCSHWTSTAMP:
  1776. return mlx4_en_hwtstamp_ioctl(dev, ifr);
  1777. default:
  1778. return -EOPNOTSUPP;
  1779. }
  1780. }
  1781. static int mlx4_en_set_features(struct net_device *netdev,
  1782. netdev_features_t features)
  1783. {
  1784. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1785. if (features & NETIF_F_LOOPBACK)
  1786. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1787. else
  1788. priv->ctrl_flags &=
  1789. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1790. mlx4_en_update_loopback_state(netdev, features);
  1791. return 0;
  1792. }
  1793. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1794. {
  1795. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1796. struct mlx4_en_dev *mdev = en_priv->mdev;
  1797. u64 mac_u64 = mlx4_en_mac_to_u64(mac);
  1798. if (!is_valid_ether_addr(mac))
  1799. return -EINVAL;
  1800. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1801. }
  1802. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1803. {
  1804. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1805. struct mlx4_en_dev *mdev = en_priv->mdev;
  1806. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1807. }
  1808. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1809. {
  1810. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1811. struct mlx4_en_dev *mdev = en_priv->mdev;
  1812. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1813. }
  1814. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1815. {
  1816. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1817. struct mlx4_en_dev *mdev = en_priv->mdev;
  1818. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1819. }
  1820. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1821. {
  1822. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1823. struct mlx4_en_dev *mdev = en_priv->mdev;
  1824. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1825. }
  1826. static const struct net_device_ops mlx4_netdev_ops = {
  1827. .ndo_open = mlx4_en_open,
  1828. .ndo_stop = mlx4_en_close,
  1829. .ndo_start_xmit = mlx4_en_xmit,
  1830. .ndo_select_queue = mlx4_en_select_queue,
  1831. .ndo_get_stats = mlx4_en_get_stats,
  1832. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1833. .ndo_set_mac_address = mlx4_en_set_mac,
  1834. .ndo_validate_addr = eth_validate_addr,
  1835. .ndo_change_mtu = mlx4_en_change_mtu,
  1836. .ndo_do_ioctl = mlx4_en_ioctl,
  1837. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1838. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1839. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1840. #ifdef CONFIG_NET_POLL_CONTROLLER
  1841. .ndo_poll_controller = mlx4_en_netpoll,
  1842. #endif
  1843. .ndo_set_features = mlx4_en_set_features,
  1844. .ndo_setup_tc = mlx4_en_setup_tc,
  1845. #ifdef CONFIG_RFS_ACCEL
  1846. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1847. #endif
  1848. #ifdef CONFIG_NET_RX_BUSY_POLL
  1849. .ndo_busy_poll = mlx4_en_low_latency_recv,
  1850. #endif
  1851. };
  1852. static const struct net_device_ops mlx4_netdev_ops_master = {
  1853. .ndo_open = mlx4_en_open,
  1854. .ndo_stop = mlx4_en_close,
  1855. .ndo_start_xmit = mlx4_en_xmit,
  1856. .ndo_select_queue = mlx4_en_select_queue,
  1857. .ndo_get_stats = mlx4_en_get_stats,
  1858. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1859. .ndo_set_mac_address = mlx4_en_set_mac,
  1860. .ndo_validate_addr = eth_validate_addr,
  1861. .ndo_change_mtu = mlx4_en_change_mtu,
  1862. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1863. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1864. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1865. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  1866. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  1867. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  1868. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  1869. .ndo_get_vf_config = mlx4_en_get_vf_config,
  1870. #ifdef CONFIG_NET_POLL_CONTROLLER
  1871. .ndo_poll_controller = mlx4_en_netpoll,
  1872. #endif
  1873. .ndo_set_features = mlx4_en_set_features,
  1874. .ndo_setup_tc = mlx4_en_setup_tc,
  1875. #ifdef CONFIG_RFS_ACCEL
  1876. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1877. #endif
  1878. };
  1879. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1880. struct mlx4_en_port_profile *prof)
  1881. {
  1882. struct net_device *dev;
  1883. struct mlx4_en_priv *priv;
  1884. int i;
  1885. int err;
  1886. u64 mac_u64;
  1887. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1888. MAX_TX_RINGS, MAX_RX_RINGS);
  1889. if (dev == NULL)
  1890. return -ENOMEM;
  1891. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1892. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1893. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1894. dev->dev_id = port - 1;
  1895. /*
  1896. * Initialize driver private data
  1897. */
  1898. priv = netdev_priv(dev);
  1899. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1900. priv->dev = dev;
  1901. priv->mdev = mdev;
  1902. priv->ddev = &mdev->pdev->dev;
  1903. priv->prof = prof;
  1904. priv->port = port;
  1905. priv->port_up = false;
  1906. priv->flags = prof->flags;
  1907. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1908. MLX4_WQE_CTRL_SOLICITED);
  1909. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1910. priv->tx_ring_num = prof->tx_ring_num;
  1911. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
  1912. GFP_KERNEL);
  1913. if (!priv->tx_ring) {
  1914. err = -ENOMEM;
  1915. goto out;
  1916. }
  1917. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
  1918. GFP_KERNEL);
  1919. if (!priv->tx_cq) {
  1920. err = -ENOMEM;
  1921. goto out;
  1922. }
  1923. priv->rx_ring_num = prof->rx_ring_num;
  1924. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1925. priv->mac_index = -1;
  1926. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1927. spin_lock_init(&priv->stats_lock);
  1928. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1929. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1930. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1931. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1932. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  1933. #ifdef CONFIG_MLX4_EN_DCB
  1934. if (!mlx4_is_slave(priv->mdev->dev)) {
  1935. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  1936. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1937. } else {
  1938. en_info(priv, "enabling only PFC DCB ops\n");
  1939. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  1940. }
  1941. }
  1942. #endif
  1943. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1944. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1945. /* Query for default mac and max mtu */
  1946. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1947. /* Set default MAC */
  1948. dev->addr_len = ETH_ALEN;
  1949. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1950. if (!is_valid_ether_addr(dev->dev_addr)) {
  1951. if (mlx4_is_slave(priv->mdev->dev)) {
  1952. eth_hw_addr_random(dev);
  1953. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  1954. mac_u64 = mlx4_en_mac_to_u64(dev->dev_addr);
  1955. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  1956. } else {
  1957. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1958. priv->port, dev->dev_addr);
  1959. err = -EINVAL;
  1960. goto out;
  1961. }
  1962. }
  1963. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1964. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1965. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1966. err = mlx4_en_alloc_resources(priv);
  1967. if (err)
  1968. goto out;
  1969. #ifdef CONFIG_RFS_ACCEL
  1970. INIT_LIST_HEAD(&priv->filters);
  1971. spin_lock_init(&priv->filters_lock);
  1972. #endif
  1973. /* Initialize time stamping config */
  1974. priv->hwtstamp_config.flags = 0;
  1975. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  1976. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  1977. /* Allocate page for receive rings */
  1978. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1979. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1980. if (err) {
  1981. en_err(priv, "Failed to allocate page for rx qps\n");
  1982. goto out;
  1983. }
  1984. priv->allocated = 1;
  1985. /*
  1986. * Initialize netdev entry points
  1987. */
  1988. if (mlx4_is_master(priv->mdev->dev))
  1989. dev->netdev_ops = &mlx4_netdev_ops_master;
  1990. else
  1991. dev->netdev_ops = &mlx4_netdev_ops;
  1992. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1993. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1994. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1995. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1996. /*
  1997. * Set driver features
  1998. */
  1999. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2000. if (mdev->LSO_support)
  2001. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2002. dev->vlan_features = dev->hw_features;
  2003. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2004. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2005. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2006. NETIF_F_HW_VLAN_CTAG_FILTER;
  2007. dev->hw_features |= NETIF_F_LOOPBACK;
  2008. if (mdev->dev->caps.steering_mode ==
  2009. MLX4_STEERING_MODE_DEVICE_MANAGED)
  2010. dev->hw_features |= NETIF_F_NTUPLE;
  2011. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2012. dev->priv_flags |= IFF_UNICAST_FLT;
  2013. mdev->pndev[port] = dev;
  2014. netif_carrier_off(dev);
  2015. mlx4_en_set_default_moderation(priv);
  2016. err = register_netdev(dev);
  2017. if (err) {
  2018. en_err(priv, "Netdev registration failed for port %d\n", port);
  2019. goto out;
  2020. }
  2021. priv->registered = 1;
  2022. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  2023. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2024. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2025. /* Configure port */
  2026. mlx4_en_calc_rx_buf(dev);
  2027. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2028. priv->rx_skb_size + ETH_FCS_LEN,
  2029. prof->tx_pause, prof->tx_ppp,
  2030. prof->rx_pause, prof->rx_ppp);
  2031. if (err) {
  2032. en_err(priv, "Failed setting port general configurations "
  2033. "for port %d, with error %d\n", priv->port, err);
  2034. goto out;
  2035. }
  2036. /* Init port */
  2037. en_warn(priv, "Initializing port\n");
  2038. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2039. if (err) {
  2040. en_err(priv, "Failed Initializing port\n");
  2041. goto out;
  2042. }
  2043. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2044. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2045. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2046. SERVICE_TASK_DELAY);
  2047. return 0;
  2048. out:
  2049. mlx4_en_destroy_netdev(dev);
  2050. return err;
  2051. }