board-paz00.c 4.4 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-paz00.c
  3. *
  4. * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
  5. *
  6. * Based on board-harmony.c
  7. * Copyright (C) 2010 Google, Inc.
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/clk.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/pda_power.h>
  26. #include <linux/io.h>
  27. #include <linux/i2c.h>
  28. #include <linux/i2c-tegra.h>
  29. #include <linux/platform_data/tegra_usb.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/setup.h>
  34. #include <mach/iomap.h>
  35. #include <mach/irqs.h>
  36. #include <mach/sdhci.h>
  37. #include <mach/usb_phy.h>
  38. #include <mach/gpio.h>
  39. #include "board.h"
  40. #include "board-paz00.h"
  41. #include "clock.h"
  42. #include "devices.h"
  43. #include "gpio-names.h"
  44. static struct plat_serial8250_port debug_uart_platform_data[] = {
  45. {
  46. .membase = IO_ADDRESS(TEGRA_UARTD_BASE),
  47. .mapbase = TEGRA_UARTD_BASE,
  48. .irq = INT_UARTD,
  49. .flags = UPF_BOOT_AUTOCONF,
  50. .iotype = UPIO_MEM,
  51. .regshift = 2,
  52. .uartclk = 216000000,
  53. }, {
  54. .flags = 0
  55. }
  56. };
  57. static struct platform_device debug_uart = {
  58. .name = "serial8250",
  59. .id = PLAT8250_DEV_PLATFORM,
  60. .dev = {
  61. .platform_data = debug_uart_platform_data,
  62. },
  63. };
  64. static struct platform_device *paz00_devices[] __initdata = {
  65. &debug_uart,
  66. &tegra_sdhci_device1,
  67. &tegra_sdhci_device4,
  68. };
  69. static struct tegra_i2c_platform_data paz00_i2c1_platform_data = {
  70. .bus_clk_rate = 400000,
  71. };
  72. static struct tegra_i2c_platform_data paz00_i2c2_platform_data = {
  73. .bus_clk_rate = 400000,
  74. };
  75. static struct tegra_i2c_platform_data paz00_dvc_platform_data = {
  76. .bus_clk_rate = 400000,
  77. };
  78. static void paz00_i2c_init(void)
  79. {
  80. tegra_i2c_device1.dev.platform_data = &paz00_i2c1_platform_data;
  81. tegra_i2c_device2.dev.platform_data = &paz00_i2c2_platform_data;
  82. tegra_i2c_device4.dev.platform_data = &paz00_dvc_platform_data;
  83. platform_device_register(&tegra_i2c_device1);
  84. platform_device_register(&tegra_i2c_device2);
  85. platform_device_register(&tegra_i2c_device4);
  86. }
  87. static struct tegra_ulpi_config ulpi_phy_config = {
  88. .reset_gpio = TEGRA_ULPI_RST,
  89. .clk = "cdev2",
  90. };
  91. static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
  92. [0] = {
  93. .operating_mode = TEGRA_USB_OTG,
  94. .power_down_on_bus_suspend = 1,
  95. },
  96. [1] = {
  97. .phy_config = &ulpi_phy_config,
  98. .operating_mode = TEGRA_USB_HOST,
  99. .power_down_on_bus_suspend = 1,
  100. },
  101. [2] = {
  102. .operating_mode = TEGRA_USB_HOST,
  103. .power_down_on_bus_suspend = 1,
  104. },
  105. };
  106. static void paz00_usb_init(void)
  107. {
  108. tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
  109. tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
  110. platform_device_register(&tegra_ehci2_device);
  111. platform_device_register(&tegra_ehci3_device);
  112. }
  113. static void __init tegra_paz00_fixup(struct machine_desc *desc,
  114. struct tag *tags, char **cmdline, struct meminfo *mi)
  115. {
  116. mi->nr_banks = 1;
  117. mi->bank[0].start = PHYS_OFFSET;
  118. mi->bank[0].size = 448 * SZ_1M;
  119. }
  120. static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
  121. /* name parent rate enabled */
  122. { "uartd", "pll_p", 216000000, true },
  123. { NULL, NULL, 0, 0},
  124. };
  125. static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  126. .cd_gpio = TEGRA_GPIO_SD1_CD,
  127. .wp_gpio = TEGRA_GPIO_SD1_WP,
  128. .power_gpio = TEGRA_GPIO_SD1_POWER,
  129. };
  130. static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  131. .cd_gpio = -1,
  132. .wp_gpio = -1,
  133. .power_gpio = -1,
  134. .is_8bit = 1,
  135. };
  136. static void __init tegra_paz00_init(void)
  137. {
  138. tegra_clk_init_from_table(paz00_clk_init_table);
  139. paz00_pinmux_init();
  140. tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
  141. tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
  142. platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
  143. paz00_i2c_init();
  144. paz00_usb_init();
  145. }
  146. MACHINE_START(PAZ00, "paz00")
  147. .boot_params = 0x00000100,
  148. .fixup = tegra_paz00_fixup,
  149. .map_io = tegra_map_common_io,
  150. .init_early = tegra_init_early,
  151. .init_irq = tegra_init_irq,
  152. .timer = &tegra_timer,
  153. .init_machine = tegra_paz00_init,
  154. MACHINE_END