mxser.c 73 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. */
  20. #include <linux/module.h>
  21. #include <linux/errno.h>
  22. #include <linux/signal.h>
  23. #include <linux/sched.h>
  24. #include <linux/timer.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/tty.h>
  27. #include <linux/tty_flip.h>
  28. #include <linux/serial.h>
  29. #include <linux/serial_reg.h>
  30. #include <linux/major.h>
  31. #include <linux/string.h>
  32. #include <linux/fcntl.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/gfp.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <asm/irq.h>
  43. #include <asm/uaccess.h>
  44. #include "mxser.h"
  45. #define MXSER_VERSION "2.0.4" /* 1.12 */
  46. #define MXSERMAJOR 174
  47. #define MXSERCUMAJOR 175
  48. #define MXSER_BOARDS 4 /* Max. boards */
  49. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  50. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  51. #define MXSER_ISR_PASS_LIMIT 100
  52. #define MXSER_ERR_IOADDR -1
  53. #define MXSER_ERR_IRQ -2
  54. #define MXSER_ERR_IRQ_CONFLIT -3
  55. #define MXSER_ERR_VECTOR -4
  56. /*CheckIsMoxaMust return value*/
  57. #define MOXA_OTHER_UART 0x00
  58. #define MOXA_MUST_MU150_HWID 0x01
  59. #define MOXA_MUST_MU860_HWID 0x02
  60. #define WAKEUP_CHARS 256
  61. #define UART_MCR_AFE 0x20
  62. #define UART_LSR_SPECIAL 0x1E
  63. #define PCI_DEVICE_ID_POS104UL 0x1044
  64. #define PCI_DEVICE_ID_CB108 0x1080
  65. #define PCI_DEVICE_ID_CP102UF 0x1023
  66. #define PCI_DEVICE_ID_CB114 0x1142
  67. #define PCI_DEVICE_ID_CP114UL 0x1143
  68. #define PCI_DEVICE_ID_CB134I 0x1341
  69. #define PCI_DEVICE_ID_CP138U 0x1380
  70. #define C168_ASIC_ID 1
  71. #define C104_ASIC_ID 2
  72. #define C102_ASIC_ID 0xB
  73. #define CI132_ASIC_ID 4
  74. #define CI134_ASIC_ID 3
  75. #define CI104J_ASIC_ID 5
  76. #define MXSER_HIGHBAUD 1
  77. #define MXSER_HAS2 2
  78. /* This is only for PCI */
  79. static const struct {
  80. int type;
  81. int tx_fifo;
  82. int rx_fifo;
  83. int xmit_fifo_size;
  84. int rx_high_water;
  85. int rx_trigger;
  86. int rx_low_water;
  87. long max_baud;
  88. } Gpci_uart_info[] = {
  89. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  90. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  91. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  92. };
  93. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  94. struct mxser_cardinfo {
  95. char *name;
  96. unsigned int nports;
  97. unsigned int flags;
  98. };
  99. static const struct mxser_cardinfo mxser_cards[] = {
  100. /* 0*/ { "C168 series", 8, },
  101. { "C104 series", 4, },
  102. { "CI-104J series", 4, },
  103. { "C168H/PCI series", 8, },
  104. { "C104H/PCI series", 4, },
  105. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  106. { "CI-132 series", 4, MXSER_HAS2 },
  107. { "CI-134 series", 4, },
  108. { "CP-132 series", 2, },
  109. { "CP-114 series", 4, },
  110. /*10*/ { "CT-114 series", 4, },
  111. { "CP-102 series", 2, MXSER_HIGHBAUD },
  112. { "CP-104U series", 4, },
  113. { "CP-168U series", 8, },
  114. { "CP-132U series", 2, },
  115. /*15*/ { "CP-134U series", 4, },
  116. { "CP-104JU series", 4, },
  117. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  118. { "CP-118U series", 8, },
  119. { "CP-102UL series", 2, },
  120. /*20*/ { "CP-102U series", 2, },
  121. { "CP-118EL series", 8, },
  122. { "CP-168EL series", 8, },
  123. { "CP-104EL series", 4, },
  124. { "CB-108 series", 8, },
  125. /*25*/ { "CB-114 series", 4, },
  126. { "CB-134I series", 4, },
  127. { "CP-138U series", 8, },
  128. { "POS-104UL series", 4, },
  129. { "CP-114UL series", 4, },
  130. /*30*/ { "CP-102UF series", 2, }
  131. };
  132. /* driver_data correspond to the lines in the structure above
  133. see also ISA probe function before you change something */
  134. static struct pci_device_id mxser_pcibrds[] = {
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  159. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  160. { }
  161. };
  162. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  163. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  164. static int ttymajor = MXSERMAJOR;
  165. /* Variables for insmod */
  166. MODULE_AUTHOR("Casper Yang");
  167. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  168. module_param_array(ioaddr, int, NULL, 0);
  169. module_param(ttymajor, int, 0);
  170. MODULE_LICENSE("GPL");
  171. struct mxser_log {
  172. int tick;
  173. unsigned long rxcnt[MXSER_PORTS];
  174. unsigned long txcnt[MXSER_PORTS];
  175. };
  176. struct mxser_mon {
  177. unsigned long rxcnt;
  178. unsigned long txcnt;
  179. unsigned long up_rxcnt;
  180. unsigned long up_txcnt;
  181. int modem_status;
  182. unsigned char hold_reason;
  183. };
  184. struct mxser_mon_ext {
  185. unsigned long rx_cnt[32];
  186. unsigned long tx_cnt[32];
  187. unsigned long up_rxcnt[32];
  188. unsigned long up_txcnt[32];
  189. int modem_status[32];
  190. long baudrate[32];
  191. int databits[32];
  192. int stopbits[32];
  193. int parity[32];
  194. int flowctrl[32];
  195. int fifo[32];
  196. int iftype[32];
  197. };
  198. struct mxser_board;
  199. struct mxser_port {
  200. struct tty_port port;
  201. struct mxser_board *board;
  202. unsigned long ioaddr;
  203. unsigned long opmode_ioaddr;
  204. int max_baud;
  205. int rx_high_water;
  206. int rx_trigger; /* Rx fifo trigger level */
  207. int rx_low_water;
  208. int baud_base; /* max. speed */
  209. int type; /* UART type */
  210. int x_char; /* xon/xoff character */
  211. int IER; /* Interrupt Enable Register */
  212. int MCR; /* Modem control register */
  213. unsigned char stop_rx;
  214. unsigned char ldisc_stop_rx;
  215. int custom_divisor;
  216. unsigned char err_shadow;
  217. struct async_icount icount; /* kernel counters for 4 input interrupts */
  218. int timeout;
  219. int read_status_mask;
  220. int ignore_status_mask;
  221. int xmit_fifo_size;
  222. int xmit_head;
  223. int xmit_tail;
  224. int xmit_cnt;
  225. struct ktermios normal_termios;
  226. struct mxser_mon mon_data;
  227. spinlock_t slock;
  228. wait_queue_head_t delta_msr_wait;
  229. };
  230. struct mxser_board {
  231. unsigned int idx;
  232. int irq;
  233. const struct mxser_cardinfo *info;
  234. unsigned long vector;
  235. unsigned long vector_mask;
  236. int chip_flag;
  237. int uart_type;
  238. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  239. };
  240. struct mxser_mstatus {
  241. tcflag_t cflag;
  242. int cts;
  243. int dsr;
  244. int ri;
  245. int dcd;
  246. };
  247. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  248. static int mxserBoardCAP[MXSER_BOARDS] = {
  249. 0, 0, 0, 0
  250. /* 0x180, 0x280, 0x200, 0x320 */
  251. };
  252. static struct mxser_board mxser_boards[MXSER_BOARDS];
  253. static struct tty_driver *mxvar_sdriver;
  254. static struct mxser_log mxvar_log;
  255. static int mxvar_diagflag;
  256. static unsigned char mxser_msr[MXSER_PORTS + 1];
  257. static struct mxser_mon_ext mon_data_ext;
  258. static int mxser_set_baud_method[MXSER_PORTS + 1];
  259. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  260. {
  261. u8 oldlcr;
  262. u8 efr;
  263. oldlcr = inb(baseio + UART_LCR);
  264. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  265. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  266. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  267. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  268. outb(oldlcr, baseio + UART_LCR);
  269. }
  270. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  271. {
  272. u8 oldlcr;
  273. u8 efr;
  274. oldlcr = inb(baseio + UART_LCR);
  275. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  276. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  277. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  278. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  279. outb(oldlcr, baseio + UART_LCR);
  280. }
  281. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  282. {
  283. u8 oldlcr;
  284. u8 efr;
  285. oldlcr = inb(baseio + UART_LCR);
  286. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  287. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  288. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  289. efr |= MOXA_MUST_EFR_BANK0;
  290. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  291. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  292. outb(oldlcr, baseio + UART_LCR);
  293. }
  294. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  295. {
  296. u8 oldlcr;
  297. u8 efr;
  298. oldlcr = inb(baseio + UART_LCR);
  299. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  300. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  301. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  302. efr |= MOXA_MUST_EFR_BANK0;
  303. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  304. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  305. outb(oldlcr, baseio + UART_LCR);
  306. }
  307. static void mxser_set_must_fifo_value(struct mxser_port *info)
  308. {
  309. u8 oldlcr;
  310. u8 efr;
  311. oldlcr = inb(info->ioaddr + UART_LCR);
  312. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  313. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  314. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  315. efr |= MOXA_MUST_EFR_BANK1;
  316. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  317. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  318. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  319. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  320. outb(oldlcr, info->ioaddr + UART_LCR);
  321. }
  322. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  323. {
  324. u8 oldlcr;
  325. u8 efr;
  326. oldlcr = inb(baseio + UART_LCR);
  327. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  328. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  329. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  330. efr |= MOXA_MUST_EFR_BANK2;
  331. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  332. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  333. outb(oldlcr, baseio + UART_LCR);
  334. }
  335. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  336. {
  337. u8 oldlcr;
  338. u8 efr;
  339. oldlcr = inb(baseio + UART_LCR);
  340. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  341. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  342. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  343. efr |= MOXA_MUST_EFR_BANK2;
  344. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  345. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  346. outb(oldlcr, baseio + UART_LCR);
  347. }
  348. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  349. {
  350. u8 oldlcr;
  351. u8 efr;
  352. oldlcr = inb(baseio + UART_LCR);
  353. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  354. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  355. efr &= ~MOXA_MUST_EFR_SF_MASK;
  356. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  357. outb(oldlcr, baseio + UART_LCR);
  358. }
  359. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  360. {
  361. u8 oldlcr;
  362. u8 efr;
  363. oldlcr = inb(baseio + UART_LCR);
  364. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  365. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  366. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  367. efr |= MOXA_MUST_EFR_SF_TX1;
  368. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  369. outb(oldlcr, baseio + UART_LCR);
  370. }
  371. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  372. {
  373. u8 oldlcr;
  374. u8 efr;
  375. oldlcr = inb(baseio + UART_LCR);
  376. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  377. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  378. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  379. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  380. outb(oldlcr, baseio + UART_LCR);
  381. }
  382. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  383. {
  384. u8 oldlcr;
  385. u8 efr;
  386. oldlcr = inb(baseio + UART_LCR);
  387. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  388. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  389. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  390. efr |= MOXA_MUST_EFR_SF_RX1;
  391. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  392. outb(oldlcr, baseio + UART_LCR);
  393. }
  394. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  395. {
  396. u8 oldlcr;
  397. u8 efr;
  398. oldlcr = inb(baseio + UART_LCR);
  399. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  400. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  401. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  402. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  403. outb(oldlcr, baseio + UART_LCR);
  404. }
  405. #ifdef CONFIG_PCI
  406. static int __devinit CheckIsMoxaMust(unsigned long io)
  407. {
  408. u8 oldmcr, hwid;
  409. int i;
  410. outb(0, io + UART_LCR);
  411. mxser_disable_must_enchance_mode(io);
  412. oldmcr = inb(io + UART_MCR);
  413. outb(0, io + UART_MCR);
  414. mxser_set_must_xon1_value(io, 0x11);
  415. if ((hwid = inb(io + UART_MCR)) != 0) {
  416. outb(oldmcr, io + UART_MCR);
  417. return MOXA_OTHER_UART;
  418. }
  419. mxser_get_must_hardware_id(io, &hwid);
  420. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  421. if (hwid == Gpci_uart_info[i].type)
  422. return (int)hwid;
  423. }
  424. return MOXA_OTHER_UART;
  425. }
  426. #endif
  427. static void process_txrx_fifo(struct mxser_port *info)
  428. {
  429. int i;
  430. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  431. info->rx_trigger = 1;
  432. info->rx_high_water = 1;
  433. info->rx_low_water = 1;
  434. info->xmit_fifo_size = 1;
  435. } else
  436. for (i = 0; i < UART_INFO_NUM; i++)
  437. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  438. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  439. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  440. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  441. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  442. break;
  443. }
  444. }
  445. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  446. {
  447. unsigned char status = 0;
  448. status = inb(baseaddr + UART_MSR);
  449. mxser_msr[port] &= 0x0F;
  450. mxser_msr[port] |= status;
  451. status = mxser_msr[port];
  452. if (mode)
  453. mxser_msr[port] = 0;
  454. return status;
  455. }
  456. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  457. struct mxser_port *port)
  458. {
  459. DECLARE_WAITQUEUE(wait, current);
  460. int retval;
  461. int do_clocal = 0;
  462. unsigned long flags;
  463. /*
  464. * If non-blocking mode is set, or the port is not enabled,
  465. * then make the check up front and then exit.
  466. */
  467. if ((filp->f_flags & O_NONBLOCK) ||
  468. test_bit(TTY_IO_ERROR, &tty->flags)) {
  469. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  470. return 0;
  471. }
  472. if (tty->termios->c_cflag & CLOCAL)
  473. do_clocal = 1;
  474. /*
  475. * Block waiting for the carrier detect and the line to become
  476. * free (i.e., not in use by the callout). While we are in
  477. * this loop, port->port.count is dropped by one, so that
  478. * mxser_close() knows when to free things. We restore it upon
  479. * exit, either normal or abnormal.
  480. */
  481. retval = 0;
  482. add_wait_queue(&port->port.open_wait, &wait);
  483. spin_lock_irqsave(&port->slock, flags);
  484. if (!tty_hung_up_p(filp))
  485. port->port.count--;
  486. spin_unlock_irqrestore(&port->slock, flags);
  487. port->port.blocked_open++;
  488. while (1) {
  489. spin_lock_irqsave(&port->slock, flags);
  490. outb(inb(port->ioaddr + UART_MCR) |
  491. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  492. spin_unlock_irqrestore(&port->slock, flags);
  493. set_current_state(TASK_INTERRUPTIBLE);
  494. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  495. if (port->port.flags & ASYNC_HUP_NOTIFY)
  496. retval = -EAGAIN;
  497. else
  498. retval = -ERESTARTSYS;
  499. break;
  500. }
  501. if (!(port->port.flags & ASYNC_CLOSING) &&
  502. (do_clocal ||
  503. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  504. break;
  505. if (signal_pending(current)) {
  506. retval = -ERESTARTSYS;
  507. break;
  508. }
  509. schedule();
  510. }
  511. set_current_state(TASK_RUNNING);
  512. remove_wait_queue(&port->port.open_wait, &wait);
  513. if (!tty_hung_up_p(filp))
  514. port->port.count++;
  515. port->port.blocked_open--;
  516. if (retval)
  517. return retval;
  518. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  519. return 0;
  520. }
  521. static int mxser_set_baud(struct mxser_port *info, long newspd)
  522. {
  523. int quot = 0, baud;
  524. unsigned char cval;
  525. if (!info->port.tty || !info->port.tty->termios)
  526. return -1;
  527. if (!(info->ioaddr))
  528. return -1;
  529. if (newspd > info->max_baud)
  530. return -1;
  531. if (newspd == 134) {
  532. quot = 2 * info->baud_base / 269;
  533. tty_encode_baud_rate(info->port.tty, 134, 134);
  534. } else if (newspd) {
  535. quot = info->baud_base / newspd;
  536. if (quot == 0)
  537. quot = 1;
  538. baud = info->baud_base/quot;
  539. tty_encode_baud_rate(info->port.tty, baud, baud);
  540. } else {
  541. quot = 0;
  542. }
  543. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  544. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  545. if (quot) {
  546. info->MCR |= UART_MCR_DTR;
  547. outb(info->MCR, info->ioaddr + UART_MCR);
  548. } else {
  549. info->MCR &= ~UART_MCR_DTR;
  550. outb(info->MCR, info->ioaddr + UART_MCR);
  551. return 0;
  552. }
  553. cval = inb(info->ioaddr + UART_LCR);
  554. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  555. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  556. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  557. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  558. #ifdef BOTHER
  559. if (C_BAUD(info->port.tty) == BOTHER) {
  560. quot = info->baud_base % newspd;
  561. quot *= 8;
  562. if (quot % newspd > newspd / 2) {
  563. quot /= newspd;
  564. quot++;
  565. } else
  566. quot /= newspd;
  567. mxser_set_must_enum_value(info->ioaddr, quot);
  568. } else
  569. #endif
  570. mxser_set_must_enum_value(info->ioaddr, 0);
  571. return 0;
  572. }
  573. /*
  574. * This routine is called to set the UART divisor registers to match
  575. * the specified baud rate for a serial port.
  576. */
  577. static int mxser_change_speed(struct mxser_port *info,
  578. struct ktermios *old_termios)
  579. {
  580. unsigned cflag, cval, fcr;
  581. int ret = 0;
  582. unsigned char status;
  583. if (!info->port.tty || !info->port.tty->termios)
  584. return ret;
  585. cflag = info->port.tty->termios->c_cflag;
  586. if (!(info->ioaddr))
  587. return ret;
  588. if (mxser_set_baud_method[info->port.tty->index] == 0)
  589. mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
  590. /* byte size and parity */
  591. switch (cflag & CSIZE) {
  592. case CS5:
  593. cval = 0x00;
  594. break;
  595. case CS6:
  596. cval = 0x01;
  597. break;
  598. case CS7:
  599. cval = 0x02;
  600. break;
  601. case CS8:
  602. cval = 0x03;
  603. break;
  604. default:
  605. cval = 0x00;
  606. break; /* too keep GCC shut... */
  607. }
  608. if (cflag & CSTOPB)
  609. cval |= 0x04;
  610. if (cflag & PARENB)
  611. cval |= UART_LCR_PARITY;
  612. if (!(cflag & PARODD))
  613. cval |= UART_LCR_EPAR;
  614. if (cflag & CMSPAR)
  615. cval |= UART_LCR_SPAR;
  616. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  617. if (info->board->chip_flag) {
  618. fcr = UART_FCR_ENABLE_FIFO;
  619. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  620. mxser_set_must_fifo_value(info);
  621. } else
  622. fcr = 0;
  623. } else {
  624. fcr = UART_FCR_ENABLE_FIFO;
  625. if (info->board->chip_flag) {
  626. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  627. mxser_set_must_fifo_value(info);
  628. } else {
  629. switch (info->rx_trigger) {
  630. case 1:
  631. fcr |= UART_FCR_TRIGGER_1;
  632. break;
  633. case 4:
  634. fcr |= UART_FCR_TRIGGER_4;
  635. break;
  636. case 8:
  637. fcr |= UART_FCR_TRIGGER_8;
  638. break;
  639. default:
  640. fcr |= UART_FCR_TRIGGER_14;
  641. break;
  642. }
  643. }
  644. }
  645. /* CTS flow control flag and modem status interrupts */
  646. info->IER &= ~UART_IER_MSI;
  647. info->MCR &= ~UART_MCR_AFE;
  648. if (cflag & CRTSCTS) {
  649. info->port.flags |= ASYNC_CTS_FLOW;
  650. info->IER |= UART_IER_MSI;
  651. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  652. info->MCR |= UART_MCR_AFE;
  653. } else {
  654. status = inb(info->ioaddr + UART_MSR);
  655. if (info->port.tty->hw_stopped) {
  656. if (status & UART_MSR_CTS) {
  657. info->port.tty->hw_stopped = 0;
  658. if (info->type != PORT_16550A &&
  659. !info->board->chip_flag) {
  660. outb(info->IER & ~UART_IER_THRI,
  661. info->ioaddr +
  662. UART_IER);
  663. info->IER |= UART_IER_THRI;
  664. outb(info->IER, info->ioaddr +
  665. UART_IER);
  666. }
  667. tty_wakeup(info->port.tty);
  668. }
  669. } else {
  670. if (!(status & UART_MSR_CTS)) {
  671. info->port.tty->hw_stopped = 1;
  672. if ((info->type != PORT_16550A) &&
  673. (!info->board->chip_flag)) {
  674. info->IER &= ~UART_IER_THRI;
  675. outb(info->IER, info->ioaddr +
  676. UART_IER);
  677. }
  678. }
  679. }
  680. }
  681. } else {
  682. info->port.flags &= ~ASYNC_CTS_FLOW;
  683. }
  684. outb(info->MCR, info->ioaddr + UART_MCR);
  685. if (cflag & CLOCAL) {
  686. info->port.flags &= ~ASYNC_CHECK_CD;
  687. } else {
  688. info->port.flags |= ASYNC_CHECK_CD;
  689. info->IER |= UART_IER_MSI;
  690. }
  691. outb(info->IER, info->ioaddr + UART_IER);
  692. /*
  693. * Set up parity check flag
  694. */
  695. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  696. if (I_INPCK(info->port.tty))
  697. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  698. if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
  699. info->read_status_mask |= UART_LSR_BI;
  700. info->ignore_status_mask = 0;
  701. if (I_IGNBRK(info->port.tty)) {
  702. info->ignore_status_mask |= UART_LSR_BI;
  703. info->read_status_mask |= UART_LSR_BI;
  704. /*
  705. * If we're ignore parity and break indicators, ignore
  706. * overruns too. (For real raw support).
  707. */
  708. if (I_IGNPAR(info->port.tty)) {
  709. info->ignore_status_mask |=
  710. UART_LSR_OE |
  711. UART_LSR_PE |
  712. UART_LSR_FE;
  713. info->read_status_mask |=
  714. UART_LSR_OE |
  715. UART_LSR_PE |
  716. UART_LSR_FE;
  717. }
  718. }
  719. if (info->board->chip_flag) {
  720. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
  721. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
  722. if (I_IXON(info->port.tty)) {
  723. mxser_enable_must_rx_software_flow_control(
  724. info->ioaddr);
  725. } else {
  726. mxser_disable_must_rx_software_flow_control(
  727. info->ioaddr);
  728. }
  729. if (I_IXOFF(info->port.tty)) {
  730. mxser_enable_must_tx_software_flow_control(
  731. info->ioaddr);
  732. } else {
  733. mxser_disable_must_tx_software_flow_control(
  734. info->ioaddr);
  735. }
  736. }
  737. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  738. outb(cval, info->ioaddr + UART_LCR);
  739. return ret;
  740. }
  741. static void mxser_check_modem_status(struct mxser_port *port, int status)
  742. {
  743. /* update input line counters */
  744. if (status & UART_MSR_TERI)
  745. port->icount.rng++;
  746. if (status & UART_MSR_DDSR)
  747. port->icount.dsr++;
  748. if (status & UART_MSR_DDCD)
  749. port->icount.dcd++;
  750. if (status & UART_MSR_DCTS)
  751. port->icount.cts++;
  752. port->mon_data.modem_status = status;
  753. wake_up_interruptible(&port->delta_msr_wait);
  754. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  755. if (status & UART_MSR_DCD)
  756. wake_up_interruptible(&port->port.open_wait);
  757. }
  758. if (port->port.flags & ASYNC_CTS_FLOW) {
  759. if (port->port.tty->hw_stopped) {
  760. if (status & UART_MSR_CTS) {
  761. port->port.tty->hw_stopped = 0;
  762. if ((port->type != PORT_16550A) &&
  763. (!port->board->chip_flag)) {
  764. outb(port->IER & ~UART_IER_THRI,
  765. port->ioaddr + UART_IER);
  766. port->IER |= UART_IER_THRI;
  767. outb(port->IER, port->ioaddr +
  768. UART_IER);
  769. }
  770. tty_wakeup(port->port.tty);
  771. }
  772. } else {
  773. if (!(status & UART_MSR_CTS)) {
  774. port->port.tty->hw_stopped = 1;
  775. if (port->type != PORT_16550A &&
  776. !port->board->chip_flag) {
  777. port->IER &= ~UART_IER_THRI;
  778. outb(port->IER, port->ioaddr +
  779. UART_IER);
  780. }
  781. }
  782. }
  783. }
  784. }
  785. static int mxser_startup(struct mxser_port *info)
  786. {
  787. unsigned long page;
  788. unsigned long flags;
  789. page = __get_free_page(GFP_KERNEL);
  790. if (!page)
  791. return -ENOMEM;
  792. spin_lock_irqsave(&info->slock, flags);
  793. if (info->port.flags & ASYNC_INITIALIZED) {
  794. free_page(page);
  795. spin_unlock_irqrestore(&info->slock, flags);
  796. return 0;
  797. }
  798. if (!info->ioaddr || !info->type) {
  799. if (info->port.tty)
  800. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  801. free_page(page);
  802. spin_unlock_irqrestore(&info->slock, flags);
  803. return 0;
  804. }
  805. if (info->port.xmit_buf)
  806. free_page(page);
  807. else
  808. info->port.xmit_buf = (unsigned char *) page;
  809. /*
  810. * Clear the FIFO buffers and disable them
  811. * (they will be reenabled in mxser_change_speed())
  812. */
  813. if (info->board->chip_flag)
  814. outb((UART_FCR_CLEAR_RCVR |
  815. UART_FCR_CLEAR_XMIT |
  816. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  817. else
  818. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  819. info->ioaddr + UART_FCR);
  820. /*
  821. * At this point there's no way the LSR could still be 0xFF;
  822. * if it is, then bail out, because there's likely no UART
  823. * here.
  824. */
  825. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  826. spin_unlock_irqrestore(&info->slock, flags);
  827. if (capable(CAP_SYS_ADMIN)) {
  828. if (info->port.tty)
  829. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  830. return 0;
  831. } else
  832. return -ENODEV;
  833. }
  834. /*
  835. * Clear the interrupt registers.
  836. */
  837. (void) inb(info->ioaddr + UART_LSR);
  838. (void) inb(info->ioaddr + UART_RX);
  839. (void) inb(info->ioaddr + UART_IIR);
  840. (void) inb(info->ioaddr + UART_MSR);
  841. /*
  842. * Now, initialize the UART
  843. */
  844. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  845. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  846. outb(info->MCR, info->ioaddr + UART_MCR);
  847. /*
  848. * Finally, enable interrupts
  849. */
  850. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  851. if (info->board->chip_flag)
  852. info->IER |= MOXA_MUST_IER_EGDAI;
  853. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  854. /*
  855. * And clear the interrupt registers again for luck.
  856. */
  857. (void) inb(info->ioaddr + UART_LSR);
  858. (void) inb(info->ioaddr + UART_RX);
  859. (void) inb(info->ioaddr + UART_IIR);
  860. (void) inb(info->ioaddr + UART_MSR);
  861. if (info->port.tty)
  862. clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
  863. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  864. /*
  865. * and set the speed of the serial port
  866. */
  867. mxser_change_speed(info, NULL);
  868. info->port.flags |= ASYNC_INITIALIZED;
  869. spin_unlock_irqrestore(&info->slock, flags);
  870. return 0;
  871. }
  872. /*
  873. * This routine will shutdown a serial port; interrupts maybe disabled, and
  874. * DTR is dropped if the hangup on close termio flag is on.
  875. */
  876. static void mxser_shutdown(struct mxser_port *info)
  877. {
  878. unsigned long flags;
  879. if (!(info->port.flags & ASYNC_INITIALIZED))
  880. return;
  881. spin_lock_irqsave(&info->slock, flags);
  882. /*
  883. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  884. * here so the queue might never be waken up
  885. */
  886. wake_up_interruptible(&info->delta_msr_wait);
  887. /*
  888. * Free the IRQ, if necessary
  889. */
  890. if (info->port.xmit_buf) {
  891. free_page((unsigned long) info->port.xmit_buf);
  892. info->port.xmit_buf = NULL;
  893. }
  894. info->IER = 0;
  895. outb(0x00, info->ioaddr + UART_IER);
  896. if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
  897. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  898. outb(info->MCR, info->ioaddr + UART_MCR);
  899. /* clear Rx/Tx FIFO's */
  900. if (info->board->chip_flag)
  901. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  902. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  903. info->ioaddr + UART_FCR);
  904. else
  905. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  906. info->ioaddr + UART_FCR);
  907. /* read data port to reset things */
  908. (void) inb(info->ioaddr + UART_RX);
  909. if (info->port.tty)
  910. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  911. info->port.flags &= ~ASYNC_INITIALIZED;
  912. if (info->board->chip_flag)
  913. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  914. spin_unlock_irqrestore(&info->slock, flags);
  915. }
  916. /*
  917. * This routine is called whenever a serial port is opened. It
  918. * enables interrupts for a serial port, linking in its async structure into
  919. * the IRQ chain. It also performs the serial-specific
  920. * initialization for the tty structure.
  921. */
  922. static int mxser_open(struct tty_struct *tty, struct file *filp)
  923. {
  924. struct mxser_port *info;
  925. unsigned long flags;
  926. int retval, line;
  927. line = tty->index;
  928. if (line == MXSER_PORTS)
  929. return 0;
  930. if (line < 0 || line > MXSER_PORTS)
  931. return -ENODEV;
  932. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  933. if (!info->ioaddr)
  934. return -ENODEV;
  935. tty->driver_data = info;
  936. info->port.tty = tty;
  937. /*
  938. * Start up serial port
  939. */
  940. spin_lock_irqsave(&info->slock, flags);
  941. info->port.count++;
  942. spin_unlock_irqrestore(&info->slock, flags);
  943. retval = mxser_startup(info);
  944. if (retval)
  945. return retval;
  946. retval = mxser_block_til_ready(tty, filp, info);
  947. if (retval)
  948. return retval;
  949. /* unmark here for very high baud rate (ex. 921600 bps) used */
  950. tty->low_latency = 1;
  951. return 0;
  952. }
  953. static void mxser_flush_buffer(struct tty_struct *tty)
  954. {
  955. struct mxser_port *info = tty->driver_data;
  956. char fcr;
  957. unsigned long flags;
  958. spin_lock_irqsave(&info->slock, flags);
  959. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  960. fcr = inb(info->ioaddr + UART_FCR);
  961. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  962. info->ioaddr + UART_FCR);
  963. outb(fcr, info->ioaddr + UART_FCR);
  964. spin_unlock_irqrestore(&info->slock, flags);
  965. tty_wakeup(tty);
  966. }
  967. /*
  968. * This routine is called when the serial port gets closed. First, we
  969. * wait for the last remaining data to be sent. Then, we unlink its
  970. * async structure from the interrupt chain if necessary, and we free
  971. * that IRQ if nothing is left in the chain.
  972. */
  973. static void mxser_close(struct tty_struct *tty, struct file *filp)
  974. {
  975. struct mxser_port *info = tty->driver_data;
  976. unsigned long timeout;
  977. unsigned long flags;
  978. if (tty->index == MXSER_PORTS)
  979. return;
  980. if (!info)
  981. return;
  982. spin_lock_irqsave(&info->slock, flags);
  983. if (tty_hung_up_p(filp)) {
  984. spin_unlock_irqrestore(&info->slock, flags);
  985. return;
  986. }
  987. if ((tty->count == 1) && (info->port.count != 1)) {
  988. /*
  989. * Uh, oh. tty->count is 1, which means that the tty
  990. * structure will be freed. Info->port.count should always
  991. * be one in these conditions. If it's greater than
  992. * one, we've got real problems, since it means the
  993. * serial port won't be shutdown.
  994. */
  995. printk(KERN_ERR "mxser_close: bad serial port count; "
  996. "tty->count is 1, info->port.count is %d\n", info->port.count);
  997. info->port.count = 1;
  998. }
  999. if (--info->port.count < 0) {
  1000. printk(KERN_ERR "mxser_close: bad serial port count for "
  1001. "ttys%d: %d\n", tty->index, info->port.count);
  1002. info->port.count = 0;
  1003. }
  1004. if (info->port.count) {
  1005. spin_unlock_irqrestore(&info->slock, flags);
  1006. return;
  1007. }
  1008. info->port.flags |= ASYNC_CLOSING;
  1009. spin_unlock_irqrestore(&info->slock, flags);
  1010. /*
  1011. * Save the termios structure, since this port may have
  1012. * separate termios for callout and dialin.
  1013. */
  1014. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1015. info->normal_termios = *tty->termios;
  1016. /*
  1017. * Now we wait for the transmit buffer to clear; and we notify
  1018. * the line discipline to only process XON/XOFF characters.
  1019. */
  1020. tty->closing = 1;
  1021. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1022. tty_wait_until_sent(tty, info->port.closing_wait);
  1023. /*
  1024. * At this point we stop accepting input. To do this, we
  1025. * disable the receive line status interrupts, and tell the
  1026. * interrupt driver to stop checking the data ready bit in the
  1027. * line status register.
  1028. */
  1029. info->IER &= ~UART_IER_RLSI;
  1030. if (info->board->chip_flag)
  1031. info->IER &= ~MOXA_MUST_RECV_ISR;
  1032. if (info->port.flags & ASYNC_INITIALIZED) {
  1033. outb(info->IER, info->ioaddr + UART_IER);
  1034. /*
  1035. * Before we drop DTR, make sure the UART transmitter
  1036. * has completely drained; this is especially
  1037. * important if there is a transmit FIFO!
  1038. */
  1039. timeout = jiffies + HZ;
  1040. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1041. schedule_timeout_interruptible(5);
  1042. if (time_after(jiffies, timeout))
  1043. break;
  1044. }
  1045. }
  1046. mxser_shutdown(info);
  1047. mxser_flush_buffer(tty);
  1048. tty_ldisc_flush(tty);
  1049. tty->closing = 0;
  1050. info->port.tty = NULL;
  1051. if (info->port.blocked_open) {
  1052. if (info->port.close_delay)
  1053. schedule_timeout_interruptible(info->port.close_delay);
  1054. wake_up_interruptible(&info->port.open_wait);
  1055. }
  1056. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1057. }
  1058. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1059. {
  1060. int c, total = 0;
  1061. struct mxser_port *info = tty->driver_data;
  1062. unsigned long flags;
  1063. if (!info->port.xmit_buf)
  1064. return 0;
  1065. while (1) {
  1066. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1067. SERIAL_XMIT_SIZE - info->xmit_head));
  1068. if (c <= 0)
  1069. break;
  1070. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1071. spin_lock_irqsave(&info->slock, flags);
  1072. info->xmit_head = (info->xmit_head + c) &
  1073. (SERIAL_XMIT_SIZE - 1);
  1074. info->xmit_cnt += c;
  1075. spin_unlock_irqrestore(&info->slock, flags);
  1076. buf += c;
  1077. count -= c;
  1078. total += c;
  1079. }
  1080. if (info->xmit_cnt && !tty->stopped) {
  1081. if (!tty->hw_stopped ||
  1082. (info->type == PORT_16550A) ||
  1083. (info->board->chip_flag)) {
  1084. spin_lock_irqsave(&info->slock, flags);
  1085. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1086. UART_IER);
  1087. info->IER |= UART_IER_THRI;
  1088. outb(info->IER, info->ioaddr + UART_IER);
  1089. spin_unlock_irqrestore(&info->slock, flags);
  1090. }
  1091. }
  1092. return total;
  1093. }
  1094. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1095. {
  1096. struct mxser_port *info = tty->driver_data;
  1097. unsigned long flags;
  1098. if (!info->port.xmit_buf)
  1099. return 0;
  1100. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1101. return 0;
  1102. spin_lock_irqsave(&info->slock, flags);
  1103. info->port.xmit_buf[info->xmit_head++] = ch;
  1104. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1105. info->xmit_cnt++;
  1106. spin_unlock_irqrestore(&info->slock, flags);
  1107. if (!tty->stopped) {
  1108. if (!tty->hw_stopped ||
  1109. (info->type == PORT_16550A) ||
  1110. info->board->chip_flag) {
  1111. spin_lock_irqsave(&info->slock, flags);
  1112. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1113. info->IER |= UART_IER_THRI;
  1114. outb(info->IER, info->ioaddr + UART_IER);
  1115. spin_unlock_irqrestore(&info->slock, flags);
  1116. }
  1117. }
  1118. return 1;
  1119. }
  1120. static void mxser_flush_chars(struct tty_struct *tty)
  1121. {
  1122. struct mxser_port *info = tty->driver_data;
  1123. unsigned long flags;
  1124. if (info->xmit_cnt <= 0 ||
  1125. tty->stopped ||
  1126. !info->port.xmit_buf ||
  1127. (tty->hw_stopped &&
  1128. (info->type != PORT_16550A) &&
  1129. (!info->board->chip_flag)
  1130. ))
  1131. return;
  1132. spin_lock_irqsave(&info->slock, flags);
  1133. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1134. info->IER |= UART_IER_THRI;
  1135. outb(info->IER, info->ioaddr + UART_IER);
  1136. spin_unlock_irqrestore(&info->slock, flags);
  1137. }
  1138. static int mxser_write_room(struct tty_struct *tty)
  1139. {
  1140. struct mxser_port *info = tty->driver_data;
  1141. int ret;
  1142. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1143. if (ret < 0)
  1144. ret = 0;
  1145. return ret;
  1146. }
  1147. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1148. {
  1149. struct mxser_port *info = tty->driver_data;
  1150. return info->xmit_cnt;
  1151. }
  1152. /*
  1153. * ------------------------------------------------------------
  1154. * friends of mxser_ioctl()
  1155. * ------------------------------------------------------------
  1156. */
  1157. static int mxser_get_serial_info(struct mxser_port *info,
  1158. struct serial_struct __user *retinfo)
  1159. {
  1160. struct serial_struct tmp = {
  1161. .type = info->type,
  1162. .line = info->port.tty->index,
  1163. .port = info->ioaddr,
  1164. .irq = info->board->irq,
  1165. .flags = info->port.flags,
  1166. .baud_base = info->baud_base,
  1167. .close_delay = info->port.close_delay,
  1168. .closing_wait = info->port.closing_wait,
  1169. .custom_divisor = info->custom_divisor,
  1170. .hub6 = 0
  1171. };
  1172. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1173. return -EFAULT;
  1174. return 0;
  1175. }
  1176. static int mxser_set_serial_info(struct mxser_port *info,
  1177. struct serial_struct __user *new_info)
  1178. {
  1179. struct serial_struct new_serial;
  1180. speed_t baud;
  1181. unsigned long sl_flags;
  1182. unsigned int flags;
  1183. int retval = 0;
  1184. if (!new_info || !info->ioaddr)
  1185. return -ENODEV;
  1186. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1187. return -EFAULT;
  1188. if (new_serial.irq != info->board->irq ||
  1189. new_serial.port != info->ioaddr)
  1190. return -EINVAL;
  1191. flags = info->port.flags & ASYNC_SPD_MASK;
  1192. if (!capable(CAP_SYS_ADMIN)) {
  1193. if ((new_serial.baud_base != info->baud_base) ||
  1194. (new_serial.close_delay != info->port.close_delay) ||
  1195. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1196. return -EPERM;
  1197. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1198. (new_serial.flags & ASYNC_USR_MASK));
  1199. } else {
  1200. /*
  1201. * OK, past this point, all the error checking has been done.
  1202. * At this point, we start making changes.....
  1203. */
  1204. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1205. (new_serial.flags & ASYNC_FLAGS));
  1206. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1207. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1208. info->port.tty->low_latency =
  1209. (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1210. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1211. (new_serial.baud_base != info->baud_base ||
  1212. new_serial.custom_divisor !=
  1213. info->custom_divisor)) {
  1214. baud = new_serial.baud_base / new_serial.custom_divisor;
  1215. tty_encode_baud_rate(info->port.tty, baud, baud);
  1216. }
  1217. }
  1218. info->type = new_serial.type;
  1219. process_txrx_fifo(info);
  1220. if (info->port.flags & ASYNC_INITIALIZED) {
  1221. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1222. spin_lock_irqsave(&info->slock, sl_flags);
  1223. mxser_change_speed(info, NULL);
  1224. spin_unlock_irqrestore(&info->slock, sl_flags);
  1225. }
  1226. } else
  1227. retval = mxser_startup(info);
  1228. return retval;
  1229. }
  1230. /*
  1231. * mxser_get_lsr_info - get line status register info
  1232. *
  1233. * Purpose: Let user call ioctl() to get info when the UART physically
  1234. * is emptied. On bus types like RS485, the transmitter must
  1235. * release the bus after transmitting. This must be done when
  1236. * the transmit shift register is empty, not be done when the
  1237. * transmit holding register is empty. This functionality
  1238. * allows an RS485 driver to be written in user space.
  1239. */
  1240. static int mxser_get_lsr_info(struct mxser_port *info,
  1241. unsigned int __user *value)
  1242. {
  1243. unsigned char status;
  1244. unsigned int result;
  1245. unsigned long flags;
  1246. spin_lock_irqsave(&info->slock, flags);
  1247. status = inb(info->ioaddr + UART_LSR);
  1248. spin_unlock_irqrestore(&info->slock, flags);
  1249. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1250. return put_user(result, value);
  1251. }
  1252. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1253. {
  1254. struct mxser_port *info = tty->driver_data;
  1255. unsigned char control, status;
  1256. unsigned long flags;
  1257. if (tty->index == MXSER_PORTS)
  1258. return -ENOIOCTLCMD;
  1259. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1260. return -EIO;
  1261. control = info->MCR;
  1262. spin_lock_irqsave(&info->slock, flags);
  1263. status = inb(info->ioaddr + UART_MSR);
  1264. if (status & UART_MSR_ANY_DELTA)
  1265. mxser_check_modem_status(info, status);
  1266. spin_unlock_irqrestore(&info->slock, flags);
  1267. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1268. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1269. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1270. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1271. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1272. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1273. }
  1274. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1275. unsigned int set, unsigned int clear)
  1276. {
  1277. struct mxser_port *info = tty->driver_data;
  1278. unsigned long flags;
  1279. if (tty->index == MXSER_PORTS)
  1280. return -ENOIOCTLCMD;
  1281. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1282. return -EIO;
  1283. spin_lock_irqsave(&info->slock, flags);
  1284. if (set & TIOCM_RTS)
  1285. info->MCR |= UART_MCR_RTS;
  1286. if (set & TIOCM_DTR)
  1287. info->MCR |= UART_MCR_DTR;
  1288. if (clear & TIOCM_RTS)
  1289. info->MCR &= ~UART_MCR_RTS;
  1290. if (clear & TIOCM_DTR)
  1291. info->MCR &= ~UART_MCR_DTR;
  1292. outb(info->MCR, info->ioaddr + UART_MCR);
  1293. spin_unlock_irqrestore(&info->slock, flags);
  1294. return 0;
  1295. }
  1296. static int __init mxser_program_mode(int port)
  1297. {
  1298. int id, i, j, n;
  1299. outb(0, port);
  1300. outb(0, port);
  1301. outb(0, port);
  1302. (void)inb(port);
  1303. (void)inb(port);
  1304. outb(0, port);
  1305. (void)inb(port);
  1306. id = inb(port + 1) & 0x1F;
  1307. if ((id != C168_ASIC_ID) &&
  1308. (id != C104_ASIC_ID) &&
  1309. (id != C102_ASIC_ID) &&
  1310. (id != CI132_ASIC_ID) &&
  1311. (id != CI134_ASIC_ID) &&
  1312. (id != CI104J_ASIC_ID))
  1313. return -1;
  1314. for (i = 0, j = 0; i < 4; i++) {
  1315. n = inb(port + 2);
  1316. if (n == 'M') {
  1317. j = 1;
  1318. } else if ((j == 1) && (n == 1)) {
  1319. j = 2;
  1320. break;
  1321. } else
  1322. j = 0;
  1323. }
  1324. if (j != 2)
  1325. id = -2;
  1326. return id;
  1327. }
  1328. static void __init mxser_normal_mode(int port)
  1329. {
  1330. int i, n;
  1331. outb(0xA5, port + 1);
  1332. outb(0x80, port + 3);
  1333. outb(12, port + 0); /* 9600 bps */
  1334. outb(0, port + 1);
  1335. outb(0x03, port + 3); /* 8 data bits */
  1336. outb(0x13, port + 4); /* loop back mode */
  1337. for (i = 0; i < 16; i++) {
  1338. n = inb(port + 5);
  1339. if ((n & 0x61) == 0x60)
  1340. break;
  1341. if ((n & 1) == 1)
  1342. (void)inb(port);
  1343. }
  1344. outb(0x00, port + 4);
  1345. }
  1346. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1347. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1348. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1349. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1350. #define EN_CCMD 0x000 /* Chip's command register */
  1351. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1352. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1353. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1354. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1355. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1356. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1357. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1358. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1359. static int __init mxser_read_register(int port, unsigned short *regs)
  1360. {
  1361. int i, k, value, id;
  1362. unsigned int j;
  1363. id = mxser_program_mode(port);
  1364. if (id < 0)
  1365. return id;
  1366. for (i = 0; i < 14; i++) {
  1367. k = (i & 0x3F) | 0x180;
  1368. for (j = 0x100; j > 0; j >>= 1) {
  1369. outb(CHIP_CS, port);
  1370. if (k & j) {
  1371. outb(CHIP_CS | CHIP_DO, port);
  1372. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1373. } else {
  1374. outb(CHIP_CS, port);
  1375. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1376. }
  1377. }
  1378. (void)inb(port);
  1379. value = 0;
  1380. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1381. outb(CHIP_CS, port);
  1382. outb(CHIP_CS | CHIP_SK, port);
  1383. if (inb(port) & CHIP_DI)
  1384. value |= j;
  1385. }
  1386. regs[i] = value;
  1387. outb(0, port);
  1388. }
  1389. mxser_normal_mode(port);
  1390. return id;
  1391. }
  1392. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1393. {
  1394. struct mxser_port *port;
  1395. int result, status;
  1396. unsigned int i, j;
  1397. int ret = 0;
  1398. switch (cmd) {
  1399. case MOXA_GET_MAJOR:
  1400. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl %x, fix "
  1401. "your userspace\n", current->comm, cmd);
  1402. return put_user(ttymajor, (int __user *)argp);
  1403. case MOXA_CHKPORTENABLE:
  1404. result = 0;
  1405. lock_kernel();
  1406. for (i = 0; i < MXSER_BOARDS; i++)
  1407. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1408. if (mxser_boards[i].ports[j].ioaddr)
  1409. result |= (1 << i);
  1410. unlock_kernel();
  1411. return put_user(result, (unsigned long __user *)argp);
  1412. case MOXA_GETDATACOUNT:
  1413. lock_kernel();
  1414. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1415. ret = -EFAULT;
  1416. unlock_kernel();
  1417. return ret;
  1418. case MOXA_GETMSTATUS:
  1419. lock_kernel();
  1420. for (i = 0; i < MXSER_BOARDS; i++)
  1421. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1422. port = &mxser_boards[i].ports[j];
  1423. GMStatus[i].ri = 0;
  1424. if (!port->ioaddr) {
  1425. GMStatus[i].dcd = 0;
  1426. GMStatus[i].dsr = 0;
  1427. GMStatus[i].cts = 0;
  1428. continue;
  1429. }
  1430. if (!port->port.tty || !port->port.tty->termios)
  1431. GMStatus[i].cflag =
  1432. port->normal_termios.c_cflag;
  1433. else
  1434. GMStatus[i].cflag =
  1435. port->port.tty->termios->c_cflag;
  1436. status = inb(port->ioaddr + UART_MSR);
  1437. if (status & 0x80 /*UART_MSR_DCD */ )
  1438. GMStatus[i].dcd = 1;
  1439. else
  1440. GMStatus[i].dcd = 0;
  1441. if (status & 0x20 /*UART_MSR_DSR */ )
  1442. GMStatus[i].dsr = 1;
  1443. else
  1444. GMStatus[i].dsr = 0;
  1445. if (status & 0x10 /*UART_MSR_CTS */ )
  1446. GMStatus[i].cts = 1;
  1447. else
  1448. GMStatus[i].cts = 0;
  1449. }
  1450. unlock_kernel();
  1451. if (copy_to_user(argp, GMStatus,
  1452. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1453. return -EFAULT;
  1454. return 0;
  1455. case MOXA_ASPP_MON_EXT: {
  1456. int p, shiftbit;
  1457. unsigned long opmode;
  1458. unsigned cflag, iflag;
  1459. lock_kernel();
  1460. for (i = 0; i < MXSER_BOARDS; i++) {
  1461. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1462. port = &mxser_boards[i].ports[j];
  1463. if (!port->ioaddr)
  1464. continue;
  1465. status = mxser_get_msr(port->ioaddr, 0, i);
  1466. if (status & UART_MSR_TERI)
  1467. port->icount.rng++;
  1468. if (status & UART_MSR_DDSR)
  1469. port->icount.dsr++;
  1470. if (status & UART_MSR_DDCD)
  1471. port->icount.dcd++;
  1472. if (status & UART_MSR_DCTS)
  1473. port->icount.cts++;
  1474. port->mon_data.modem_status = status;
  1475. mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
  1476. mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
  1477. mon_data_ext.up_rxcnt[i] =
  1478. port->mon_data.up_rxcnt;
  1479. mon_data_ext.up_txcnt[i] =
  1480. port->mon_data.up_txcnt;
  1481. mon_data_ext.modem_status[i] =
  1482. port->mon_data.modem_status;
  1483. mon_data_ext.baudrate[i] =
  1484. tty_get_baud_rate(port->port.tty);
  1485. if (!port->port.tty || !port->port.tty->termios) {
  1486. cflag = port->normal_termios.c_cflag;
  1487. iflag = port->normal_termios.c_iflag;
  1488. } else {
  1489. cflag = port->port.tty->termios->c_cflag;
  1490. iflag = port->port.tty->termios->c_iflag;
  1491. }
  1492. mon_data_ext.databits[i] = cflag & CSIZE;
  1493. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1494. mon_data_ext.parity[i] =
  1495. cflag & (PARENB | PARODD | CMSPAR);
  1496. mon_data_ext.flowctrl[i] = 0x00;
  1497. if (cflag & CRTSCTS)
  1498. mon_data_ext.flowctrl[i] |= 0x03;
  1499. if (iflag & (IXON | IXOFF))
  1500. mon_data_ext.flowctrl[i] |= 0x0C;
  1501. if (port->type == PORT_16550A)
  1502. mon_data_ext.fifo[i] = 1;
  1503. else
  1504. mon_data_ext.fifo[i] = 0;
  1505. p = i % 4;
  1506. shiftbit = p * 2;
  1507. opmode = inb(port->opmode_ioaddr) >> shiftbit;
  1508. opmode &= OP_MODE_MASK;
  1509. mon_data_ext.iftype[i] = opmode;
  1510. }
  1511. }
  1512. unlock_kernel();
  1513. if (copy_to_user(argp, &mon_data_ext,
  1514. sizeof(mon_data_ext)))
  1515. return -EFAULT;
  1516. return 0;
  1517. }
  1518. default:
  1519. return -ENOIOCTLCMD;
  1520. }
  1521. return 0;
  1522. }
  1523. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1524. struct async_icount *cprev)
  1525. {
  1526. struct async_icount cnow;
  1527. unsigned long flags;
  1528. int ret;
  1529. spin_lock_irqsave(&info->slock, flags);
  1530. cnow = info->icount; /* atomic copy */
  1531. spin_unlock_irqrestore(&info->slock, flags);
  1532. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1533. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1534. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1535. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1536. *cprev = cnow;
  1537. return ret;
  1538. }
  1539. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1540. unsigned int cmd, unsigned long arg)
  1541. {
  1542. struct mxser_port *info = tty->driver_data;
  1543. struct async_icount cnow;
  1544. unsigned long flags;
  1545. void __user *argp = (void __user *)arg;
  1546. int retval;
  1547. if (tty->index == MXSER_PORTS)
  1548. return mxser_ioctl_special(cmd, argp);
  1549. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1550. int p;
  1551. unsigned long opmode;
  1552. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1553. int shiftbit;
  1554. unsigned char val, mask;
  1555. p = tty->index % 4;
  1556. if (cmd == MOXA_SET_OP_MODE) {
  1557. if (get_user(opmode, (int __user *) argp))
  1558. return -EFAULT;
  1559. if (opmode != RS232_MODE &&
  1560. opmode != RS485_2WIRE_MODE &&
  1561. opmode != RS422_MODE &&
  1562. opmode != RS485_4WIRE_MODE)
  1563. return -EFAULT;
  1564. lock_kernel();
  1565. mask = ModeMask[p];
  1566. shiftbit = p * 2;
  1567. val = inb(info->opmode_ioaddr);
  1568. val &= mask;
  1569. val |= (opmode << shiftbit);
  1570. outb(val, info->opmode_ioaddr);
  1571. unlock_kernel();
  1572. } else {
  1573. lock_kernel();
  1574. shiftbit = p * 2;
  1575. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1576. opmode &= OP_MODE_MASK;
  1577. unlock_kernel();
  1578. if (put_user(opmode, (int __user *)argp))
  1579. return -EFAULT;
  1580. }
  1581. return 0;
  1582. }
  1583. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1584. test_bit(TTY_IO_ERROR, &tty->flags))
  1585. return -EIO;
  1586. switch (cmd) {
  1587. case TIOCGSERIAL:
  1588. lock_kernel();
  1589. retval = mxser_get_serial_info(info, argp);
  1590. unlock_kernel();
  1591. return retval;
  1592. case TIOCSSERIAL:
  1593. lock_kernel();
  1594. retval = mxser_set_serial_info(info, argp);
  1595. unlock_kernel();
  1596. return retval;
  1597. case TIOCSERGETLSR: /* Get line status register */
  1598. return mxser_get_lsr_info(info, argp);
  1599. /*
  1600. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1601. * - mask passed in arg for lines of interest
  1602. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1603. * Caller should use TIOCGICOUNT to see which one it was
  1604. */
  1605. case TIOCMIWAIT:
  1606. spin_lock_irqsave(&info->slock, flags);
  1607. cnow = info->icount; /* note the counters on entry */
  1608. spin_unlock_irqrestore(&info->slock, flags);
  1609. return wait_event_interruptible(info->delta_msr_wait,
  1610. mxser_cflags_changed(info, arg, &cnow));
  1611. /*
  1612. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1613. * Return: write counters to the user passed counter struct
  1614. * NB: both 1->0 and 0->1 transitions are counted except for
  1615. * RI where only 0->1 is counted.
  1616. */
  1617. case TIOCGICOUNT: {
  1618. struct serial_icounter_struct icnt = { 0 };
  1619. spin_lock_irqsave(&info->slock, flags);
  1620. cnow = info->icount;
  1621. spin_unlock_irqrestore(&info->slock, flags);
  1622. icnt.frame = cnow.frame;
  1623. icnt.brk = cnow.brk;
  1624. icnt.overrun = cnow.overrun;
  1625. icnt.buf_overrun = cnow.buf_overrun;
  1626. icnt.parity = cnow.parity;
  1627. icnt.rx = cnow.rx;
  1628. icnt.tx = cnow.tx;
  1629. icnt.cts = cnow.cts;
  1630. icnt.dsr = cnow.dsr;
  1631. icnt.rng = cnow.rng;
  1632. icnt.dcd = cnow.dcd;
  1633. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1634. }
  1635. case MOXA_HighSpeedOn:
  1636. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1637. case MOXA_SDS_RSTICOUNTER:
  1638. lock_kernel();
  1639. info->mon_data.rxcnt = 0;
  1640. info->mon_data.txcnt = 0;
  1641. unlock_kernel();
  1642. return 0;
  1643. case MOXA_ASPP_OQUEUE:{
  1644. int len, lsr;
  1645. lock_kernel();
  1646. len = mxser_chars_in_buffer(tty);
  1647. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1648. len += (lsr ? 0 : 1);
  1649. unlock_kernel();
  1650. return put_user(len, (int __user *)argp);
  1651. }
  1652. case MOXA_ASPP_MON: {
  1653. int mcr, status;
  1654. lock_kernel();
  1655. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1656. mxser_check_modem_status(info, status);
  1657. mcr = inb(info->ioaddr + UART_MCR);
  1658. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1659. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1660. else
  1661. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1662. if (mcr & MOXA_MUST_MCR_TX_XON)
  1663. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1664. else
  1665. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1666. if (info->port.tty->hw_stopped)
  1667. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1668. else
  1669. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1670. unlock_kernel();
  1671. if (copy_to_user(argp, &info->mon_data,
  1672. sizeof(struct mxser_mon)))
  1673. return -EFAULT;
  1674. return 0;
  1675. }
  1676. case MOXA_ASPP_LSTATUS: {
  1677. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1678. return -EFAULT;
  1679. info->err_shadow = 0;
  1680. return 0;
  1681. }
  1682. case MOXA_SET_BAUD_METHOD: {
  1683. int method;
  1684. if (get_user(method, (int __user *)argp))
  1685. return -EFAULT;
  1686. mxser_set_baud_method[tty->index] = method;
  1687. return put_user(method, (int __user *)argp);
  1688. }
  1689. default:
  1690. return -ENOIOCTLCMD;
  1691. }
  1692. return 0;
  1693. }
  1694. static void mxser_stoprx(struct tty_struct *tty)
  1695. {
  1696. struct mxser_port *info = tty->driver_data;
  1697. info->ldisc_stop_rx = 1;
  1698. if (I_IXOFF(tty)) {
  1699. if (info->board->chip_flag) {
  1700. info->IER &= ~MOXA_MUST_RECV_ISR;
  1701. outb(info->IER, info->ioaddr + UART_IER);
  1702. } else {
  1703. info->x_char = STOP_CHAR(tty);
  1704. outb(0, info->ioaddr + UART_IER);
  1705. info->IER |= UART_IER_THRI;
  1706. outb(info->IER, info->ioaddr + UART_IER);
  1707. }
  1708. }
  1709. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1710. info->MCR &= ~UART_MCR_RTS;
  1711. outb(info->MCR, info->ioaddr + UART_MCR);
  1712. }
  1713. }
  1714. /*
  1715. * This routine is called by the upper-layer tty layer to signal that
  1716. * incoming characters should be throttled.
  1717. */
  1718. static void mxser_throttle(struct tty_struct *tty)
  1719. {
  1720. mxser_stoprx(tty);
  1721. }
  1722. static void mxser_unthrottle(struct tty_struct *tty)
  1723. {
  1724. struct mxser_port *info = tty->driver_data;
  1725. /* startrx */
  1726. info->ldisc_stop_rx = 0;
  1727. if (I_IXOFF(tty)) {
  1728. if (info->x_char)
  1729. info->x_char = 0;
  1730. else {
  1731. if (info->board->chip_flag) {
  1732. info->IER |= MOXA_MUST_RECV_ISR;
  1733. outb(info->IER, info->ioaddr + UART_IER);
  1734. } else {
  1735. info->x_char = START_CHAR(tty);
  1736. outb(0, info->ioaddr + UART_IER);
  1737. info->IER |= UART_IER_THRI;
  1738. outb(info->IER, info->ioaddr + UART_IER);
  1739. }
  1740. }
  1741. }
  1742. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1743. info->MCR |= UART_MCR_RTS;
  1744. outb(info->MCR, info->ioaddr + UART_MCR);
  1745. }
  1746. }
  1747. /*
  1748. * mxser_stop() and mxser_start()
  1749. *
  1750. * This routines are called before setting or resetting tty->stopped.
  1751. * They enable or disable transmitter interrupts, as necessary.
  1752. */
  1753. static void mxser_stop(struct tty_struct *tty)
  1754. {
  1755. struct mxser_port *info = tty->driver_data;
  1756. unsigned long flags;
  1757. spin_lock_irqsave(&info->slock, flags);
  1758. if (info->IER & UART_IER_THRI) {
  1759. info->IER &= ~UART_IER_THRI;
  1760. outb(info->IER, info->ioaddr + UART_IER);
  1761. }
  1762. spin_unlock_irqrestore(&info->slock, flags);
  1763. }
  1764. static void mxser_start(struct tty_struct *tty)
  1765. {
  1766. struct mxser_port *info = tty->driver_data;
  1767. unsigned long flags;
  1768. spin_lock_irqsave(&info->slock, flags);
  1769. if (info->xmit_cnt && info->port.xmit_buf) {
  1770. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1771. info->IER |= UART_IER_THRI;
  1772. outb(info->IER, info->ioaddr + UART_IER);
  1773. }
  1774. spin_unlock_irqrestore(&info->slock, flags);
  1775. }
  1776. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1777. {
  1778. struct mxser_port *info = tty->driver_data;
  1779. unsigned long flags;
  1780. spin_lock_irqsave(&info->slock, flags);
  1781. mxser_change_speed(info, old_termios);
  1782. spin_unlock_irqrestore(&info->slock, flags);
  1783. if ((old_termios->c_cflag & CRTSCTS) &&
  1784. !(tty->termios->c_cflag & CRTSCTS)) {
  1785. tty->hw_stopped = 0;
  1786. mxser_start(tty);
  1787. }
  1788. /* Handle sw stopped */
  1789. if ((old_termios->c_iflag & IXON) &&
  1790. !(tty->termios->c_iflag & IXON)) {
  1791. tty->stopped = 0;
  1792. if (info->board->chip_flag) {
  1793. spin_lock_irqsave(&info->slock, flags);
  1794. mxser_disable_must_rx_software_flow_control(
  1795. info->ioaddr);
  1796. spin_unlock_irqrestore(&info->slock, flags);
  1797. }
  1798. mxser_start(tty);
  1799. }
  1800. }
  1801. /*
  1802. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1803. */
  1804. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1805. {
  1806. struct mxser_port *info = tty->driver_data;
  1807. unsigned long orig_jiffies, char_time;
  1808. int lsr;
  1809. if (info->type == PORT_UNKNOWN)
  1810. return;
  1811. if (info->xmit_fifo_size == 0)
  1812. return; /* Just in case.... */
  1813. orig_jiffies = jiffies;
  1814. /*
  1815. * Set the check interval to be 1/5 of the estimated time to
  1816. * send a single character, and make it at least 1. The check
  1817. * interval should also be less than the timeout.
  1818. *
  1819. * Note: we have to use pretty tight timings here to satisfy
  1820. * the NIST-PCTS.
  1821. */
  1822. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1823. char_time = char_time / 5;
  1824. if (char_time == 0)
  1825. char_time = 1;
  1826. if (timeout && timeout < char_time)
  1827. char_time = timeout;
  1828. /*
  1829. * If the transmitter hasn't cleared in twice the approximate
  1830. * amount of time to send the entire FIFO, it probably won't
  1831. * ever clear. This assumes the UART isn't doing flow
  1832. * control, which is currently the case. Hence, if it ever
  1833. * takes longer than info->timeout, this is probably due to a
  1834. * UART bug of some kind. So, we clamp the timeout parameter at
  1835. * 2*info->timeout.
  1836. */
  1837. if (!timeout || timeout > 2 * info->timeout)
  1838. timeout = 2 * info->timeout;
  1839. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1840. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1841. timeout, char_time);
  1842. printk("jiff=%lu...", jiffies);
  1843. #endif
  1844. lock_kernel();
  1845. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1846. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1847. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1848. #endif
  1849. schedule_timeout_interruptible(char_time);
  1850. if (signal_pending(current))
  1851. break;
  1852. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1853. break;
  1854. }
  1855. set_current_state(TASK_RUNNING);
  1856. unlock_kernel();
  1857. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1858. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1859. #endif
  1860. }
  1861. /*
  1862. * This routine is called by tty_hangup() when a hangup is signaled.
  1863. */
  1864. static void mxser_hangup(struct tty_struct *tty)
  1865. {
  1866. struct mxser_port *info = tty->driver_data;
  1867. mxser_flush_buffer(tty);
  1868. mxser_shutdown(info);
  1869. info->port.count = 0;
  1870. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1871. info->port.tty = NULL;
  1872. wake_up_interruptible(&info->port.open_wait);
  1873. }
  1874. /*
  1875. * mxser_rs_break() --- routine which turns the break handling on or off
  1876. */
  1877. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1878. {
  1879. struct mxser_port *info = tty->driver_data;
  1880. unsigned long flags;
  1881. spin_lock_irqsave(&info->slock, flags);
  1882. if (break_state == -1)
  1883. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1884. info->ioaddr + UART_LCR);
  1885. else
  1886. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1887. info->ioaddr + UART_LCR);
  1888. spin_unlock_irqrestore(&info->slock, flags);
  1889. return 0;
  1890. }
  1891. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1892. {
  1893. struct tty_struct *tty = port->port.tty;
  1894. unsigned char ch, gdl;
  1895. int ignored = 0;
  1896. int cnt = 0;
  1897. int recv_room;
  1898. int max = 256;
  1899. recv_room = tty->receive_room;
  1900. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1901. mxser_stoprx(tty);
  1902. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1903. if (*status & UART_LSR_SPECIAL)
  1904. goto intr_old;
  1905. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1906. (*status & MOXA_MUST_LSR_RERR))
  1907. goto intr_old;
  1908. if (*status & MOXA_MUST_LSR_RERR)
  1909. goto intr_old;
  1910. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1911. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1912. gdl &= MOXA_MUST_GDL_MASK;
  1913. if (gdl >= recv_room) {
  1914. if (!port->ldisc_stop_rx)
  1915. mxser_stoprx(tty);
  1916. }
  1917. while (gdl--) {
  1918. ch = inb(port->ioaddr + UART_RX);
  1919. tty_insert_flip_char(tty, ch, 0);
  1920. cnt++;
  1921. }
  1922. goto end_intr;
  1923. }
  1924. intr_old:
  1925. do {
  1926. if (max-- < 0)
  1927. break;
  1928. ch = inb(port->ioaddr + UART_RX);
  1929. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1930. outb(0x23, port->ioaddr + UART_FCR);
  1931. *status &= port->read_status_mask;
  1932. if (*status & port->ignore_status_mask) {
  1933. if (++ignored > 100)
  1934. break;
  1935. } else {
  1936. char flag = 0;
  1937. if (*status & UART_LSR_SPECIAL) {
  1938. if (*status & UART_LSR_BI) {
  1939. flag = TTY_BREAK;
  1940. port->icount.brk++;
  1941. if (port->port.flags & ASYNC_SAK)
  1942. do_SAK(tty);
  1943. } else if (*status & UART_LSR_PE) {
  1944. flag = TTY_PARITY;
  1945. port->icount.parity++;
  1946. } else if (*status & UART_LSR_FE) {
  1947. flag = TTY_FRAME;
  1948. port->icount.frame++;
  1949. } else if (*status & UART_LSR_OE) {
  1950. flag = TTY_OVERRUN;
  1951. port->icount.overrun++;
  1952. } else
  1953. flag = TTY_BREAK;
  1954. }
  1955. tty_insert_flip_char(tty, ch, flag);
  1956. cnt++;
  1957. if (cnt >= recv_room) {
  1958. if (!port->ldisc_stop_rx)
  1959. mxser_stoprx(tty);
  1960. break;
  1961. }
  1962. }
  1963. if (port->board->chip_flag)
  1964. break;
  1965. *status = inb(port->ioaddr + UART_LSR);
  1966. } while (*status & UART_LSR_DR);
  1967. end_intr:
  1968. mxvar_log.rxcnt[port->port.tty->index] += cnt;
  1969. port->mon_data.rxcnt += cnt;
  1970. port->mon_data.up_rxcnt += cnt;
  1971. /*
  1972. * We are called from an interrupt context with &port->slock
  1973. * being held. Drop it temporarily in order to prevent
  1974. * recursive locking.
  1975. */
  1976. spin_unlock(&port->slock);
  1977. tty_flip_buffer_push(tty);
  1978. spin_lock(&port->slock);
  1979. }
  1980. static void mxser_transmit_chars(struct mxser_port *port)
  1981. {
  1982. int count, cnt;
  1983. if (port->x_char) {
  1984. outb(port->x_char, port->ioaddr + UART_TX);
  1985. port->x_char = 0;
  1986. mxvar_log.txcnt[port->port.tty->index]++;
  1987. port->mon_data.txcnt++;
  1988. port->mon_data.up_txcnt++;
  1989. port->icount.tx++;
  1990. return;
  1991. }
  1992. if (port->port.xmit_buf == NULL)
  1993. return;
  1994. if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
  1995. (port->port.tty->hw_stopped &&
  1996. (port->type != PORT_16550A) &&
  1997. (!port->board->chip_flag))) {
  1998. port->IER &= ~UART_IER_THRI;
  1999. outb(port->IER, port->ioaddr + UART_IER);
  2000. return;
  2001. }
  2002. cnt = port->xmit_cnt;
  2003. count = port->xmit_fifo_size;
  2004. do {
  2005. outb(port->port.xmit_buf[port->xmit_tail++],
  2006. port->ioaddr + UART_TX);
  2007. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  2008. if (--port->xmit_cnt <= 0)
  2009. break;
  2010. } while (--count > 0);
  2011. mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
  2012. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  2013. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  2014. port->icount.tx += (cnt - port->xmit_cnt);
  2015. if (port->xmit_cnt < WAKEUP_CHARS)
  2016. tty_wakeup(port->port.tty);
  2017. if (port->xmit_cnt <= 0) {
  2018. port->IER &= ~UART_IER_THRI;
  2019. outb(port->IER, port->ioaddr + UART_IER);
  2020. }
  2021. }
  2022. /*
  2023. * This is the serial driver's generic interrupt routine
  2024. */
  2025. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2026. {
  2027. int status, iir, i;
  2028. struct mxser_board *brd = NULL;
  2029. struct mxser_port *port;
  2030. int max, irqbits, bits, msr;
  2031. unsigned int int_cnt, pass_counter = 0;
  2032. int handled = IRQ_NONE;
  2033. for (i = 0; i < MXSER_BOARDS; i++)
  2034. if (dev_id == &mxser_boards[i]) {
  2035. brd = dev_id;
  2036. break;
  2037. }
  2038. if (i == MXSER_BOARDS)
  2039. goto irq_stop;
  2040. if (brd == NULL)
  2041. goto irq_stop;
  2042. max = brd->info->nports;
  2043. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2044. irqbits = inb(brd->vector) & brd->vector_mask;
  2045. if (irqbits == brd->vector_mask)
  2046. break;
  2047. handled = IRQ_HANDLED;
  2048. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2049. if (irqbits == brd->vector_mask)
  2050. break;
  2051. if (bits & irqbits)
  2052. continue;
  2053. port = &brd->ports[i];
  2054. int_cnt = 0;
  2055. spin_lock(&port->slock);
  2056. do {
  2057. iir = inb(port->ioaddr + UART_IIR);
  2058. if (iir & UART_IIR_NO_INT)
  2059. break;
  2060. iir &= MOXA_MUST_IIR_MASK;
  2061. if (!port->port.tty ||
  2062. (port->port.flags & ASYNC_CLOSING) ||
  2063. !(port->port.flags &
  2064. ASYNC_INITIALIZED)) {
  2065. status = inb(port->ioaddr + UART_LSR);
  2066. outb(0x27, port->ioaddr + UART_FCR);
  2067. inb(port->ioaddr + UART_MSR);
  2068. break;
  2069. }
  2070. status = inb(port->ioaddr + UART_LSR);
  2071. if (status & UART_LSR_PE)
  2072. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2073. if (status & UART_LSR_FE)
  2074. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2075. if (status & UART_LSR_OE)
  2076. port->err_shadow |=
  2077. NPPI_NOTIFY_HW_OVERRUN;
  2078. if (status & UART_LSR_BI)
  2079. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2080. if (port->board->chip_flag) {
  2081. if (iir == MOXA_MUST_IIR_GDA ||
  2082. iir == MOXA_MUST_IIR_RDA ||
  2083. iir == MOXA_MUST_IIR_RTO ||
  2084. iir == MOXA_MUST_IIR_LSR)
  2085. mxser_receive_chars(port,
  2086. &status);
  2087. } else {
  2088. status &= port->read_status_mask;
  2089. if (status & UART_LSR_DR)
  2090. mxser_receive_chars(port,
  2091. &status);
  2092. }
  2093. msr = inb(port->ioaddr + UART_MSR);
  2094. if (msr & UART_MSR_ANY_DELTA)
  2095. mxser_check_modem_status(port, msr);
  2096. if (port->board->chip_flag) {
  2097. if (iir == 0x02 && (status &
  2098. UART_LSR_THRE))
  2099. mxser_transmit_chars(port);
  2100. } else {
  2101. if (status & UART_LSR_THRE)
  2102. mxser_transmit_chars(port);
  2103. }
  2104. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2105. spin_unlock(&port->slock);
  2106. }
  2107. }
  2108. irq_stop:
  2109. return handled;
  2110. }
  2111. static const struct tty_operations mxser_ops = {
  2112. .open = mxser_open,
  2113. .close = mxser_close,
  2114. .write = mxser_write,
  2115. .put_char = mxser_put_char,
  2116. .flush_chars = mxser_flush_chars,
  2117. .write_room = mxser_write_room,
  2118. .chars_in_buffer = mxser_chars_in_buffer,
  2119. .flush_buffer = mxser_flush_buffer,
  2120. .ioctl = mxser_ioctl,
  2121. .throttle = mxser_throttle,
  2122. .unthrottle = mxser_unthrottle,
  2123. .set_termios = mxser_set_termios,
  2124. .stop = mxser_stop,
  2125. .start = mxser_start,
  2126. .hangup = mxser_hangup,
  2127. .break_ctl = mxser_rs_break,
  2128. .wait_until_sent = mxser_wait_until_sent,
  2129. .tiocmget = mxser_tiocmget,
  2130. .tiocmset = mxser_tiocmset,
  2131. };
  2132. /*
  2133. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2134. */
  2135. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2136. unsigned int irq)
  2137. {
  2138. if (irq)
  2139. free_irq(brd->irq, brd);
  2140. if (pdev != NULL) { /* PCI */
  2141. #ifdef CONFIG_PCI
  2142. pci_release_region(pdev, 2);
  2143. pci_release_region(pdev, 3);
  2144. #endif
  2145. } else {
  2146. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2147. release_region(brd->vector, 1);
  2148. }
  2149. }
  2150. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2151. struct pci_dev *pdev)
  2152. {
  2153. struct mxser_port *info;
  2154. unsigned int i;
  2155. int retval;
  2156. printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
  2157. for (i = 0; i < brd->info->nports; i++) {
  2158. info = &brd->ports[i];
  2159. tty_port_init(&info->port);
  2160. info->board = brd;
  2161. info->stop_rx = 0;
  2162. info->ldisc_stop_rx = 0;
  2163. /* Enhance mode enabled here */
  2164. if (brd->chip_flag != MOXA_OTHER_UART)
  2165. mxser_enable_must_enchance_mode(info->ioaddr);
  2166. info->port.flags = ASYNC_SHARE_IRQ;
  2167. info->type = brd->uart_type;
  2168. process_txrx_fifo(info);
  2169. info->custom_divisor = info->baud_base * 16;
  2170. info->port.close_delay = 5 * HZ / 10;
  2171. info->port.closing_wait = 30 * HZ;
  2172. info->normal_termios = mxvar_sdriver->init_termios;
  2173. init_waitqueue_head(&info->delta_msr_wait);
  2174. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2175. info->err_shadow = 0;
  2176. spin_lock_init(&info->slock);
  2177. /* before set INT ISR, disable all int */
  2178. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2179. info->ioaddr + UART_IER);
  2180. }
  2181. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2182. brd);
  2183. if (retval) {
  2184. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2185. "conflict with another device.\n",
  2186. brd->info->name, brd->irq);
  2187. /* We hold resources, we need to release them. */
  2188. mxser_release_res(brd, pdev, 0);
  2189. }
  2190. return retval;
  2191. }
  2192. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2193. {
  2194. int id, i, bits;
  2195. unsigned short regs[16], irq;
  2196. unsigned char scratch, scratch2;
  2197. brd->chip_flag = MOXA_OTHER_UART;
  2198. id = mxser_read_register(cap, regs);
  2199. switch (id) {
  2200. case C168_ASIC_ID:
  2201. brd->info = &mxser_cards[0];
  2202. break;
  2203. case C104_ASIC_ID:
  2204. brd->info = &mxser_cards[1];
  2205. break;
  2206. case CI104J_ASIC_ID:
  2207. brd->info = &mxser_cards[2];
  2208. break;
  2209. case C102_ASIC_ID:
  2210. brd->info = &mxser_cards[5];
  2211. break;
  2212. case CI132_ASIC_ID:
  2213. brd->info = &mxser_cards[6];
  2214. break;
  2215. case CI134_ASIC_ID:
  2216. brd->info = &mxser_cards[7];
  2217. break;
  2218. default:
  2219. return 0;
  2220. }
  2221. irq = 0;
  2222. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2223. Flag-hack checks if configuration should be read as 2-port here. */
  2224. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2225. irq = regs[9] & 0xF000;
  2226. irq = irq | (irq >> 4);
  2227. if (irq != (regs[9] & 0xFF00))
  2228. return MXSER_ERR_IRQ_CONFLIT;
  2229. } else if (brd->info->nports == 4) {
  2230. irq = regs[9] & 0xF000;
  2231. irq = irq | (irq >> 4);
  2232. irq = irq | (irq >> 8);
  2233. if (irq != regs[9])
  2234. return MXSER_ERR_IRQ_CONFLIT;
  2235. } else if (brd->info->nports == 8) {
  2236. irq = regs[9] & 0xF000;
  2237. irq = irq | (irq >> 4);
  2238. irq = irq | (irq >> 8);
  2239. if ((irq != regs[9]) || (irq != regs[10]))
  2240. return MXSER_ERR_IRQ_CONFLIT;
  2241. }
  2242. if (!irq)
  2243. return MXSER_ERR_IRQ;
  2244. brd->irq = ((int)(irq & 0xF000) >> 12);
  2245. for (i = 0; i < 8; i++)
  2246. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2247. if ((regs[12] & 0x80) == 0)
  2248. return MXSER_ERR_VECTOR;
  2249. brd->vector = (int)regs[11]; /* interrupt vector */
  2250. if (id == 1)
  2251. brd->vector_mask = 0x00FF;
  2252. else
  2253. brd->vector_mask = 0x000F;
  2254. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2255. if (regs[12] & bits) {
  2256. brd->ports[i].baud_base = 921600;
  2257. brd->ports[i].max_baud = 921600;
  2258. } else {
  2259. brd->ports[i].baud_base = 115200;
  2260. brd->ports[i].max_baud = 115200;
  2261. }
  2262. }
  2263. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2264. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2265. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2266. outb(scratch2, cap + UART_LCR);
  2267. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2268. scratch = inb(cap + UART_IIR);
  2269. if (scratch & 0xC0)
  2270. brd->uart_type = PORT_16550A;
  2271. else
  2272. brd->uart_type = PORT_16450;
  2273. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2274. "mxser(IO)"))
  2275. return MXSER_ERR_IOADDR;
  2276. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2277. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2278. return MXSER_ERR_VECTOR;
  2279. }
  2280. return brd->info->nports;
  2281. }
  2282. static int __devinit mxser_probe(struct pci_dev *pdev,
  2283. const struct pci_device_id *ent)
  2284. {
  2285. #ifdef CONFIG_PCI
  2286. struct mxser_board *brd;
  2287. unsigned int i, j;
  2288. unsigned long ioaddress;
  2289. int retval = -EINVAL;
  2290. for (i = 0; i < MXSER_BOARDS; i++)
  2291. if (mxser_boards[i].info == NULL)
  2292. break;
  2293. if (i >= MXSER_BOARDS) {
  2294. printk(KERN_ERR "Too many Smartio/Industio family boards found "
  2295. "(maximum %d), board not configured\n", MXSER_BOARDS);
  2296. goto err;
  2297. }
  2298. brd = &mxser_boards[i];
  2299. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2300. printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2301. mxser_cards[ent->driver_data].name,
  2302. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2303. retval = pci_enable_device(pdev);
  2304. if (retval) {
  2305. printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
  2306. goto err;
  2307. }
  2308. /* io address */
  2309. ioaddress = pci_resource_start(pdev, 2);
  2310. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2311. if (retval)
  2312. goto err;
  2313. brd->info = &mxser_cards[ent->driver_data];
  2314. for (i = 0; i < brd->info->nports; i++)
  2315. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2316. /* vector */
  2317. ioaddress = pci_resource_start(pdev, 3);
  2318. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2319. if (retval)
  2320. goto err_relio;
  2321. brd->vector = ioaddress;
  2322. /* irq */
  2323. brd->irq = pdev->irq;
  2324. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2325. brd->uart_type = PORT_16550A;
  2326. brd->vector_mask = 0;
  2327. for (i = 0; i < brd->info->nports; i++) {
  2328. for (j = 0; j < UART_INFO_NUM; j++) {
  2329. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2330. brd->ports[i].max_baud =
  2331. Gpci_uart_info[j].max_baud;
  2332. /* exception....CP-102 */
  2333. if (brd->info->flags & MXSER_HIGHBAUD)
  2334. brd->ports[i].max_baud = 921600;
  2335. break;
  2336. }
  2337. }
  2338. }
  2339. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2340. for (i = 0; i < brd->info->nports; i++) {
  2341. if (i < 4)
  2342. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2343. else
  2344. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2345. }
  2346. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2347. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2348. }
  2349. for (i = 0; i < brd->info->nports; i++) {
  2350. brd->vector_mask |= (1 << i);
  2351. brd->ports[i].baud_base = 921600;
  2352. }
  2353. /* mxser_initbrd will hook ISR. */
  2354. retval = mxser_initbrd(brd, pdev);
  2355. if (retval)
  2356. goto err_null;
  2357. for (i = 0; i < brd->info->nports; i++)
  2358. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2359. pci_set_drvdata(pdev, brd);
  2360. return 0;
  2361. err_relio:
  2362. pci_release_region(pdev, 2);
  2363. err_null:
  2364. brd->info = NULL;
  2365. err:
  2366. return retval;
  2367. #else
  2368. return -ENODEV;
  2369. #endif
  2370. }
  2371. static void __devexit mxser_remove(struct pci_dev *pdev)
  2372. {
  2373. struct mxser_board *brd = pci_get_drvdata(pdev);
  2374. unsigned int i;
  2375. for (i = 0; i < brd->info->nports; i++)
  2376. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2377. mxser_release_res(brd, pdev, 1);
  2378. brd->info = NULL;
  2379. }
  2380. static struct pci_driver mxser_driver = {
  2381. .name = "mxser",
  2382. .id_table = mxser_pcibrds,
  2383. .probe = mxser_probe,
  2384. .remove = __devexit_p(mxser_remove)
  2385. };
  2386. static int __init mxser_module_init(void)
  2387. {
  2388. struct mxser_board *brd;
  2389. unsigned long cap;
  2390. unsigned int i, m, isaloop;
  2391. int retval, b;
  2392. pr_debug("Loading module mxser ...\n");
  2393. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2394. if (!mxvar_sdriver)
  2395. return -ENOMEM;
  2396. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2397. MXSER_VERSION);
  2398. /* Initialize the tty_driver structure */
  2399. mxvar_sdriver->owner = THIS_MODULE;
  2400. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2401. mxvar_sdriver->name = "ttyMI";
  2402. mxvar_sdriver->major = ttymajor;
  2403. mxvar_sdriver->minor_start = 0;
  2404. mxvar_sdriver->num = MXSER_PORTS + 1;
  2405. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2406. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2407. mxvar_sdriver->init_termios = tty_std_termios;
  2408. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2409. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2410. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2411. retval = tty_register_driver(mxvar_sdriver);
  2412. if (retval) {
  2413. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2414. "tty driver !\n");
  2415. goto err_put;
  2416. }
  2417. mxvar_diagflag = 0;
  2418. m = 0;
  2419. /* Start finding ISA boards here */
  2420. for (isaloop = 0; isaloop < 2; isaloop++)
  2421. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  2422. if (!isaloop)
  2423. cap = mxserBoardCAP[b]; /* predefined */
  2424. else
  2425. cap = ioaddr[b]; /* module param */
  2426. if (!cap)
  2427. continue;
  2428. brd = &mxser_boards[m];
  2429. retval = mxser_get_ISA_conf(cap, brd);
  2430. if (retval != 0)
  2431. printk(KERN_INFO "Found MOXA %s board "
  2432. "(CAP=0x%x)\n",
  2433. brd->info->name, ioaddr[b]);
  2434. if (retval <= 0) {
  2435. if (retval == MXSER_ERR_IRQ)
  2436. printk(KERN_ERR "Invalid interrupt "
  2437. "number, board not "
  2438. "configured\n");
  2439. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2440. printk(KERN_ERR "Invalid interrupt "
  2441. "number, board not "
  2442. "configured\n");
  2443. else if (retval == MXSER_ERR_VECTOR)
  2444. printk(KERN_ERR "Invalid interrupt "
  2445. "vector, board not "
  2446. "configured\n");
  2447. else if (retval == MXSER_ERR_IOADDR)
  2448. printk(KERN_ERR "Invalid I/O address, "
  2449. "board not configured\n");
  2450. brd->info = NULL;
  2451. continue;
  2452. }
  2453. /* mxser_initbrd will hook ISR. */
  2454. if (mxser_initbrd(brd, NULL) < 0) {
  2455. brd->info = NULL;
  2456. continue;
  2457. }
  2458. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2459. for (i = 0; i < brd->info->nports; i++)
  2460. tty_register_device(mxvar_sdriver, brd->idx + i,
  2461. NULL);
  2462. m++;
  2463. }
  2464. retval = pci_register_driver(&mxser_driver);
  2465. if (retval) {
  2466. printk(KERN_ERR "Can't register pci driver\n");
  2467. if (!m) {
  2468. retval = -ENODEV;
  2469. goto err_unr;
  2470. } /* else: we have some ISA cards under control */
  2471. }
  2472. pr_debug("Done.\n");
  2473. return 0;
  2474. err_unr:
  2475. tty_unregister_driver(mxvar_sdriver);
  2476. err_put:
  2477. put_tty_driver(mxvar_sdriver);
  2478. return retval;
  2479. }
  2480. static void __exit mxser_module_exit(void)
  2481. {
  2482. unsigned int i, j;
  2483. pr_debug("Unloading module mxser ...\n");
  2484. pci_unregister_driver(&mxser_driver);
  2485. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2486. if (mxser_boards[i].info != NULL)
  2487. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2488. tty_unregister_device(mxvar_sdriver,
  2489. mxser_boards[i].idx + j);
  2490. tty_unregister_driver(mxvar_sdriver);
  2491. put_tty_driver(mxvar_sdriver);
  2492. for (i = 0; i < MXSER_BOARDS; i++)
  2493. if (mxser_boards[i].info != NULL)
  2494. mxser_release_res(&mxser_boards[i], NULL, 1);
  2495. pr_debug("Done.\n");
  2496. }
  2497. module_init(mxser_module_init);
  2498. module_exit(mxser_module_exit);