x86.c 36 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include "kvm.h"
  17. #include "x86.h"
  18. #include "segment_descriptor.h"
  19. #include "irq.h"
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <asm/uaccess.h>
  25. #define MAX_IO_MSRS 256
  26. #define CR0_RESERVED_BITS \
  27. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  28. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  29. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  30. #define CR4_RESERVED_BITS \
  31. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  32. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  33. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  34. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  35. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  36. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  37. #define STAT_OFFSET(x) offsetof(struct kvm_vcpu, stat.x)
  38. struct kvm_stats_debugfs_item debugfs_entries[] = {
  39. { "pf_fixed", STAT_OFFSET(pf_fixed) },
  40. { "pf_guest", STAT_OFFSET(pf_guest) },
  41. { "tlb_flush", STAT_OFFSET(tlb_flush) },
  42. { "invlpg", STAT_OFFSET(invlpg) },
  43. { "exits", STAT_OFFSET(exits) },
  44. { "io_exits", STAT_OFFSET(io_exits) },
  45. { "mmio_exits", STAT_OFFSET(mmio_exits) },
  46. { "signal_exits", STAT_OFFSET(signal_exits) },
  47. { "irq_window", STAT_OFFSET(irq_window_exits) },
  48. { "halt_exits", STAT_OFFSET(halt_exits) },
  49. { "halt_wakeup", STAT_OFFSET(halt_wakeup) },
  50. { "request_irq", STAT_OFFSET(request_irq_exits) },
  51. { "irq_exits", STAT_OFFSET(irq_exits) },
  52. { "light_exits", STAT_OFFSET(light_exits) },
  53. { "efer_reload", STAT_OFFSET(efer_reload) },
  54. { NULL }
  55. };
  56. unsigned long segment_base(u16 selector)
  57. {
  58. struct descriptor_table gdt;
  59. struct segment_descriptor *d;
  60. unsigned long table_base;
  61. unsigned long v;
  62. if (selector == 0)
  63. return 0;
  64. asm("sgdt %0" : "=m"(gdt));
  65. table_base = gdt.base;
  66. if (selector & 4) { /* from ldt */
  67. u16 ldt_selector;
  68. asm("sldt %0" : "=g"(ldt_selector));
  69. table_base = segment_base(ldt_selector);
  70. }
  71. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  72. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  73. ((unsigned long)d->base_high << 24);
  74. #ifdef CONFIG_X86_64
  75. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  76. v |= ((unsigned long) \
  77. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  78. #endif
  79. return v;
  80. }
  81. EXPORT_SYMBOL_GPL(segment_base);
  82. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  83. {
  84. if (irqchip_in_kernel(vcpu->kvm))
  85. return vcpu->apic_base;
  86. else
  87. return vcpu->apic_base;
  88. }
  89. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  90. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  91. {
  92. /* TODO: reserve bits check */
  93. if (irqchip_in_kernel(vcpu->kvm))
  94. kvm_lapic_set_base(vcpu, data);
  95. else
  96. vcpu->apic_base = data;
  97. }
  98. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  99. static void inject_gp(struct kvm_vcpu *vcpu)
  100. {
  101. kvm_x86_ops->inject_gp(vcpu, 0);
  102. }
  103. /*
  104. * Load the pae pdptrs. Return true is they are all valid.
  105. */
  106. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  107. {
  108. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  109. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  110. int i;
  111. int ret;
  112. u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
  113. mutex_lock(&vcpu->kvm->lock);
  114. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  115. offset * sizeof(u64), sizeof(pdpte));
  116. if (ret < 0) {
  117. ret = 0;
  118. goto out;
  119. }
  120. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  121. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  122. ret = 0;
  123. goto out;
  124. }
  125. }
  126. ret = 1;
  127. memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
  128. out:
  129. mutex_unlock(&vcpu->kvm->lock);
  130. return ret;
  131. }
  132. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  133. {
  134. if (cr0 & CR0_RESERVED_BITS) {
  135. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  136. cr0, vcpu->cr0);
  137. inject_gp(vcpu);
  138. return;
  139. }
  140. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  141. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  142. inject_gp(vcpu);
  143. return;
  144. }
  145. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  146. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  147. "and a clear PE flag\n");
  148. inject_gp(vcpu);
  149. return;
  150. }
  151. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  152. #ifdef CONFIG_X86_64
  153. if ((vcpu->shadow_efer & EFER_LME)) {
  154. int cs_db, cs_l;
  155. if (!is_pae(vcpu)) {
  156. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  157. "in long mode while PAE is disabled\n");
  158. inject_gp(vcpu);
  159. return;
  160. }
  161. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  162. if (cs_l) {
  163. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  164. "in long mode while CS.L == 1\n");
  165. inject_gp(vcpu);
  166. return;
  167. }
  168. } else
  169. #endif
  170. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
  171. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  172. "reserved bits\n");
  173. inject_gp(vcpu);
  174. return;
  175. }
  176. }
  177. kvm_x86_ops->set_cr0(vcpu, cr0);
  178. vcpu->cr0 = cr0;
  179. mutex_lock(&vcpu->kvm->lock);
  180. kvm_mmu_reset_context(vcpu);
  181. mutex_unlock(&vcpu->kvm->lock);
  182. return;
  183. }
  184. EXPORT_SYMBOL_GPL(set_cr0);
  185. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  186. {
  187. set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
  188. }
  189. EXPORT_SYMBOL_GPL(lmsw);
  190. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  191. {
  192. if (cr4 & CR4_RESERVED_BITS) {
  193. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  194. inject_gp(vcpu);
  195. return;
  196. }
  197. if (is_long_mode(vcpu)) {
  198. if (!(cr4 & X86_CR4_PAE)) {
  199. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  200. "in long mode\n");
  201. inject_gp(vcpu);
  202. return;
  203. }
  204. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  205. && !load_pdptrs(vcpu, vcpu->cr3)) {
  206. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  207. inject_gp(vcpu);
  208. return;
  209. }
  210. if (cr4 & X86_CR4_VMXE) {
  211. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  212. inject_gp(vcpu);
  213. return;
  214. }
  215. kvm_x86_ops->set_cr4(vcpu, cr4);
  216. vcpu->cr4 = cr4;
  217. mutex_lock(&vcpu->kvm->lock);
  218. kvm_mmu_reset_context(vcpu);
  219. mutex_unlock(&vcpu->kvm->lock);
  220. }
  221. EXPORT_SYMBOL_GPL(set_cr4);
  222. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  223. {
  224. if (is_long_mode(vcpu)) {
  225. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  226. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  227. inject_gp(vcpu);
  228. return;
  229. }
  230. } else {
  231. if (is_pae(vcpu)) {
  232. if (cr3 & CR3_PAE_RESERVED_BITS) {
  233. printk(KERN_DEBUG
  234. "set_cr3: #GP, reserved bits\n");
  235. inject_gp(vcpu);
  236. return;
  237. }
  238. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  239. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  240. "reserved bits\n");
  241. inject_gp(vcpu);
  242. return;
  243. }
  244. }
  245. /*
  246. * We don't check reserved bits in nonpae mode, because
  247. * this isn't enforced, and VMware depends on this.
  248. */
  249. }
  250. mutex_lock(&vcpu->kvm->lock);
  251. /*
  252. * Does the new cr3 value map to physical memory? (Note, we
  253. * catch an invalid cr3 even in real-mode, because it would
  254. * cause trouble later on when we turn on paging anyway.)
  255. *
  256. * A real CPU would silently accept an invalid cr3 and would
  257. * attempt to use it - with largely undefined (and often hard
  258. * to debug) behavior on the guest side.
  259. */
  260. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  261. inject_gp(vcpu);
  262. else {
  263. vcpu->cr3 = cr3;
  264. vcpu->mmu.new_cr3(vcpu);
  265. }
  266. mutex_unlock(&vcpu->kvm->lock);
  267. }
  268. EXPORT_SYMBOL_GPL(set_cr3);
  269. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  270. {
  271. if (cr8 & CR8_RESERVED_BITS) {
  272. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  273. inject_gp(vcpu);
  274. return;
  275. }
  276. if (irqchip_in_kernel(vcpu->kvm))
  277. kvm_lapic_set_tpr(vcpu, cr8);
  278. else
  279. vcpu->cr8 = cr8;
  280. }
  281. EXPORT_SYMBOL_GPL(set_cr8);
  282. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  283. {
  284. if (irqchip_in_kernel(vcpu->kvm))
  285. return kvm_lapic_get_cr8(vcpu);
  286. else
  287. return vcpu->cr8;
  288. }
  289. EXPORT_SYMBOL_GPL(get_cr8);
  290. /*
  291. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  292. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  293. *
  294. * This list is modified at module load time to reflect the
  295. * capabilities of the host cpu.
  296. */
  297. static u32 msrs_to_save[] = {
  298. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  299. MSR_K6_STAR,
  300. #ifdef CONFIG_X86_64
  301. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  302. #endif
  303. MSR_IA32_TIME_STAMP_COUNTER,
  304. };
  305. static unsigned num_msrs_to_save;
  306. static u32 emulated_msrs[] = {
  307. MSR_IA32_MISC_ENABLE,
  308. };
  309. #ifdef CONFIG_X86_64
  310. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  311. {
  312. if (efer & EFER_RESERVED_BITS) {
  313. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  314. efer);
  315. inject_gp(vcpu);
  316. return;
  317. }
  318. if (is_paging(vcpu)
  319. && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  320. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  321. inject_gp(vcpu);
  322. return;
  323. }
  324. kvm_x86_ops->set_efer(vcpu, efer);
  325. efer &= ~EFER_LMA;
  326. efer |= vcpu->shadow_efer & EFER_LMA;
  327. vcpu->shadow_efer = efer;
  328. }
  329. #endif
  330. /*
  331. * Writes msr value into into the appropriate "register".
  332. * Returns 0 on success, non-0 otherwise.
  333. * Assumes vcpu_load() was already called.
  334. */
  335. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  336. {
  337. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  338. }
  339. /*
  340. * Adapt set_msr() to msr_io()'s calling convention
  341. */
  342. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  343. {
  344. return kvm_set_msr(vcpu, index, *data);
  345. }
  346. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  347. {
  348. switch (msr) {
  349. #ifdef CONFIG_X86_64
  350. case MSR_EFER:
  351. set_efer(vcpu, data);
  352. break;
  353. #endif
  354. case MSR_IA32_MC0_STATUS:
  355. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  356. __FUNCTION__, data);
  357. break;
  358. case MSR_IA32_MCG_STATUS:
  359. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  360. __FUNCTION__, data);
  361. break;
  362. case MSR_IA32_UCODE_REV:
  363. case MSR_IA32_UCODE_WRITE:
  364. case 0x200 ... 0x2ff: /* MTRRs */
  365. break;
  366. case MSR_IA32_APICBASE:
  367. kvm_set_apic_base(vcpu, data);
  368. break;
  369. case MSR_IA32_MISC_ENABLE:
  370. vcpu->ia32_misc_enable_msr = data;
  371. break;
  372. default:
  373. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
  374. return 1;
  375. }
  376. return 0;
  377. }
  378. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  379. /*
  380. * Reads an msr value (of 'msr_index') into 'pdata'.
  381. * Returns 0 on success, non-0 otherwise.
  382. * Assumes vcpu_load() was already called.
  383. */
  384. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  385. {
  386. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  387. }
  388. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  389. {
  390. u64 data;
  391. switch (msr) {
  392. case 0xc0010010: /* SYSCFG */
  393. case 0xc0010015: /* HWCR */
  394. case MSR_IA32_PLATFORM_ID:
  395. case MSR_IA32_P5_MC_ADDR:
  396. case MSR_IA32_P5_MC_TYPE:
  397. case MSR_IA32_MC0_CTL:
  398. case MSR_IA32_MCG_STATUS:
  399. case MSR_IA32_MCG_CAP:
  400. case MSR_IA32_MC0_MISC:
  401. case MSR_IA32_MC0_MISC+4:
  402. case MSR_IA32_MC0_MISC+8:
  403. case MSR_IA32_MC0_MISC+12:
  404. case MSR_IA32_MC0_MISC+16:
  405. case MSR_IA32_UCODE_REV:
  406. case MSR_IA32_PERF_STATUS:
  407. case MSR_IA32_EBL_CR_POWERON:
  408. /* MTRR registers */
  409. case 0xfe:
  410. case 0x200 ... 0x2ff:
  411. data = 0;
  412. break;
  413. case 0xcd: /* fsb frequency */
  414. data = 3;
  415. break;
  416. case MSR_IA32_APICBASE:
  417. data = kvm_get_apic_base(vcpu);
  418. break;
  419. case MSR_IA32_MISC_ENABLE:
  420. data = vcpu->ia32_misc_enable_msr;
  421. break;
  422. #ifdef CONFIG_X86_64
  423. case MSR_EFER:
  424. data = vcpu->shadow_efer;
  425. break;
  426. #endif
  427. default:
  428. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  429. return 1;
  430. }
  431. *pdata = data;
  432. return 0;
  433. }
  434. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  435. /*
  436. * Read or write a bunch of msrs. All parameters are kernel addresses.
  437. *
  438. * @return number of msrs set successfully.
  439. */
  440. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  441. struct kvm_msr_entry *entries,
  442. int (*do_msr)(struct kvm_vcpu *vcpu,
  443. unsigned index, u64 *data))
  444. {
  445. int i;
  446. vcpu_load(vcpu);
  447. for (i = 0; i < msrs->nmsrs; ++i)
  448. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  449. break;
  450. vcpu_put(vcpu);
  451. return i;
  452. }
  453. /*
  454. * Read or write a bunch of msrs. Parameters are user addresses.
  455. *
  456. * @return number of msrs set successfully.
  457. */
  458. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  459. int (*do_msr)(struct kvm_vcpu *vcpu,
  460. unsigned index, u64 *data),
  461. int writeback)
  462. {
  463. struct kvm_msrs msrs;
  464. struct kvm_msr_entry *entries;
  465. int r, n;
  466. unsigned size;
  467. r = -EFAULT;
  468. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  469. goto out;
  470. r = -E2BIG;
  471. if (msrs.nmsrs >= MAX_IO_MSRS)
  472. goto out;
  473. r = -ENOMEM;
  474. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  475. entries = vmalloc(size);
  476. if (!entries)
  477. goto out;
  478. r = -EFAULT;
  479. if (copy_from_user(entries, user_msrs->entries, size))
  480. goto out_free;
  481. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  482. if (r < 0)
  483. goto out_free;
  484. r = -EFAULT;
  485. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  486. goto out_free;
  487. r = n;
  488. out_free:
  489. vfree(entries);
  490. out:
  491. return r;
  492. }
  493. long kvm_arch_dev_ioctl(struct file *filp,
  494. unsigned int ioctl, unsigned long arg)
  495. {
  496. void __user *argp = (void __user *)arg;
  497. long r;
  498. switch (ioctl) {
  499. case KVM_GET_MSR_INDEX_LIST: {
  500. struct kvm_msr_list __user *user_msr_list = argp;
  501. struct kvm_msr_list msr_list;
  502. unsigned n;
  503. r = -EFAULT;
  504. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  505. goto out;
  506. n = msr_list.nmsrs;
  507. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  508. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  509. goto out;
  510. r = -E2BIG;
  511. if (n < num_msrs_to_save)
  512. goto out;
  513. r = -EFAULT;
  514. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  515. num_msrs_to_save * sizeof(u32)))
  516. goto out;
  517. if (copy_to_user(user_msr_list->indices
  518. + num_msrs_to_save * sizeof(u32),
  519. &emulated_msrs,
  520. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  521. goto out;
  522. r = 0;
  523. break;
  524. }
  525. default:
  526. r = -EINVAL;
  527. }
  528. out:
  529. return r;
  530. }
  531. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  532. {
  533. kvm_x86_ops->vcpu_load(vcpu, cpu);
  534. }
  535. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  536. {
  537. kvm_x86_ops->vcpu_put(vcpu);
  538. }
  539. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  540. {
  541. u64 efer;
  542. int i;
  543. struct kvm_cpuid_entry *e, *entry;
  544. rdmsrl(MSR_EFER, efer);
  545. entry = NULL;
  546. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  547. e = &vcpu->cpuid_entries[i];
  548. if (e->function == 0x80000001) {
  549. entry = e;
  550. break;
  551. }
  552. }
  553. if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
  554. entry->edx &= ~(1 << 20);
  555. printk(KERN_INFO "kvm: guest NX capability removed\n");
  556. }
  557. }
  558. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  559. struct kvm_cpuid *cpuid,
  560. struct kvm_cpuid_entry __user *entries)
  561. {
  562. int r;
  563. r = -E2BIG;
  564. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  565. goto out;
  566. r = -EFAULT;
  567. if (copy_from_user(&vcpu->cpuid_entries, entries,
  568. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  569. goto out;
  570. vcpu->cpuid_nent = cpuid->nent;
  571. cpuid_fix_nx_cap(vcpu);
  572. return 0;
  573. out:
  574. return r;
  575. }
  576. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  577. struct kvm_lapic_state *s)
  578. {
  579. vcpu_load(vcpu);
  580. memcpy(s->regs, vcpu->apic->regs, sizeof *s);
  581. vcpu_put(vcpu);
  582. return 0;
  583. }
  584. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  585. struct kvm_lapic_state *s)
  586. {
  587. vcpu_load(vcpu);
  588. memcpy(vcpu->apic->regs, s->regs, sizeof *s);
  589. kvm_apic_post_state_restore(vcpu);
  590. vcpu_put(vcpu);
  591. return 0;
  592. }
  593. long kvm_arch_vcpu_ioctl(struct file *filp,
  594. unsigned int ioctl, unsigned long arg)
  595. {
  596. struct kvm_vcpu *vcpu = filp->private_data;
  597. void __user *argp = (void __user *)arg;
  598. int r;
  599. switch (ioctl) {
  600. case KVM_GET_LAPIC: {
  601. struct kvm_lapic_state lapic;
  602. memset(&lapic, 0, sizeof lapic);
  603. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  604. if (r)
  605. goto out;
  606. r = -EFAULT;
  607. if (copy_to_user(argp, &lapic, sizeof lapic))
  608. goto out;
  609. r = 0;
  610. break;
  611. }
  612. case KVM_SET_LAPIC: {
  613. struct kvm_lapic_state lapic;
  614. r = -EFAULT;
  615. if (copy_from_user(&lapic, argp, sizeof lapic))
  616. goto out;
  617. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  618. if (r)
  619. goto out;
  620. r = 0;
  621. break;
  622. }
  623. case KVM_SET_CPUID: {
  624. struct kvm_cpuid __user *cpuid_arg = argp;
  625. struct kvm_cpuid cpuid;
  626. r = -EFAULT;
  627. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  628. goto out;
  629. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  630. if (r)
  631. goto out;
  632. break;
  633. }
  634. case KVM_GET_MSRS:
  635. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  636. break;
  637. case KVM_SET_MSRS:
  638. r = msr_io(vcpu, argp, do_set_msr, 0);
  639. break;
  640. default:
  641. r = -EINVAL;
  642. }
  643. out:
  644. return r;
  645. }
  646. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  647. {
  648. int ret;
  649. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  650. return -1;
  651. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  652. return ret;
  653. }
  654. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  655. u32 kvm_nr_mmu_pages)
  656. {
  657. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  658. return -EINVAL;
  659. mutex_lock(&kvm->lock);
  660. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  661. kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
  662. mutex_unlock(&kvm->lock);
  663. return 0;
  664. }
  665. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  666. {
  667. return kvm->n_alloc_mmu_pages;
  668. }
  669. /*
  670. * Set a new alias region. Aliases map a portion of physical memory into
  671. * another portion. This is useful for memory windows, for example the PC
  672. * VGA region.
  673. */
  674. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  675. struct kvm_memory_alias *alias)
  676. {
  677. int r, n;
  678. struct kvm_mem_alias *p;
  679. r = -EINVAL;
  680. /* General sanity checks */
  681. if (alias->memory_size & (PAGE_SIZE - 1))
  682. goto out;
  683. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  684. goto out;
  685. if (alias->slot >= KVM_ALIAS_SLOTS)
  686. goto out;
  687. if (alias->guest_phys_addr + alias->memory_size
  688. < alias->guest_phys_addr)
  689. goto out;
  690. if (alias->target_phys_addr + alias->memory_size
  691. < alias->target_phys_addr)
  692. goto out;
  693. mutex_lock(&kvm->lock);
  694. p = &kvm->aliases[alias->slot];
  695. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  696. p->npages = alias->memory_size >> PAGE_SHIFT;
  697. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  698. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  699. if (kvm->aliases[n - 1].npages)
  700. break;
  701. kvm->naliases = n;
  702. kvm_mmu_zap_all(kvm);
  703. mutex_unlock(&kvm->lock);
  704. return 0;
  705. out:
  706. return r;
  707. }
  708. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  709. {
  710. int r;
  711. r = 0;
  712. switch (chip->chip_id) {
  713. case KVM_IRQCHIP_PIC_MASTER:
  714. memcpy(&chip->chip.pic,
  715. &pic_irqchip(kvm)->pics[0],
  716. sizeof(struct kvm_pic_state));
  717. break;
  718. case KVM_IRQCHIP_PIC_SLAVE:
  719. memcpy(&chip->chip.pic,
  720. &pic_irqchip(kvm)->pics[1],
  721. sizeof(struct kvm_pic_state));
  722. break;
  723. case KVM_IRQCHIP_IOAPIC:
  724. memcpy(&chip->chip.ioapic,
  725. ioapic_irqchip(kvm),
  726. sizeof(struct kvm_ioapic_state));
  727. break;
  728. default:
  729. r = -EINVAL;
  730. break;
  731. }
  732. return r;
  733. }
  734. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  735. {
  736. int r;
  737. r = 0;
  738. switch (chip->chip_id) {
  739. case KVM_IRQCHIP_PIC_MASTER:
  740. memcpy(&pic_irqchip(kvm)->pics[0],
  741. &chip->chip.pic,
  742. sizeof(struct kvm_pic_state));
  743. break;
  744. case KVM_IRQCHIP_PIC_SLAVE:
  745. memcpy(&pic_irqchip(kvm)->pics[1],
  746. &chip->chip.pic,
  747. sizeof(struct kvm_pic_state));
  748. break;
  749. case KVM_IRQCHIP_IOAPIC:
  750. memcpy(ioapic_irqchip(kvm),
  751. &chip->chip.ioapic,
  752. sizeof(struct kvm_ioapic_state));
  753. break;
  754. default:
  755. r = -EINVAL;
  756. break;
  757. }
  758. kvm_pic_update_irq(pic_irqchip(kvm));
  759. return r;
  760. }
  761. long kvm_arch_vm_ioctl(struct file *filp,
  762. unsigned int ioctl, unsigned long arg)
  763. {
  764. struct kvm *kvm = filp->private_data;
  765. void __user *argp = (void __user *)arg;
  766. int r = -EINVAL;
  767. switch (ioctl) {
  768. case KVM_SET_TSS_ADDR:
  769. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  770. if (r < 0)
  771. goto out;
  772. break;
  773. case KVM_SET_MEMORY_REGION: {
  774. struct kvm_memory_region kvm_mem;
  775. struct kvm_userspace_memory_region kvm_userspace_mem;
  776. r = -EFAULT;
  777. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  778. goto out;
  779. kvm_userspace_mem.slot = kvm_mem.slot;
  780. kvm_userspace_mem.flags = kvm_mem.flags;
  781. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  782. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  783. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  784. if (r)
  785. goto out;
  786. break;
  787. }
  788. case KVM_SET_NR_MMU_PAGES:
  789. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  790. if (r)
  791. goto out;
  792. break;
  793. case KVM_GET_NR_MMU_PAGES:
  794. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  795. break;
  796. case KVM_SET_MEMORY_ALIAS: {
  797. struct kvm_memory_alias alias;
  798. r = -EFAULT;
  799. if (copy_from_user(&alias, argp, sizeof alias))
  800. goto out;
  801. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  802. if (r)
  803. goto out;
  804. break;
  805. }
  806. case KVM_CREATE_IRQCHIP:
  807. r = -ENOMEM;
  808. kvm->vpic = kvm_create_pic(kvm);
  809. if (kvm->vpic) {
  810. r = kvm_ioapic_init(kvm);
  811. if (r) {
  812. kfree(kvm->vpic);
  813. kvm->vpic = NULL;
  814. goto out;
  815. }
  816. } else
  817. goto out;
  818. break;
  819. case KVM_IRQ_LINE: {
  820. struct kvm_irq_level irq_event;
  821. r = -EFAULT;
  822. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  823. goto out;
  824. if (irqchip_in_kernel(kvm)) {
  825. mutex_lock(&kvm->lock);
  826. if (irq_event.irq < 16)
  827. kvm_pic_set_irq(pic_irqchip(kvm),
  828. irq_event.irq,
  829. irq_event.level);
  830. kvm_ioapic_set_irq(kvm->vioapic,
  831. irq_event.irq,
  832. irq_event.level);
  833. mutex_unlock(&kvm->lock);
  834. r = 0;
  835. }
  836. break;
  837. }
  838. case KVM_GET_IRQCHIP: {
  839. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  840. struct kvm_irqchip chip;
  841. r = -EFAULT;
  842. if (copy_from_user(&chip, argp, sizeof chip))
  843. goto out;
  844. r = -ENXIO;
  845. if (!irqchip_in_kernel(kvm))
  846. goto out;
  847. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  848. if (r)
  849. goto out;
  850. r = -EFAULT;
  851. if (copy_to_user(argp, &chip, sizeof chip))
  852. goto out;
  853. r = 0;
  854. break;
  855. }
  856. case KVM_SET_IRQCHIP: {
  857. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  858. struct kvm_irqchip chip;
  859. r = -EFAULT;
  860. if (copy_from_user(&chip, argp, sizeof chip))
  861. goto out;
  862. r = -ENXIO;
  863. if (!irqchip_in_kernel(kvm))
  864. goto out;
  865. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  866. if (r)
  867. goto out;
  868. r = 0;
  869. break;
  870. }
  871. default:
  872. ;
  873. }
  874. out:
  875. return r;
  876. }
  877. static __init void kvm_init_msr_list(void)
  878. {
  879. u32 dummy[2];
  880. unsigned i, j;
  881. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  882. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  883. continue;
  884. if (j < i)
  885. msrs_to_save[j] = msrs_to_save[i];
  886. j++;
  887. }
  888. num_msrs_to_save = j;
  889. }
  890. /*
  891. * Only apic need an MMIO device hook, so shortcut now..
  892. */
  893. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  894. gpa_t addr)
  895. {
  896. struct kvm_io_device *dev;
  897. if (vcpu->apic) {
  898. dev = &vcpu->apic->dev;
  899. if (dev->in_range(dev, addr))
  900. return dev;
  901. }
  902. return NULL;
  903. }
  904. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  905. gpa_t addr)
  906. {
  907. struct kvm_io_device *dev;
  908. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  909. if (dev == NULL)
  910. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  911. return dev;
  912. }
  913. int emulator_read_std(unsigned long addr,
  914. void *val,
  915. unsigned int bytes,
  916. struct kvm_vcpu *vcpu)
  917. {
  918. void *data = val;
  919. while (bytes) {
  920. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  921. unsigned offset = addr & (PAGE_SIZE-1);
  922. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  923. int ret;
  924. if (gpa == UNMAPPED_GVA)
  925. return X86EMUL_PROPAGATE_FAULT;
  926. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  927. if (ret < 0)
  928. return X86EMUL_UNHANDLEABLE;
  929. bytes -= tocopy;
  930. data += tocopy;
  931. addr += tocopy;
  932. }
  933. return X86EMUL_CONTINUE;
  934. }
  935. EXPORT_SYMBOL_GPL(emulator_read_std);
  936. static int emulator_write_std(unsigned long addr,
  937. const void *val,
  938. unsigned int bytes,
  939. struct kvm_vcpu *vcpu)
  940. {
  941. pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
  942. return X86EMUL_UNHANDLEABLE;
  943. }
  944. static int emulator_read_emulated(unsigned long addr,
  945. void *val,
  946. unsigned int bytes,
  947. struct kvm_vcpu *vcpu)
  948. {
  949. struct kvm_io_device *mmio_dev;
  950. gpa_t gpa;
  951. if (vcpu->mmio_read_completed) {
  952. memcpy(val, vcpu->mmio_data, bytes);
  953. vcpu->mmio_read_completed = 0;
  954. return X86EMUL_CONTINUE;
  955. }
  956. gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  957. /* For APIC access vmexit */
  958. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  959. goto mmio;
  960. if (emulator_read_std(addr, val, bytes, vcpu)
  961. == X86EMUL_CONTINUE)
  962. return X86EMUL_CONTINUE;
  963. if (gpa == UNMAPPED_GVA)
  964. return X86EMUL_PROPAGATE_FAULT;
  965. mmio:
  966. /*
  967. * Is this MMIO handled locally?
  968. */
  969. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  970. if (mmio_dev) {
  971. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  972. return X86EMUL_CONTINUE;
  973. }
  974. vcpu->mmio_needed = 1;
  975. vcpu->mmio_phys_addr = gpa;
  976. vcpu->mmio_size = bytes;
  977. vcpu->mmio_is_write = 0;
  978. return X86EMUL_UNHANDLEABLE;
  979. }
  980. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  981. const void *val, int bytes)
  982. {
  983. int ret;
  984. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  985. if (ret < 0)
  986. return 0;
  987. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  988. return 1;
  989. }
  990. static int emulator_write_emulated_onepage(unsigned long addr,
  991. const void *val,
  992. unsigned int bytes,
  993. struct kvm_vcpu *vcpu)
  994. {
  995. struct kvm_io_device *mmio_dev;
  996. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  997. if (gpa == UNMAPPED_GVA) {
  998. kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
  999. return X86EMUL_PROPAGATE_FAULT;
  1000. }
  1001. /* For APIC access vmexit */
  1002. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1003. goto mmio;
  1004. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1005. return X86EMUL_CONTINUE;
  1006. mmio:
  1007. /*
  1008. * Is this MMIO handled locally?
  1009. */
  1010. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1011. if (mmio_dev) {
  1012. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1013. return X86EMUL_CONTINUE;
  1014. }
  1015. vcpu->mmio_needed = 1;
  1016. vcpu->mmio_phys_addr = gpa;
  1017. vcpu->mmio_size = bytes;
  1018. vcpu->mmio_is_write = 1;
  1019. memcpy(vcpu->mmio_data, val, bytes);
  1020. return X86EMUL_CONTINUE;
  1021. }
  1022. int emulator_write_emulated(unsigned long addr,
  1023. const void *val,
  1024. unsigned int bytes,
  1025. struct kvm_vcpu *vcpu)
  1026. {
  1027. /* Crossing a page boundary? */
  1028. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1029. int rc, now;
  1030. now = -addr & ~PAGE_MASK;
  1031. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1032. if (rc != X86EMUL_CONTINUE)
  1033. return rc;
  1034. addr += now;
  1035. val += now;
  1036. bytes -= now;
  1037. }
  1038. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1039. }
  1040. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1041. static int emulator_cmpxchg_emulated(unsigned long addr,
  1042. const void *old,
  1043. const void *new,
  1044. unsigned int bytes,
  1045. struct kvm_vcpu *vcpu)
  1046. {
  1047. static int reported;
  1048. if (!reported) {
  1049. reported = 1;
  1050. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1051. }
  1052. return emulator_write_emulated(addr, new, bytes, vcpu);
  1053. }
  1054. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1055. {
  1056. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1057. }
  1058. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1059. {
  1060. return X86EMUL_CONTINUE;
  1061. }
  1062. int emulate_clts(struct kvm_vcpu *vcpu)
  1063. {
  1064. kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
  1065. return X86EMUL_CONTINUE;
  1066. }
  1067. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1068. {
  1069. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1070. switch (dr) {
  1071. case 0 ... 3:
  1072. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1073. return X86EMUL_CONTINUE;
  1074. default:
  1075. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1076. return X86EMUL_UNHANDLEABLE;
  1077. }
  1078. }
  1079. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1080. {
  1081. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1082. int exception;
  1083. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1084. if (exception) {
  1085. /* FIXME: better handling */
  1086. return X86EMUL_UNHANDLEABLE;
  1087. }
  1088. return X86EMUL_CONTINUE;
  1089. }
  1090. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1091. {
  1092. static int reported;
  1093. u8 opcodes[4];
  1094. unsigned long rip = vcpu->rip;
  1095. unsigned long rip_linear;
  1096. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1097. if (reported)
  1098. return;
  1099. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1100. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1101. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1102. reported = 1;
  1103. }
  1104. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1105. struct x86_emulate_ops emulate_ops = {
  1106. .read_std = emulator_read_std,
  1107. .write_std = emulator_write_std,
  1108. .read_emulated = emulator_read_emulated,
  1109. .write_emulated = emulator_write_emulated,
  1110. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1111. };
  1112. int emulate_instruction(struct kvm_vcpu *vcpu,
  1113. struct kvm_run *run,
  1114. unsigned long cr2,
  1115. u16 error_code,
  1116. int no_decode)
  1117. {
  1118. int r;
  1119. vcpu->mmio_fault_cr2 = cr2;
  1120. kvm_x86_ops->cache_regs(vcpu);
  1121. vcpu->mmio_is_write = 0;
  1122. vcpu->pio.string = 0;
  1123. if (!no_decode) {
  1124. int cs_db, cs_l;
  1125. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1126. vcpu->emulate_ctxt.vcpu = vcpu;
  1127. vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1128. vcpu->emulate_ctxt.cr2 = cr2;
  1129. vcpu->emulate_ctxt.mode =
  1130. (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
  1131. ? X86EMUL_MODE_REAL : cs_l
  1132. ? X86EMUL_MODE_PROT64 : cs_db
  1133. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1134. if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1135. vcpu->emulate_ctxt.cs_base = 0;
  1136. vcpu->emulate_ctxt.ds_base = 0;
  1137. vcpu->emulate_ctxt.es_base = 0;
  1138. vcpu->emulate_ctxt.ss_base = 0;
  1139. } else {
  1140. vcpu->emulate_ctxt.cs_base =
  1141. get_segment_base(vcpu, VCPU_SREG_CS);
  1142. vcpu->emulate_ctxt.ds_base =
  1143. get_segment_base(vcpu, VCPU_SREG_DS);
  1144. vcpu->emulate_ctxt.es_base =
  1145. get_segment_base(vcpu, VCPU_SREG_ES);
  1146. vcpu->emulate_ctxt.ss_base =
  1147. get_segment_base(vcpu, VCPU_SREG_SS);
  1148. }
  1149. vcpu->emulate_ctxt.gs_base =
  1150. get_segment_base(vcpu, VCPU_SREG_GS);
  1151. vcpu->emulate_ctxt.fs_base =
  1152. get_segment_base(vcpu, VCPU_SREG_FS);
  1153. r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1154. if (r) {
  1155. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1156. return EMULATE_DONE;
  1157. return EMULATE_FAIL;
  1158. }
  1159. }
  1160. r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1161. if (vcpu->pio.string)
  1162. return EMULATE_DO_MMIO;
  1163. if ((r || vcpu->mmio_is_write) && run) {
  1164. run->exit_reason = KVM_EXIT_MMIO;
  1165. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1166. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1167. run->mmio.len = vcpu->mmio_size;
  1168. run->mmio.is_write = vcpu->mmio_is_write;
  1169. }
  1170. if (r) {
  1171. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1172. return EMULATE_DONE;
  1173. if (!vcpu->mmio_needed) {
  1174. kvm_report_emulation_failure(vcpu, "mmio");
  1175. return EMULATE_FAIL;
  1176. }
  1177. return EMULATE_DO_MMIO;
  1178. }
  1179. kvm_x86_ops->decache_regs(vcpu);
  1180. kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
  1181. if (vcpu->mmio_is_write) {
  1182. vcpu->mmio_needed = 0;
  1183. return EMULATE_DO_MMIO;
  1184. }
  1185. return EMULATE_DONE;
  1186. }
  1187. EXPORT_SYMBOL_GPL(emulate_instruction);
  1188. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1189. {
  1190. int i;
  1191. for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
  1192. if (vcpu->pio.guest_pages[i]) {
  1193. kvm_release_page(vcpu->pio.guest_pages[i]);
  1194. vcpu->pio.guest_pages[i] = NULL;
  1195. }
  1196. }
  1197. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1198. {
  1199. void *p = vcpu->pio_data;
  1200. void *q;
  1201. unsigned bytes;
  1202. int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
  1203. q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1204. PAGE_KERNEL);
  1205. if (!q) {
  1206. free_pio_guest_pages(vcpu);
  1207. return -ENOMEM;
  1208. }
  1209. q += vcpu->pio.guest_page_offset;
  1210. bytes = vcpu->pio.size * vcpu->pio.cur_count;
  1211. if (vcpu->pio.in)
  1212. memcpy(q, p, bytes);
  1213. else
  1214. memcpy(p, q, bytes);
  1215. q -= vcpu->pio.guest_page_offset;
  1216. vunmap(q);
  1217. free_pio_guest_pages(vcpu);
  1218. return 0;
  1219. }
  1220. int complete_pio(struct kvm_vcpu *vcpu)
  1221. {
  1222. struct kvm_pio_request *io = &vcpu->pio;
  1223. long delta;
  1224. int r;
  1225. kvm_x86_ops->cache_regs(vcpu);
  1226. if (!io->string) {
  1227. if (io->in)
  1228. memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
  1229. io->size);
  1230. } else {
  1231. if (io->in) {
  1232. r = pio_copy_data(vcpu);
  1233. if (r) {
  1234. kvm_x86_ops->cache_regs(vcpu);
  1235. return r;
  1236. }
  1237. }
  1238. delta = 1;
  1239. if (io->rep) {
  1240. delta *= io->cur_count;
  1241. /*
  1242. * The size of the register should really depend on
  1243. * current address size.
  1244. */
  1245. vcpu->regs[VCPU_REGS_RCX] -= delta;
  1246. }
  1247. if (io->down)
  1248. delta = -delta;
  1249. delta *= io->size;
  1250. if (io->in)
  1251. vcpu->regs[VCPU_REGS_RDI] += delta;
  1252. else
  1253. vcpu->regs[VCPU_REGS_RSI] += delta;
  1254. }
  1255. kvm_x86_ops->decache_regs(vcpu);
  1256. io->count -= io->cur_count;
  1257. io->cur_count = 0;
  1258. return 0;
  1259. }
  1260. static void kernel_pio(struct kvm_io_device *pio_dev,
  1261. struct kvm_vcpu *vcpu,
  1262. void *pd)
  1263. {
  1264. /* TODO: String I/O for in kernel device */
  1265. mutex_lock(&vcpu->kvm->lock);
  1266. if (vcpu->pio.in)
  1267. kvm_iodevice_read(pio_dev, vcpu->pio.port,
  1268. vcpu->pio.size,
  1269. pd);
  1270. else
  1271. kvm_iodevice_write(pio_dev, vcpu->pio.port,
  1272. vcpu->pio.size,
  1273. pd);
  1274. mutex_unlock(&vcpu->kvm->lock);
  1275. }
  1276. static void pio_string_write(struct kvm_io_device *pio_dev,
  1277. struct kvm_vcpu *vcpu)
  1278. {
  1279. struct kvm_pio_request *io = &vcpu->pio;
  1280. void *pd = vcpu->pio_data;
  1281. int i;
  1282. mutex_lock(&vcpu->kvm->lock);
  1283. for (i = 0; i < io->cur_count; i++) {
  1284. kvm_iodevice_write(pio_dev, io->port,
  1285. io->size,
  1286. pd);
  1287. pd += io->size;
  1288. }
  1289. mutex_unlock(&vcpu->kvm->lock);
  1290. }
  1291. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1292. gpa_t addr)
  1293. {
  1294. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1295. }
  1296. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1297. int size, unsigned port)
  1298. {
  1299. struct kvm_io_device *pio_dev;
  1300. vcpu->run->exit_reason = KVM_EXIT_IO;
  1301. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1302. vcpu->run->io.size = vcpu->pio.size = size;
  1303. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1304. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
  1305. vcpu->run->io.port = vcpu->pio.port = port;
  1306. vcpu->pio.in = in;
  1307. vcpu->pio.string = 0;
  1308. vcpu->pio.down = 0;
  1309. vcpu->pio.guest_page_offset = 0;
  1310. vcpu->pio.rep = 0;
  1311. kvm_x86_ops->cache_regs(vcpu);
  1312. memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
  1313. kvm_x86_ops->decache_regs(vcpu);
  1314. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1315. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1316. if (pio_dev) {
  1317. kernel_pio(pio_dev, vcpu, vcpu->pio_data);
  1318. complete_pio(vcpu);
  1319. return 1;
  1320. }
  1321. return 0;
  1322. }
  1323. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1324. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1325. int size, unsigned long count, int down,
  1326. gva_t address, int rep, unsigned port)
  1327. {
  1328. unsigned now, in_page;
  1329. int i, ret = 0;
  1330. int nr_pages = 1;
  1331. struct page *page;
  1332. struct kvm_io_device *pio_dev;
  1333. vcpu->run->exit_reason = KVM_EXIT_IO;
  1334. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1335. vcpu->run->io.size = vcpu->pio.size = size;
  1336. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1337. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
  1338. vcpu->run->io.port = vcpu->pio.port = port;
  1339. vcpu->pio.in = in;
  1340. vcpu->pio.string = 1;
  1341. vcpu->pio.down = down;
  1342. vcpu->pio.guest_page_offset = offset_in_page(address);
  1343. vcpu->pio.rep = rep;
  1344. if (!count) {
  1345. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1346. return 1;
  1347. }
  1348. if (!down)
  1349. in_page = PAGE_SIZE - offset_in_page(address);
  1350. else
  1351. in_page = offset_in_page(address) + size;
  1352. now = min(count, (unsigned long)in_page / size);
  1353. if (!now) {
  1354. /*
  1355. * String I/O straddles page boundary. Pin two guest pages
  1356. * so that we satisfy atomicity constraints. Do just one
  1357. * transaction to avoid complexity.
  1358. */
  1359. nr_pages = 2;
  1360. now = 1;
  1361. }
  1362. if (down) {
  1363. /*
  1364. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1365. */
  1366. pr_unimpl(vcpu, "guest string pio down\n");
  1367. inject_gp(vcpu);
  1368. return 1;
  1369. }
  1370. vcpu->run->io.count = now;
  1371. vcpu->pio.cur_count = now;
  1372. if (vcpu->pio.cur_count == vcpu->pio.count)
  1373. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1374. for (i = 0; i < nr_pages; ++i) {
  1375. mutex_lock(&vcpu->kvm->lock);
  1376. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1377. vcpu->pio.guest_pages[i] = page;
  1378. mutex_unlock(&vcpu->kvm->lock);
  1379. if (!page) {
  1380. inject_gp(vcpu);
  1381. free_pio_guest_pages(vcpu);
  1382. return 1;
  1383. }
  1384. }
  1385. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1386. if (!vcpu->pio.in) {
  1387. /* string PIO write */
  1388. ret = pio_copy_data(vcpu);
  1389. if (ret >= 0 && pio_dev) {
  1390. pio_string_write(pio_dev, vcpu);
  1391. complete_pio(vcpu);
  1392. if (vcpu->pio.count == 0)
  1393. ret = 1;
  1394. }
  1395. } else if (pio_dev)
  1396. pr_unimpl(vcpu, "no string pio read support yet, "
  1397. "port %x size %d count %ld\n",
  1398. port, size, count);
  1399. return ret;
  1400. }
  1401. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1402. __init void kvm_arch_init(void)
  1403. {
  1404. kvm_init_msr_list();
  1405. }