ixgb_main.c 57 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.88 01/05/05
  23. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  24. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  25. * 1.0.84 10/26/04
  26. * - reset buffer_info->dma in Tx resource cleanup logic
  27. * 1.0.83 10/12/04
  28. * - sparse cleanup - shemminger@osdl.org
  29. * - fix tx resource cleanup logic
  30. */
  31. char ixgb_driver_name[] = "ixgb";
  32. char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  33. #ifndef CONFIG_IXGB_NAPI
  34. #define DRIVERNAPI
  35. #else
  36. #define DRIVERNAPI "-NAPI"
  37. #endif
  38. char ixgb_driver_version[] = "1.0.90-k2"DRIVERNAPI;
  39. char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  40. /* ixgb_pci_tbl - PCI Device ID Table
  41. *
  42. * Wildcard entries (PCI_ANY_ID) should come last
  43. * Last entry must be all 0s
  44. *
  45. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  46. * Class, Class Mask, private data (not used) }
  47. */
  48. static struct pci_device_id ixgb_pci_tbl[] = {
  49. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  50. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  51. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  52. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  53. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  54. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  55. /* required last entry */
  56. {0,}
  57. };
  58. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  59. /* Local Function Prototypes */
  60. int ixgb_up(struct ixgb_adapter *adapter);
  61. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  62. void ixgb_reset(struct ixgb_adapter *adapter);
  63. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  64. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  65. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  66. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  67. void ixgb_update_stats(struct ixgb_adapter *adapter);
  68. static int ixgb_init_module(void);
  69. static void ixgb_exit_module(void);
  70. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  71. static void __devexit ixgb_remove(struct pci_dev *pdev);
  72. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  73. static int ixgb_open(struct net_device *netdev);
  74. static int ixgb_close(struct net_device *netdev);
  75. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  76. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  77. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  78. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  79. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  80. static void ixgb_set_multi(struct net_device *netdev);
  81. static void ixgb_watchdog(unsigned long data);
  82. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  83. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  84. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  85. static int ixgb_set_mac(struct net_device *netdev, void *p);
  86. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  87. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  88. #ifdef CONFIG_IXGB_NAPI
  89. static int ixgb_clean(struct net_device *netdev, int *budget);
  90. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  91. int *work_done, int work_to_do);
  92. #else
  93. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  94. #endif
  95. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  96. void ixgb_set_ethtool_ops(struct net_device *netdev);
  97. static void ixgb_tx_timeout(struct net_device *dev);
  98. static void ixgb_tx_timeout_task(struct net_device *dev);
  99. static void ixgb_vlan_rx_register(struct net_device *netdev,
  100. struct vlan_group *grp);
  101. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  102. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  103. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  104. static int ixgb_notify_reboot(struct notifier_block *, unsigned long event,
  105. void *ptr);
  106. static int ixgb_suspend(struct pci_dev *pdev, uint32_t state);
  107. #ifdef CONFIG_NET_POLL_CONTROLLER
  108. /* for netdump / net console */
  109. static void ixgb_netpoll(struct net_device *dev);
  110. #endif
  111. struct notifier_block ixgb_notifier_reboot = {
  112. .notifier_call = ixgb_notify_reboot,
  113. .next = NULL,
  114. .priority = 0
  115. };
  116. /* Exported from other modules */
  117. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  118. static struct pci_driver ixgb_driver = {
  119. .name = ixgb_driver_name,
  120. .id_table = ixgb_pci_tbl,
  121. .probe = ixgb_probe,
  122. .remove = __devexit_p(ixgb_remove),
  123. /* Power Managment Hooks */
  124. .suspend = NULL,
  125. .resume = NULL
  126. };
  127. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  128. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  129. MODULE_LICENSE("GPL");
  130. /* some defines for controlling descriptor fetches in h/w */
  131. #define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */
  132. #define RXDCTL_HTHRESH_DEFAULT 16 /* chip will only prefetch if tail is
  133. pushed this many descriptors from head */
  134. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  135. /**
  136. * ixgb_init_module - Driver Registration Routine
  137. *
  138. * ixgb_init_module is the first routine called when the driver is
  139. * loaded. All it does is register with the PCI subsystem.
  140. **/
  141. static int __init
  142. ixgb_init_module(void)
  143. {
  144. int ret;
  145. printk(KERN_INFO "%s - version %s\n",
  146. ixgb_driver_string, ixgb_driver_version);
  147. printk(KERN_INFO "%s\n", ixgb_copyright);
  148. ret = pci_module_init(&ixgb_driver);
  149. if(ret >= 0) {
  150. register_reboot_notifier(&ixgb_notifier_reboot);
  151. }
  152. return ret;
  153. }
  154. module_init(ixgb_init_module);
  155. /**
  156. * ixgb_exit_module - Driver Exit Cleanup Routine
  157. *
  158. * ixgb_exit_module is called just before the driver is removed
  159. * from memory.
  160. **/
  161. static void __exit
  162. ixgb_exit_module(void)
  163. {
  164. unregister_reboot_notifier(&ixgb_notifier_reboot);
  165. pci_unregister_driver(&ixgb_driver);
  166. }
  167. module_exit(ixgb_exit_module);
  168. /**
  169. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  170. * @adapter: board private structure
  171. **/
  172. static inline void
  173. ixgb_irq_disable(struct ixgb_adapter *adapter)
  174. {
  175. atomic_inc(&adapter->irq_sem);
  176. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  177. IXGB_WRITE_FLUSH(&adapter->hw);
  178. synchronize_irq(adapter->pdev->irq);
  179. }
  180. /**
  181. * ixgb_irq_enable - Enable default interrupt generation settings
  182. * @adapter: board private structure
  183. **/
  184. static inline void
  185. ixgb_irq_enable(struct ixgb_adapter *adapter)
  186. {
  187. if(atomic_dec_and_test(&adapter->irq_sem)) {
  188. IXGB_WRITE_REG(&adapter->hw, IMS,
  189. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  190. IXGB_INT_LSC);
  191. IXGB_WRITE_FLUSH(&adapter->hw);
  192. }
  193. }
  194. int
  195. ixgb_up(struct ixgb_adapter *adapter)
  196. {
  197. struct net_device *netdev = adapter->netdev;
  198. int err;
  199. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  200. struct ixgb_hw *hw = &adapter->hw;
  201. /* hardware has been reset, we need to reload some things */
  202. ixgb_set_multi(netdev);
  203. ixgb_restore_vlan(adapter);
  204. ixgb_configure_tx(adapter);
  205. ixgb_setup_rctl(adapter);
  206. ixgb_configure_rx(adapter);
  207. ixgb_alloc_rx_buffers(adapter);
  208. #ifdef CONFIG_PCI_MSI
  209. {
  210. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  211. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  212. adapter->have_msi = TRUE;
  213. if (!pcix)
  214. adapter->have_msi = FALSE;
  215. else if((err = pci_enable_msi(adapter->pdev))) {
  216. printk (KERN_ERR
  217. "Unable to allocate MSI interrupt Error: %d\n", err);
  218. adapter->have_msi = FALSE;
  219. /* proceed to try to request regular interrupt */
  220. }
  221. }
  222. #endif
  223. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  224. SA_SHIRQ | SA_SAMPLE_RANDOM,
  225. netdev->name, netdev)))
  226. return err;
  227. /* disable interrupts and get the hardware into a known state */
  228. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  229. if((hw->max_frame_size != max_frame) ||
  230. (hw->max_frame_size !=
  231. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  232. hw->max_frame_size = max_frame;
  233. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  234. if(hw->max_frame_size >
  235. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  236. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  237. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  238. ctrl0 |= IXGB_CTRL0_JFE;
  239. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  240. }
  241. }
  242. }
  243. mod_timer(&adapter->watchdog_timer, jiffies);
  244. ixgb_irq_enable(adapter);
  245. #ifdef CONFIG_IXGB_NAPI
  246. netif_poll_enable(netdev);
  247. #endif
  248. return 0;
  249. }
  250. void
  251. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  252. {
  253. struct net_device *netdev = adapter->netdev;
  254. ixgb_irq_disable(adapter);
  255. free_irq(adapter->pdev->irq, netdev);
  256. #ifdef CONFIG_PCI_MSI
  257. if(adapter->have_msi == TRUE)
  258. pci_disable_msi(adapter->pdev);
  259. #endif
  260. if(kill_watchdog)
  261. del_timer_sync(&adapter->watchdog_timer);
  262. #ifdef CONFIG_IXGB_NAPI
  263. netif_poll_disable(netdev);
  264. #endif
  265. adapter->link_speed = 0;
  266. adapter->link_duplex = 0;
  267. netif_carrier_off(netdev);
  268. netif_stop_queue(netdev);
  269. ixgb_reset(adapter);
  270. ixgb_clean_tx_ring(adapter);
  271. ixgb_clean_rx_ring(adapter);
  272. }
  273. void
  274. ixgb_reset(struct ixgb_adapter *adapter)
  275. {
  276. ixgb_adapter_stop(&adapter->hw);
  277. if(!ixgb_init_hw(&adapter->hw))
  278. IXGB_DBG("ixgb_init_hw failed.\n");
  279. }
  280. /**
  281. * ixgb_probe - Device Initialization Routine
  282. * @pdev: PCI device information struct
  283. * @ent: entry in ixgb_pci_tbl
  284. *
  285. * Returns 0 on success, negative on failure
  286. *
  287. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  288. * The OS initialization, configuring of the adapter private structure,
  289. * and a hardware reset occur.
  290. **/
  291. static int __devinit
  292. ixgb_probe(struct pci_dev *pdev,
  293. const struct pci_device_id *ent)
  294. {
  295. struct net_device *netdev = NULL;
  296. struct ixgb_adapter *adapter;
  297. static int cards_found = 0;
  298. unsigned long mmio_start;
  299. int mmio_len;
  300. int pci_using_dac;
  301. int i;
  302. int err;
  303. if((err = pci_enable_device(pdev)))
  304. return err;
  305. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  306. pci_using_dac = 1;
  307. } else {
  308. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  309. IXGB_ERR("No usable DMA configuration, aborting\n");
  310. return err;
  311. }
  312. pci_using_dac = 0;
  313. }
  314. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  315. return err;
  316. pci_set_master(pdev);
  317. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  318. if(!netdev) {
  319. err = -ENOMEM;
  320. goto err_alloc_etherdev;
  321. }
  322. SET_MODULE_OWNER(netdev);
  323. SET_NETDEV_DEV(netdev, &pdev->dev);
  324. pci_set_drvdata(pdev, netdev);
  325. adapter = netdev->priv;
  326. adapter->netdev = netdev;
  327. adapter->pdev = pdev;
  328. adapter->hw.back = adapter;
  329. mmio_start = pci_resource_start(pdev, BAR_0);
  330. mmio_len = pci_resource_len(pdev, BAR_0);
  331. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  332. if(!adapter->hw.hw_addr) {
  333. err = -EIO;
  334. goto err_ioremap;
  335. }
  336. for(i = BAR_1; i <= BAR_5; i++) {
  337. if(pci_resource_len(pdev, i) == 0)
  338. continue;
  339. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  340. adapter->hw.io_base = pci_resource_start(pdev, i);
  341. break;
  342. }
  343. }
  344. netdev->open = &ixgb_open;
  345. netdev->stop = &ixgb_close;
  346. netdev->hard_start_xmit = &ixgb_xmit_frame;
  347. netdev->get_stats = &ixgb_get_stats;
  348. netdev->set_multicast_list = &ixgb_set_multi;
  349. netdev->set_mac_address = &ixgb_set_mac;
  350. netdev->change_mtu = &ixgb_change_mtu;
  351. ixgb_set_ethtool_ops(netdev);
  352. netdev->tx_timeout = &ixgb_tx_timeout;
  353. netdev->watchdog_timeo = HZ;
  354. #ifdef CONFIG_IXGB_NAPI
  355. netdev->poll = &ixgb_clean;
  356. netdev->weight = 64;
  357. #endif
  358. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  359. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  360. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  361. #ifdef CONFIG_NET_POLL_CONTROLLER
  362. netdev->poll_controller = ixgb_netpoll;
  363. #endif
  364. netdev->mem_start = mmio_start;
  365. netdev->mem_end = mmio_start + mmio_len;
  366. netdev->base_addr = adapter->hw.io_base;
  367. adapter->bd_number = cards_found;
  368. adapter->link_speed = 0;
  369. adapter->link_duplex = 0;
  370. /* setup the private structure */
  371. if((err = ixgb_sw_init(adapter)))
  372. goto err_sw_init;
  373. netdev->features = NETIF_F_SG |
  374. NETIF_F_HW_CSUM |
  375. NETIF_F_HW_VLAN_TX |
  376. NETIF_F_HW_VLAN_RX |
  377. NETIF_F_HW_VLAN_FILTER;
  378. #ifdef NETIF_F_TSO
  379. netdev->features |= NETIF_F_TSO;
  380. #endif
  381. if(pci_using_dac)
  382. netdev->features |= NETIF_F_HIGHDMA;
  383. /* make sure the EEPROM is good */
  384. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  385. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  386. err = -EIO;
  387. goto err_eeprom;
  388. }
  389. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  390. if(!is_valid_ether_addr(netdev->dev_addr)) {
  391. err = -EIO;
  392. goto err_eeprom;
  393. }
  394. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  395. init_timer(&adapter->watchdog_timer);
  396. adapter->watchdog_timer.function = &ixgb_watchdog;
  397. adapter->watchdog_timer.data = (unsigned long)adapter;
  398. INIT_WORK(&adapter->tx_timeout_task,
  399. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  400. if((err = register_netdev(netdev)))
  401. goto err_register;
  402. /* we're going to reset, so assume we have no link for now */
  403. netif_carrier_off(netdev);
  404. netif_stop_queue(netdev);
  405. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  406. netdev->name);
  407. ixgb_check_options(adapter);
  408. /* reset the hardware with the new settings */
  409. ixgb_reset(adapter);
  410. cards_found++;
  411. return 0;
  412. err_register:
  413. err_sw_init:
  414. err_eeprom:
  415. iounmap(adapter->hw.hw_addr);
  416. err_ioremap:
  417. free_netdev(netdev);
  418. err_alloc_etherdev:
  419. pci_release_regions(pdev);
  420. return err;
  421. }
  422. /**
  423. * ixgb_remove - Device Removal Routine
  424. * @pdev: PCI device information struct
  425. *
  426. * ixgb_remove is called by the PCI subsystem to alert the driver
  427. * that it should release a PCI device. The could be caused by a
  428. * Hot-Plug event, or because the driver is going to be removed from
  429. * memory.
  430. **/
  431. static void __devexit
  432. ixgb_remove(struct pci_dev *pdev)
  433. {
  434. struct net_device *netdev = pci_get_drvdata(pdev);
  435. struct ixgb_adapter *adapter = netdev->priv;
  436. unregister_netdev(netdev);
  437. iounmap(adapter->hw.hw_addr);
  438. pci_release_regions(pdev);
  439. free_netdev(netdev);
  440. }
  441. /**
  442. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  443. * @adapter: board private structure to initialize
  444. *
  445. * ixgb_sw_init initializes the Adapter private data structure.
  446. * Fields are initialized based on PCI device information and
  447. * OS network device settings (MTU size).
  448. **/
  449. static int __devinit
  450. ixgb_sw_init(struct ixgb_adapter *adapter)
  451. {
  452. struct ixgb_hw *hw = &adapter->hw;
  453. struct net_device *netdev = adapter->netdev;
  454. struct pci_dev *pdev = adapter->pdev;
  455. /* PCI config space info */
  456. hw->vendor_id = pdev->vendor;
  457. hw->device_id = pdev->device;
  458. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  459. hw->subsystem_id = pdev->subsystem_device;
  460. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  461. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  462. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  463. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  464. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  465. hw->mac_type = ixgb_82597;
  466. else {
  467. /* should never have loaded on this device */
  468. printk(KERN_ERR "ixgb: unsupported device id\n");
  469. }
  470. /* enable flow control to be programmed */
  471. hw->fc.send_xon = 1;
  472. atomic_set(&adapter->irq_sem, 1);
  473. spin_lock_init(&adapter->tx_lock);
  474. return 0;
  475. }
  476. /**
  477. * ixgb_open - Called when a network interface is made active
  478. * @netdev: network interface device structure
  479. *
  480. * Returns 0 on success, negative value on failure
  481. *
  482. * The open entry point is called when a network interface is made
  483. * active by the system (IFF_UP). At this point all resources needed
  484. * for transmit and receive operations are allocated, the interrupt
  485. * handler is registered with the OS, the watchdog timer is started,
  486. * and the stack is notified that the interface is ready.
  487. **/
  488. static int
  489. ixgb_open(struct net_device *netdev)
  490. {
  491. struct ixgb_adapter *adapter = netdev->priv;
  492. int err;
  493. /* allocate transmit descriptors */
  494. if((err = ixgb_setup_tx_resources(adapter)))
  495. goto err_setup_tx;
  496. /* allocate receive descriptors */
  497. if((err = ixgb_setup_rx_resources(adapter)))
  498. goto err_setup_rx;
  499. if((err = ixgb_up(adapter)))
  500. goto err_up;
  501. return 0;
  502. err_up:
  503. ixgb_free_rx_resources(adapter);
  504. err_setup_rx:
  505. ixgb_free_tx_resources(adapter);
  506. err_setup_tx:
  507. ixgb_reset(adapter);
  508. return err;
  509. }
  510. /**
  511. * ixgb_close - Disables a network interface
  512. * @netdev: network interface device structure
  513. *
  514. * Returns 0, this is not allowed to fail
  515. *
  516. * The close entry point is called when an interface is de-activated
  517. * by the OS. The hardware is still under the drivers control, but
  518. * needs to be disabled. A global MAC reset is issued to stop the
  519. * hardware, and all transmit and receive resources are freed.
  520. **/
  521. static int
  522. ixgb_close(struct net_device *netdev)
  523. {
  524. struct ixgb_adapter *adapter = netdev->priv;
  525. ixgb_down(adapter, TRUE);
  526. ixgb_free_tx_resources(adapter);
  527. ixgb_free_rx_resources(adapter);
  528. return 0;
  529. }
  530. /**
  531. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  532. * @adapter: board private structure
  533. *
  534. * Return 0 on success, negative on failure
  535. **/
  536. int
  537. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  538. {
  539. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  540. struct pci_dev *pdev = adapter->pdev;
  541. int size;
  542. size = sizeof(struct ixgb_buffer) * txdr->count;
  543. txdr->buffer_info = vmalloc(size);
  544. if(!txdr->buffer_info) {
  545. return -ENOMEM;
  546. }
  547. memset(txdr->buffer_info, 0, size);
  548. /* round up to nearest 4K */
  549. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  550. IXGB_ROUNDUP(txdr->size, 4096);
  551. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  552. if(!txdr->desc) {
  553. vfree(txdr->buffer_info);
  554. return -ENOMEM;
  555. }
  556. memset(txdr->desc, 0, txdr->size);
  557. txdr->next_to_use = 0;
  558. txdr->next_to_clean = 0;
  559. return 0;
  560. }
  561. /**
  562. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  563. * @adapter: board private structure
  564. *
  565. * Configure the Tx unit of the MAC after a reset.
  566. **/
  567. static void
  568. ixgb_configure_tx(struct ixgb_adapter *adapter)
  569. {
  570. uint64_t tdba = adapter->tx_ring.dma;
  571. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  572. uint32_t tctl;
  573. struct ixgb_hw *hw = &adapter->hw;
  574. /* Setup the Base and Length of the Tx Descriptor Ring
  575. * tx_ring.dma can be either a 32 or 64 bit value
  576. */
  577. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  578. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  579. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  580. /* Setup the HW Tx Head and Tail descriptor pointers */
  581. IXGB_WRITE_REG(hw, TDH, 0);
  582. IXGB_WRITE_REG(hw, TDT, 0);
  583. /* don't set up txdctl, it induces performance problems if configured
  584. * incorrectly */
  585. /* Set the Tx Interrupt Delay register */
  586. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  587. /* Program the Transmit Control Register */
  588. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  589. IXGB_WRITE_REG(hw, TCTL, tctl);
  590. /* Setup Transmit Descriptor Settings for this adapter */
  591. adapter->tx_cmd_type =
  592. IXGB_TX_DESC_TYPE
  593. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  594. }
  595. /**
  596. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  597. * @adapter: board private structure
  598. *
  599. * Returns 0 on success, negative on failure
  600. **/
  601. int
  602. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  603. {
  604. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  605. struct pci_dev *pdev = adapter->pdev;
  606. int size;
  607. size = sizeof(struct ixgb_buffer) * rxdr->count;
  608. rxdr->buffer_info = vmalloc(size);
  609. if(!rxdr->buffer_info) {
  610. return -ENOMEM;
  611. }
  612. memset(rxdr->buffer_info, 0, size);
  613. /* Round up to nearest 4K */
  614. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  615. IXGB_ROUNDUP(rxdr->size, 4096);
  616. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  617. if(!rxdr->desc) {
  618. vfree(rxdr->buffer_info);
  619. return -ENOMEM;
  620. }
  621. memset(rxdr->desc, 0, rxdr->size);
  622. rxdr->next_to_clean = 0;
  623. rxdr->next_to_use = 0;
  624. return 0;
  625. }
  626. /**
  627. * ixgb_setup_rctl - configure the receive control register
  628. * @adapter: Board private structure
  629. **/
  630. static void
  631. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  632. {
  633. uint32_t rctl;
  634. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  635. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  636. rctl |=
  637. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  638. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  639. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  640. rctl |= IXGB_RCTL_SECRC;
  641. switch (adapter->rx_buffer_len) {
  642. case IXGB_RXBUFFER_2048:
  643. default:
  644. rctl |= IXGB_RCTL_BSIZE_2048;
  645. break;
  646. case IXGB_RXBUFFER_4096:
  647. rctl |= IXGB_RCTL_BSIZE_4096;
  648. break;
  649. case IXGB_RXBUFFER_8192:
  650. rctl |= IXGB_RCTL_BSIZE_8192;
  651. break;
  652. case IXGB_RXBUFFER_16384:
  653. rctl |= IXGB_RCTL_BSIZE_16384;
  654. break;
  655. }
  656. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  657. }
  658. /**
  659. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  660. * @adapter: board private structure
  661. *
  662. * Configure the Rx unit of the MAC after a reset.
  663. **/
  664. static void
  665. ixgb_configure_rx(struct ixgb_adapter *adapter)
  666. {
  667. uint64_t rdba = adapter->rx_ring.dma;
  668. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  669. struct ixgb_hw *hw = &adapter->hw;
  670. uint32_t rctl;
  671. uint32_t rxcsum;
  672. uint32_t rxdctl;
  673. /* make sure receives are disabled while setting up the descriptors */
  674. rctl = IXGB_READ_REG(hw, RCTL);
  675. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  676. /* set the Receive Delay Timer Register */
  677. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  678. /* Setup the Base and Length of the Rx Descriptor Ring */
  679. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  680. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  681. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  682. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  683. IXGB_WRITE_REG(hw, RDH, 0);
  684. IXGB_WRITE_REG(hw, RDT, 0);
  685. /* set up pre-fetching of receive buffers so we get some before we
  686. * run out (default hardware behavior is to run out before fetching
  687. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  688. * and the descriptors in hw cache are below PTHRESH. This avoids
  689. * the hardware behavior of fetching <=512 descriptors in a single
  690. * burst that pre-empts all other activity, usually causing fifo
  691. * overflows. */
  692. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  693. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  694. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  695. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  696. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  697. /* Enable Receive Checksum Offload for TCP and UDP */
  698. if(adapter->rx_csum == TRUE) {
  699. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  700. rxcsum |= IXGB_RXCSUM_TUOFL;
  701. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  702. }
  703. /* Enable Receives */
  704. IXGB_WRITE_REG(hw, RCTL, rctl);
  705. }
  706. /**
  707. * ixgb_free_tx_resources - Free Tx Resources
  708. * @adapter: board private structure
  709. *
  710. * Free all transmit software resources
  711. **/
  712. void
  713. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  714. {
  715. struct pci_dev *pdev = adapter->pdev;
  716. ixgb_clean_tx_ring(adapter);
  717. vfree(adapter->tx_ring.buffer_info);
  718. adapter->tx_ring.buffer_info = NULL;
  719. pci_free_consistent(pdev, adapter->tx_ring.size,
  720. adapter->tx_ring.desc, adapter->tx_ring.dma);
  721. adapter->tx_ring.desc = NULL;
  722. }
  723. static inline void
  724. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  725. struct ixgb_buffer *buffer_info)
  726. {
  727. struct pci_dev *pdev = adapter->pdev;
  728. if(buffer_info->dma) {
  729. pci_unmap_page(pdev,
  730. buffer_info->dma,
  731. buffer_info->length,
  732. PCI_DMA_TODEVICE);
  733. buffer_info->dma = 0;
  734. }
  735. if(buffer_info->skb) {
  736. dev_kfree_skb_any(buffer_info->skb);
  737. buffer_info->skb = NULL;
  738. }
  739. }
  740. /**
  741. * ixgb_clean_tx_ring - Free Tx Buffers
  742. * @adapter: board private structure
  743. **/
  744. static void
  745. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  746. {
  747. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  748. struct ixgb_buffer *buffer_info;
  749. unsigned long size;
  750. unsigned int i;
  751. /* Free all the Tx ring sk_buffs */
  752. for(i = 0; i < tx_ring->count; i++) {
  753. buffer_info = &tx_ring->buffer_info[i];
  754. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  755. }
  756. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  757. memset(tx_ring->buffer_info, 0, size);
  758. /* Zero out the descriptor ring */
  759. memset(tx_ring->desc, 0, tx_ring->size);
  760. tx_ring->next_to_use = 0;
  761. tx_ring->next_to_clean = 0;
  762. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  763. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  764. }
  765. /**
  766. * ixgb_free_rx_resources - Free Rx Resources
  767. * @adapter: board private structure
  768. *
  769. * Free all receive software resources
  770. **/
  771. void
  772. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  773. {
  774. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  775. struct pci_dev *pdev = adapter->pdev;
  776. ixgb_clean_rx_ring(adapter);
  777. vfree(rx_ring->buffer_info);
  778. rx_ring->buffer_info = NULL;
  779. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  780. rx_ring->desc = NULL;
  781. }
  782. /**
  783. * ixgb_clean_rx_ring - Free Rx Buffers
  784. * @adapter: board private structure
  785. **/
  786. static void
  787. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  788. {
  789. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  790. struct ixgb_buffer *buffer_info;
  791. struct pci_dev *pdev = adapter->pdev;
  792. unsigned long size;
  793. unsigned int i;
  794. /* Free all the Rx ring sk_buffs */
  795. for(i = 0; i < rx_ring->count; i++) {
  796. buffer_info = &rx_ring->buffer_info[i];
  797. if(buffer_info->skb) {
  798. pci_unmap_single(pdev,
  799. buffer_info->dma,
  800. buffer_info->length,
  801. PCI_DMA_FROMDEVICE);
  802. dev_kfree_skb(buffer_info->skb);
  803. buffer_info->skb = NULL;
  804. }
  805. }
  806. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  807. memset(rx_ring->buffer_info, 0, size);
  808. /* Zero out the descriptor ring */
  809. memset(rx_ring->desc, 0, rx_ring->size);
  810. rx_ring->next_to_clean = 0;
  811. rx_ring->next_to_use = 0;
  812. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  813. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  814. }
  815. /**
  816. * ixgb_set_mac - Change the Ethernet Address of the NIC
  817. * @netdev: network interface device structure
  818. * @p: pointer to an address structure
  819. *
  820. * Returns 0 on success, negative on failure
  821. **/
  822. static int
  823. ixgb_set_mac(struct net_device *netdev, void *p)
  824. {
  825. struct ixgb_adapter *adapter = netdev->priv;
  826. struct sockaddr *addr = p;
  827. if(!is_valid_ether_addr(addr->sa_data))
  828. return -EADDRNOTAVAIL;
  829. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  830. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  831. return 0;
  832. }
  833. /**
  834. * ixgb_set_multi - Multicast and Promiscuous mode set
  835. * @netdev: network interface device structure
  836. *
  837. * The set_multi entry point is called whenever the multicast address
  838. * list or the network interface flags are updated. This routine is
  839. * responsible for configuring the hardware for proper multicast,
  840. * promiscuous mode, and all-multi behavior.
  841. **/
  842. static void
  843. ixgb_set_multi(struct net_device *netdev)
  844. {
  845. struct ixgb_adapter *adapter = netdev->priv;
  846. struct ixgb_hw *hw = &adapter->hw;
  847. struct dev_mc_list *mc_ptr;
  848. uint32_t rctl;
  849. int i;
  850. /* Check for Promiscuous and All Multicast modes */
  851. rctl = IXGB_READ_REG(hw, RCTL);
  852. if(netdev->flags & IFF_PROMISC) {
  853. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  854. } else if(netdev->flags & IFF_ALLMULTI) {
  855. rctl |= IXGB_RCTL_MPE;
  856. rctl &= ~IXGB_RCTL_UPE;
  857. } else {
  858. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  859. }
  860. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  861. rctl |= IXGB_RCTL_MPE;
  862. IXGB_WRITE_REG(hw, RCTL, rctl);
  863. } else {
  864. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  865. IXGB_WRITE_REG(hw, RCTL, rctl);
  866. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  867. i++, mc_ptr = mc_ptr->next)
  868. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  869. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  870. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  871. }
  872. }
  873. /**
  874. * ixgb_watchdog - Timer Call-back
  875. * @data: pointer to netdev cast into an unsigned long
  876. **/
  877. static void
  878. ixgb_watchdog(unsigned long data)
  879. {
  880. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  881. struct net_device *netdev = adapter->netdev;
  882. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  883. ixgb_check_for_link(&adapter->hw);
  884. if (ixgb_check_for_bad_link(&adapter->hw)) {
  885. /* force the reset path */
  886. netif_stop_queue(netdev);
  887. }
  888. if(adapter->hw.link_up) {
  889. if(!netif_carrier_ok(netdev)) {
  890. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  891. netdev->name, 10000, "Full Duplex");
  892. adapter->link_speed = 10000;
  893. adapter->link_duplex = FULL_DUPLEX;
  894. netif_carrier_on(netdev);
  895. netif_wake_queue(netdev);
  896. }
  897. } else {
  898. if(netif_carrier_ok(netdev)) {
  899. adapter->link_speed = 0;
  900. adapter->link_duplex = 0;
  901. printk(KERN_INFO
  902. "ixgb: %s NIC Link is Down\n",
  903. netdev->name);
  904. netif_carrier_off(netdev);
  905. netif_stop_queue(netdev);
  906. }
  907. }
  908. ixgb_update_stats(adapter);
  909. if(!netif_carrier_ok(netdev)) {
  910. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  911. /* We've lost link, so the controller stops DMA,
  912. * but we've got queued Tx work that's never going
  913. * to get done, so reset controller to flush Tx.
  914. * (Do the reset outside of interrupt context). */
  915. schedule_work(&adapter->tx_timeout_task);
  916. }
  917. }
  918. /* Force detection of hung controller every watchdog period */
  919. adapter->detect_tx_hung = TRUE;
  920. /* generate an interrupt to force clean up of any stragglers */
  921. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  922. /* Reset the timer */
  923. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  924. }
  925. #define IXGB_TX_FLAGS_CSUM 0x00000001
  926. #define IXGB_TX_FLAGS_VLAN 0x00000002
  927. #define IXGB_TX_FLAGS_TSO 0x00000004
  928. static inline int
  929. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  930. {
  931. #ifdef NETIF_F_TSO
  932. struct ixgb_context_desc *context_desc;
  933. unsigned int i;
  934. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  935. uint16_t ipcse, tucse, mss;
  936. int err;
  937. if(likely(skb_shinfo(skb)->tso_size)) {
  938. if (skb_header_cloned(skb)) {
  939. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  940. if (err)
  941. return err;
  942. }
  943. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  944. mss = skb_shinfo(skb)->tso_size;
  945. skb->nh.iph->tot_len = 0;
  946. skb->nh.iph->check = 0;
  947. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  948. skb->nh.iph->daddr,
  949. 0, IPPROTO_TCP, 0);
  950. ipcss = skb->nh.raw - skb->data;
  951. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  952. ipcse = skb->h.raw - skb->data - 1;
  953. tucss = skb->h.raw - skb->data;
  954. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  955. tucse = 0;
  956. i = adapter->tx_ring.next_to_use;
  957. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  958. context_desc->ipcss = ipcss;
  959. context_desc->ipcso = ipcso;
  960. context_desc->ipcse = cpu_to_le16(ipcse);
  961. context_desc->tucss = tucss;
  962. context_desc->tucso = tucso;
  963. context_desc->tucse = cpu_to_le16(tucse);
  964. context_desc->mss = cpu_to_le16(mss);
  965. context_desc->hdr_len = hdr_len;
  966. context_desc->status = 0;
  967. context_desc->cmd_type_len = cpu_to_le32(
  968. IXGB_CONTEXT_DESC_TYPE
  969. | IXGB_CONTEXT_DESC_CMD_TSE
  970. | IXGB_CONTEXT_DESC_CMD_IP
  971. | IXGB_CONTEXT_DESC_CMD_TCP
  972. | IXGB_CONTEXT_DESC_CMD_IDE
  973. | (skb->len - (hdr_len)));
  974. if(++i == adapter->tx_ring.count) i = 0;
  975. adapter->tx_ring.next_to_use = i;
  976. return 1;
  977. }
  978. #endif
  979. return 0;
  980. }
  981. static inline boolean_t
  982. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  983. {
  984. struct ixgb_context_desc *context_desc;
  985. unsigned int i;
  986. uint8_t css, cso;
  987. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  988. css = skb->h.raw - skb->data;
  989. cso = (skb->h.raw + skb->csum) - skb->data;
  990. i = adapter->tx_ring.next_to_use;
  991. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  992. context_desc->tucss = css;
  993. context_desc->tucso = cso;
  994. context_desc->tucse = 0;
  995. /* zero out any previously existing data in one instruction */
  996. *(uint32_t *)&(context_desc->ipcss) = 0;
  997. context_desc->status = 0;
  998. context_desc->hdr_len = 0;
  999. context_desc->mss = 0;
  1000. context_desc->cmd_type_len =
  1001. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1002. | IXGB_TX_DESC_CMD_IDE);
  1003. if(++i == adapter->tx_ring.count) i = 0;
  1004. adapter->tx_ring.next_to_use = i;
  1005. return TRUE;
  1006. }
  1007. return FALSE;
  1008. }
  1009. #define IXGB_MAX_TXD_PWR 14
  1010. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1011. static inline int
  1012. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1013. unsigned int first)
  1014. {
  1015. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1016. struct ixgb_buffer *buffer_info;
  1017. int len = skb->len;
  1018. unsigned int offset = 0, size, count = 0, i;
  1019. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1020. unsigned int f;
  1021. len -= skb->data_len;
  1022. i = tx_ring->next_to_use;
  1023. while(len) {
  1024. buffer_info = &tx_ring->buffer_info[i];
  1025. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1026. buffer_info->length = size;
  1027. buffer_info->dma =
  1028. pci_map_single(adapter->pdev,
  1029. skb->data + offset,
  1030. size,
  1031. PCI_DMA_TODEVICE);
  1032. buffer_info->time_stamp = jiffies;
  1033. len -= size;
  1034. offset += size;
  1035. count++;
  1036. if(++i == tx_ring->count) i = 0;
  1037. }
  1038. for(f = 0; f < nr_frags; f++) {
  1039. struct skb_frag_struct *frag;
  1040. frag = &skb_shinfo(skb)->frags[f];
  1041. len = frag->size;
  1042. offset = 0;
  1043. while(len) {
  1044. buffer_info = &tx_ring->buffer_info[i];
  1045. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1046. buffer_info->length = size;
  1047. buffer_info->dma =
  1048. pci_map_page(adapter->pdev,
  1049. frag->page,
  1050. frag->page_offset + offset,
  1051. size,
  1052. PCI_DMA_TODEVICE);
  1053. buffer_info->time_stamp = jiffies;
  1054. len -= size;
  1055. offset += size;
  1056. count++;
  1057. if(++i == tx_ring->count) i = 0;
  1058. }
  1059. }
  1060. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1061. tx_ring->buffer_info[i].skb = skb;
  1062. tx_ring->buffer_info[first].next_to_watch = i;
  1063. return count;
  1064. }
  1065. static inline void
  1066. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1067. {
  1068. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1069. struct ixgb_tx_desc *tx_desc = NULL;
  1070. struct ixgb_buffer *buffer_info;
  1071. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1072. uint8_t status = 0;
  1073. uint8_t popts = 0;
  1074. unsigned int i;
  1075. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1076. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1077. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1078. }
  1079. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1080. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1081. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1082. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1083. }
  1084. i = tx_ring->next_to_use;
  1085. while(count--) {
  1086. buffer_info = &tx_ring->buffer_info[i];
  1087. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1088. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1089. tx_desc->cmd_type_len =
  1090. cpu_to_le32(cmd_type_len | buffer_info->length);
  1091. tx_desc->status = status;
  1092. tx_desc->popts = popts;
  1093. tx_desc->vlan = cpu_to_le16(vlan_id);
  1094. if(++i == tx_ring->count) i = 0;
  1095. }
  1096. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1097. | IXGB_TX_DESC_CMD_RS );
  1098. /* Force memory writes to complete before letting h/w
  1099. * know there are new descriptors to fetch. (Only
  1100. * applicable for weak-ordered memory model archs,
  1101. * such as IA-64). */
  1102. wmb();
  1103. tx_ring->next_to_use = i;
  1104. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1105. }
  1106. /* Tx Descriptors needed, worst case */
  1107. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1108. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1109. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1110. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1111. static int
  1112. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1113. {
  1114. struct ixgb_adapter *adapter = netdev->priv;
  1115. unsigned int first;
  1116. unsigned int tx_flags = 0;
  1117. unsigned long flags;
  1118. int vlan_id = 0;
  1119. int tso;
  1120. if(skb->len <= 0) {
  1121. dev_kfree_skb_any(skb);
  1122. return 0;
  1123. }
  1124. spin_lock_irqsave(&adapter->tx_lock, flags);
  1125. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1126. netif_stop_queue(netdev);
  1127. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1128. return 1;
  1129. }
  1130. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1131. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1132. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1133. vlan_id = vlan_tx_tag_get(skb);
  1134. }
  1135. first = adapter->tx_ring.next_to_use;
  1136. tso = ixgb_tso(adapter, skb);
  1137. if (tso < 0) {
  1138. dev_kfree_skb_any(skb);
  1139. return NETDEV_TX_OK;
  1140. }
  1141. if (tso)
  1142. tx_flags |= IXGB_TX_FLAGS_TSO;
  1143. else if(ixgb_tx_csum(adapter, skb))
  1144. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1145. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1146. tx_flags);
  1147. netdev->trans_start = jiffies;
  1148. return 0;
  1149. }
  1150. /**
  1151. * ixgb_tx_timeout - Respond to a Tx Hang
  1152. * @netdev: network interface device structure
  1153. **/
  1154. static void
  1155. ixgb_tx_timeout(struct net_device *netdev)
  1156. {
  1157. struct ixgb_adapter *adapter = netdev->priv;
  1158. /* Do the reset outside of interrupt context */
  1159. schedule_work(&adapter->tx_timeout_task);
  1160. }
  1161. static void
  1162. ixgb_tx_timeout_task(struct net_device *netdev)
  1163. {
  1164. struct ixgb_adapter *adapter = netdev->priv;
  1165. ixgb_down(adapter, TRUE);
  1166. ixgb_up(adapter);
  1167. }
  1168. /**
  1169. * ixgb_get_stats - Get System Network Statistics
  1170. * @netdev: network interface device structure
  1171. *
  1172. * Returns the address of the device statistics structure.
  1173. * The statistics are actually updated from the timer callback.
  1174. **/
  1175. static struct net_device_stats *
  1176. ixgb_get_stats(struct net_device *netdev)
  1177. {
  1178. struct ixgb_adapter *adapter = netdev->priv;
  1179. return &adapter->net_stats;
  1180. }
  1181. /**
  1182. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1183. * @netdev: network interface device structure
  1184. * @new_mtu: new value for maximum frame size
  1185. *
  1186. * Returns 0 on success, negative on failure
  1187. **/
  1188. static int
  1189. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1190. {
  1191. struct ixgb_adapter *adapter = netdev->priv;
  1192. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1193. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1194. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1195. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1196. IXGB_ERR("Invalid MTU setting\n");
  1197. return -EINVAL;
  1198. }
  1199. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1200. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1201. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1202. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1203. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1204. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1205. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1206. } else {
  1207. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1208. }
  1209. netdev->mtu = new_mtu;
  1210. if(old_max_frame != max_frame && netif_running(netdev)) {
  1211. ixgb_down(adapter, TRUE);
  1212. ixgb_up(adapter);
  1213. }
  1214. return 0;
  1215. }
  1216. /**
  1217. * ixgb_update_stats - Update the board statistics counters.
  1218. * @adapter: board private structure
  1219. **/
  1220. void
  1221. ixgb_update_stats(struct ixgb_adapter *adapter)
  1222. {
  1223. struct net_device *netdev = adapter->netdev;
  1224. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1225. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1226. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1227. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1228. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1229. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1230. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1231. /* fix up multicast stats by removing broadcasts */
  1232. multi -= bcast;
  1233. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1234. adapter->stats.mprch += (multi >> 32);
  1235. adapter->stats.bprcl += bcast_l;
  1236. adapter->stats.bprch += bcast_h;
  1237. } else {
  1238. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1239. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1240. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1241. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1242. }
  1243. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1244. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1245. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1246. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1247. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1248. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1249. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1250. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1251. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1252. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1253. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1254. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1255. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1256. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1257. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1258. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1259. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1260. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1261. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1262. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1263. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1264. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1265. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1266. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1267. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1268. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1269. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1270. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1271. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1272. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1273. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1274. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1275. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1276. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1277. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1278. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1279. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1280. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1281. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1282. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1283. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1284. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1285. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1286. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1287. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1288. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1289. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1290. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1291. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1292. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1293. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1294. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1295. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1296. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1297. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1298. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1299. /* Fill out the OS statistics structure */
  1300. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1301. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1302. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1303. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1304. adapter->net_stats.multicast = adapter->stats.mprcl;
  1305. adapter->net_stats.collisions = 0;
  1306. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1307. * with a length in the type/len field */
  1308. adapter->net_stats.rx_errors =
  1309. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1310. adapter->stats.ruc +
  1311. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1312. adapter->stats.icbc +
  1313. adapter->stats.ecbc + adapter->stats.mpc;
  1314. adapter->net_stats.rx_dropped = adapter->stats.mpc;
  1315. /* see above
  1316. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1317. */
  1318. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1319. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1320. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1321. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1322. adapter->net_stats.tx_errors = 0;
  1323. adapter->net_stats.rx_frame_errors = 0;
  1324. adapter->net_stats.tx_aborted_errors = 0;
  1325. adapter->net_stats.tx_carrier_errors = 0;
  1326. adapter->net_stats.tx_fifo_errors = 0;
  1327. adapter->net_stats.tx_heartbeat_errors = 0;
  1328. adapter->net_stats.tx_window_errors = 0;
  1329. }
  1330. #define IXGB_MAX_INTR 10
  1331. /**
  1332. * ixgb_intr - Interrupt Handler
  1333. * @irq: interrupt number
  1334. * @data: pointer to a network interface device structure
  1335. * @pt_regs: CPU registers structure
  1336. **/
  1337. static irqreturn_t
  1338. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1339. {
  1340. struct net_device *netdev = data;
  1341. struct ixgb_adapter *adapter = netdev->priv;
  1342. struct ixgb_hw *hw = &adapter->hw;
  1343. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1344. #ifndef CONFIG_IXGB_NAPI
  1345. unsigned int i;
  1346. #endif
  1347. if(unlikely(!icr))
  1348. return IRQ_NONE; /* Not our interrupt */
  1349. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1350. mod_timer(&adapter->watchdog_timer, jiffies);
  1351. }
  1352. #ifdef CONFIG_IXGB_NAPI
  1353. if(netif_rx_schedule_prep(netdev)) {
  1354. /* Disable interrupts and register for poll. The flush
  1355. of the posted write is intentionally left out.
  1356. */
  1357. atomic_inc(&adapter->irq_sem);
  1358. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1359. __netif_rx_schedule(netdev);
  1360. }
  1361. #else
  1362. /* yes, that is actually a & and it is meant to make sure that
  1363. * every pass through this for loop checks both receive and
  1364. * transmit queues for completed descriptors, intended to
  1365. * avoid starvation issues and assist tx/rx fairness. */
  1366. for(i = 0; i < IXGB_MAX_INTR; i++)
  1367. if(!ixgb_clean_rx_irq(adapter) &
  1368. !ixgb_clean_tx_irq(adapter))
  1369. break;
  1370. #endif
  1371. return IRQ_HANDLED;
  1372. }
  1373. #ifdef CONFIG_IXGB_NAPI
  1374. /**
  1375. * ixgb_clean - NAPI Rx polling callback
  1376. * @adapter: board private structure
  1377. **/
  1378. static int
  1379. ixgb_clean(struct net_device *netdev, int *budget)
  1380. {
  1381. struct ixgb_adapter *adapter = netdev->priv;
  1382. int work_to_do = min(*budget, netdev->quota);
  1383. int tx_cleaned;
  1384. int work_done = 0;
  1385. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1386. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1387. *budget -= work_done;
  1388. netdev->quota -= work_done;
  1389. /* if no Tx and not enough Rx work done, exit the polling mode */
  1390. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1391. netif_rx_complete(netdev);
  1392. ixgb_irq_enable(adapter);
  1393. return 0;
  1394. }
  1395. return 1;
  1396. }
  1397. #endif
  1398. /**
  1399. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1400. * @adapter: board private structure
  1401. **/
  1402. static boolean_t
  1403. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1404. {
  1405. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1406. struct net_device *netdev = adapter->netdev;
  1407. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1408. struct ixgb_buffer *buffer_info;
  1409. unsigned int i, eop;
  1410. boolean_t cleaned = FALSE;
  1411. i = tx_ring->next_to_clean;
  1412. eop = tx_ring->buffer_info[i].next_to_watch;
  1413. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1414. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1415. for(cleaned = FALSE; !cleaned; ) {
  1416. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1417. buffer_info = &tx_ring->buffer_info[i];
  1418. if (tx_desc->popts
  1419. & (IXGB_TX_DESC_POPTS_TXSM |
  1420. IXGB_TX_DESC_POPTS_IXSM))
  1421. adapter->hw_csum_tx_good++;
  1422. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1423. *(uint32_t *)&(tx_desc->status) = 0;
  1424. cleaned = (i == eop);
  1425. if(++i == tx_ring->count) i = 0;
  1426. }
  1427. eop = tx_ring->buffer_info[i].next_to_watch;
  1428. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1429. }
  1430. tx_ring->next_to_clean = i;
  1431. spin_lock(&adapter->tx_lock);
  1432. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1433. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1434. netif_wake_queue(netdev);
  1435. }
  1436. spin_unlock(&adapter->tx_lock);
  1437. if(adapter->detect_tx_hung) {
  1438. /* detect a transmit hang in hardware, this serializes the
  1439. * check with the clearing of time_stamp and movement of i */
  1440. adapter->detect_tx_hung = FALSE;
  1441. if(tx_ring->buffer_info[i].dma &&
  1442. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1443. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1444. IXGB_STATUS_TXOFF))
  1445. netif_stop_queue(netdev);
  1446. }
  1447. return cleaned;
  1448. }
  1449. /**
  1450. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1451. * @adapter: board private structure
  1452. * @rx_desc: receive descriptor
  1453. * @sk_buff: socket buffer with received data
  1454. **/
  1455. static inline void
  1456. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1457. struct ixgb_rx_desc *rx_desc,
  1458. struct sk_buff *skb)
  1459. {
  1460. /* Ignore Checksum bit is set OR
  1461. * TCP Checksum has not been calculated
  1462. */
  1463. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1464. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1465. skb->ip_summed = CHECKSUM_NONE;
  1466. return;
  1467. }
  1468. /* At this point we know the hardware did the TCP checksum */
  1469. /* now look at the TCP checksum error bit */
  1470. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1471. /* let the stack verify checksum errors */
  1472. skb->ip_summed = CHECKSUM_NONE;
  1473. adapter->hw_csum_rx_error++;
  1474. } else {
  1475. /* TCP checksum is good */
  1476. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1477. adapter->hw_csum_rx_good++;
  1478. }
  1479. }
  1480. /**
  1481. * ixgb_clean_rx_irq - Send received data up the network stack,
  1482. * @adapter: board private structure
  1483. **/
  1484. static boolean_t
  1485. #ifdef CONFIG_IXGB_NAPI
  1486. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1487. #else
  1488. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1489. #endif
  1490. {
  1491. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1492. struct net_device *netdev = adapter->netdev;
  1493. struct pci_dev *pdev = adapter->pdev;
  1494. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1495. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1496. struct sk_buff *skb, *next_skb;
  1497. uint32_t length;
  1498. unsigned int i, j;
  1499. boolean_t cleaned = FALSE;
  1500. i = rx_ring->next_to_clean;
  1501. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1502. buffer_info = &rx_ring->buffer_info[i];
  1503. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1504. #ifdef CONFIG_IXGB_NAPI
  1505. if(*work_done >= work_to_do)
  1506. break;
  1507. (*work_done)++;
  1508. #endif
  1509. skb = buffer_info->skb;
  1510. prefetch(skb->data);
  1511. if(++i == rx_ring->count) i = 0;
  1512. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1513. prefetch(next_rxd);
  1514. if((j = i + 1) == rx_ring->count) j = 0;
  1515. next2_buffer = &rx_ring->buffer_info[j];
  1516. prefetch(next2_buffer);
  1517. next_buffer = &rx_ring->buffer_info[i];
  1518. next_skb = next_buffer->skb;
  1519. prefetch(next_skb);
  1520. cleaned = TRUE;
  1521. pci_unmap_single(pdev,
  1522. buffer_info->dma,
  1523. buffer_info->length,
  1524. PCI_DMA_FROMDEVICE);
  1525. length = le16_to_cpu(rx_desc->length);
  1526. if(unlikely(!(rx_desc->status & IXGB_RX_DESC_STATUS_EOP))) {
  1527. /* All receives must fit into a single buffer */
  1528. IXGB_DBG("Receive packet consumed multiple buffers "
  1529. "length<%x>\n", length);
  1530. dev_kfree_skb_irq(skb);
  1531. rx_desc->status = 0;
  1532. buffer_info->skb = NULL;
  1533. rx_desc = next_rxd;
  1534. buffer_info = next_buffer;
  1535. continue;
  1536. }
  1537. if (unlikely(rx_desc->errors
  1538. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1539. | IXGB_RX_DESC_ERRORS_P |
  1540. IXGB_RX_DESC_ERRORS_RXE))) {
  1541. dev_kfree_skb_irq(skb);
  1542. rx_desc->status = 0;
  1543. buffer_info->skb = NULL;
  1544. rx_desc = next_rxd;
  1545. buffer_info = next_buffer;
  1546. continue;
  1547. }
  1548. /* Good Receive */
  1549. skb_put(skb, length);
  1550. /* Receive Checksum Offload */
  1551. ixgb_rx_checksum(adapter, rx_desc, skb);
  1552. skb->protocol = eth_type_trans(skb, netdev);
  1553. #ifdef CONFIG_IXGB_NAPI
  1554. if(adapter->vlgrp && (rx_desc->status & IXGB_RX_DESC_STATUS_VP)) {
  1555. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1556. le16_to_cpu(rx_desc->special) &
  1557. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1558. } else {
  1559. netif_receive_skb(skb);
  1560. }
  1561. #else /* CONFIG_IXGB_NAPI */
  1562. if(adapter->vlgrp && (rx_desc->status & IXGB_RX_DESC_STATUS_VP)) {
  1563. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1564. le16_to_cpu(rx_desc->special) &
  1565. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1566. } else {
  1567. netif_rx(skb);
  1568. }
  1569. #endif /* CONFIG_IXGB_NAPI */
  1570. netdev->last_rx = jiffies;
  1571. rx_desc->status = 0;
  1572. buffer_info->skb = NULL;
  1573. rx_desc = next_rxd;
  1574. buffer_info = next_buffer;
  1575. }
  1576. rx_ring->next_to_clean = i;
  1577. ixgb_alloc_rx_buffers(adapter);
  1578. return cleaned;
  1579. }
  1580. /**
  1581. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1582. * @adapter: address of board private structure
  1583. **/
  1584. static void
  1585. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1586. {
  1587. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1588. struct net_device *netdev = adapter->netdev;
  1589. struct pci_dev *pdev = adapter->pdev;
  1590. struct ixgb_rx_desc *rx_desc;
  1591. struct ixgb_buffer *buffer_info;
  1592. struct sk_buff *skb;
  1593. unsigned int i;
  1594. int num_group_tail_writes;
  1595. long cleancount;
  1596. i = rx_ring->next_to_use;
  1597. buffer_info = &rx_ring->buffer_info[i];
  1598. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1599. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1600. /* leave three descriptors unused */
  1601. while(--cleancount > 2) {
  1602. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1603. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1604. if(unlikely(!skb)) {
  1605. /* Better luck next round */
  1606. break;
  1607. }
  1608. /* Make buffer alignment 2 beyond a 16 byte boundary
  1609. * this will result in a 16 byte aligned IP header after
  1610. * the 14 byte MAC header is removed
  1611. */
  1612. skb_reserve(skb, NET_IP_ALIGN);
  1613. skb->dev = netdev;
  1614. buffer_info->skb = skb;
  1615. buffer_info->length = adapter->rx_buffer_len;
  1616. buffer_info->dma =
  1617. pci_map_single(pdev,
  1618. skb->data,
  1619. adapter->rx_buffer_len,
  1620. PCI_DMA_FROMDEVICE);
  1621. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1622. /* guarantee DD bit not set now before h/w gets descriptor
  1623. * this is the rest of the workaround for h/w double
  1624. * writeback. */
  1625. rx_desc->status = 0;
  1626. if((i & ~(num_group_tail_writes- 1)) == i) {
  1627. /* Force memory writes to complete before letting h/w
  1628. * know there are new descriptors to fetch. (Only
  1629. * applicable for weak-ordered memory model archs,
  1630. * such as IA-64). */
  1631. wmb();
  1632. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1633. }
  1634. if(++i == rx_ring->count) i = 0;
  1635. buffer_info = &rx_ring->buffer_info[i];
  1636. }
  1637. rx_ring->next_to_use = i;
  1638. }
  1639. /**
  1640. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1641. *
  1642. * @param netdev network interface device structure
  1643. * @param grp indicates to enable or disable tagging/stripping
  1644. **/
  1645. static void
  1646. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1647. {
  1648. struct ixgb_adapter *adapter = netdev->priv;
  1649. uint32_t ctrl, rctl;
  1650. ixgb_irq_disable(adapter);
  1651. adapter->vlgrp = grp;
  1652. if(grp) {
  1653. /* enable VLAN tag insert/strip */
  1654. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1655. ctrl |= IXGB_CTRL0_VME;
  1656. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1657. /* enable VLAN receive filtering */
  1658. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1659. rctl |= IXGB_RCTL_VFE;
  1660. rctl &= ~IXGB_RCTL_CFIEN;
  1661. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1662. } else {
  1663. /* disable VLAN tag insert/strip */
  1664. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1665. ctrl &= ~IXGB_CTRL0_VME;
  1666. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1667. /* disable VLAN filtering */
  1668. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1669. rctl &= ~IXGB_RCTL_VFE;
  1670. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1671. }
  1672. ixgb_irq_enable(adapter);
  1673. }
  1674. static void
  1675. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1676. {
  1677. struct ixgb_adapter *adapter = netdev->priv;
  1678. uint32_t vfta, index;
  1679. /* add VID to filter table */
  1680. index = (vid >> 5) & 0x7F;
  1681. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1682. vfta |= (1 << (vid & 0x1F));
  1683. ixgb_write_vfta(&adapter->hw, index, vfta);
  1684. }
  1685. static void
  1686. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1687. {
  1688. struct ixgb_adapter *adapter = netdev->priv;
  1689. uint32_t vfta, index;
  1690. ixgb_irq_disable(adapter);
  1691. if(adapter->vlgrp)
  1692. adapter->vlgrp->vlan_devices[vid] = NULL;
  1693. ixgb_irq_enable(adapter);
  1694. /* remove VID from filter table*/
  1695. index = (vid >> 5) & 0x7F;
  1696. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1697. vfta &= ~(1 << (vid & 0x1F));
  1698. ixgb_write_vfta(&adapter->hw, index, vfta);
  1699. }
  1700. static void
  1701. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1702. {
  1703. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1704. if(adapter->vlgrp) {
  1705. uint16_t vid;
  1706. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1707. if(!adapter->vlgrp->vlan_devices[vid])
  1708. continue;
  1709. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1710. }
  1711. }
  1712. }
  1713. /**
  1714. * ixgb_notify_reboot - handles OS notification of reboot event.
  1715. * @param nb notifier block, unused
  1716. * @param event Event being passed to driver to act upon
  1717. * @param p A pointer to our net device
  1718. **/
  1719. static int
  1720. ixgb_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
  1721. {
  1722. struct pci_dev *pdev = NULL;
  1723. switch(event) {
  1724. case SYS_DOWN:
  1725. case SYS_HALT:
  1726. case SYS_POWER_OFF:
  1727. while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
  1728. if (pci_dev_driver(pdev) == &ixgb_driver)
  1729. ixgb_suspend(pdev, 3);
  1730. }
  1731. }
  1732. return NOTIFY_DONE;
  1733. }
  1734. /**
  1735. * ixgb_suspend - driver suspend function called from notify.
  1736. * @param pdev pci driver structure used for passing to
  1737. * @param state power state to enter
  1738. **/
  1739. static int
  1740. ixgb_suspend(struct pci_dev *pdev, uint32_t state)
  1741. {
  1742. struct net_device *netdev = pci_get_drvdata(pdev);
  1743. struct ixgb_adapter *adapter = netdev->priv;
  1744. netif_device_detach(netdev);
  1745. if(netif_running(netdev))
  1746. ixgb_down(adapter, TRUE);
  1747. pci_save_state(pdev);
  1748. state = (state > 0) ? 3 : 0;
  1749. pci_set_power_state(pdev, state);
  1750. msec_delay(200);
  1751. return 0;
  1752. }
  1753. #ifdef CONFIG_NET_POLL_CONTROLLER
  1754. /*
  1755. * Polling 'interrupt' - used by things like netconsole to send skbs
  1756. * without having to re-enable interrupts. It's not called while
  1757. * the interrupt routine is executing.
  1758. */
  1759. static void ixgb_netpoll(struct net_device *dev)
  1760. {
  1761. struct ixgb_adapter *adapter = dev->priv;
  1762. disable_irq(adapter->pdev->irq);
  1763. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1764. enable_irq(adapter->pdev->irq);
  1765. }
  1766. #endif
  1767. /* ixgb_main.c */