matroxfb_base.c 78 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614
  1. /*
  2. *
  3. * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
  4. *
  5. * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
  6. *
  7. * Portions Copyright (c) 2001 Matrox Graphics Inc.
  8. *
  9. * Version: 1.65 2002/08/14
  10. *
  11. * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
  12. *
  13. * Contributors: "menion?" <menion@mindless.com>
  14. * Betatesting, fixes, ideas
  15. *
  16. * "Kurt Garloff" <garloff@suse.de>
  17. * Betatesting, fixes, ideas, videomodes, videomodes timmings
  18. *
  19. * "Tom Rini" <trini@kernel.crashing.org>
  20. * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
  21. *
  22. * "Bibek Sahu" <scorpio@dodds.net>
  23. * Access device through readb|w|l and write b|w|l
  24. * Extensive debugging stuff
  25. *
  26. * "Daniel Haun" <haund@usa.net>
  27. * Testing, hardware cursor fixes
  28. *
  29. * "Scott Wood" <sawst46+@pitt.edu>
  30. * Fixes
  31. *
  32. * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
  33. * Betatesting
  34. *
  35. * "Kelly French" <targon@hazmat.com>
  36. * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
  37. * Betatesting, bug reporting
  38. *
  39. * "Pablo Bianucci" <pbian@pccp.com.ar>
  40. * Fixes, ideas, betatesting
  41. *
  42. * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
  43. * Fixes, enhandcements, ideas, betatesting
  44. *
  45. * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
  46. * PPC betatesting, PPC support, backward compatibility
  47. *
  48. * "Paul Womar" <Paul@pwomar.demon.co.uk>
  49. * "Owen Waller" <O.Waller@ee.qub.ac.uk>
  50. * PPC betatesting
  51. *
  52. * "Thomas Pornin" <pornin@bolet.ens.fr>
  53. * Alpha betatesting
  54. *
  55. * "Pieter van Leuven" <pvl@iae.nl>
  56. * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
  57. * G100 testing
  58. *
  59. * "H. Peter Arvin" <hpa@transmeta.com>
  60. * Ideas
  61. *
  62. * "Cort Dougan" <cort@cs.nmt.edu>
  63. * CHRP fixes and PReP cleanup
  64. *
  65. * "Mark Vojkovich" <mvojkovi@ucsd.edu>
  66. * G400 support
  67. *
  68. * "Samuel Hocevar" <sam@via.ecp.fr>
  69. * Fixes
  70. *
  71. * "Anton Altaparmakov" <AntonA@bigfoot.com>
  72. * G400 MAX/non-MAX distinction
  73. *
  74. * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
  75. * memtype extension (needed for GXT130P RS/6000 adapter)
  76. *
  77. * "Uns Lider" <unslider@miranda.org>
  78. * G100 PLNWT fixes
  79. *
  80. * "Denis Zaitsev" <zzz@cd-club.ru>
  81. * Fixes
  82. *
  83. * "Mike Pieper" <mike@pieper-family.de>
  84. * TVOut enhandcements, V4L2 control interface.
  85. *
  86. * "Diego Biurrun" <diego@biurrun.de>
  87. * DFP testing
  88. *
  89. * (following author is not in any relation with this code, but his code
  90. * is included in this driver)
  91. *
  92. * Based on framebuffer driver for VBE 2.0 compliant graphic boards
  93. * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
  94. *
  95. * (following author is not in any relation with this code, but his ideas
  96. * were used when writing this driver)
  97. *
  98. * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
  99. *
  100. */
  101. #include <linux/version.h>
  102. #define __OLD_VIDIOC_
  103. #include "matroxfb_base.h"
  104. #include "matroxfb_misc.h"
  105. #include "matroxfb_accel.h"
  106. #include "matroxfb_DAC1064.h"
  107. #include "matroxfb_Ti3026.h"
  108. #include "matroxfb_maven.h"
  109. #include "matroxfb_crtc2.h"
  110. #include "matroxfb_g450.h"
  111. #include <linux/matroxfb.h>
  112. #include <linux/interrupt.h>
  113. #include <linux/uaccess.h>
  114. #ifdef CONFIG_PPC_PMAC
  115. #include <asm/machdep.h>
  116. unsigned char nvram_read_byte(int);
  117. static int default_vmode = VMODE_NVRAM;
  118. static int default_cmode = CMODE_NVRAM;
  119. #endif
  120. static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
  121. /* --------------------------------------------------------------------- */
  122. /*
  123. * card parameters
  124. */
  125. /* --------------------------------------------------------------------- */
  126. static struct fb_var_screeninfo vesafb_defined = {
  127. 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
  128. 0,0, /* virtual -> visible no offset */
  129. 8, /* depth -> load bits_per_pixel */
  130. 0, /* greyscale ? */
  131. {0,0,0}, /* R */
  132. {0,0,0}, /* G */
  133. {0,0,0}, /* B */
  134. {0,0,0}, /* transparency */
  135. 0, /* standard pixel format */
  136. FB_ACTIVATE_NOW,
  137. -1,-1,
  138. FB_ACCELF_TEXT, /* accel flags */
  139. 39721L,48L,16L,33L,10L,
  140. 96L,2L,~0, /* No sync info */
  141. FB_VMODE_NONINTERLACED,
  142. 0, {0,0,0,0,0}
  143. };
  144. /* --------------------------------------------------------------------- */
  145. static void update_crtc2(WPMINFO unsigned int pos) {
  146. struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
  147. /* Make sure that displays are compatible */
  148. if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
  149. && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
  150. && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
  151. ) {
  152. switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
  153. case 16:
  154. case 32:
  155. pos = pos * 8;
  156. if (info->interlaced) {
  157. mga_outl(0x3C2C, pos);
  158. mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
  159. } else {
  160. mga_outl(0x3C28, pos);
  161. }
  162. break;
  163. }
  164. }
  165. }
  166. static void matroxfb_crtc1_panpos(WPMINFO2) {
  167. if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
  168. unsigned long flags;
  169. int panpos;
  170. matroxfb_DAC_lock_irqsave(flags);
  171. panpos = ACCESS_FBINFO(crtc1.panpos);
  172. if (panpos >= 0) {
  173. unsigned int extvga_reg;
  174. ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
  175. extvga_reg = mga_inb(M_EXTVGA_INDEX);
  176. mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
  177. if (extvga_reg != 0x00) {
  178. mga_outb(M_EXTVGA_INDEX, extvga_reg);
  179. }
  180. }
  181. matroxfb_DAC_unlock_irqrestore(flags);
  182. }
  183. }
  184. static irqreturn_t matrox_irq(int irq, void *dev_id)
  185. {
  186. u_int32_t status;
  187. int handled = 0;
  188. MINFO_FROM(dev_id);
  189. status = mga_inl(M_STATUS);
  190. if (status & 0x20) {
  191. mga_outl(M_ICLEAR, 0x20);
  192. ACCESS_FBINFO(crtc1.vsync.cnt)++;
  193. matroxfb_crtc1_panpos(PMINFO2);
  194. wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
  195. handled = 1;
  196. }
  197. if (status & 0x200) {
  198. mga_outl(M_ICLEAR, 0x200);
  199. ACCESS_FBINFO(crtc2.vsync.cnt)++;
  200. wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
  201. handled = 1;
  202. }
  203. return IRQ_RETVAL(handled);
  204. }
  205. int matroxfb_enable_irq(WPMINFO int reenable) {
  206. u_int32_t bm;
  207. if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
  208. bm = 0x220;
  209. else
  210. bm = 0x020;
  211. if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
  212. if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
  213. IRQF_SHARED, "matroxfb", MINFO)) {
  214. clear_bit(0, &ACCESS_FBINFO(irq_flags));
  215. return -EINVAL;
  216. }
  217. /* Clear any pending field interrupts */
  218. mga_outl(M_ICLEAR, bm);
  219. mga_outl(M_IEN, mga_inl(M_IEN) | bm);
  220. } else if (reenable) {
  221. u_int32_t ien;
  222. ien = mga_inl(M_IEN);
  223. if ((ien & bm) != bm) {
  224. printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
  225. mga_outl(M_IEN, ien | bm);
  226. }
  227. }
  228. return 0;
  229. }
  230. static void matroxfb_disable_irq(WPMINFO2) {
  231. if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
  232. /* Flush pending pan-at-vbl request... */
  233. matroxfb_crtc1_panpos(PMINFO2);
  234. if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
  235. mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
  236. else
  237. mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
  238. free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
  239. }
  240. }
  241. int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
  242. struct matrox_vsync *vs;
  243. unsigned int cnt;
  244. int ret;
  245. switch (crtc) {
  246. case 0:
  247. vs = &ACCESS_FBINFO(crtc1.vsync);
  248. break;
  249. case 1:
  250. if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
  251. return -ENODEV;
  252. }
  253. vs = &ACCESS_FBINFO(crtc2.vsync);
  254. break;
  255. default:
  256. return -ENODEV;
  257. }
  258. ret = matroxfb_enable_irq(PMINFO 0);
  259. if (ret) {
  260. return ret;
  261. }
  262. cnt = vs->cnt;
  263. ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
  264. if (ret < 0) {
  265. return ret;
  266. }
  267. if (ret == 0) {
  268. matroxfb_enable_irq(PMINFO 1);
  269. return -ETIMEDOUT;
  270. }
  271. return 0;
  272. }
  273. /* --------------------------------------------------------------------- */
  274. static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
  275. unsigned int pos;
  276. unsigned short p0, p1, p2;
  277. #ifdef CONFIG_FB_MATROX_32MB
  278. unsigned int p3;
  279. #endif
  280. int vbl;
  281. unsigned long flags;
  282. CRITFLAGS
  283. DBG(__func__)
  284. if (ACCESS_FBINFO(dead))
  285. return;
  286. ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
  287. ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
  288. pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
  289. pos += ACCESS_FBINFO(curr.ydstorg.chunks);
  290. p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
  291. p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
  292. p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
  293. #ifdef CONFIG_FB_MATROX_32MB
  294. p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
  295. #endif
  296. /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
  297. vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
  298. CRITBEGIN
  299. matroxfb_DAC_lock_irqsave(flags);
  300. mga_setr(M_CRTC_INDEX, 0x0D, p0);
  301. mga_setr(M_CRTC_INDEX, 0x0C, p1);
  302. #ifdef CONFIG_FB_MATROX_32MB
  303. if (ACCESS_FBINFO(devflags.support32MB))
  304. mga_setr(M_EXTVGA_INDEX, 0x08, p3);
  305. #endif
  306. if (vbl) {
  307. ACCESS_FBINFO(crtc1.panpos) = p2;
  308. } else {
  309. /* Abort any pending change */
  310. ACCESS_FBINFO(crtc1.panpos) = -1;
  311. mga_setr(M_EXTVGA_INDEX, 0x00, p2);
  312. }
  313. matroxfb_DAC_unlock_irqrestore(flags);
  314. update_crtc2(PMINFO pos);
  315. CRITEND
  316. }
  317. static void matroxfb_remove(WPMINFO int dummy) {
  318. /* Currently we are holding big kernel lock on all dead & usecount updates.
  319. * Destroy everything after all users release it. Especially do not unregister
  320. * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
  321. * for device unplugged when in use.
  322. * In future we should point mmio.vbase & video.vbase somewhere where we can
  323. * write data without causing too much damage...
  324. */
  325. ACCESS_FBINFO(dead) = 1;
  326. if (ACCESS_FBINFO(usecount)) {
  327. /* destroy it later */
  328. return;
  329. }
  330. matroxfb_unregister_device(MINFO);
  331. unregister_framebuffer(&ACCESS_FBINFO(fbcon));
  332. matroxfb_g450_shutdown(PMINFO2);
  333. #ifdef CONFIG_MTRR
  334. if (ACCESS_FBINFO(mtrr.vram_valid))
  335. mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
  336. #endif
  337. mga_iounmap(ACCESS_FBINFO(mmio.vbase));
  338. mga_iounmap(ACCESS_FBINFO(video.vbase));
  339. release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
  340. release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
  341. #ifdef CONFIG_FB_MATROX_MULTIHEAD
  342. kfree(minfo);
  343. #endif
  344. }
  345. /*
  346. * Open/Release the frame buffer device
  347. */
  348. static int matroxfb_open(struct fb_info *info, int user)
  349. {
  350. MINFO_FROM_INFO(info);
  351. DBG_LOOP(__func__)
  352. if (ACCESS_FBINFO(dead)) {
  353. return -ENXIO;
  354. }
  355. ACCESS_FBINFO(usecount)++;
  356. if (user) {
  357. ACCESS_FBINFO(userusecount)++;
  358. }
  359. return(0);
  360. }
  361. static int matroxfb_release(struct fb_info *info, int user)
  362. {
  363. MINFO_FROM_INFO(info);
  364. DBG_LOOP(__func__)
  365. if (user) {
  366. if (0 == --ACCESS_FBINFO(userusecount)) {
  367. matroxfb_disable_irq(PMINFO2);
  368. }
  369. }
  370. if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
  371. matroxfb_remove(PMINFO 0);
  372. }
  373. return(0);
  374. }
  375. static int matroxfb_pan_display(struct fb_var_screeninfo *var,
  376. struct fb_info* info) {
  377. MINFO_FROM_INFO(info);
  378. DBG(__func__)
  379. matrox_pan_var(PMINFO var);
  380. return 0;
  381. }
  382. static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
  383. int bppshft2;
  384. DBG(__func__)
  385. bppshft2 = bpp;
  386. if (!bppshft2) {
  387. return 8;
  388. }
  389. if (isInterleave(MINFO))
  390. bppshft2 >>= 1;
  391. if (ACCESS_FBINFO(devflags.video64bits))
  392. bppshft2 >>= 1;
  393. return bppshft2;
  394. }
  395. static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
  396. int over;
  397. int rounding;
  398. DBG(__func__)
  399. switch (bpp) {
  400. case 0: return xres;
  401. case 4: rounding = 128;
  402. break;
  403. case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
  404. break;
  405. case 16: rounding = 32;
  406. break;
  407. case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
  408. break;
  409. default: rounding = 16;
  410. /* on G400, 16 really does not work */
  411. if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
  412. rounding = 32;
  413. break;
  414. }
  415. if (isInterleave(MINFO)) {
  416. rounding *= 2;
  417. }
  418. over = xres % rounding;
  419. if (over)
  420. xres += rounding-over;
  421. return xres;
  422. }
  423. static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
  424. const int* width;
  425. int xres_new;
  426. DBG(__func__)
  427. if (!bpp) return xres;
  428. width = ACCESS_FBINFO(capable.vxres);
  429. if (ACCESS_FBINFO(devflags.precise_width)) {
  430. while (*width) {
  431. if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
  432. break;
  433. }
  434. width++;
  435. }
  436. xres_new = *width;
  437. } else {
  438. xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
  439. }
  440. return xres_new;
  441. }
  442. static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
  443. DBG(__func__)
  444. switch (var->bits_per_pixel) {
  445. case 4:
  446. return 16; /* pseudocolor... 16 entries HW palette */
  447. case 8:
  448. return 256; /* pseudocolor... 256 entries HW palette */
  449. case 16:
  450. return 16; /* directcolor... 16 entries SW palette */
  451. /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
  452. case 24:
  453. return 16; /* directcolor... 16 entries SW palette */
  454. /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
  455. case 32:
  456. return 16; /* directcolor... 16 entries SW palette */
  457. /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
  458. }
  459. return 16; /* return something reasonable... or panic()? */
  460. }
  461. static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
  462. struct RGBT {
  463. unsigned char bpp;
  464. struct {
  465. unsigned char offset,
  466. length;
  467. } red,
  468. green,
  469. blue,
  470. transp;
  471. signed char visual;
  472. };
  473. static const struct RGBT table[]= {
  474. { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
  475. {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
  476. {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
  477. {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
  478. {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
  479. };
  480. struct RGBT const *rgbt;
  481. unsigned int bpp = var->bits_per_pixel;
  482. unsigned int vramlen;
  483. unsigned int memlen;
  484. DBG(__func__)
  485. switch (bpp) {
  486. case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
  487. break;
  488. case 8: break;
  489. case 16: break;
  490. case 24: break;
  491. case 32: break;
  492. default: return -EINVAL;
  493. }
  494. *ydstorg = 0;
  495. vramlen = ACCESS_FBINFO(video.len_usable);
  496. if (var->yres_virtual < var->yres)
  497. var->yres_virtual = var->yres;
  498. if (var->xres_virtual < var->xres)
  499. var->xres_virtual = var->xres;
  500. var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
  501. memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
  502. if (memlen > vramlen) {
  503. var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
  504. memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
  505. }
  506. /* There is hardware bug that no line can cross 4MB boundary */
  507. /* give up for CFB24, it is impossible to easy workaround it */
  508. /* for other try to do something */
  509. if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
  510. if (bpp == 24) {
  511. /* sorry */
  512. } else {
  513. unsigned int linelen;
  514. unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
  515. unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
  516. unsigned int max_yres;
  517. while (m1) {
  518. int t;
  519. while (m2 >= m1) m2 -= m1;
  520. t = m1;
  521. m1 = m2;
  522. m2 = t;
  523. }
  524. m2 = linelen * PAGE_SIZE / m2;
  525. *ydstorg = m2 = 0x400000 % m2;
  526. max_yres = (vramlen - m2) / linelen;
  527. if (var->yres_virtual > max_yres)
  528. var->yres_virtual = max_yres;
  529. }
  530. }
  531. /* YDSTLEN contains only signed 16bit value */
  532. if (var->yres_virtual > 32767)
  533. var->yres_virtual = 32767;
  534. /* we must round yres/xres down, we already rounded y/xres_virtual up
  535. if it was possible. We should return -EINVAL, but I disagree */
  536. if (var->yres_virtual < var->yres)
  537. var->yres = var->yres_virtual;
  538. if (var->xres_virtual < var->xres)
  539. var->xres = var->xres_virtual;
  540. if (var->xoffset + var->xres > var->xres_virtual)
  541. var->xoffset = var->xres_virtual - var->xres;
  542. if (var->yoffset + var->yres > var->yres_virtual)
  543. var->yoffset = var->yres_virtual - var->yres;
  544. if (bpp == 16 && var->green.length == 5) {
  545. bpp--; /* an artifical value - 15 */
  546. }
  547. for (rgbt = table; rgbt->bpp < bpp; rgbt++);
  548. #define SETCLR(clr)\
  549. var->clr.offset = rgbt->clr.offset;\
  550. var->clr.length = rgbt->clr.length
  551. SETCLR(red);
  552. SETCLR(green);
  553. SETCLR(blue);
  554. SETCLR(transp);
  555. #undef SETCLR
  556. *visual = rgbt->visual;
  557. if (bpp > 8)
  558. dprintk("matroxfb: truecolor: "
  559. "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
  560. var->transp.length, var->red.length, var->green.length, var->blue.length,
  561. var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
  562. *video_cmap_len = matroxfb_get_cmap_len(var);
  563. dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
  564. var->xres_virtual, var->yres_virtual);
  565. return 0;
  566. }
  567. static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
  568. unsigned blue, unsigned transp,
  569. struct fb_info *fb_info)
  570. {
  571. #ifdef CONFIG_FB_MATROX_MULTIHEAD
  572. struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
  573. #endif
  574. DBG(__func__)
  575. /*
  576. * Set a single color register. The values supplied are
  577. * already rounded down to the hardware's capabilities
  578. * (according to the entries in the `var' structure). Return
  579. * != 0 for invalid regno.
  580. */
  581. if (regno >= ACCESS_FBINFO(curr.cmap_len))
  582. return 1;
  583. if (ACCESS_FBINFO(fbcon).var.grayscale) {
  584. /* gray = 0.30*R + 0.59*G + 0.11*B */
  585. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  586. }
  587. red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
  588. green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
  589. blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
  590. transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
  591. switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
  592. case 4:
  593. case 8:
  594. mga_outb(M_DAC_REG, regno);
  595. mga_outb(M_DAC_VAL, red);
  596. mga_outb(M_DAC_VAL, green);
  597. mga_outb(M_DAC_VAL, blue);
  598. break;
  599. case 16:
  600. if (regno >= 16)
  601. break;
  602. {
  603. u_int16_t col =
  604. (red << ACCESS_FBINFO(fbcon).var.red.offset) |
  605. (green << ACCESS_FBINFO(fbcon).var.green.offset) |
  606. (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
  607. (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
  608. ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
  609. }
  610. break;
  611. case 24:
  612. case 32:
  613. if (regno >= 16)
  614. break;
  615. ACCESS_FBINFO(cmap[regno]) =
  616. (red << ACCESS_FBINFO(fbcon).var.red.offset) |
  617. (green << ACCESS_FBINFO(fbcon).var.green.offset) |
  618. (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
  619. (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
  620. break;
  621. }
  622. return 0;
  623. }
  624. static void matroxfb_init_fix(WPMINFO2)
  625. {
  626. struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
  627. DBG(__func__)
  628. strcpy(fix->id,"MATROX");
  629. fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
  630. fix->ypanstep = 1;
  631. fix->ywrapstep = 0;
  632. fix->mmio_start = ACCESS_FBINFO(mmio.base);
  633. fix->mmio_len = ACCESS_FBINFO(mmio.len);
  634. fix->accel = ACCESS_FBINFO(devflags.accelerator);
  635. }
  636. static void matroxfb_update_fix(WPMINFO2)
  637. {
  638. struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
  639. DBG(__func__)
  640. mutex_lock(&ACCESS_FBINFO(fbcon).mm_lock);
  641. fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
  642. fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
  643. mutex_unlock(&ACCESS_FBINFO(fbcon).mm_lock);
  644. }
  645. static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  646. {
  647. int err;
  648. int visual;
  649. int cmap_len;
  650. unsigned int ydstorg;
  651. MINFO_FROM_INFO(info);
  652. if (ACCESS_FBINFO(dead)) {
  653. return -ENXIO;
  654. }
  655. if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
  656. return err;
  657. return 0;
  658. }
  659. static int matroxfb_set_par(struct fb_info *info)
  660. {
  661. int err;
  662. int visual;
  663. int cmap_len;
  664. unsigned int ydstorg;
  665. struct fb_var_screeninfo *var;
  666. MINFO_FROM_INFO(info);
  667. DBG(__func__)
  668. if (ACCESS_FBINFO(dead)) {
  669. return -ENXIO;
  670. }
  671. var = &info->var;
  672. if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
  673. return err;
  674. ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
  675. matroxfb_update_fix(PMINFO2);
  676. ACCESS_FBINFO(fbcon).fix.visual = visual;
  677. ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
  678. ACCESS_FBINFO(fbcon).fix.type_aux = 0;
  679. ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
  680. {
  681. unsigned int pos;
  682. ACCESS_FBINFO(curr.cmap_len) = cmap_len;
  683. ydstorg += ACCESS_FBINFO(devflags.ydstorg);
  684. ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
  685. ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
  686. if (var->bits_per_pixel == 4)
  687. ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
  688. else
  689. ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
  690. ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
  691. { struct my_timming mt;
  692. struct matrox_hw_state* hw;
  693. int out;
  694. matroxfb_var2my(var, &mt);
  695. mt.crtc = MATROXFB_SRC_CRTC1;
  696. /* CRTC1 delays */
  697. switch (var->bits_per_pixel) {
  698. case 0: mt.delay = 31 + 0; break;
  699. case 16: mt.delay = 21 + 8; break;
  700. case 24: mt.delay = 17 + 8; break;
  701. case 32: mt.delay = 16 + 8; break;
  702. default: mt.delay = 31 + 8; break;
  703. }
  704. hw = &ACCESS_FBINFO(hw);
  705. down_read(&ACCESS_FBINFO(altout).lock);
  706. for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
  707. if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
  708. ACCESS_FBINFO(outputs[out]).output->compute) {
  709. ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
  710. }
  711. }
  712. up_read(&ACCESS_FBINFO(altout).lock);
  713. ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
  714. ACCESS_FBINFO(crtc1).mnp = mt.mnp;
  715. ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
  716. pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
  717. pos += ACCESS_FBINFO(curr.ydstorg.chunks);
  718. hw->CRTC[0x0D] = pos & 0xFF;
  719. hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
  720. hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
  721. hw->CRTCEXT[8] = pos >> 21;
  722. ACCESS_FBINFO(hw_switch->restore(PMINFO2));
  723. update_crtc2(PMINFO pos);
  724. down_read(&ACCESS_FBINFO(altout).lock);
  725. for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
  726. if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
  727. ACCESS_FBINFO(outputs[out]).output->program) {
  728. ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
  729. }
  730. }
  731. for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
  732. if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
  733. ACCESS_FBINFO(outputs[out]).output->start) {
  734. ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
  735. }
  736. }
  737. up_read(&ACCESS_FBINFO(altout).lock);
  738. matrox_cfbX_init(PMINFO2);
  739. }
  740. }
  741. ACCESS_FBINFO(initialized) = 1;
  742. return 0;
  743. }
  744. static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
  745. {
  746. unsigned int sts1;
  747. matroxfb_enable_irq(PMINFO 0);
  748. memset(vblank, 0, sizeof(*vblank));
  749. vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
  750. FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
  751. sts1 = mga_inb(M_INSTS1);
  752. vblank->vcount = mga_inl(M_VCOUNT);
  753. /* BTW, on my PIII/450 with G400, reading M_INSTS1
  754. byte makes this call about 12% slower (1.70 vs. 2.05 us
  755. per ioctl()) */
  756. if (sts1 & 1)
  757. vblank->flags |= FB_VBLANK_HBLANKING;
  758. if (sts1 & 8)
  759. vblank->flags |= FB_VBLANK_VSYNCING;
  760. if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
  761. vblank->flags |= FB_VBLANK_VBLANKING;
  762. if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
  763. vblank->flags |= FB_VBLANK_HAVE_COUNT;
  764. /* Only one writer, aligned int value...
  765. it should work without lock and without atomic_t */
  766. vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
  767. }
  768. return 0;
  769. }
  770. static struct matrox_altout panellink_output = {
  771. .name = "Panellink output",
  772. };
  773. static int matroxfb_ioctl(struct fb_info *info,
  774. unsigned int cmd, unsigned long arg)
  775. {
  776. void __user *argp = (void __user *)arg;
  777. MINFO_FROM_INFO(info);
  778. DBG(__func__)
  779. if (ACCESS_FBINFO(dead)) {
  780. return -ENXIO;
  781. }
  782. switch (cmd) {
  783. case FBIOGET_VBLANK:
  784. {
  785. struct fb_vblank vblank;
  786. int err;
  787. err = matroxfb_get_vblank(PMINFO &vblank);
  788. if (err)
  789. return err;
  790. if (copy_to_user(argp, &vblank, sizeof(vblank)))
  791. return -EFAULT;
  792. return 0;
  793. }
  794. case FBIO_WAITFORVSYNC:
  795. {
  796. u_int32_t crt;
  797. if (get_user(crt, (u_int32_t __user *)arg))
  798. return -EFAULT;
  799. return matroxfb_wait_for_sync(PMINFO crt);
  800. }
  801. case MATROXFB_SET_OUTPUT_MODE:
  802. {
  803. struct matroxioc_output_mode mom;
  804. struct matrox_altout *oproc;
  805. int val;
  806. if (copy_from_user(&mom, argp, sizeof(mom)))
  807. return -EFAULT;
  808. if (mom.output >= MATROXFB_MAX_OUTPUTS)
  809. return -ENXIO;
  810. down_read(&ACCESS_FBINFO(altout.lock));
  811. oproc = ACCESS_FBINFO(outputs[mom.output]).output;
  812. if (!oproc) {
  813. val = -ENXIO;
  814. } else if (!oproc->verifymode) {
  815. if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
  816. val = 0;
  817. } else {
  818. val = -EINVAL;
  819. }
  820. } else {
  821. val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
  822. }
  823. if (!val) {
  824. if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
  825. ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
  826. val = 1;
  827. }
  828. }
  829. up_read(&ACCESS_FBINFO(altout.lock));
  830. if (val != 1)
  831. return val;
  832. switch (ACCESS_FBINFO(outputs[mom.output]).src) {
  833. case MATROXFB_SRC_CRTC1:
  834. matroxfb_set_par(info);
  835. break;
  836. case MATROXFB_SRC_CRTC2:
  837. {
  838. struct matroxfb_dh_fb_info* crtc2;
  839. down_read(&ACCESS_FBINFO(crtc2.lock));
  840. crtc2 = ACCESS_FBINFO(crtc2.info);
  841. if (crtc2)
  842. crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
  843. up_read(&ACCESS_FBINFO(crtc2.lock));
  844. }
  845. break;
  846. }
  847. return 0;
  848. }
  849. case MATROXFB_GET_OUTPUT_MODE:
  850. {
  851. struct matroxioc_output_mode mom;
  852. struct matrox_altout *oproc;
  853. int val;
  854. if (copy_from_user(&mom, argp, sizeof(mom)))
  855. return -EFAULT;
  856. if (mom.output >= MATROXFB_MAX_OUTPUTS)
  857. return -ENXIO;
  858. down_read(&ACCESS_FBINFO(altout.lock));
  859. oproc = ACCESS_FBINFO(outputs[mom.output]).output;
  860. if (!oproc) {
  861. val = -ENXIO;
  862. } else {
  863. mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
  864. val = 0;
  865. }
  866. up_read(&ACCESS_FBINFO(altout.lock));
  867. if (val)
  868. return val;
  869. if (copy_to_user(argp, &mom, sizeof(mom)))
  870. return -EFAULT;
  871. return 0;
  872. }
  873. case MATROXFB_SET_OUTPUT_CONNECTION:
  874. {
  875. u_int32_t tmp;
  876. int i;
  877. int changes;
  878. if (copy_from_user(&tmp, argp, sizeof(tmp)))
  879. return -EFAULT;
  880. for (i = 0; i < 32; i++) {
  881. if (tmp & (1 << i)) {
  882. if (i >= MATROXFB_MAX_OUTPUTS)
  883. return -ENXIO;
  884. if (!ACCESS_FBINFO(outputs[i]).output)
  885. return -ENXIO;
  886. switch (ACCESS_FBINFO(outputs[i]).src) {
  887. case MATROXFB_SRC_NONE:
  888. case MATROXFB_SRC_CRTC1:
  889. break;
  890. default:
  891. return -EBUSY;
  892. }
  893. }
  894. }
  895. if (ACCESS_FBINFO(devflags.panellink)) {
  896. if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
  897. if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
  898. return -EINVAL;
  899. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  900. if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
  901. return -EBUSY;
  902. }
  903. }
  904. }
  905. }
  906. changes = 0;
  907. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  908. if (tmp & (1 << i)) {
  909. if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
  910. changes = 1;
  911. ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
  912. }
  913. } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
  914. changes = 1;
  915. ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
  916. }
  917. }
  918. if (!changes)
  919. return 0;
  920. matroxfb_set_par(info);
  921. return 0;
  922. }
  923. case MATROXFB_GET_OUTPUT_CONNECTION:
  924. {
  925. u_int32_t conn = 0;
  926. int i;
  927. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  928. if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
  929. conn |= 1 << i;
  930. }
  931. }
  932. if (put_user(conn, (u_int32_t __user *)arg))
  933. return -EFAULT;
  934. return 0;
  935. }
  936. case MATROXFB_GET_AVAILABLE_OUTPUTS:
  937. {
  938. u_int32_t conn = 0;
  939. int i;
  940. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  941. if (ACCESS_FBINFO(outputs[i]).output) {
  942. switch (ACCESS_FBINFO(outputs[i]).src) {
  943. case MATROXFB_SRC_NONE:
  944. case MATROXFB_SRC_CRTC1:
  945. conn |= 1 << i;
  946. break;
  947. }
  948. }
  949. }
  950. if (ACCESS_FBINFO(devflags.panellink)) {
  951. if (conn & MATROXFB_OUTPUT_CONN_DFP)
  952. conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
  953. if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
  954. conn &= ~MATROXFB_OUTPUT_CONN_DFP;
  955. }
  956. if (put_user(conn, (u_int32_t __user *)arg))
  957. return -EFAULT;
  958. return 0;
  959. }
  960. case MATROXFB_GET_ALL_OUTPUTS:
  961. {
  962. u_int32_t conn = 0;
  963. int i;
  964. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  965. if (ACCESS_FBINFO(outputs[i]).output) {
  966. conn |= 1 << i;
  967. }
  968. }
  969. if (put_user(conn, (u_int32_t __user *)arg))
  970. return -EFAULT;
  971. return 0;
  972. }
  973. case VIDIOC_QUERYCAP:
  974. {
  975. struct v4l2_capability r;
  976. memset(&r, 0, sizeof(r));
  977. strcpy(r.driver, "matroxfb");
  978. strcpy(r.card, "Matrox");
  979. sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
  980. r.version = KERNEL_VERSION(1,0,0);
  981. r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
  982. if (copy_to_user(argp, &r, sizeof(r)))
  983. return -EFAULT;
  984. return 0;
  985. }
  986. case VIDIOC_QUERYCTRL:
  987. {
  988. struct v4l2_queryctrl qctrl;
  989. int err;
  990. if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
  991. return -EFAULT;
  992. down_read(&ACCESS_FBINFO(altout).lock);
  993. if (!ACCESS_FBINFO(outputs[1]).output) {
  994. err = -ENXIO;
  995. } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
  996. err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
  997. } else {
  998. err = -EINVAL;
  999. }
  1000. up_read(&ACCESS_FBINFO(altout).lock);
  1001. if (err >= 0 &&
  1002. copy_to_user(argp, &qctrl, sizeof(qctrl)))
  1003. return -EFAULT;
  1004. return err;
  1005. }
  1006. case VIDIOC_G_CTRL:
  1007. {
  1008. struct v4l2_control ctrl;
  1009. int err;
  1010. if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
  1011. return -EFAULT;
  1012. down_read(&ACCESS_FBINFO(altout).lock);
  1013. if (!ACCESS_FBINFO(outputs[1]).output) {
  1014. err = -ENXIO;
  1015. } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
  1016. err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
  1017. } else {
  1018. err = -EINVAL;
  1019. }
  1020. up_read(&ACCESS_FBINFO(altout).lock);
  1021. if (err >= 0 &&
  1022. copy_to_user(argp, &ctrl, sizeof(ctrl)))
  1023. return -EFAULT;
  1024. return err;
  1025. }
  1026. case VIDIOC_S_CTRL_OLD:
  1027. case VIDIOC_S_CTRL:
  1028. {
  1029. struct v4l2_control ctrl;
  1030. int err;
  1031. if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
  1032. return -EFAULT;
  1033. down_read(&ACCESS_FBINFO(altout).lock);
  1034. if (!ACCESS_FBINFO(outputs[1]).output) {
  1035. err = -ENXIO;
  1036. } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
  1037. err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
  1038. } else {
  1039. err = -EINVAL;
  1040. }
  1041. up_read(&ACCESS_FBINFO(altout).lock);
  1042. return err;
  1043. }
  1044. }
  1045. return -ENOTTY;
  1046. }
  1047. /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
  1048. static int matroxfb_blank(int blank, struct fb_info *info)
  1049. {
  1050. int seq;
  1051. int crtc;
  1052. CRITFLAGS
  1053. MINFO_FROM_INFO(info);
  1054. DBG(__func__)
  1055. if (ACCESS_FBINFO(dead))
  1056. return 1;
  1057. switch (blank) {
  1058. case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
  1059. case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
  1060. case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
  1061. case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
  1062. default: seq = 0x00; crtc = 0x00; break;
  1063. }
  1064. CRITBEGIN
  1065. mga_outb(M_SEQ_INDEX, 1);
  1066. mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
  1067. mga_outb(M_EXTVGA_INDEX, 1);
  1068. mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
  1069. CRITEND
  1070. return 0;
  1071. }
  1072. static struct fb_ops matroxfb_ops = {
  1073. .owner = THIS_MODULE,
  1074. .fb_open = matroxfb_open,
  1075. .fb_release = matroxfb_release,
  1076. .fb_check_var = matroxfb_check_var,
  1077. .fb_set_par = matroxfb_set_par,
  1078. .fb_setcolreg = matroxfb_setcolreg,
  1079. .fb_pan_display =matroxfb_pan_display,
  1080. .fb_blank = matroxfb_blank,
  1081. .fb_ioctl = matroxfb_ioctl,
  1082. /* .fb_fillrect = <set by matrox_cfbX_init>, */
  1083. /* .fb_copyarea = <set by matrox_cfbX_init>, */
  1084. /* .fb_imageblit = <set by matrox_cfbX_init>, */
  1085. /* .fb_cursor = <set by matrox_cfbX_init>, */
  1086. };
  1087. #define RSDepth(X) (((X) >> 8) & 0x0F)
  1088. #define RS8bpp 0x1
  1089. #define RS15bpp 0x2
  1090. #define RS16bpp 0x3
  1091. #define RS32bpp 0x4
  1092. #define RS4bpp 0x5
  1093. #define RS24bpp 0x6
  1094. #define RSText 0x7
  1095. #define RSText8 0x8
  1096. /* 9-F */
  1097. static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
  1098. { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
  1099. { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
  1100. { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
  1101. { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
  1102. { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
  1103. { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
  1104. { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
  1105. { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
  1106. };
  1107. /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
  1108. static unsigned int mem; /* "matrox:mem:xxxxxM" */
  1109. static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
  1110. static int inv24; /* "matrox:inv24" */
  1111. static int cross4MB = -1; /* "matrox:cross4MB" */
  1112. static int disabled; /* "matrox:disabled" */
  1113. static int noaccel; /* "matrox:noaccel" */
  1114. static int nopan; /* "matrox:nopan" */
  1115. static int no_pci_retry; /* "matrox:nopciretry" */
  1116. static int novga; /* "matrox:novga" */
  1117. static int nobios; /* "matrox:nobios" */
  1118. static int noinit = 1; /* "matrox:init" */
  1119. static int inverse; /* "matrox:inverse" */
  1120. static int sgram; /* "matrox:sgram" */
  1121. #ifdef CONFIG_MTRR
  1122. static int mtrr = 1; /* "matrox:nomtrr" */
  1123. #endif
  1124. static int grayscale; /* "matrox:grayscale" */
  1125. static int dev = -1; /* "matrox:dev:xxxxx" */
  1126. static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
  1127. static int depth = -1; /* "matrox:depth:xxxxx" */
  1128. static unsigned int xres; /* "matrox:xres:xxxxx" */
  1129. static unsigned int yres; /* "matrox:yres:xxxxx" */
  1130. static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
  1131. static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
  1132. static unsigned int vslen; /* "matrox:vslen:xxxxx" */
  1133. static unsigned int left = ~0; /* "matrox:left:xxxxx" */
  1134. static unsigned int right = ~0; /* "matrox:right:xxxxx" */
  1135. static unsigned int hslen; /* "matrox:hslen:xxxxx" */
  1136. static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
  1137. static int sync = -1; /* "matrox:sync:xxxxx" */
  1138. static unsigned int fv; /* "matrox:fv:xxxxx" */
  1139. static unsigned int fh; /* "matrox:fh:xxxxxk" */
  1140. static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
  1141. static int dfp; /* "matrox:dfp */
  1142. static int dfp_type = -1; /* "matrox:dfp:xxx */
  1143. static int memtype = -1; /* "matrox:memtype:xxx" */
  1144. static char outputs[8]; /* "matrox:outputs:xxx" */
  1145. #ifndef MODULE
  1146. static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
  1147. #endif
  1148. static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
  1149. vaddr_t vm;
  1150. unsigned int offs;
  1151. unsigned int offs2;
  1152. unsigned char orig;
  1153. unsigned char bytes[32];
  1154. unsigned char* tmp;
  1155. DBG(__func__)
  1156. vm = ACCESS_FBINFO(video.vbase);
  1157. maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
  1158. /* at least 2MB */
  1159. if (maxSize < 0x0200000) return 0;
  1160. if (maxSize > 0x2000000) maxSize = 0x2000000;
  1161. mga_outb(M_EXTVGA_INDEX, 0x03);
  1162. orig = mga_inb(M_EXTVGA_DATA);
  1163. mga_outb(M_EXTVGA_DATA, orig | 0x80);
  1164. tmp = bytes;
  1165. for (offs = 0x100000; offs < maxSize; offs += 0x200000)
  1166. *tmp++ = mga_readb(vm, offs);
  1167. for (offs = 0x100000; offs < maxSize; offs += 0x200000)
  1168. mga_writeb(vm, offs, 0x02);
  1169. mga_outb(M_CACHEFLUSH, 0x00);
  1170. for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
  1171. if (mga_readb(vm, offs) != 0x02)
  1172. break;
  1173. mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
  1174. if (mga_readb(vm, offs))
  1175. break;
  1176. }
  1177. tmp = bytes;
  1178. for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
  1179. mga_writeb(vm, offs2, *tmp++);
  1180. mga_outb(M_EXTVGA_INDEX, 0x03);
  1181. mga_outb(M_EXTVGA_DATA, orig);
  1182. *realSize = offs - 0x100000;
  1183. #ifdef CONFIG_FB_MATROX_MILLENIUM
  1184. ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
  1185. #endif
  1186. return 1;
  1187. }
  1188. struct video_board {
  1189. int maxvram;
  1190. int maxdisplayable;
  1191. int accelID;
  1192. struct matrox_switch* lowlevel;
  1193. };
  1194. #ifdef CONFIG_FB_MATROX_MILLENIUM
  1195. static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
  1196. static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
  1197. static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
  1198. #endif /* CONFIG_FB_MATROX_MILLENIUM */
  1199. #ifdef CONFIG_FB_MATROX_MYSTIQUE
  1200. static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
  1201. #endif /* CONFIG_FB_MATROX_MYSTIQUE */
  1202. #ifdef CONFIG_FB_MATROX_G
  1203. static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
  1204. static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
  1205. #ifdef CONFIG_FB_MATROX_32MB
  1206. /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
  1207. whole 32MB */
  1208. static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
  1209. #else
  1210. static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
  1211. #endif
  1212. #endif
  1213. #define DEVF_VIDEO64BIT 0x0001
  1214. #define DEVF_SWAPS 0x0002
  1215. #define DEVF_SRCORG 0x0004
  1216. #define DEVF_DUALHEAD 0x0008
  1217. #define DEVF_CROSS4MB 0x0010
  1218. #define DEVF_TEXT4B 0x0020
  1219. /* #define DEVF_recycled 0x0040 */
  1220. /* #define DEVF_recycled 0x0080 */
  1221. #define DEVF_SUPPORT32MB 0x0100
  1222. #define DEVF_ANY_VXRES 0x0200
  1223. #define DEVF_TEXT16B 0x0400
  1224. #define DEVF_CRTC2 0x0800
  1225. #define DEVF_MAVEN_CAPABLE 0x1000
  1226. #define DEVF_PANELLINK_CAPABLE 0x2000
  1227. #define DEVF_G450DAC 0x4000
  1228. #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
  1229. #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
  1230. #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
  1231. #define DEVF_G200 (DEVF_G2CORE)
  1232. #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
  1233. /* if you'll find how to drive DFP... */
  1234. #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
  1235. #define DEVF_G550 (DEVF_G450)
  1236. static struct board {
  1237. unsigned short vendor, device, rev, svid, sid;
  1238. unsigned int flags;
  1239. unsigned int maxclk;
  1240. enum mga_chip chip;
  1241. struct video_board* base;
  1242. const char* name;
  1243. } dev_list[] = {
  1244. #ifdef CONFIG_FB_MATROX_MILLENIUM
  1245. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
  1246. 0, 0,
  1247. DEVF_TEXT4B,
  1248. 230000,
  1249. MGA_2064,
  1250. &vbMillennium,
  1251. "Millennium (PCI)"},
  1252. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
  1253. 0, 0,
  1254. DEVF_SWAPS,
  1255. 220000,
  1256. MGA_2164,
  1257. &vbMillennium2,
  1258. "Millennium II (PCI)"},
  1259. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
  1260. 0, 0,
  1261. DEVF_SWAPS,
  1262. 250000,
  1263. MGA_2164,
  1264. &vbMillennium2A,
  1265. "Millennium II (AGP)"},
  1266. #endif
  1267. #ifdef CONFIG_FB_MATROX_MYSTIQUE
  1268. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
  1269. 0, 0,
  1270. DEVF_VIDEO64BIT | DEVF_CROSS4MB,
  1271. 180000,
  1272. MGA_1064,
  1273. &vbMystique,
  1274. "Mystique (PCI)"},
  1275. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
  1276. 0, 0,
  1277. DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
  1278. 220000,
  1279. MGA_1164,
  1280. &vbMystique,
  1281. "Mystique 220 (PCI)"},
  1282. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
  1283. 0, 0,
  1284. DEVF_VIDEO64BIT | DEVF_CROSS4MB,
  1285. 180000,
  1286. MGA_1064,
  1287. &vbMystique,
  1288. "Mystique (AGP)"},
  1289. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
  1290. 0, 0,
  1291. DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
  1292. 220000,
  1293. MGA_1164,
  1294. &vbMystique,
  1295. "Mystique 220 (AGP)"},
  1296. #endif
  1297. #ifdef CONFIG_FB_MATROX_G
  1298. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
  1299. 0, 0,
  1300. DEVF_G100,
  1301. 230000,
  1302. MGA_G100,
  1303. &vbG100,
  1304. "MGA-G100 (PCI)"},
  1305. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
  1306. 0, 0,
  1307. DEVF_G100,
  1308. 230000,
  1309. MGA_G100,
  1310. &vbG100,
  1311. "MGA-G100 (AGP)"},
  1312. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF,
  1313. 0, 0,
  1314. DEVF_G200,
  1315. 230000,
  1316. MGA_G200,
  1317. &vbG200,
  1318. "MGA-G200eV (PCI)"},
  1319. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
  1320. 0, 0,
  1321. DEVF_G200,
  1322. 250000,
  1323. MGA_G200,
  1324. &vbG200,
  1325. "MGA-G200 (PCI)"},
  1326. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1327. PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
  1328. DEVF_G200,
  1329. 220000,
  1330. MGA_G200,
  1331. &vbG200,
  1332. "MGA-G200 (AGP)"},
  1333. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1334. PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
  1335. DEVF_G200,
  1336. 230000,
  1337. MGA_G200,
  1338. &vbG200,
  1339. "Mystique G200 (AGP)"},
  1340. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1341. PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
  1342. DEVF_G200,
  1343. 250000,
  1344. MGA_G200,
  1345. &vbG200,
  1346. "Millennium G200 (AGP)"},
  1347. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1348. PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
  1349. DEVF_G200,
  1350. 230000,
  1351. MGA_G200,
  1352. &vbG200,
  1353. "Marvel G200 (AGP)"},
  1354. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1355. PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
  1356. DEVF_G200,
  1357. 230000,
  1358. MGA_G200,
  1359. &vbG200,
  1360. "MGA-G200 (AGP)"},
  1361. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
  1362. 0, 0,
  1363. DEVF_G200,
  1364. 230000,
  1365. MGA_G200,
  1366. &vbG200,
  1367. "G200 (AGP)"},
  1368. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
  1369. PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
  1370. DEVF_G400,
  1371. 360000,
  1372. MGA_G400,
  1373. &vbG400,
  1374. "Millennium G400 MAX (AGP)"},
  1375. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
  1376. 0, 0,
  1377. DEVF_G400,
  1378. 300000,
  1379. MGA_G400,
  1380. &vbG400,
  1381. "G400 (AGP)"},
  1382. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
  1383. 0, 0,
  1384. DEVF_G450,
  1385. 360000,
  1386. MGA_G450,
  1387. &vbG400,
  1388. "G450"},
  1389. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
  1390. 0, 0,
  1391. DEVF_G550,
  1392. 360000,
  1393. MGA_G550,
  1394. &vbG400,
  1395. "G550"},
  1396. #endif
  1397. {0, 0, 0xFF,
  1398. 0, 0,
  1399. 0,
  1400. 0,
  1401. 0,
  1402. NULL,
  1403. NULL}};
  1404. #ifndef MODULE
  1405. static struct fb_videomode defaultmode = {
  1406. /* 640x480 @ 60Hz, 31.5 kHz */
  1407. NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
  1408. 0, FB_VMODE_NONINTERLACED
  1409. };
  1410. #endif /* !MODULE */
  1411. static int hotplug = 0;
  1412. static void setDefaultOutputs(WPMINFO2) {
  1413. unsigned int i;
  1414. const char* ptr;
  1415. ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
  1416. if (ACCESS_FBINFO(devflags.g450dac)) {
  1417. ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
  1418. ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
  1419. } else if (dfp) {
  1420. ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
  1421. }
  1422. ptr = outputs;
  1423. for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
  1424. char c = *ptr++;
  1425. if (c == 0) {
  1426. break;
  1427. }
  1428. if (c == '0') {
  1429. ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
  1430. } else if (c == '1') {
  1431. ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
  1432. } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
  1433. ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
  1434. } else {
  1435. printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
  1436. break;
  1437. }
  1438. }
  1439. /* Nullify this option for subsequent adapters */
  1440. outputs[0] = 0;
  1441. }
  1442. static int initMatrox2(WPMINFO struct board* b){
  1443. unsigned long ctrlptr_phys = 0;
  1444. unsigned long video_base_phys = 0;
  1445. unsigned int memsize;
  1446. int err;
  1447. static struct pci_device_id intel_82437[] = {
  1448. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
  1449. { },
  1450. };
  1451. DBG(__func__)
  1452. /* set default values... */
  1453. vesafb_defined.accel_flags = FB_ACCELF_TEXT;
  1454. ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
  1455. ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
  1456. ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
  1457. printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
  1458. ACCESS_FBINFO(capable.plnwt) = 1;
  1459. ACCESS_FBINFO(chip) = b->chip;
  1460. ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
  1461. ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
  1462. if (b->flags & DEVF_TEXT4B) {
  1463. ACCESS_FBINFO(devflags.vgastep) = 4;
  1464. ACCESS_FBINFO(devflags.textmode) = 4;
  1465. ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
  1466. } else if (b->flags & DEVF_TEXT16B) {
  1467. ACCESS_FBINFO(devflags.vgastep) = 16;
  1468. ACCESS_FBINFO(devflags.textmode) = 1;
  1469. ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
  1470. } else {
  1471. ACCESS_FBINFO(devflags.vgastep) = 8;
  1472. ACCESS_FBINFO(devflags.textmode) = 1;
  1473. ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
  1474. }
  1475. #ifdef CONFIG_FB_MATROX_32MB
  1476. ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
  1477. #endif
  1478. ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
  1479. ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
  1480. ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
  1481. ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
  1482. ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
  1483. ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
  1484. ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
  1485. ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
  1486. setDefaultOutputs(PMINFO2);
  1487. if (b->flags & DEVF_PANELLINK_CAPABLE) {
  1488. ACCESS_FBINFO(outputs[2]).data = MINFO;
  1489. ACCESS_FBINFO(outputs[2]).output = &panellink_output;
  1490. ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
  1491. ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
  1492. ACCESS_FBINFO(devflags.panellink) = 1;
  1493. }
  1494. if (ACCESS_FBINFO(capable.cross4MB) < 0)
  1495. ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
  1496. if (b->flags & DEVF_SWAPS) {
  1497. ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
  1498. video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
  1499. ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
  1500. } else {
  1501. ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
  1502. video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
  1503. ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
  1504. }
  1505. err = -EINVAL;
  1506. if (!ctrlptr_phys) {
  1507. printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
  1508. goto fail;
  1509. }
  1510. if (!video_base_phys) {
  1511. printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
  1512. goto fail;
  1513. }
  1514. memsize = b->base->maxvram;
  1515. if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
  1516. goto fail;
  1517. }
  1518. if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
  1519. goto failCtrlMR;
  1520. }
  1521. ACCESS_FBINFO(video.len_maximum) = memsize;
  1522. /* convert mem (autodetect k, M) */
  1523. if (mem < 1024) mem *= 1024;
  1524. if (mem < 0x00100000) mem *= 1024;
  1525. if (mem && (mem < memsize))
  1526. memsize = mem;
  1527. err = -ENOMEM;
  1528. if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
  1529. printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
  1530. goto failVideoMR;
  1531. }
  1532. ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
  1533. ACCESS_FBINFO(mmio.len) = 16384;
  1534. ACCESS_FBINFO(video.base) = video_base_phys;
  1535. if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
  1536. printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
  1537. video_base_phys, memsize);
  1538. goto failCtrlIO;
  1539. }
  1540. {
  1541. u_int32_t cmd;
  1542. u_int32_t mga_option;
  1543. pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
  1544. pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
  1545. mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
  1546. mga_option |= MX_OPTION_BSWAP;
  1547. /* disable palette snooping */
  1548. cmd &= ~PCI_COMMAND_VGA_PALETTE;
  1549. if (pci_dev_present(intel_82437)) {
  1550. if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
  1551. printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
  1552. }
  1553. mga_option |= 0x20000000;
  1554. ACCESS_FBINFO(devflags.nopciretry) = 1;
  1555. }
  1556. pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
  1557. pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
  1558. ACCESS_FBINFO(hw).MXoptionReg = mga_option;
  1559. /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
  1560. /* maybe preinit() candidate, but it is same... for all devices... at this time... */
  1561. pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
  1562. }
  1563. err = -ENXIO;
  1564. matroxfb_read_pins(PMINFO2);
  1565. if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
  1566. goto failVideoIO;
  1567. }
  1568. err = -ENOMEM;
  1569. if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
  1570. printk(KERN_ERR "matroxfb: cannot determine memory size\n");
  1571. goto failVideoIO;
  1572. }
  1573. ACCESS_FBINFO(devflags.ydstorg) = 0;
  1574. ACCESS_FBINFO(video.base) = video_base_phys;
  1575. ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
  1576. if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
  1577. ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
  1578. #ifdef CONFIG_MTRR
  1579. if (mtrr) {
  1580. ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
  1581. ACCESS_FBINFO(mtrr.vram_valid) = 1;
  1582. printk(KERN_INFO "matroxfb: MTRR's turned on\n");
  1583. }
  1584. #endif /* CONFIG_MTRR */
  1585. if (!ACCESS_FBINFO(devflags.novga))
  1586. request_region(0x3C0, 32, "matrox");
  1587. matroxfb_g450_connect(PMINFO2);
  1588. ACCESS_FBINFO(hw_switch->reset(PMINFO2));
  1589. ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
  1590. ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
  1591. ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
  1592. ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
  1593. ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
  1594. /* static settings */
  1595. vesafb_defined.red = colors[depth-1].red;
  1596. vesafb_defined.green = colors[depth-1].green;
  1597. vesafb_defined.blue = colors[depth-1].blue;
  1598. vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
  1599. vesafb_defined.grayscale = grayscale;
  1600. vesafb_defined.vmode = 0;
  1601. if (noaccel)
  1602. vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
  1603. ACCESS_FBINFO(fbops) = matroxfb_ops;
  1604. ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
  1605. ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
  1606. /* after __init time we are like module... no logo */
  1607. ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
  1608. ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
  1609. FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
  1610. FBINFO_HWACCEL_FILLRECT | /* And fillrect */
  1611. FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
  1612. FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
  1613. FBINFO_HWACCEL_YPAN; /* And vertical panning */
  1614. ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
  1615. fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
  1616. #ifndef MODULE
  1617. /* mode database is marked __init!!! */
  1618. if (!hotplug) {
  1619. fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
  1620. NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
  1621. }
  1622. #endif /* !MODULE */
  1623. /* mode modifiers */
  1624. if (hslen)
  1625. vesafb_defined.hsync_len = hslen;
  1626. if (vslen)
  1627. vesafb_defined.vsync_len = vslen;
  1628. if (left != ~0)
  1629. vesafb_defined.left_margin = left;
  1630. if (right != ~0)
  1631. vesafb_defined.right_margin = right;
  1632. if (upper != ~0)
  1633. vesafb_defined.upper_margin = upper;
  1634. if (lower != ~0)
  1635. vesafb_defined.lower_margin = lower;
  1636. if (xres)
  1637. vesafb_defined.xres = xres;
  1638. if (yres)
  1639. vesafb_defined.yres = yres;
  1640. if (sync != -1)
  1641. vesafb_defined.sync = sync;
  1642. else if (vesafb_defined.sync == ~0) {
  1643. vesafb_defined.sync = 0;
  1644. if (yres < 400)
  1645. vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
  1646. else if (yres < 480)
  1647. vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
  1648. }
  1649. /* fv, fh, maxclk limits was specified */
  1650. {
  1651. unsigned int tmp;
  1652. if (fv) {
  1653. tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
  1654. + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
  1655. if ((tmp < fh) || (fh == 0)) fh = tmp;
  1656. }
  1657. if (fh) {
  1658. tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
  1659. + vesafb_defined.right_margin + vesafb_defined.hsync_len);
  1660. if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
  1661. }
  1662. tmp = (maxclk + 499) / 500;
  1663. if (tmp) {
  1664. tmp = (2000000000 + tmp) / tmp;
  1665. if (tmp > pixclock) pixclock = tmp;
  1666. }
  1667. }
  1668. if (pixclock) {
  1669. if (pixclock < 2000) /* > 500MHz */
  1670. pixclock = 4000; /* 250MHz */
  1671. if (pixclock > 1000000)
  1672. pixclock = 1000000; /* 1MHz */
  1673. vesafb_defined.pixclock = pixclock;
  1674. }
  1675. /* FIXME: Where to move this?! */
  1676. #if defined(CONFIG_PPC_PMAC)
  1677. #ifndef MODULE
  1678. if (machine_is(powermac)) {
  1679. struct fb_var_screeninfo var;
  1680. if (default_vmode <= 0 || default_vmode > VMODE_MAX)
  1681. default_vmode = VMODE_640_480_60;
  1682. #ifdef CONFIG_NVRAM
  1683. if (default_cmode == CMODE_NVRAM)
  1684. default_cmode = nvram_read_byte(NV_CMODE);
  1685. #endif
  1686. if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
  1687. default_cmode = CMODE_8;
  1688. if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
  1689. var.accel_flags = vesafb_defined.accel_flags;
  1690. var.xoffset = var.yoffset = 0;
  1691. /* Note: mac_vmode_to_var() does not set all parameters */
  1692. vesafb_defined = var;
  1693. }
  1694. }
  1695. #endif /* !MODULE */
  1696. #endif /* CONFIG_PPC_PMAC */
  1697. vesafb_defined.xres_virtual = vesafb_defined.xres;
  1698. if (nopan) {
  1699. vesafb_defined.yres_virtual = vesafb_defined.yres;
  1700. } else {
  1701. vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
  1702. to yres_virtual * xres_virtual < 2^32 */
  1703. }
  1704. matroxfb_init_fix(PMINFO2);
  1705. ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase));
  1706. matroxfb_update_fix(PMINFO2);
  1707. /* Normalize values (namely yres_virtual) */
  1708. matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
  1709. /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
  1710. * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
  1711. * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
  1712. * anyway. But we at least tried... */
  1713. ACCESS_FBINFO(fbcon.var) = vesafb_defined;
  1714. err = -EINVAL;
  1715. printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
  1716. vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
  1717. vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
  1718. printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
  1719. ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
  1720. /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
  1721. * and we do not want currcon == 0 for subsequent framebuffers */
  1722. ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
  1723. if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
  1724. goto failVideoIO;
  1725. }
  1726. printk("fb%d: %s frame buffer device\n",
  1727. ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
  1728. /* there is no console on this fb... but we have to initialize hardware
  1729. * until someone tells me what is proper thing to do */
  1730. if (!ACCESS_FBINFO(initialized)) {
  1731. printk(KERN_INFO "fb%d: initializing hardware\n",
  1732. ACCESS_FBINFO(fbcon.node));
  1733. /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
  1734. * already before, so register_framebuffer works correctly. */
  1735. vesafb_defined.activate |= FB_ACTIVATE_FORCE;
  1736. fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
  1737. }
  1738. return 0;
  1739. failVideoIO:;
  1740. matroxfb_g450_shutdown(PMINFO2);
  1741. mga_iounmap(ACCESS_FBINFO(video.vbase));
  1742. failCtrlIO:;
  1743. mga_iounmap(ACCESS_FBINFO(mmio.vbase));
  1744. failVideoMR:;
  1745. release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
  1746. failCtrlMR:;
  1747. release_mem_region(ctrlptr_phys, 16384);
  1748. fail:;
  1749. return err;
  1750. }
  1751. static LIST_HEAD(matroxfb_list);
  1752. static LIST_HEAD(matroxfb_driver_list);
  1753. #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
  1754. #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
  1755. int matroxfb_register_driver(struct matroxfb_driver* drv) {
  1756. struct matrox_fb_info* minfo;
  1757. list_add(&drv->node, &matroxfb_driver_list);
  1758. for (minfo = matroxfb_l(matroxfb_list.next);
  1759. minfo != matroxfb_l(&matroxfb_list);
  1760. minfo = matroxfb_l(minfo->next_fb.next)) {
  1761. void* p;
  1762. if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
  1763. continue;
  1764. p = drv->probe(minfo);
  1765. if (p) {
  1766. minfo->drivers_data[minfo->drivers_count] = p;
  1767. minfo->drivers[minfo->drivers_count++] = drv;
  1768. }
  1769. }
  1770. return 0;
  1771. }
  1772. void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
  1773. struct matrox_fb_info* minfo;
  1774. list_del(&drv->node);
  1775. for (minfo = matroxfb_l(matroxfb_list.next);
  1776. minfo != matroxfb_l(&matroxfb_list);
  1777. minfo = matroxfb_l(minfo->next_fb.next)) {
  1778. int i;
  1779. for (i = 0; i < minfo->drivers_count; ) {
  1780. if (minfo->drivers[i] == drv) {
  1781. if (drv && drv->remove)
  1782. drv->remove(minfo, minfo->drivers_data[i]);
  1783. minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
  1784. minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
  1785. } else
  1786. i++;
  1787. }
  1788. }
  1789. }
  1790. static void matroxfb_register_device(struct matrox_fb_info* minfo) {
  1791. struct matroxfb_driver* drv;
  1792. int i = 0;
  1793. list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
  1794. for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
  1795. drv != matroxfb_driver_l(&matroxfb_driver_list);
  1796. drv = matroxfb_driver_l(drv->node.next)) {
  1797. if (drv && drv->probe) {
  1798. void *p = drv->probe(minfo);
  1799. if (p) {
  1800. minfo->drivers_data[i] = p;
  1801. minfo->drivers[i++] = drv;
  1802. if (i == MATROXFB_MAX_FB_DRIVERS)
  1803. break;
  1804. }
  1805. }
  1806. }
  1807. minfo->drivers_count = i;
  1808. }
  1809. static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
  1810. int i;
  1811. list_del(&ACCESS_FBINFO(next_fb));
  1812. for (i = 0; i < minfo->drivers_count; i++) {
  1813. struct matroxfb_driver* drv = minfo->drivers[i];
  1814. if (drv && drv->remove)
  1815. drv->remove(minfo, minfo->drivers_data[i]);
  1816. }
  1817. }
  1818. static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
  1819. struct board* b;
  1820. u_int16_t svid;
  1821. u_int16_t sid;
  1822. struct matrox_fb_info* minfo;
  1823. int err;
  1824. u_int32_t cmd;
  1825. #ifndef CONFIG_FB_MATROX_MULTIHEAD
  1826. static int registered = 0;
  1827. #endif
  1828. DBG(__func__)
  1829. svid = pdev->subsystem_vendor;
  1830. sid = pdev->subsystem_device;
  1831. for (b = dev_list; b->vendor; b++) {
  1832. if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
  1833. if (b->svid)
  1834. if ((b->svid != svid) || (b->sid != sid)) continue;
  1835. break;
  1836. }
  1837. /* not match... */
  1838. if (!b->vendor)
  1839. return -ENODEV;
  1840. if (dev > 0) {
  1841. /* not requested one... */
  1842. dev--;
  1843. return -ENODEV;
  1844. }
  1845. pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
  1846. if (pci_enable_device(pdev)) {
  1847. return -1;
  1848. }
  1849. #ifdef CONFIG_FB_MATROX_MULTIHEAD
  1850. minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
  1851. if (!minfo)
  1852. return -1;
  1853. #else
  1854. if (registered) /* singlehead driver... */
  1855. return -1;
  1856. minfo = &matroxfb_global_mxinfo;
  1857. #endif
  1858. memset(MINFO, 0, sizeof(*MINFO));
  1859. ACCESS_FBINFO(pcidev) = pdev;
  1860. ACCESS_FBINFO(dead) = 0;
  1861. ACCESS_FBINFO(usecount) = 0;
  1862. ACCESS_FBINFO(userusecount) = 0;
  1863. pci_set_drvdata(pdev, MINFO);
  1864. /* DEVFLAGS */
  1865. ACCESS_FBINFO(devflags.memtype) = memtype;
  1866. if (memtype != -1)
  1867. noinit = 0;
  1868. if (cmd & PCI_COMMAND_MEMORY) {
  1869. ACCESS_FBINFO(devflags.novga) = novga;
  1870. ACCESS_FBINFO(devflags.nobios) = nobios;
  1871. ACCESS_FBINFO(devflags.noinit) = noinit;
  1872. /* subsequent heads always needs initialization and must not enable BIOS */
  1873. novga = 1;
  1874. nobios = 1;
  1875. noinit = 0;
  1876. } else {
  1877. ACCESS_FBINFO(devflags.novga) = 1;
  1878. ACCESS_FBINFO(devflags.nobios) = 1;
  1879. ACCESS_FBINFO(devflags.noinit) = 0;
  1880. }
  1881. ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
  1882. ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
  1883. ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
  1884. ACCESS_FBINFO(devflags.sgram) = sgram;
  1885. ACCESS_FBINFO(capable.cross4MB) = cross4MB;
  1886. spin_lock_init(&ACCESS_FBINFO(lock.DAC));
  1887. spin_lock_init(&ACCESS_FBINFO(lock.accel));
  1888. init_rwsem(&ACCESS_FBINFO(crtc2.lock));
  1889. init_rwsem(&ACCESS_FBINFO(altout.lock));
  1890. mutex_init(&ACCESS_FBINFO(fbcon).lock);
  1891. mutex_init(&ACCESS_FBINFO(fbcon).mm_lock);
  1892. ACCESS_FBINFO(irq_flags) = 0;
  1893. init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
  1894. init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
  1895. ACCESS_FBINFO(crtc1.panpos) = -1;
  1896. err = initMatrox2(PMINFO b);
  1897. if (!err) {
  1898. #ifndef CONFIG_FB_MATROX_MULTIHEAD
  1899. registered = 1;
  1900. #endif
  1901. matroxfb_register_device(MINFO);
  1902. return 0;
  1903. }
  1904. #ifdef CONFIG_FB_MATROX_MULTIHEAD
  1905. kfree(minfo);
  1906. #endif
  1907. return -1;
  1908. }
  1909. static void pci_remove_matrox(struct pci_dev* pdev) {
  1910. struct matrox_fb_info* minfo;
  1911. minfo = pci_get_drvdata(pdev);
  1912. matroxfb_remove(PMINFO 1);
  1913. }
  1914. static struct pci_device_id matroxfb_devices[] = {
  1915. #ifdef CONFIG_FB_MATROX_MILLENIUM
  1916. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
  1917. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1918. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
  1919. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1920. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
  1921. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1922. #endif
  1923. #ifdef CONFIG_FB_MATROX_MYSTIQUE
  1924. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
  1925. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1926. #endif
  1927. #ifdef CONFIG_FB_MATROX_G
  1928. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
  1929. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1930. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
  1931. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1932. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI,
  1933. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1934. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
  1935. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1936. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
  1937. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1938. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
  1939. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1940. {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
  1941. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1942. #endif
  1943. {0, 0,
  1944. 0, 0, 0, 0, 0}
  1945. };
  1946. MODULE_DEVICE_TABLE(pci, matroxfb_devices);
  1947. static struct pci_driver matroxfb_driver = {
  1948. .name = "matroxfb",
  1949. .id_table = matroxfb_devices,
  1950. .probe = matroxfb_probe,
  1951. .remove = pci_remove_matrox,
  1952. };
  1953. /* **************************** init-time only **************************** */
  1954. #define RSResolution(X) ((X) & 0x0F)
  1955. #define RS640x400 1
  1956. #define RS640x480 2
  1957. #define RS800x600 3
  1958. #define RS1024x768 4
  1959. #define RS1280x1024 5
  1960. #define RS1600x1200 6
  1961. #define RS768x576 7
  1962. #define RS960x720 8
  1963. #define RS1152x864 9
  1964. #define RS1408x1056 10
  1965. #define RS640x350 11
  1966. #define RS1056x344 12 /* 132 x 43 text */
  1967. #define RS1056x400 13 /* 132 x 50 text */
  1968. #define RS1056x480 14 /* 132 x 60 text */
  1969. #define RSNoxNo 15
  1970. /* 10-FF */
  1971. static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
  1972. { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
  1973. { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
  1974. { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
  1975. { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
  1976. { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
  1977. { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
  1978. { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
  1979. { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
  1980. { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
  1981. { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
  1982. { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
  1983. { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
  1984. { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
  1985. { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
  1986. { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
  1987. };
  1988. #define RSCreate(X,Y) ((X) | ((Y) << 8))
  1989. static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
  1990. /* default must be first */
  1991. { ~0, RSCreate(RSNoxNo, RS8bpp ) },
  1992. { 0x101, RSCreate(RS640x480, RS8bpp ) },
  1993. { 0x100, RSCreate(RS640x400, RS8bpp ) },
  1994. { 0x180, RSCreate(RS768x576, RS8bpp ) },
  1995. { 0x103, RSCreate(RS800x600, RS8bpp ) },
  1996. { 0x188, RSCreate(RS960x720, RS8bpp ) },
  1997. { 0x105, RSCreate(RS1024x768, RS8bpp ) },
  1998. { 0x190, RSCreate(RS1152x864, RS8bpp ) },
  1999. { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
  2000. { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
  2001. { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
  2002. { 0x110, RSCreate(RS640x480, RS15bpp) },
  2003. { 0x181, RSCreate(RS768x576, RS15bpp) },
  2004. { 0x113, RSCreate(RS800x600, RS15bpp) },
  2005. { 0x189, RSCreate(RS960x720, RS15bpp) },
  2006. { 0x116, RSCreate(RS1024x768, RS15bpp) },
  2007. { 0x191, RSCreate(RS1152x864, RS15bpp) },
  2008. { 0x119, RSCreate(RS1280x1024, RS15bpp) },
  2009. { 0x199, RSCreate(RS1408x1056, RS15bpp) },
  2010. { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
  2011. { 0x111, RSCreate(RS640x480, RS16bpp) },
  2012. { 0x182, RSCreate(RS768x576, RS16bpp) },
  2013. { 0x114, RSCreate(RS800x600, RS16bpp) },
  2014. { 0x18A, RSCreate(RS960x720, RS16bpp) },
  2015. { 0x117, RSCreate(RS1024x768, RS16bpp) },
  2016. { 0x192, RSCreate(RS1152x864, RS16bpp) },
  2017. { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
  2018. { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
  2019. { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
  2020. { 0x1B2, RSCreate(RS640x480, RS24bpp) },
  2021. { 0x184, RSCreate(RS768x576, RS24bpp) },
  2022. { 0x1B5, RSCreate(RS800x600, RS24bpp) },
  2023. { 0x18C, RSCreate(RS960x720, RS24bpp) },
  2024. { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
  2025. { 0x194, RSCreate(RS1152x864, RS24bpp) },
  2026. { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
  2027. { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
  2028. { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
  2029. { 0x112, RSCreate(RS640x480, RS32bpp) },
  2030. { 0x183, RSCreate(RS768x576, RS32bpp) },
  2031. { 0x115, RSCreate(RS800x600, RS32bpp) },
  2032. { 0x18B, RSCreate(RS960x720, RS32bpp) },
  2033. { 0x118, RSCreate(RS1024x768, RS32bpp) },
  2034. { 0x193, RSCreate(RS1152x864, RS32bpp) },
  2035. { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
  2036. { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
  2037. { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
  2038. { 0x010, RSCreate(RS640x350, RS4bpp ) },
  2039. { 0x012, RSCreate(RS640x480, RS4bpp ) },
  2040. { 0x102, RSCreate(RS800x600, RS4bpp ) },
  2041. { 0x104, RSCreate(RS1024x768, RS4bpp ) },
  2042. { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
  2043. { 0, 0 }};
  2044. static void __init matroxfb_init_params(void) {
  2045. /* fh from kHz to Hz */
  2046. if (fh < 1000)
  2047. fh *= 1000; /* 1kHz minimum */
  2048. /* maxclk */
  2049. if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
  2050. if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
  2051. /* fix VESA number */
  2052. if (vesa != ~0)
  2053. vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
  2054. /* static settings */
  2055. for (RSptr = vesamap; RSptr->vesa; RSptr++) {
  2056. if (RSptr->vesa == vesa) break;
  2057. }
  2058. if (!RSptr->vesa) {
  2059. printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
  2060. RSptr = vesamap;
  2061. }
  2062. {
  2063. int res = RSResolution(RSptr->info)-1;
  2064. if (left == ~0)
  2065. left = timmings[res].left;
  2066. if (!xres)
  2067. xres = timmings[res].xres;
  2068. if (right == ~0)
  2069. right = timmings[res].right;
  2070. if (!hslen)
  2071. hslen = timmings[res].hslen;
  2072. if (upper == ~0)
  2073. upper = timmings[res].upper;
  2074. if (!yres)
  2075. yres = timmings[res].yres;
  2076. if (lower == ~0)
  2077. lower = timmings[res].lower;
  2078. if (!vslen)
  2079. vslen = timmings[res].vslen;
  2080. if (!(fv||fh||maxclk||pixclock))
  2081. fv = timmings[res].vfreq;
  2082. if (depth == -1)
  2083. depth = RSDepth(RSptr->info);
  2084. }
  2085. }
  2086. static int __init matrox_init(void) {
  2087. int err;
  2088. matroxfb_init_params();
  2089. err = pci_register_driver(&matroxfb_driver);
  2090. dev = -1; /* accept all new devices... */
  2091. return err;
  2092. }
  2093. /* **************************** exit-time only **************************** */
  2094. static void __exit matrox_done(void) {
  2095. pci_unregister_driver(&matroxfb_driver);
  2096. }
  2097. #ifndef MODULE
  2098. /* ************************* init in-kernel code ************************** */
  2099. static int __init matroxfb_setup(char *options) {
  2100. char *this_opt;
  2101. DBG(__func__)
  2102. if (!options || !*options)
  2103. return 0;
  2104. while ((this_opt = strsep(&options, ",")) != NULL) {
  2105. if (!*this_opt) continue;
  2106. dprintk("matroxfb_setup: option %s\n", this_opt);
  2107. if (!strncmp(this_opt, "dev:", 4))
  2108. dev = simple_strtoul(this_opt+4, NULL, 0);
  2109. else if (!strncmp(this_opt, "depth:", 6)) {
  2110. switch (simple_strtoul(this_opt+6, NULL, 0)) {
  2111. case 0: depth = RSText; break;
  2112. case 4: depth = RS4bpp; break;
  2113. case 8: depth = RS8bpp; break;
  2114. case 15:depth = RS15bpp; break;
  2115. case 16:depth = RS16bpp; break;
  2116. case 24:depth = RS24bpp; break;
  2117. case 32:depth = RS32bpp; break;
  2118. default:
  2119. printk(KERN_ERR "matroxfb: unsupported color depth\n");
  2120. }
  2121. } else if (!strncmp(this_opt, "xres:", 5))
  2122. xres = simple_strtoul(this_opt+5, NULL, 0);
  2123. else if (!strncmp(this_opt, "yres:", 5))
  2124. yres = simple_strtoul(this_opt+5, NULL, 0);
  2125. else if (!strncmp(this_opt, "vslen:", 6))
  2126. vslen = simple_strtoul(this_opt+6, NULL, 0);
  2127. else if (!strncmp(this_opt, "hslen:", 6))
  2128. hslen = simple_strtoul(this_opt+6, NULL, 0);
  2129. else if (!strncmp(this_opt, "left:", 5))
  2130. left = simple_strtoul(this_opt+5, NULL, 0);
  2131. else if (!strncmp(this_opt, "right:", 6))
  2132. right = simple_strtoul(this_opt+6, NULL, 0);
  2133. else if (!strncmp(this_opt, "upper:", 6))
  2134. upper = simple_strtoul(this_opt+6, NULL, 0);
  2135. else if (!strncmp(this_opt, "lower:", 6))
  2136. lower = simple_strtoul(this_opt+6, NULL, 0);
  2137. else if (!strncmp(this_opt, "pixclock:", 9))
  2138. pixclock = simple_strtoul(this_opt+9, NULL, 0);
  2139. else if (!strncmp(this_opt, "sync:", 5))
  2140. sync = simple_strtoul(this_opt+5, NULL, 0);
  2141. else if (!strncmp(this_opt, "vesa:", 5))
  2142. vesa = simple_strtoul(this_opt+5, NULL, 0);
  2143. else if (!strncmp(this_opt, "maxclk:", 7))
  2144. maxclk = simple_strtoul(this_opt+7, NULL, 0);
  2145. else if (!strncmp(this_opt, "fh:", 3))
  2146. fh = simple_strtoul(this_opt+3, NULL, 0);
  2147. else if (!strncmp(this_opt, "fv:", 3))
  2148. fv = simple_strtoul(this_opt+3, NULL, 0);
  2149. else if (!strncmp(this_opt, "mem:", 4))
  2150. mem = simple_strtoul(this_opt+4, NULL, 0);
  2151. else if (!strncmp(this_opt, "mode:", 5))
  2152. strlcpy(videomode, this_opt+5, sizeof(videomode));
  2153. else if (!strncmp(this_opt, "outputs:", 8))
  2154. strlcpy(outputs, this_opt+8, sizeof(outputs));
  2155. else if (!strncmp(this_opt, "dfp:", 4)) {
  2156. dfp_type = simple_strtoul(this_opt+4, NULL, 0);
  2157. dfp = 1;
  2158. }
  2159. #ifdef CONFIG_PPC_PMAC
  2160. else if (!strncmp(this_opt, "vmode:", 6)) {
  2161. unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
  2162. if (vmode > 0 && vmode <= VMODE_MAX)
  2163. default_vmode = vmode;
  2164. } else if (!strncmp(this_opt, "cmode:", 6)) {
  2165. unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
  2166. switch (cmode) {
  2167. case 0:
  2168. case 8:
  2169. default_cmode = CMODE_8;
  2170. break;
  2171. case 15:
  2172. case 16:
  2173. default_cmode = CMODE_16;
  2174. break;
  2175. case 24:
  2176. case 32:
  2177. default_cmode = CMODE_32;
  2178. break;
  2179. }
  2180. }
  2181. #endif
  2182. else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
  2183. disabled = 1;
  2184. else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
  2185. disabled = 0;
  2186. else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
  2187. sgram = 1;
  2188. else if (!strcmp(this_opt, "sdram"))
  2189. sgram = 0;
  2190. else if (!strncmp(this_opt, "memtype:", 8))
  2191. memtype = simple_strtoul(this_opt+8, NULL, 0);
  2192. else {
  2193. int value = 1;
  2194. if (!strncmp(this_opt, "no", 2)) {
  2195. value = 0;
  2196. this_opt += 2;
  2197. }
  2198. if (! strcmp(this_opt, "inverse"))
  2199. inverse = value;
  2200. else if (!strcmp(this_opt, "accel"))
  2201. noaccel = !value;
  2202. else if (!strcmp(this_opt, "pan"))
  2203. nopan = !value;
  2204. else if (!strcmp(this_opt, "pciretry"))
  2205. no_pci_retry = !value;
  2206. else if (!strcmp(this_opt, "vga"))
  2207. novga = !value;
  2208. else if (!strcmp(this_opt, "bios"))
  2209. nobios = !value;
  2210. else if (!strcmp(this_opt, "init"))
  2211. noinit = !value;
  2212. #ifdef CONFIG_MTRR
  2213. else if (!strcmp(this_opt, "mtrr"))
  2214. mtrr = value;
  2215. #endif
  2216. else if (!strcmp(this_opt, "inv24"))
  2217. inv24 = value;
  2218. else if (!strcmp(this_opt, "cross4MB"))
  2219. cross4MB = value;
  2220. else if (!strcmp(this_opt, "grayscale"))
  2221. grayscale = value;
  2222. else if (!strcmp(this_opt, "dfp"))
  2223. dfp = value;
  2224. else {
  2225. strlcpy(videomode, this_opt, sizeof(videomode));
  2226. }
  2227. }
  2228. }
  2229. return 0;
  2230. }
  2231. static int __initdata initialized = 0;
  2232. static int __init matroxfb_init(void)
  2233. {
  2234. char *option = NULL;
  2235. int err = 0;
  2236. DBG(__func__)
  2237. if (fb_get_options("matroxfb", &option))
  2238. return -ENODEV;
  2239. matroxfb_setup(option);
  2240. if (disabled)
  2241. return -ENXIO;
  2242. if (!initialized) {
  2243. initialized = 1;
  2244. err = matrox_init();
  2245. }
  2246. hotplug = 1;
  2247. /* never return failure, user can hotplug matrox later... */
  2248. return err;
  2249. }
  2250. module_init(matroxfb_init);
  2251. #else
  2252. /* *************************** init module code **************************** */
  2253. MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
  2254. MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
  2255. MODULE_LICENSE("GPL");
  2256. module_param(mem, int, 0);
  2257. MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
  2258. module_param(disabled, int, 0);
  2259. MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
  2260. module_param(noaccel, int, 0);
  2261. MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
  2262. module_param(nopan, int, 0);
  2263. MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
  2264. module_param(no_pci_retry, int, 0);
  2265. MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
  2266. module_param(novga, int, 0);
  2267. MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
  2268. module_param(nobios, int, 0);
  2269. MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
  2270. module_param(noinit, int, 0);
  2271. MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
  2272. module_param(memtype, int, 0);
  2273. MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
  2274. #ifdef CONFIG_MTRR
  2275. module_param(mtrr, int, 0);
  2276. MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
  2277. #endif
  2278. module_param(sgram, int, 0);
  2279. MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
  2280. module_param(inv24, int, 0);
  2281. MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
  2282. module_param(inverse, int, 0);
  2283. MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
  2284. #ifdef CONFIG_FB_MATROX_MULTIHEAD
  2285. module_param(dev, int, 0);
  2286. MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
  2287. #else
  2288. module_param(dev, int, 0);
  2289. MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
  2290. #endif
  2291. module_param(vesa, int, 0);
  2292. MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
  2293. module_param(xres, int, 0);
  2294. MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
  2295. module_param(yres, int, 0);
  2296. MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
  2297. module_param(upper, int, 0);
  2298. MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
  2299. module_param(lower, int, 0);
  2300. MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
  2301. module_param(vslen, int, 0);
  2302. MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
  2303. module_param(left, int, 0);
  2304. MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
  2305. module_param(right, int, 0);
  2306. MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
  2307. module_param(hslen, int, 0);
  2308. MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
  2309. module_param(pixclock, int, 0);
  2310. MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
  2311. module_param(sync, int, 0);
  2312. MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
  2313. module_param(depth, int, 0);
  2314. MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
  2315. module_param(maxclk, int, 0);
  2316. MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
  2317. module_param(fh, int, 0);
  2318. MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
  2319. module_param(fv, int, 0);
  2320. MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
  2321. "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
  2322. module_param(grayscale, int, 0);
  2323. MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
  2324. module_param(cross4MB, int, 0);
  2325. MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
  2326. module_param(dfp, int, 0);
  2327. MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
  2328. module_param(dfp_type, int, 0);
  2329. MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
  2330. module_param_string(outputs, outputs, sizeof(outputs), 0);
  2331. MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
  2332. #ifdef CONFIG_PPC_PMAC
  2333. module_param_named(vmode, default_vmode, int, 0);
  2334. MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
  2335. module_param_named(cmode, default_cmode, int, 0);
  2336. MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
  2337. #endif
  2338. int __init init_module(void){
  2339. DBG(__func__)
  2340. if (disabled)
  2341. return -ENXIO;
  2342. if (depth == 0)
  2343. depth = RSText;
  2344. else if (depth == 4)
  2345. depth = RS4bpp;
  2346. else if (depth == 8)
  2347. depth = RS8bpp;
  2348. else if (depth == 15)
  2349. depth = RS15bpp;
  2350. else if (depth == 16)
  2351. depth = RS16bpp;
  2352. else if (depth == 24)
  2353. depth = RS24bpp;
  2354. else if (depth == 32)
  2355. depth = RS32bpp;
  2356. else if (depth != -1) {
  2357. printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
  2358. depth = -1;
  2359. }
  2360. matrox_init();
  2361. /* never return failure; user can hotplug matrox later... */
  2362. return 0;
  2363. }
  2364. #endif /* MODULE */
  2365. module_exit(matrox_done);
  2366. EXPORT_SYMBOL(matroxfb_register_driver);
  2367. EXPORT_SYMBOL(matroxfb_unregister_driver);
  2368. EXPORT_SYMBOL(matroxfb_wait_for_sync);
  2369. EXPORT_SYMBOL(matroxfb_enable_irq);
  2370. /*
  2371. * Overrides for Emacs so that we follow Linus's tabbing style.
  2372. * ---------------------------------------------------------------------------
  2373. * Local variables:
  2374. * c-basic-offset: 8
  2375. * End:
  2376. */