bcma.h 8.4 KB

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  1. #ifndef LINUX_BCMA_H_
  2. #define LINUX_BCMA_H_
  3. #include <linux/pci.h>
  4. #include <linux/mod_devicetable.h>
  5. #include <linux/bcma/bcma_driver_chipcommon.h>
  6. #include <linux/bcma/bcma_driver_pci.h>
  7. #include <linux/bcma/bcma_driver_mips.h>
  8. #include <linux/ssb/ssb.h> /* SPROM sharing */
  9. #include "bcma_regs.h"
  10. struct bcma_device;
  11. struct bcma_bus;
  12. enum bcma_hosttype {
  13. BCMA_HOSTTYPE_PCI,
  14. BCMA_HOSTTYPE_SDIO,
  15. BCMA_HOSTTYPE_SOC,
  16. };
  17. struct bcma_chipinfo {
  18. u16 id;
  19. u8 rev;
  20. u8 pkg;
  21. };
  22. enum bcma_clkmode {
  23. BCMA_CLKMODE_FAST,
  24. BCMA_CLKMODE_DYNAMIC,
  25. };
  26. struct bcma_host_ops {
  27. u8 (*read8)(struct bcma_device *core, u16 offset);
  28. u16 (*read16)(struct bcma_device *core, u16 offset);
  29. u32 (*read32)(struct bcma_device *core, u16 offset);
  30. void (*write8)(struct bcma_device *core, u16 offset, u8 value);
  31. void (*write16)(struct bcma_device *core, u16 offset, u16 value);
  32. void (*write32)(struct bcma_device *core, u16 offset, u32 value);
  33. #ifdef CONFIG_BCMA_BLOCKIO
  34. void (*block_read)(struct bcma_device *core, void *buffer,
  35. size_t count, u16 offset, u8 reg_width);
  36. void (*block_write)(struct bcma_device *core, const void *buffer,
  37. size_t count, u16 offset, u8 reg_width);
  38. #endif
  39. /* Agent ops */
  40. u32 (*aread32)(struct bcma_device *core, u16 offset);
  41. void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
  42. };
  43. /* Core manufacturers */
  44. #define BCMA_MANUF_ARM 0x43B
  45. #define BCMA_MANUF_MIPS 0x4A7
  46. #define BCMA_MANUF_BCM 0x4BF
  47. /* Core class values. */
  48. #define BCMA_CL_SIM 0x0
  49. #define BCMA_CL_EROM 0x1
  50. #define BCMA_CL_CORESIGHT 0x9
  51. #define BCMA_CL_VERIF 0xB
  52. #define BCMA_CL_OPTIMO 0xD
  53. #define BCMA_CL_GEN 0xE
  54. #define BCMA_CL_PRIMECELL 0xF
  55. /* Core-ID values. */
  56. #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
  57. #define BCMA_CORE_INVALID 0x700
  58. #define BCMA_CORE_CHIPCOMMON 0x800
  59. #define BCMA_CORE_ILINE20 0x801
  60. #define BCMA_CORE_SRAM 0x802
  61. #define BCMA_CORE_SDRAM 0x803
  62. #define BCMA_CORE_PCI 0x804
  63. #define BCMA_CORE_MIPS 0x805
  64. #define BCMA_CORE_ETHERNET 0x806
  65. #define BCMA_CORE_V90 0x807
  66. #define BCMA_CORE_USB11_HOSTDEV 0x808
  67. #define BCMA_CORE_ADSL 0x809
  68. #define BCMA_CORE_ILINE100 0x80A
  69. #define BCMA_CORE_IPSEC 0x80B
  70. #define BCMA_CORE_UTOPIA 0x80C
  71. #define BCMA_CORE_PCMCIA 0x80D
  72. #define BCMA_CORE_INTERNAL_MEM 0x80E
  73. #define BCMA_CORE_MEMC_SDRAM 0x80F
  74. #define BCMA_CORE_OFDM 0x810
  75. #define BCMA_CORE_EXTIF 0x811
  76. #define BCMA_CORE_80211 0x812
  77. #define BCMA_CORE_PHY_A 0x813
  78. #define BCMA_CORE_PHY_B 0x814
  79. #define BCMA_CORE_PHY_G 0x815
  80. #define BCMA_CORE_MIPS_3302 0x816
  81. #define BCMA_CORE_USB11_HOST 0x817
  82. #define BCMA_CORE_USB11_DEV 0x818
  83. #define BCMA_CORE_USB20_HOST 0x819
  84. #define BCMA_CORE_USB20_DEV 0x81A
  85. #define BCMA_CORE_SDIO_HOST 0x81B
  86. #define BCMA_CORE_ROBOSWITCH 0x81C
  87. #define BCMA_CORE_PARA_ATA 0x81D
  88. #define BCMA_CORE_SATA_XORDMA 0x81E
  89. #define BCMA_CORE_ETHERNET_GBIT 0x81F
  90. #define BCMA_CORE_PCIE 0x820
  91. #define BCMA_CORE_PHY_N 0x821
  92. #define BCMA_CORE_SRAM_CTL 0x822
  93. #define BCMA_CORE_MINI_MACPHY 0x823
  94. #define BCMA_CORE_ARM_1176 0x824
  95. #define BCMA_CORE_ARM_7TDMI 0x825
  96. #define BCMA_CORE_PHY_LP 0x826
  97. #define BCMA_CORE_PMU 0x827
  98. #define BCMA_CORE_PHY_SSN 0x828
  99. #define BCMA_CORE_SDIO_DEV 0x829
  100. #define BCMA_CORE_ARM_CM3 0x82A
  101. #define BCMA_CORE_PHY_HT 0x82B
  102. #define BCMA_CORE_MIPS_74K 0x82C
  103. #define BCMA_CORE_MAC_GBIT 0x82D
  104. #define BCMA_CORE_DDR12_MEM_CTL 0x82E
  105. #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
  106. #define BCMA_CORE_OCP_OCP_BRIDGE 0x830
  107. #define BCMA_CORE_SHARED_COMMON 0x831
  108. #define BCMA_CORE_OCP_AHB_BRIDGE 0x832
  109. #define BCMA_CORE_SPI_HOST 0x833
  110. #define BCMA_CORE_I2S 0x834
  111. #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
  112. #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
  113. #define BCMA_CORE_DEFAULT 0xFFF
  114. #define BCMA_MAX_NR_CORES 16
  115. struct bcma_device {
  116. struct bcma_bus *bus;
  117. struct bcma_device_id id;
  118. struct device dev;
  119. struct device *dma_dev;
  120. unsigned int irq;
  121. bool dev_registered;
  122. u8 core_index;
  123. u32 addr;
  124. u32 wrap;
  125. void __iomem *io_addr;
  126. void __iomem *io_wrap;
  127. void *drvdata;
  128. struct list_head list;
  129. };
  130. static inline void *bcma_get_drvdata(struct bcma_device *core)
  131. {
  132. return core->drvdata;
  133. }
  134. static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
  135. {
  136. core->drvdata = drvdata;
  137. }
  138. struct bcma_driver {
  139. const char *name;
  140. const struct bcma_device_id *id_table;
  141. int (*probe)(struct bcma_device *dev);
  142. void (*remove)(struct bcma_device *dev);
  143. int (*suspend)(struct bcma_device *dev);
  144. int (*resume)(struct bcma_device *dev);
  145. void (*shutdown)(struct bcma_device *dev);
  146. struct device_driver drv;
  147. };
  148. extern
  149. int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
  150. #define bcma_driver_register(drv) \
  151. __bcma_driver_register(drv, THIS_MODULE)
  152. extern void bcma_driver_unregister(struct bcma_driver *drv);
  153. struct bcma_bus {
  154. /* The MMIO area. */
  155. void __iomem *mmio;
  156. const struct bcma_host_ops *ops;
  157. enum bcma_hosttype hosttype;
  158. union {
  159. /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
  160. struct pci_dev *host_pci;
  161. /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
  162. struct sdio_func *host_sdio;
  163. };
  164. struct bcma_chipinfo chipinfo;
  165. struct bcma_device *mapped_core;
  166. struct list_head cores;
  167. u8 nr_cores;
  168. u8 init_done:1;
  169. struct bcma_drv_cc drv_cc;
  170. struct bcma_drv_pci drv_pci;
  171. struct bcma_drv_mips drv_mips;
  172. /* We decided to share SPROM struct with SSB as long as we do not need
  173. * any hacks for BCMA. This simplifies drivers code. */
  174. struct ssb_sprom sprom;
  175. };
  176. static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
  177. {
  178. return core->bus->ops->read8(core, offset);
  179. }
  180. static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
  181. {
  182. return core->bus->ops->read16(core, offset);
  183. }
  184. static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
  185. {
  186. return core->bus->ops->read32(core, offset);
  187. }
  188. static inline
  189. void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
  190. {
  191. core->bus->ops->write8(core, offset, value);
  192. }
  193. static inline
  194. void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
  195. {
  196. core->bus->ops->write16(core, offset, value);
  197. }
  198. static inline
  199. void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
  200. {
  201. core->bus->ops->write32(core, offset, value);
  202. }
  203. #ifdef CONFIG_BCMA_BLOCKIO
  204. static inline void bcma_block_read(struct bcma_device *core, void *buffer,
  205. size_t count, u16 offset, u8 reg_width)
  206. {
  207. core->bus->ops->block_read(core, buffer, count, offset, reg_width);
  208. }
  209. static inline void bcma_block_write(struct bcma_device *core,
  210. const void *buffer, size_t count,
  211. u16 offset, u8 reg_width)
  212. {
  213. core->bus->ops->block_write(core, buffer, count, offset, reg_width);
  214. }
  215. #endif
  216. static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
  217. {
  218. return core->bus->ops->aread32(core, offset);
  219. }
  220. static inline
  221. void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
  222. {
  223. core->bus->ops->awrite32(core, offset, value);
  224. }
  225. static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
  226. {
  227. bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
  228. }
  229. static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
  230. {
  231. bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
  232. }
  233. static inline void bcma_maskset32(struct bcma_device *cc,
  234. u16 offset, u32 mask, u32 set)
  235. {
  236. bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
  237. }
  238. static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
  239. {
  240. bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
  241. }
  242. static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
  243. {
  244. bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
  245. }
  246. static inline void bcma_maskset16(struct bcma_device *cc,
  247. u16 offset, u16 mask, u16 set)
  248. {
  249. bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
  250. }
  251. extern bool bcma_core_is_enabled(struct bcma_device *core);
  252. extern void bcma_core_disable(struct bcma_device *core, u32 flags);
  253. extern int bcma_core_enable(struct bcma_device *core, u32 flags);
  254. extern void bcma_core_set_clockmode(struct bcma_device *core,
  255. enum bcma_clkmode clkmode);
  256. extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
  257. bool on);
  258. #define BCMA_DMA_TRANSLATION_MASK 0xC0000000
  259. #define BCMA_DMA_TRANSLATION_NONE 0x00000000
  260. #define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
  261. #define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
  262. extern u32 bcma_core_dma_translation(struct bcma_device *core);
  263. #endif /* LINUX_BCMA_H_ */