lpfc_sli.c 79 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_ADAPTER_MSG:
  108. case CMD_ADAPTER_DUMP:
  109. case CMD_XMIT_SEQUENCE64_CR:
  110. case CMD_XMIT_SEQUENCE64_CX:
  111. case CMD_XMIT_BCAST64_CN:
  112. case CMD_XMIT_BCAST64_CX:
  113. case CMD_ELS_REQUEST64_CR:
  114. case CMD_ELS_REQUEST64_CX:
  115. case CMD_FCP_IWRITE64_CR:
  116. case CMD_FCP_IWRITE64_CX:
  117. case CMD_FCP_IREAD64_CR:
  118. case CMD_FCP_IREAD64_CX:
  119. case CMD_FCP_ICMND64_CR:
  120. case CMD_FCP_ICMND64_CX:
  121. case CMD_GEN_REQUEST64_CR:
  122. case CMD_GEN_REQUEST64_CX:
  123. case CMD_XMIT_ELS_RSP64_CX:
  124. type = LPFC_SOL_IOCB;
  125. break;
  126. case CMD_ABORT_XRI_CN:
  127. case CMD_ABORT_XRI_CX:
  128. case CMD_CLOSE_XRI_CN:
  129. case CMD_CLOSE_XRI_CX:
  130. case CMD_XRI_ABORTED_CX:
  131. case CMD_ABORT_MXRI64_CN:
  132. type = LPFC_ABORT_IOCB;
  133. break;
  134. case CMD_RCV_SEQUENCE_CX:
  135. case CMD_RCV_ELS_REQ_CX:
  136. case CMD_RCV_SEQUENCE64_CX:
  137. case CMD_RCV_ELS_REQ64_CX:
  138. type = LPFC_UNSOL_IOCB;
  139. break;
  140. default:
  141. type = LPFC_UNKNOWN_IOCB;
  142. break;
  143. }
  144. return type;
  145. }
  146. static int
  147. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  148. {
  149. struct lpfc_sli *psli = &phba->sli;
  150. MAILBOX_t *pmbox = &pmb->mb;
  151. int i, rc;
  152. for (i = 0; i < psli->num_rings; i++) {
  153. phba->hba_state = LPFC_INIT_MBX_CMDS;
  154. lpfc_config_ring(phba, i, pmb);
  155. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  156. if (rc != MBX_SUCCESS) {
  157. lpfc_printf_log(phba,
  158. KERN_ERR,
  159. LOG_INIT,
  160. "%d:0446 Adapter failed to init, "
  161. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  162. "ring %d\n",
  163. phba->brd_no,
  164. pmbox->mbxCommand,
  165. pmbox->mbxStatus,
  166. i);
  167. phba->hba_state = LPFC_HBA_ERROR;
  168. return -ENXIO;
  169. }
  170. }
  171. return 0;
  172. }
  173. static int
  174. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  175. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  176. {
  177. uint16_t iotag;
  178. list_add_tail(&piocb->list, &pring->txcmplq);
  179. pring->txcmplq_cnt++;
  180. if (unlikely(pring->ringno == LPFC_ELS_RING))
  181. mod_timer(&phba->els_tmofunc,
  182. jiffies + HZ * (phba->fc_ratov << 1));
  183. if (pring->fast_lookup) {
  184. /* Setup fast lookup based on iotag for completion */
  185. iotag = piocb->iocb.ulpIoTag;
  186. if (iotag && (iotag < pring->fast_iotag))
  187. *(pring->fast_lookup + iotag) = piocb;
  188. else {
  189. /* Cmd ring <ringno> put: iotag <iotag> greater then
  190. configured max <fast_iotag> wd0 <icmd> */
  191. lpfc_printf_log(phba,
  192. KERN_ERR,
  193. LOG_SLI,
  194. "%d:0316 Cmd ring %d put: iotag x%x "
  195. "greater then configured max x%x "
  196. "wd0 x%x\n",
  197. phba->brd_no,
  198. pring->ringno, iotag,
  199. pring->fast_iotag,
  200. *(((uint32_t *)(&piocb->iocb)) + 7));
  201. }
  202. }
  203. return (0);
  204. }
  205. static struct lpfc_iocbq *
  206. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  207. {
  208. struct list_head *dlp;
  209. struct lpfc_iocbq *cmd_iocb;
  210. dlp = &pring->txq;
  211. cmd_iocb = NULL;
  212. list_remove_head((&pring->txq), cmd_iocb,
  213. struct lpfc_iocbq,
  214. list);
  215. if (cmd_iocb) {
  216. /* If the first ptr is not equal to the list header,
  217. * deque the IOCBQ_t and return it.
  218. */
  219. pring->txq_cnt--;
  220. }
  221. return (cmd_iocb);
  222. }
  223. static IOCB_t *
  224. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  225. {
  226. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  227. uint32_t max_cmd_idx = pring->numCiocb;
  228. IOCB_t *iocb = NULL;
  229. if ((pring->next_cmdidx == pring->cmdidx) &&
  230. (++pring->next_cmdidx >= max_cmd_idx))
  231. pring->next_cmdidx = 0;
  232. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  233. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  234. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  235. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  236. "%d:0315 Ring %d issue: portCmdGet %d "
  237. "is bigger then cmd ring %d\n",
  238. phba->brd_no, pring->ringno,
  239. pring->local_getidx, max_cmd_idx);
  240. phba->hba_state = LPFC_HBA_ERROR;
  241. /*
  242. * All error attention handlers are posted to
  243. * worker thread
  244. */
  245. phba->work_ha |= HA_ERATT;
  246. phba->work_hs = HS_FFER3;
  247. if (phba->work_wait)
  248. wake_up(phba->work_wait);
  249. return NULL;
  250. }
  251. if (pring->local_getidx == pring->next_cmdidx)
  252. return NULL;
  253. }
  254. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  255. return iocb;
  256. }
  257. uint16_t
  258. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  259. {
  260. struct lpfc_iocbq ** new_arr;
  261. struct lpfc_iocbq ** old_arr;
  262. size_t new_len;
  263. struct lpfc_sli *psli = &phba->sli;
  264. uint16_t iotag;
  265. spin_lock_irq(phba->host->host_lock);
  266. iotag = psli->last_iotag;
  267. if(++iotag < psli->iocbq_lookup_len) {
  268. psli->last_iotag = iotag;
  269. psli->iocbq_lookup[iotag] = iocbq;
  270. spin_unlock_irq(phba->host->host_lock);
  271. iocbq->iotag = iotag;
  272. return iotag;
  273. }
  274. else if (psli->iocbq_lookup_len < (0xffff
  275. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  276. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  277. spin_unlock_irq(phba->host->host_lock);
  278. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  279. GFP_KERNEL);
  280. if (new_arr) {
  281. memset((char *)new_arr, 0,
  282. new_len * sizeof (struct lpfc_iocbq *));
  283. spin_lock_irq(phba->host->host_lock);
  284. old_arr = psli->iocbq_lookup;
  285. if (new_len <= psli->iocbq_lookup_len) {
  286. /* highly unprobable case */
  287. kfree(new_arr);
  288. iotag = psli->last_iotag;
  289. if(++iotag < psli->iocbq_lookup_len) {
  290. psli->last_iotag = iotag;
  291. psli->iocbq_lookup[iotag] = iocbq;
  292. spin_unlock_irq(phba->host->host_lock);
  293. iocbq->iotag = iotag;
  294. return iotag;
  295. }
  296. spin_unlock_irq(phba->host->host_lock);
  297. return 0;
  298. }
  299. if (psli->iocbq_lookup)
  300. memcpy(new_arr, old_arr,
  301. ((psli->last_iotag + 1) *
  302. sizeof (struct lpfc_iocbq *)));
  303. psli->iocbq_lookup = new_arr;
  304. psli->iocbq_lookup_len = new_len;
  305. psli->last_iotag = iotag;
  306. psli->iocbq_lookup[iotag] = iocbq;
  307. spin_unlock_irq(phba->host->host_lock);
  308. iocbq->iotag = iotag;
  309. kfree(old_arr);
  310. return iotag;
  311. }
  312. }
  313. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  314. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  315. phba->brd_no, psli->last_iotag);
  316. return 0;
  317. }
  318. static void
  319. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  320. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  321. {
  322. /*
  323. * Set up an iotag
  324. */
  325. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  326. /*
  327. * Issue iocb command to adapter
  328. */
  329. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  330. wmb();
  331. pring->stats.iocb_cmd++;
  332. /*
  333. * If there is no completion routine to call, we can release the
  334. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  335. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  336. */
  337. if (nextiocb->iocb_cmpl)
  338. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  339. else
  340. lpfc_sli_release_iocbq(phba, nextiocb);
  341. /*
  342. * Let the HBA know what IOCB slot will be the next one the
  343. * driver will put a command into.
  344. */
  345. pring->cmdidx = pring->next_cmdidx;
  346. writel(pring->cmdidx, phba->MBslimaddr
  347. + (SLIMOFF + (pring->ringno * 2)) * 4);
  348. }
  349. static void
  350. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  351. struct lpfc_sli_ring *pring)
  352. {
  353. int ringno = pring->ringno;
  354. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  355. wmb();
  356. /*
  357. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  358. * The HBA will tell us when an IOCB entry is available.
  359. */
  360. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  361. readl(phba->CAregaddr); /* flush */
  362. pring->stats.iocb_cmd_full++;
  363. }
  364. static void
  365. lpfc_sli_update_ring(struct lpfc_hba * phba,
  366. struct lpfc_sli_ring *pring)
  367. {
  368. int ringno = pring->ringno;
  369. /*
  370. * Tell the HBA that there is work to do in this ring.
  371. */
  372. wmb();
  373. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  374. readl(phba->CAregaddr); /* flush */
  375. }
  376. static void
  377. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  378. {
  379. IOCB_t *iocb;
  380. struct lpfc_iocbq *nextiocb;
  381. /*
  382. * Check to see if:
  383. * (a) there is anything on the txq to send
  384. * (b) link is up
  385. * (c) link attention events can be processed (fcp ring only)
  386. * (d) IOCB processing is not blocked by the outstanding mbox command.
  387. */
  388. if (pring->txq_cnt &&
  389. (phba->hba_state > LPFC_LINK_DOWN) &&
  390. (pring->ringno != phba->sli.fcp_ring ||
  391. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  392. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  393. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  394. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  395. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  396. if (iocb)
  397. lpfc_sli_update_ring(phba, pring);
  398. else
  399. lpfc_sli_update_full_ring(phba, pring);
  400. }
  401. return;
  402. }
  403. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  404. static void
  405. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  406. {
  407. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  408. /* If the ring is active, flag it */
  409. if (phba->sli.ring[ringno].cmdringaddr) {
  410. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  411. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  412. /*
  413. * Force update of the local copy of cmdGetInx
  414. */
  415. phba->sli.ring[ringno].local_getidx
  416. = le32_to_cpu(pgp->cmdGetInx);
  417. spin_lock_irq(phba->host->host_lock);
  418. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  419. spin_unlock_irq(phba->host->host_lock);
  420. }
  421. }
  422. }
  423. static int
  424. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  425. {
  426. uint8_t ret;
  427. switch (mbxCommand) {
  428. case MBX_LOAD_SM:
  429. case MBX_READ_NV:
  430. case MBX_WRITE_NV:
  431. case MBX_RUN_BIU_DIAG:
  432. case MBX_INIT_LINK:
  433. case MBX_DOWN_LINK:
  434. case MBX_CONFIG_LINK:
  435. case MBX_CONFIG_RING:
  436. case MBX_RESET_RING:
  437. case MBX_READ_CONFIG:
  438. case MBX_READ_RCONFIG:
  439. case MBX_READ_SPARM:
  440. case MBX_READ_STATUS:
  441. case MBX_READ_RPI:
  442. case MBX_READ_XRI:
  443. case MBX_READ_REV:
  444. case MBX_READ_LNK_STAT:
  445. case MBX_REG_LOGIN:
  446. case MBX_UNREG_LOGIN:
  447. case MBX_READ_LA:
  448. case MBX_CLEAR_LA:
  449. case MBX_DUMP_MEMORY:
  450. case MBX_DUMP_CONTEXT:
  451. case MBX_RUN_DIAGS:
  452. case MBX_RESTART:
  453. case MBX_UPDATE_CFG:
  454. case MBX_DOWN_LOAD:
  455. case MBX_DEL_LD_ENTRY:
  456. case MBX_RUN_PROGRAM:
  457. case MBX_SET_MASK:
  458. case MBX_SET_SLIM:
  459. case MBX_UNREG_D_ID:
  460. case MBX_KILL_BOARD:
  461. case MBX_CONFIG_FARP:
  462. case MBX_BEACON:
  463. case MBX_LOAD_AREA:
  464. case MBX_RUN_BIU_DIAG64:
  465. case MBX_CONFIG_PORT:
  466. case MBX_READ_SPARM64:
  467. case MBX_READ_RPI64:
  468. case MBX_REG_LOGIN64:
  469. case MBX_READ_LA64:
  470. case MBX_FLASH_WR_ULA:
  471. case MBX_SET_DEBUG:
  472. case MBX_LOAD_EXP_ROM:
  473. ret = mbxCommand;
  474. break;
  475. default:
  476. ret = MBX_SHUTDOWN;
  477. break;
  478. }
  479. return (ret);
  480. }
  481. static void
  482. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  483. {
  484. wait_queue_head_t *pdone_q;
  485. /*
  486. * If pdone_q is empty, the driver thread gave up waiting and
  487. * continued running.
  488. */
  489. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  490. if (pdone_q)
  491. wake_up_interruptible(pdone_q);
  492. return;
  493. }
  494. void
  495. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  496. {
  497. struct lpfc_dmabuf *mp;
  498. mp = (struct lpfc_dmabuf *) (pmb->context1);
  499. if (mp) {
  500. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  501. kfree(mp);
  502. }
  503. mempool_free( pmb, phba->mbox_mem_pool);
  504. return;
  505. }
  506. int
  507. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  508. {
  509. MAILBOX_t *mbox;
  510. MAILBOX_t *pmbox;
  511. LPFC_MBOXQ_t *pmb;
  512. struct lpfc_sli *psli;
  513. int i, rc;
  514. uint32_t process_next;
  515. psli = &phba->sli;
  516. /* We should only get here if we are in SLI2 mode */
  517. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  518. return (1);
  519. }
  520. phba->sli.slistat.mbox_event++;
  521. /* Get a Mailbox buffer to setup mailbox commands for callback */
  522. if ((pmb = phba->sli.mbox_active)) {
  523. pmbox = &pmb->mb;
  524. mbox = &phba->slim2p->mbx;
  525. /* First check out the status word */
  526. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  527. /* Sanity check to ensure the host owns the mailbox */
  528. if (pmbox->mbxOwner != OWN_HOST) {
  529. /* Lets try for a while */
  530. for (i = 0; i < 10240; i++) {
  531. /* First copy command data */
  532. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  533. sizeof (uint32_t));
  534. if (pmbox->mbxOwner == OWN_HOST)
  535. goto mbout;
  536. }
  537. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  538. <status> */
  539. lpfc_printf_log(phba,
  540. KERN_ERR,
  541. LOG_MBOX | LOG_SLI,
  542. "%d:0304 Stray Mailbox Interrupt "
  543. "mbxCommand x%x mbxStatus x%x\n",
  544. phba->brd_no,
  545. pmbox->mbxCommand,
  546. pmbox->mbxStatus);
  547. spin_lock_irq(phba->host->host_lock);
  548. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  549. spin_unlock_irq(phba->host->host_lock);
  550. return (1);
  551. }
  552. mbout:
  553. del_timer_sync(&phba->sli.mbox_tmo);
  554. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  555. /*
  556. * It is a fatal error if unknown mbox command completion.
  557. */
  558. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  559. MBX_SHUTDOWN) {
  560. /* Unknow mailbox command compl */
  561. lpfc_printf_log(phba,
  562. KERN_ERR,
  563. LOG_MBOX | LOG_SLI,
  564. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  565. phba->brd_no,
  566. pmbox->mbxCommand);
  567. phba->hba_state = LPFC_HBA_ERROR;
  568. phba->work_hs = HS_FFER3;
  569. lpfc_handle_eratt(phba);
  570. return (0);
  571. }
  572. phba->sli.mbox_active = NULL;
  573. if (pmbox->mbxStatus) {
  574. phba->sli.slistat.mbox_stat_err++;
  575. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  576. /* Mbox cmd cmpl error - RETRYing */
  577. lpfc_printf_log(phba,
  578. KERN_INFO,
  579. LOG_MBOX | LOG_SLI,
  580. "%d:0305 Mbox cmd cmpl error - "
  581. "RETRYing Data: x%x x%x x%x x%x\n",
  582. phba->brd_no,
  583. pmbox->mbxCommand,
  584. pmbox->mbxStatus,
  585. pmbox->un.varWords[0],
  586. phba->hba_state);
  587. pmbox->mbxStatus = 0;
  588. pmbox->mbxOwner = OWN_HOST;
  589. spin_lock_irq(phba->host->host_lock);
  590. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  591. spin_unlock_irq(phba->host->host_lock);
  592. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  593. if (rc == MBX_SUCCESS)
  594. return (0);
  595. }
  596. }
  597. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  598. lpfc_printf_log(phba,
  599. KERN_INFO,
  600. LOG_MBOX | LOG_SLI,
  601. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  602. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  603. phba->brd_no,
  604. pmbox->mbxCommand,
  605. pmb->mbox_cmpl,
  606. *((uint32_t *) pmbox),
  607. pmbox->un.varWords[0],
  608. pmbox->un.varWords[1],
  609. pmbox->un.varWords[2],
  610. pmbox->un.varWords[3],
  611. pmbox->un.varWords[4],
  612. pmbox->un.varWords[5],
  613. pmbox->un.varWords[6],
  614. pmbox->un.varWords[7]);
  615. if (pmb->mbox_cmpl) {
  616. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  617. pmb->mbox_cmpl(phba,pmb);
  618. }
  619. }
  620. do {
  621. process_next = 0; /* by default don't loop */
  622. spin_lock_irq(phba->host->host_lock);
  623. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  624. /* Process next mailbox command if there is one */
  625. if ((pmb = lpfc_mbox_get(phba))) {
  626. spin_unlock_irq(phba->host->host_lock);
  627. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  628. if (rc == MBX_NOT_FINISHED) {
  629. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  630. pmb->mbox_cmpl(phba,pmb);
  631. process_next = 1;
  632. continue; /* loop back */
  633. }
  634. } else {
  635. spin_unlock_irq(phba->host->host_lock);
  636. /* Turn on IOCB processing */
  637. for (i = 0; i < phba->sli.num_rings; i++) {
  638. lpfc_sli_turn_on_ring(phba, i);
  639. }
  640. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  641. while (!list_empty(&phba->freebufList)) {
  642. struct lpfc_dmabuf *mp;
  643. mp = NULL;
  644. list_remove_head((&phba->freebufList),
  645. mp,
  646. struct lpfc_dmabuf,
  647. list);
  648. if (mp) {
  649. lpfc_mbuf_free(phba, mp->virt,
  650. mp->phys);
  651. kfree(mp);
  652. }
  653. }
  654. }
  655. } while (process_next);
  656. return (0);
  657. }
  658. static int
  659. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  660. struct lpfc_iocbq *saveq)
  661. {
  662. IOCB_t * irsp;
  663. WORD5 * w5p;
  664. uint32_t Rctl, Type;
  665. uint32_t match, i;
  666. match = 0;
  667. irsp = &(saveq->iocb);
  668. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  669. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  670. Rctl = FC_ELS_REQ;
  671. Type = FC_ELS_DATA;
  672. } else {
  673. w5p =
  674. (WORD5 *) & (saveq->iocb.un.
  675. ulpWord[5]);
  676. Rctl = w5p->hcsw.Rctl;
  677. Type = w5p->hcsw.Type;
  678. /* Firmware Workaround */
  679. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  680. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  681. Rctl = FC_ELS_REQ;
  682. Type = FC_ELS_DATA;
  683. w5p->hcsw.Rctl = Rctl;
  684. w5p->hcsw.Type = Type;
  685. }
  686. }
  687. /* unSolicited Responses */
  688. if (pring->prt[0].profile) {
  689. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
  690. match = 1;
  691. } else {
  692. /* We must search, based on rctl / type
  693. for the right routine */
  694. for (i = 0; i < pring->num_mask;
  695. i++) {
  696. if ((pring->prt[i].rctl ==
  697. Rctl)
  698. && (pring->prt[i].
  699. type == Type)) {
  700. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  701. (phba, pring, saveq);
  702. match = 1;
  703. break;
  704. }
  705. }
  706. }
  707. if (match == 0) {
  708. /* Unexpected Rctl / Type received */
  709. /* Ring <ringno> handler: unexpected
  710. Rctl <Rctl> Type <Type> received */
  711. lpfc_printf_log(phba,
  712. KERN_WARNING,
  713. LOG_SLI,
  714. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  715. "Type x%x received \n",
  716. phba->brd_no,
  717. pring->ringno,
  718. Rctl,
  719. Type);
  720. }
  721. return(1);
  722. }
  723. static struct lpfc_iocbq *
  724. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  725. struct lpfc_sli_ring * pring,
  726. struct lpfc_iocbq * prspiocb)
  727. {
  728. struct lpfc_iocbq *cmd_iocb = NULL;
  729. uint16_t iotag;
  730. iotag = prspiocb->iocb.ulpIoTag;
  731. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  732. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  733. list_del(&cmd_iocb->list);
  734. pring->txcmplq_cnt--;
  735. return cmd_iocb;
  736. }
  737. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  738. "%d:0317 iotag x%x is out off "
  739. "range: max iotag x%x wd0 x%x\n",
  740. phba->brd_no, iotag,
  741. phba->sli.last_iotag,
  742. *(((uint32_t *) &prspiocb->iocb) + 7));
  743. return NULL;
  744. }
  745. static int
  746. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  747. struct lpfc_iocbq *saveq)
  748. {
  749. struct lpfc_iocbq * cmdiocbp;
  750. int rc = 1;
  751. unsigned long iflag;
  752. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  753. spin_lock_irqsave(phba->host->host_lock, iflag);
  754. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  755. if (cmdiocbp) {
  756. if (cmdiocbp->iocb_cmpl) {
  757. /*
  758. * Post all ELS completions to the worker thread.
  759. * All other are passed to the completion callback.
  760. */
  761. if (pring->ringno == LPFC_ELS_RING) {
  762. spin_unlock_irqrestore(phba->host->host_lock,
  763. iflag);
  764. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  765. spin_lock_irqsave(phba->host->host_lock, iflag);
  766. }
  767. else {
  768. spin_unlock_irqrestore(phba->host->host_lock,
  769. iflag);
  770. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  771. spin_lock_irqsave(phba->host->host_lock, iflag);
  772. }
  773. } else
  774. lpfc_sli_release_iocbq(phba, cmdiocbp);
  775. } else {
  776. /*
  777. * Unknown initiating command based on the response iotag.
  778. * This could be the case on the ELS ring because of
  779. * lpfc_els_abort().
  780. */
  781. if (pring->ringno != LPFC_ELS_RING) {
  782. /*
  783. * Ring <ringno> handler: unexpected completion IoTag
  784. * <IoTag>
  785. */
  786. lpfc_printf_log(phba,
  787. KERN_WARNING,
  788. LOG_SLI,
  789. "%d:0322 Ring %d handler: unexpected "
  790. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  791. phba->brd_no,
  792. pring->ringno,
  793. saveq->iocb.ulpIoTag,
  794. saveq->iocb.ulpStatus,
  795. saveq->iocb.un.ulpWord[4],
  796. saveq->iocb.ulpCommand,
  797. saveq->iocb.ulpContext);
  798. }
  799. }
  800. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  801. return rc;
  802. }
  803. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  804. struct lpfc_sli_ring * pring)
  805. {
  806. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  807. /*
  808. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  809. * rsp ring <portRspMax>
  810. */
  811. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  812. "%d:0312 Ring %d handler: portRspPut %d "
  813. "is bigger then rsp ring %d\n",
  814. phba->brd_no, pring->ringno,
  815. le32_to_cpu(pgp->rspPutInx),
  816. pring->numRiocb);
  817. phba->hba_state = LPFC_HBA_ERROR;
  818. /*
  819. * All error attention handlers are posted to
  820. * worker thread
  821. */
  822. phba->work_ha |= HA_ERATT;
  823. phba->work_hs = HS_FFER3;
  824. if (phba->work_wait)
  825. wake_up(phba->work_wait);
  826. return;
  827. }
  828. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  829. {
  830. struct lpfc_sli * psli = &phba->sli;
  831. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  832. IOCB_t *irsp = NULL;
  833. IOCB_t *entry = NULL;
  834. struct lpfc_iocbq *cmdiocbq = NULL;
  835. struct lpfc_iocbq rspiocbq;
  836. struct lpfc_pgp *pgp;
  837. uint32_t status;
  838. uint32_t portRspPut, portRspMax;
  839. int type;
  840. uint32_t rsp_cmpl = 0;
  841. void __iomem *to_slim;
  842. uint32_t ha_copy;
  843. pring->stats.iocb_event++;
  844. /* The driver assumes SLI-2 mode */
  845. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  846. /*
  847. * The next available response entry should never exceed the maximum
  848. * entries. If it does, treat it as an adapter hardware error.
  849. */
  850. portRspMax = pring->numRiocb;
  851. portRspPut = le32_to_cpu(pgp->rspPutInx);
  852. if (unlikely(portRspPut >= portRspMax)) {
  853. lpfc_sli_rsp_pointers_error(phba, pring);
  854. return;
  855. }
  856. rmb();
  857. while (pring->rspidx != portRspPut) {
  858. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  859. if (++pring->rspidx >= portRspMax)
  860. pring->rspidx = 0;
  861. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  862. (uint32_t *) &rspiocbq.iocb,
  863. sizeof (IOCB_t));
  864. irsp = &rspiocbq.iocb;
  865. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  866. pring->stats.iocb_rsp++;
  867. rsp_cmpl++;
  868. if (unlikely(irsp->ulpStatus)) {
  869. /* Rsp ring <ringno> error: IOCB */
  870. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  871. "%d:0326 Rsp Ring %d error: IOCB Data: "
  872. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  873. phba->brd_no, pring->ringno,
  874. irsp->un.ulpWord[0],
  875. irsp->un.ulpWord[1],
  876. irsp->un.ulpWord[2],
  877. irsp->un.ulpWord[3],
  878. irsp->un.ulpWord[4],
  879. irsp->un.ulpWord[5],
  880. *(((uint32_t *) irsp) + 6),
  881. *(((uint32_t *) irsp) + 7));
  882. }
  883. switch (type) {
  884. case LPFC_ABORT_IOCB:
  885. case LPFC_SOL_IOCB:
  886. /*
  887. * Idle exchange closed via ABTS from port. No iocb
  888. * resources need to be recovered.
  889. */
  890. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  891. printk(KERN_INFO "%s: IOCB cmd 0x%x processed."
  892. " Skipping completion\n", __FUNCTION__,
  893. irsp->ulpCommand);
  894. break;
  895. }
  896. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  897. &rspiocbq);
  898. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  899. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  900. &rspiocbq);
  901. }
  902. break;
  903. default:
  904. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  905. char adaptermsg[LPFC_MAX_ADPTMSG];
  906. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  907. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  908. MAX_MSG_DATA);
  909. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  910. phba->brd_no, adaptermsg);
  911. } else {
  912. /* Unknown IOCB command */
  913. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  914. "%d:0321 Unknown IOCB command "
  915. "Data: x%x, x%x x%x x%x x%x\n",
  916. phba->brd_no, type,
  917. irsp->ulpCommand,
  918. irsp->ulpStatus,
  919. irsp->ulpIoTag,
  920. irsp->ulpContext);
  921. }
  922. break;
  923. }
  924. /*
  925. * The response IOCB has been processed. Update the ring
  926. * pointer in SLIM. If the port response put pointer has not
  927. * been updated, sync the pgp->rspPutInx and fetch the new port
  928. * response put pointer.
  929. */
  930. to_slim = phba->MBslimaddr +
  931. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  932. writeb(pring->rspidx, to_slim);
  933. if (pring->rspidx == portRspPut)
  934. portRspPut = le32_to_cpu(pgp->rspPutInx);
  935. }
  936. ha_copy = readl(phba->HAregaddr);
  937. ha_copy >>= (LPFC_FCP_RING * 4);
  938. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  939. pring->stats.iocb_rsp_full++;
  940. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  941. writel(status, phba->CAregaddr);
  942. readl(phba->CAregaddr);
  943. }
  944. if ((ha_copy & HA_R0CE_RSP) &&
  945. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  946. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  947. pring->stats.iocb_cmd_empty++;
  948. /* Force update of the local copy of cmdGetInx */
  949. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  950. lpfc_sli_resume_iocb(phba, pring);
  951. if ((pring->lpfc_sli_cmd_available))
  952. (pring->lpfc_sli_cmd_available) (phba, pring);
  953. }
  954. return;
  955. }
  956. /*
  957. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  958. * to check it explicitly.
  959. */
  960. static int
  961. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  962. struct lpfc_sli_ring * pring, uint32_t mask)
  963. {
  964. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  965. IOCB_t *irsp = NULL;
  966. IOCB_t *entry = NULL;
  967. struct lpfc_iocbq *cmdiocbq = NULL;
  968. struct lpfc_iocbq rspiocbq;
  969. uint32_t status;
  970. uint32_t portRspPut, portRspMax;
  971. int rc = 1;
  972. lpfc_iocb_type type;
  973. unsigned long iflag;
  974. uint32_t rsp_cmpl = 0;
  975. void __iomem *to_slim;
  976. spin_lock_irqsave(phba->host->host_lock, iflag);
  977. pring->stats.iocb_event++;
  978. /*
  979. * The next available response entry should never exceed the maximum
  980. * entries. If it does, treat it as an adapter hardware error.
  981. */
  982. portRspMax = pring->numRiocb;
  983. portRspPut = le32_to_cpu(pgp->rspPutInx);
  984. if (unlikely(portRspPut >= portRspMax)) {
  985. lpfc_sli_rsp_pointers_error(phba, pring);
  986. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  987. return 1;
  988. }
  989. rmb();
  990. while (pring->rspidx != portRspPut) {
  991. /*
  992. * Fetch an entry off the ring and copy it into a local data
  993. * structure. The copy involves a byte-swap since the
  994. * network byte order and pci byte orders are different.
  995. */
  996. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  997. if (++pring->rspidx >= portRspMax)
  998. pring->rspidx = 0;
  999. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1000. (uint32_t *) &rspiocbq.iocb,
  1001. sizeof (IOCB_t));
  1002. irsp = &rspiocbq.iocb;
  1003. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1004. pring->stats.iocb_rsp++;
  1005. rsp_cmpl++;
  1006. if (unlikely(irsp->ulpStatus)) {
  1007. /* Rsp ring <ringno> error: IOCB */
  1008. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1009. "%d:0326 Rsp Ring %d error: IOCB Data: "
  1010. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1011. phba->brd_no, pring->ringno,
  1012. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  1013. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  1014. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  1015. *(((uint32_t *) irsp) + 6),
  1016. *(((uint32_t *) irsp) + 7));
  1017. }
  1018. switch (type) {
  1019. case LPFC_ABORT_IOCB:
  1020. case LPFC_SOL_IOCB:
  1021. /*
  1022. * Idle exchange closed via ABTS from port. No iocb
  1023. * resources need to be recovered.
  1024. */
  1025. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1026. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  1027. "Skipping completion\n", __FUNCTION__,
  1028. irsp->ulpCommand);
  1029. break;
  1030. }
  1031. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1032. &rspiocbq);
  1033. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1034. spin_unlock_irqrestore(
  1035. phba->host->host_lock, iflag);
  1036. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1037. &rspiocbq);
  1038. spin_lock_irqsave(phba->host->host_lock,
  1039. iflag);
  1040. }
  1041. break;
  1042. default:
  1043. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1044. char adaptermsg[LPFC_MAX_ADPTMSG];
  1045. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1046. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1047. MAX_MSG_DATA);
  1048. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1049. phba->brd_no, adaptermsg);
  1050. } else {
  1051. /* Unknown IOCB command */
  1052. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1053. "%d:0321 Unknown IOCB command "
  1054. "Data: x%x, x%x x%x x%x x%x\n",
  1055. phba->brd_no, type, irsp->ulpCommand,
  1056. irsp->ulpStatus, irsp->ulpIoTag,
  1057. irsp->ulpContext);
  1058. }
  1059. break;
  1060. }
  1061. /*
  1062. * The response IOCB has been processed. Update the ring
  1063. * pointer in SLIM. If the port response put pointer has not
  1064. * been updated, sync the pgp->rspPutInx and fetch the new port
  1065. * response put pointer.
  1066. */
  1067. to_slim = phba->MBslimaddr +
  1068. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1069. writel(pring->rspidx, to_slim);
  1070. if (pring->rspidx == portRspPut)
  1071. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1072. }
  1073. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1074. pring->stats.iocb_rsp_full++;
  1075. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1076. writel(status, phba->CAregaddr);
  1077. readl(phba->CAregaddr);
  1078. }
  1079. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1080. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1081. pring->stats.iocb_cmd_empty++;
  1082. /* Force update of the local copy of cmdGetInx */
  1083. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1084. lpfc_sli_resume_iocb(phba, pring);
  1085. if ((pring->lpfc_sli_cmd_available))
  1086. (pring->lpfc_sli_cmd_available) (phba, pring);
  1087. }
  1088. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1089. return rc;
  1090. }
  1091. int
  1092. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1093. struct lpfc_sli_ring * pring, uint32_t mask)
  1094. {
  1095. IOCB_t *entry;
  1096. IOCB_t *irsp = NULL;
  1097. struct lpfc_iocbq *rspiocbp = NULL;
  1098. struct lpfc_iocbq *next_iocb;
  1099. struct lpfc_iocbq *cmdiocbp;
  1100. struct lpfc_iocbq *saveq;
  1101. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1102. uint8_t iocb_cmd_type;
  1103. lpfc_iocb_type type;
  1104. uint32_t status, free_saveq;
  1105. uint32_t portRspPut, portRspMax;
  1106. int rc = 1;
  1107. unsigned long iflag;
  1108. void __iomem *to_slim;
  1109. spin_lock_irqsave(phba->host->host_lock, iflag);
  1110. pring->stats.iocb_event++;
  1111. /*
  1112. * The next available response entry should never exceed the maximum
  1113. * entries. If it does, treat it as an adapter hardware error.
  1114. */
  1115. portRspMax = pring->numRiocb;
  1116. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1117. if (portRspPut >= portRspMax) {
  1118. /*
  1119. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1120. * rsp ring <portRspMax>
  1121. */
  1122. lpfc_printf_log(phba,
  1123. KERN_ERR,
  1124. LOG_SLI,
  1125. "%d:0312 Ring %d handler: portRspPut %d "
  1126. "is bigger then rsp ring %d\n",
  1127. phba->brd_no,
  1128. pring->ringno, portRspPut, portRspMax);
  1129. phba->hba_state = LPFC_HBA_ERROR;
  1130. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1131. phba->work_hs = HS_FFER3;
  1132. lpfc_handle_eratt(phba);
  1133. return 1;
  1134. }
  1135. rmb();
  1136. while (pring->rspidx != portRspPut) {
  1137. /*
  1138. * Build a completion list and call the appropriate handler.
  1139. * The process is to get the next available response iocb, get
  1140. * a free iocb from the list, copy the response data into the
  1141. * free iocb, insert to the continuation list, and update the
  1142. * next response index to slim. This process makes response
  1143. * iocb's in the ring available to DMA as fast as possible but
  1144. * pays a penalty for a copy operation. Since the iocb is
  1145. * only 32 bytes, this penalty is considered small relative to
  1146. * the PCI reads for register values and a slim write. When
  1147. * the ulpLe field is set, the entire Command has been
  1148. * received.
  1149. */
  1150. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1151. rspiocbp = lpfc_sli_get_iocbq(phba);
  1152. if (rspiocbp == NULL) {
  1153. printk(KERN_ERR "%s: out of buffers! Failing "
  1154. "completion.\n", __FUNCTION__);
  1155. break;
  1156. }
  1157. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1158. irsp = &rspiocbp->iocb;
  1159. if (++pring->rspidx >= portRspMax)
  1160. pring->rspidx = 0;
  1161. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1162. + 1) * 4;
  1163. writel(pring->rspidx, to_slim);
  1164. if (list_empty(&(pring->iocb_continueq))) {
  1165. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1166. } else {
  1167. list_add_tail(&rspiocbp->list,
  1168. &(pring->iocb_continueq));
  1169. }
  1170. pring->iocb_continueq_cnt++;
  1171. if (irsp->ulpLe) {
  1172. /*
  1173. * By default, the driver expects to free all resources
  1174. * associated with this iocb completion.
  1175. */
  1176. free_saveq = 1;
  1177. saveq = list_get_first(&pring->iocb_continueq,
  1178. struct lpfc_iocbq, list);
  1179. irsp = &(saveq->iocb);
  1180. list_del_init(&pring->iocb_continueq);
  1181. pring->iocb_continueq_cnt = 0;
  1182. pring->stats.iocb_rsp++;
  1183. if (irsp->ulpStatus) {
  1184. /* Rsp ring <ringno> error: IOCB */
  1185. lpfc_printf_log(phba,
  1186. KERN_WARNING,
  1187. LOG_SLI,
  1188. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1189. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1190. phba->brd_no,
  1191. pring->ringno,
  1192. irsp->un.ulpWord[0],
  1193. irsp->un.ulpWord[1],
  1194. irsp->un.ulpWord[2],
  1195. irsp->un.ulpWord[3],
  1196. irsp->un.ulpWord[4],
  1197. irsp->un.ulpWord[5],
  1198. *(((uint32_t *) irsp) + 6),
  1199. *(((uint32_t *) irsp) + 7));
  1200. }
  1201. /*
  1202. * Fetch the IOCB command type and call the correct
  1203. * completion routine. Solicited and Unsolicited
  1204. * IOCBs on the ELS ring get freed back to the
  1205. * lpfc_iocb_list by the discovery kernel thread.
  1206. */
  1207. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1208. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1209. if (type == LPFC_SOL_IOCB) {
  1210. spin_unlock_irqrestore(phba->host->host_lock,
  1211. iflag);
  1212. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1213. saveq);
  1214. spin_lock_irqsave(phba->host->host_lock, iflag);
  1215. } else if (type == LPFC_UNSOL_IOCB) {
  1216. spin_unlock_irqrestore(phba->host->host_lock,
  1217. iflag);
  1218. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1219. saveq);
  1220. spin_lock_irqsave(phba->host->host_lock, iflag);
  1221. } else if (type == LPFC_ABORT_IOCB) {
  1222. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1223. ((cmdiocbp =
  1224. lpfc_sli_iocbq_lookup(phba, pring,
  1225. saveq)))) {
  1226. /* Call the specified completion
  1227. routine */
  1228. if (cmdiocbp->iocb_cmpl) {
  1229. spin_unlock_irqrestore(
  1230. phba->host->host_lock,
  1231. iflag);
  1232. (cmdiocbp->iocb_cmpl) (phba,
  1233. cmdiocbp, saveq);
  1234. spin_lock_irqsave(
  1235. phba->host->host_lock,
  1236. iflag);
  1237. } else
  1238. lpfc_sli_release_iocbq(phba,
  1239. cmdiocbp);
  1240. }
  1241. } else if (type == LPFC_UNKNOWN_IOCB) {
  1242. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1243. char adaptermsg[LPFC_MAX_ADPTMSG];
  1244. memset(adaptermsg, 0,
  1245. LPFC_MAX_ADPTMSG);
  1246. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1247. MAX_MSG_DATA);
  1248. dev_warn(&((phba->pcidev)->dev),
  1249. "lpfc%d: %s",
  1250. phba->brd_no, adaptermsg);
  1251. } else {
  1252. /* Unknown IOCB command */
  1253. lpfc_printf_log(phba,
  1254. KERN_ERR,
  1255. LOG_SLI,
  1256. "%d:0321 Unknown IOCB command "
  1257. "Data: x%x x%x x%x x%x\n",
  1258. phba->brd_no,
  1259. irsp->ulpCommand,
  1260. irsp->ulpStatus,
  1261. irsp->ulpIoTag,
  1262. irsp->ulpContext);
  1263. }
  1264. }
  1265. if (free_saveq) {
  1266. if (!list_empty(&saveq->list)) {
  1267. list_for_each_entry_safe(rspiocbp,
  1268. next_iocb,
  1269. &saveq->list,
  1270. list) {
  1271. lpfc_sli_release_iocbq(phba,
  1272. rspiocbp);
  1273. }
  1274. }
  1275. lpfc_sli_release_iocbq(phba, saveq);
  1276. }
  1277. }
  1278. /*
  1279. * If the port response put pointer has not been updated, sync
  1280. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1281. * response put pointer.
  1282. */
  1283. if (pring->rspidx == portRspPut) {
  1284. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1285. }
  1286. } /* while (pring->rspidx != portRspPut) */
  1287. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1288. /* At least one response entry has been freed */
  1289. pring->stats.iocb_rsp_full++;
  1290. /* SET RxRE_RSP in Chip Att register */
  1291. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1292. writel(status, phba->CAregaddr);
  1293. readl(phba->CAregaddr); /* flush */
  1294. }
  1295. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1296. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1297. pring->stats.iocb_cmd_empty++;
  1298. /* Force update of the local copy of cmdGetInx */
  1299. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1300. lpfc_sli_resume_iocb(phba, pring);
  1301. if ((pring->lpfc_sli_cmd_available))
  1302. (pring->lpfc_sli_cmd_available) (phba, pring);
  1303. }
  1304. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1305. return rc;
  1306. }
  1307. int
  1308. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1309. {
  1310. struct lpfc_iocbq *iocb, *next_iocb;
  1311. IOCB_t *icmd = NULL, *cmd = NULL;
  1312. int errcnt;
  1313. errcnt = 0;
  1314. /* Error everything on txq and txcmplq
  1315. * First do the txq.
  1316. */
  1317. spin_lock_irq(phba->host->host_lock);
  1318. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1319. list_del_init(&iocb->list);
  1320. if (iocb->iocb_cmpl) {
  1321. icmd = &iocb->iocb;
  1322. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1323. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1324. spin_unlock_irq(phba->host->host_lock);
  1325. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1326. spin_lock_irq(phba->host->host_lock);
  1327. } else
  1328. lpfc_sli_release_iocbq(phba, iocb);
  1329. }
  1330. pring->txq_cnt = 0;
  1331. INIT_LIST_HEAD(&(pring->txq));
  1332. /* Next issue ABTS for everything on the txcmplq */
  1333. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1334. cmd = &iocb->iocb;
  1335. /*
  1336. * Imediate abort of IOCB, deque and call compl
  1337. */
  1338. list_del_init(&iocb->list);
  1339. pring->txcmplq_cnt--;
  1340. if (iocb->iocb_cmpl) {
  1341. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1342. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1343. spin_unlock_irq(phba->host->host_lock);
  1344. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1345. spin_lock_irq(phba->host->host_lock);
  1346. } else
  1347. lpfc_sli_release_iocbq(phba, iocb);
  1348. }
  1349. INIT_LIST_HEAD(&pring->txcmplq);
  1350. pring->txcmplq_cnt = 0;
  1351. spin_unlock_irq(phba->host->host_lock);
  1352. return errcnt;
  1353. }
  1354. int
  1355. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1356. {
  1357. uint32_t status;
  1358. int i = 0;
  1359. int retval = 0;
  1360. /* Read the HBA Host Status Register */
  1361. status = readl(phba->HSregaddr);
  1362. /*
  1363. * Check status register every 100ms for 5 retries, then every
  1364. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1365. * every 2.5 sec for 4.
  1366. * Break our of the loop if errors occurred during init.
  1367. */
  1368. while (((status & mask) != mask) &&
  1369. !(status & HS_FFERM) &&
  1370. i++ < 20) {
  1371. if (i <= 5)
  1372. msleep(10);
  1373. else if (i <= 10)
  1374. msleep(500);
  1375. else
  1376. msleep(2500);
  1377. if (i == 15) {
  1378. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1379. lpfc_sli_brdrestart(phba);
  1380. }
  1381. /* Read the HBA Host Status Register */
  1382. status = readl(phba->HSregaddr);
  1383. }
  1384. /* Check to see if any errors occurred during init */
  1385. if ((status & HS_FFERM) || (i >= 20)) {
  1386. phba->hba_state = LPFC_HBA_ERROR;
  1387. retval = 1;
  1388. }
  1389. return retval;
  1390. }
  1391. int
  1392. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1393. {
  1394. struct lpfc_sli *psli;
  1395. LPFC_MBOXQ_t *pmb;
  1396. uint32_t status;
  1397. uint32_t ha_copy;
  1398. int retval;
  1399. int i = 0;
  1400. psli = &phba->sli;
  1401. /* Kill HBA */
  1402. lpfc_printf_log(phba,
  1403. KERN_INFO,
  1404. LOG_SLI,
  1405. "%d:0329 Kill HBA Data: x%x x%x\n",
  1406. phba->brd_no,
  1407. phba->hba_state,
  1408. psli->sli_flag);
  1409. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1410. GFP_ATOMIC)) == 0) {
  1411. return 1;
  1412. }
  1413. /* Disable the error attention */
  1414. spin_lock_irq(phba->host->host_lock);
  1415. status = readl(phba->HCregaddr);
  1416. status &= ~HC_ERINT_ENA;
  1417. writel(status, phba->HCregaddr);
  1418. readl(phba->HCregaddr); /* flush */
  1419. spin_unlock_irq(phba->host->host_lock);
  1420. lpfc_kill_board(phba, pmb);
  1421. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1422. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1423. if (retval != MBX_SUCCESS) {
  1424. if (retval != MBX_BUSY)
  1425. mempool_free(pmb, phba->mbox_mem_pool);
  1426. return 1;
  1427. }
  1428. mempool_free(pmb, phba->mbox_mem_pool);
  1429. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1430. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1431. * 3 seconds we still set HBA_ERROR state because the status of the
  1432. * board is now undefined.
  1433. */
  1434. ha_copy = readl(phba->HAregaddr);
  1435. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1436. mdelay(100);
  1437. ha_copy = readl(phba->HAregaddr);
  1438. }
  1439. del_timer_sync(&psli->mbox_tmo);
  1440. spin_lock_irq(phba->host->host_lock);
  1441. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1442. spin_unlock_irq(phba->host->host_lock);
  1443. psli->mbox_active = NULL;
  1444. lpfc_hba_down_post(phba);
  1445. phba->hba_state = LPFC_HBA_ERROR;
  1446. return (ha_copy & HA_ERATT ? 0 : 1);
  1447. }
  1448. int
  1449. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1450. {
  1451. struct lpfc_sli *psli;
  1452. struct lpfc_sli_ring *pring;
  1453. uint16_t cfg_value;
  1454. int i;
  1455. psli = &phba->sli;
  1456. /* Reset HBA */
  1457. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1458. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1459. phba->hba_state, psli->sli_flag);
  1460. /* perform board reset */
  1461. phba->fc_eventTag = 0;
  1462. phba->fc_myDID = 0;
  1463. phba->fc_prevDID = 0;
  1464. psli->sli_flag = 0;
  1465. /* Turn off parity checking and serr during the physical reset */
  1466. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1467. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1468. (cfg_value &
  1469. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1470. /* Now toggle INITFF bit in the Host Control Register */
  1471. writel(HC_INITFF, phba->HCregaddr);
  1472. mdelay(1);
  1473. readl(phba->HCregaddr); /* flush */
  1474. writel(0, phba->HCregaddr);
  1475. readl(phba->HCregaddr); /* flush */
  1476. /* Restore PCI cmd register */
  1477. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1478. /* Initialize relevant SLI info */
  1479. for (i = 0; i < psli->num_rings; i++) {
  1480. pring = &psli->ring[i];
  1481. pring->flag = 0;
  1482. pring->rspidx = 0;
  1483. pring->next_cmdidx = 0;
  1484. pring->local_getidx = 0;
  1485. pring->cmdidx = 0;
  1486. pring->missbufcnt = 0;
  1487. }
  1488. phba->hba_state = LPFC_WARM_START;
  1489. return 0;
  1490. }
  1491. int
  1492. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1493. {
  1494. MAILBOX_t *mb;
  1495. struct lpfc_sli *psli;
  1496. uint16_t skip_post;
  1497. volatile uint32_t word0;
  1498. void __iomem *to_slim;
  1499. spin_lock_irq(phba->host->host_lock);
  1500. psli = &phba->sli;
  1501. /* Restart HBA */
  1502. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1503. "%d:0328 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1504. phba->hba_state, psli->sli_flag);
  1505. word0 = 0;
  1506. mb = (MAILBOX_t *) &word0;
  1507. mb->mbxCommand = MBX_RESTART;
  1508. mb->mbxHc = 1;
  1509. to_slim = phba->MBslimaddr;
  1510. writel(*(uint32_t *) mb, to_slim);
  1511. readl(to_slim); /* flush */
  1512. /* Only skip post after fc_ffinit is completed */
  1513. if (phba->hba_state) {
  1514. skip_post = 1;
  1515. word0 = 1; /* This is really setting up word1 */
  1516. } else {
  1517. skip_post = 0;
  1518. word0 = 0; /* This is really setting up word1 */
  1519. }
  1520. to_slim = (uint8_t *) phba->MBslimaddr + sizeof (uint32_t);
  1521. writel(*(uint32_t *) mb, to_slim);
  1522. readl(to_slim); /* flush */
  1523. lpfc_sli_brdreset(phba);
  1524. phba->hba_state = LPFC_INIT_START;
  1525. spin_unlock_irq(phba->host->host_lock);
  1526. if (skip_post)
  1527. mdelay(100);
  1528. else
  1529. mdelay(2000);
  1530. lpfc_hba_down_post(phba);
  1531. return 0;
  1532. }
  1533. static int
  1534. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1535. {
  1536. uint32_t status, i = 0;
  1537. /* Read the HBA Host Status Register */
  1538. status = readl(phba->HSregaddr);
  1539. /* Check status register to see what current state is */
  1540. i = 0;
  1541. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1542. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1543. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1544. * 4.
  1545. */
  1546. if (i++ >= 20) {
  1547. /* Adapter failed to init, timeout, status reg
  1548. <status> */
  1549. lpfc_printf_log(phba,
  1550. KERN_ERR,
  1551. LOG_INIT,
  1552. "%d:0436 Adapter failed to init, "
  1553. "timeout, status reg x%x\n",
  1554. phba->brd_no,
  1555. status);
  1556. phba->hba_state = LPFC_HBA_ERROR;
  1557. return -ETIMEDOUT;
  1558. }
  1559. /* Check to see if any errors occurred during init */
  1560. if (status & HS_FFERM) {
  1561. /* ERROR: During chipset initialization */
  1562. /* Adapter failed to init, chipset, status reg
  1563. <status> */
  1564. lpfc_printf_log(phba,
  1565. KERN_ERR,
  1566. LOG_INIT,
  1567. "%d:0437 Adapter failed to init, "
  1568. "chipset, status reg x%x\n",
  1569. phba->brd_no,
  1570. status);
  1571. phba->hba_state = LPFC_HBA_ERROR;
  1572. return -EIO;
  1573. }
  1574. if (i <= 5) {
  1575. msleep(10);
  1576. } else if (i <= 10) {
  1577. msleep(500);
  1578. } else {
  1579. msleep(2500);
  1580. }
  1581. if (i == 15) {
  1582. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1583. lpfc_sli_brdrestart(phba);
  1584. }
  1585. /* Read the HBA Host Status Register */
  1586. status = readl(phba->HSregaddr);
  1587. }
  1588. /* Check to see if any errors occurred during init */
  1589. if (status & HS_FFERM) {
  1590. /* ERROR: During chipset initialization */
  1591. /* Adapter failed to init, chipset, status reg <status> */
  1592. lpfc_printf_log(phba,
  1593. KERN_ERR,
  1594. LOG_INIT,
  1595. "%d:0438 Adapter failed to init, chipset, "
  1596. "status reg x%x\n",
  1597. phba->brd_no,
  1598. status);
  1599. phba->hba_state = LPFC_HBA_ERROR;
  1600. return -EIO;
  1601. }
  1602. /* Clear all interrupt enable conditions */
  1603. writel(0, phba->HCregaddr);
  1604. readl(phba->HCregaddr); /* flush */
  1605. /* setup host attn register */
  1606. writel(0xffffffff, phba->HAregaddr);
  1607. readl(phba->HAregaddr); /* flush */
  1608. return 0;
  1609. }
  1610. int
  1611. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1612. {
  1613. LPFC_MBOXQ_t *pmb;
  1614. uint32_t resetcount = 0, rc = 0, done = 0;
  1615. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1616. if (!pmb) {
  1617. phba->hba_state = LPFC_HBA_ERROR;
  1618. return -ENOMEM;
  1619. }
  1620. while (resetcount < 2 && !done) {
  1621. phba->hba_state = LPFC_STATE_UNKNOWN;
  1622. lpfc_sli_brdrestart(phba);
  1623. msleep(2500);
  1624. rc = lpfc_sli_chipset_init(phba);
  1625. if (rc)
  1626. break;
  1627. resetcount++;
  1628. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1629. * means the call was successful. Any other nonzero value is a failure,
  1630. * but if ERESTART is returned, the driver may reset the HBA and try
  1631. * again.
  1632. */
  1633. rc = lpfc_config_port_prep(phba);
  1634. if (rc == -ERESTART) {
  1635. phba->hba_state = 0;
  1636. continue;
  1637. } else if (rc) {
  1638. break;
  1639. }
  1640. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1641. lpfc_config_port(phba, pmb);
  1642. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1643. if (rc == MBX_SUCCESS)
  1644. done = 1;
  1645. else {
  1646. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1647. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1648. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1649. phba->brd_no, pmb->mb.mbxCommand,
  1650. pmb->mb.mbxStatus, 0);
  1651. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1652. }
  1653. }
  1654. if (!done)
  1655. goto lpfc_sli_hba_setup_error;
  1656. rc = lpfc_sli_ring_map(phba, pmb);
  1657. if (rc)
  1658. goto lpfc_sli_hba_setup_error;
  1659. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1660. rc = lpfc_config_port_post(phba);
  1661. if (rc)
  1662. goto lpfc_sli_hba_setup_error;
  1663. goto lpfc_sli_hba_setup_exit;
  1664. lpfc_sli_hba_setup_error:
  1665. phba->hba_state = LPFC_HBA_ERROR;
  1666. lpfc_sli_hba_setup_exit:
  1667. mempool_free(pmb, phba->mbox_mem_pool);
  1668. return rc;
  1669. }
  1670. static void
  1671. lpfc_mbox_abort(struct lpfc_hba * phba)
  1672. {
  1673. LPFC_MBOXQ_t *pmbox;
  1674. MAILBOX_t *mb;
  1675. if (phba->sli.mbox_active) {
  1676. del_timer_sync(&phba->sli.mbox_tmo);
  1677. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1678. pmbox = phba->sli.mbox_active;
  1679. mb = &pmbox->mb;
  1680. phba->sli.mbox_active = NULL;
  1681. if (pmbox->mbox_cmpl) {
  1682. mb->mbxStatus = MBX_NOT_FINISHED;
  1683. (pmbox->mbox_cmpl) (phba, pmbox);
  1684. }
  1685. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1686. }
  1687. /* Abort all the non active mailbox commands. */
  1688. spin_lock_irq(phba->host->host_lock);
  1689. pmbox = lpfc_mbox_get(phba);
  1690. while (pmbox) {
  1691. mb = &pmbox->mb;
  1692. if (pmbox->mbox_cmpl) {
  1693. mb->mbxStatus = MBX_NOT_FINISHED;
  1694. spin_unlock_irq(phba->host->host_lock);
  1695. (pmbox->mbox_cmpl) (phba, pmbox);
  1696. spin_lock_irq(phba->host->host_lock);
  1697. }
  1698. pmbox = lpfc_mbox_get(phba);
  1699. }
  1700. spin_unlock_irq(phba->host->host_lock);
  1701. return;
  1702. }
  1703. /*! lpfc_mbox_timeout
  1704. *
  1705. * \pre
  1706. * \post
  1707. * \param hba Pointer to per struct lpfc_hba structure
  1708. * \param l1 Pointer to the driver's mailbox queue.
  1709. * \return
  1710. * void
  1711. *
  1712. * \b Description:
  1713. *
  1714. * This routine handles mailbox timeout events at timer interrupt context.
  1715. */
  1716. void
  1717. lpfc_mbox_timeout(unsigned long ptr)
  1718. {
  1719. struct lpfc_hba *phba;
  1720. unsigned long iflag;
  1721. phba = (struct lpfc_hba *)ptr;
  1722. spin_lock_irqsave(phba->host->host_lock, iflag);
  1723. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1724. phba->work_hba_events |= WORKER_MBOX_TMO;
  1725. if (phba->work_wait)
  1726. wake_up(phba->work_wait);
  1727. }
  1728. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1729. }
  1730. void
  1731. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1732. {
  1733. LPFC_MBOXQ_t *pmbox;
  1734. MAILBOX_t *mb;
  1735. spin_lock_irq(phba->host->host_lock);
  1736. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1737. spin_unlock_irq(phba->host->host_lock);
  1738. return;
  1739. }
  1740. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1741. pmbox = phba->sli.mbox_active;
  1742. mb = &pmbox->mb;
  1743. /* Mbox cmd <mbxCommand> timeout */
  1744. lpfc_printf_log(phba,
  1745. KERN_ERR,
  1746. LOG_MBOX | LOG_SLI,
  1747. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1748. phba->brd_no,
  1749. mb->mbxCommand,
  1750. phba->hba_state,
  1751. phba->sli.sli_flag,
  1752. phba->sli.mbox_active);
  1753. phba->sli.mbox_active = NULL;
  1754. if (pmbox->mbox_cmpl) {
  1755. mb->mbxStatus = MBX_NOT_FINISHED;
  1756. spin_unlock_irq(phba->host->host_lock);
  1757. (pmbox->mbox_cmpl) (phba, pmbox);
  1758. spin_lock_irq(phba->host->host_lock);
  1759. }
  1760. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1761. spin_unlock_irq(phba->host->host_lock);
  1762. lpfc_mbox_abort(phba);
  1763. return;
  1764. }
  1765. int
  1766. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1767. {
  1768. MAILBOX_t *mb;
  1769. struct lpfc_sli *psli;
  1770. uint32_t status, evtctr;
  1771. uint32_t ha_copy;
  1772. int i;
  1773. unsigned long drvr_flag = 0;
  1774. volatile uint32_t word0, ldata;
  1775. void __iomem *to_slim;
  1776. psli = &phba->sli;
  1777. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1778. mb = &pmbox->mb;
  1779. status = MBX_SUCCESS;
  1780. if (phba->hba_state == LPFC_HBA_ERROR) {
  1781. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1782. /* Mbox command <mbxCommand> cannot issue */
  1783. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1784. return (MBX_NOT_FINISHED);
  1785. }
  1786. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1787. /* Polling for a mbox command when another one is already active
  1788. * is not allowed in SLI. Also, the driver must have established
  1789. * SLI2 mode to queue and process multiple mbox commands.
  1790. */
  1791. if (flag & MBX_POLL) {
  1792. spin_unlock_irqrestore(phba->host->host_lock,
  1793. drvr_flag);
  1794. /* Mbox command <mbxCommand> cannot issue */
  1795. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1796. return (MBX_NOT_FINISHED);
  1797. }
  1798. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1799. spin_unlock_irqrestore(phba->host->host_lock,
  1800. drvr_flag);
  1801. /* Mbox command <mbxCommand> cannot issue */
  1802. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1803. return (MBX_NOT_FINISHED);
  1804. }
  1805. /* Handle STOP IOCB processing flag. This is only meaningful
  1806. * if we are not polling for mbox completion.
  1807. */
  1808. if (flag & MBX_STOP_IOCB) {
  1809. flag &= ~MBX_STOP_IOCB;
  1810. /* Now flag each ring */
  1811. for (i = 0; i < psli->num_rings; i++) {
  1812. /* If the ring is active, flag it */
  1813. if (psli->ring[i].cmdringaddr) {
  1814. psli->ring[i].flag |=
  1815. LPFC_STOP_IOCB_MBX;
  1816. }
  1817. }
  1818. }
  1819. /* Another mailbox command is still being processed, queue this
  1820. * command to be processed later.
  1821. */
  1822. lpfc_mbox_put(phba, pmbox);
  1823. /* Mbox cmd issue - BUSY */
  1824. lpfc_printf_log(phba,
  1825. KERN_INFO,
  1826. LOG_MBOX | LOG_SLI,
  1827. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1828. phba->brd_no,
  1829. mb->mbxCommand,
  1830. phba->hba_state,
  1831. psli->sli_flag,
  1832. flag);
  1833. psli->slistat.mbox_busy++;
  1834. spin_unlock_irqrestore(phba->host->host_lock,
  1835. drvr_flag);
  1836. return (MBX_BUSY);
  1837. }
  1838. /* Handle STOP IOCB processing flag. This is only meaningful
  1839. * if we are not polling for mbox completion.
  1840. */
  1841. if (flag & MBX_STOP_IOCB) {
  1842. flag &= ~MBX_STOP_IOCB;
  1843. if (flag == MBX_NOWAIT) {
  1844. /* Now flag each ring */
  1845. for (i = 0; i < psli->num_rings; i++) {
  1846. /* If the ring is active, flag it */
  1847. if (psli->ring[i].cmdringaddr) {
  1848. psli->ring[i].flag |=
  1849. LPFC_STOP_IOCB_MBX;
  1850. }
  1851. }
  1852. }
  1853. }
  1854. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1855. /* If we are not polling, we MUST be in SLI2 mode */
  1856. if (flag != MBX_POLL) {
  1857. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1858. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1859. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1860. spin_unlock_irqrestore(phba->host->host_lock,
  1861. drvr_flag);
  1862. /* Mbox command <mbxCommand> cannot issue */
  1863. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1864. return (MBX_NOT_FINISHED);
  1865. }
  1866. /* timeout active mbox command */
  1867. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1868. }
  1869. /* Mailbox cmd <cmd> issue */
  1870. lpfc_printf_log(phba,
  1871. KERN_INFO,
  1872. LOG_MBOX | LOG_SLI,
  1873. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1874. phba->brd_no,
  1875. mb->mbxCommand,
  1876. phba->hba_state,
  1877. psli->sli_flag,
  1878. flag);
  1879. psli->slistat.mbox_cmd++;
  1880. evtctr = psli->slistat.mbox_event;
  1881. /* next set own bit for the adapter and copy over command word */
  1882. mb->mbxOwner = OWN_CHIP;
  1883. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1884. /* First copy command data to host SLIM area */
  1885. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1886. } else {
  1887. if (mb->mbxCommand == MBX_CONFIG_PORT ||
  1888. mb->mbxCommand == MBX_KILL_BOARD) {
  1889. /* copy command data into host mbox for cmpl */
  1890. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1891. MAILBOX_CMD_SIZE);
  1892. }
  1893. /* First copy mbox command data to HBA SLIM, skip past first
  1894. word */
  1895. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1896. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1897. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1898. /* Next copy over first word, with mbxOwner set */
  1899. ldata = *((volatile uint32_t *)mb);
  1900. to_slim = phba->MBslimaddr;
  1901. writel(ldata, to_slim);
  1902. readl(to_slim); /* flush */
  1903. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1904. /* switch over to host mailbox */
  1905. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1906. }
  1907. }
  1908. wmb();
  1909. /* interrupt board to doit right away */
  1910. writel(CA_MBATT, phba->CAregaddr);
  1911. readl(phba->CAregaddr); /* flush */
  1912. switch (flag) {
  1913. case MBX_NOWAIT:
  1914. /* Don't wait for it to finish, just return */
  1915. psli->mbox_active = pmbox;
  1916. break;
  1917. case MBX_POLL:
  1918. i = 0;
  1919. psli->mbox_active = NULL;
  1920. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1921. /* First read mbox status word */
  1922. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1923. word0 = le32_to_cpu(word0);
  1924. } else {
  1925. /* First read mbox status word */
  1926. word0 = readl(phba->MBslimaddr);
  1927. }
  1928. /* Read the HBA Host Attention Register */
  1929. ha_copy = readl(phba->HAregaddr);
  1930. /* Wait for command to complete */
  1931. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  1932. (!(ha_copy & HA_MBATT) &&
  1933. (phba->hba_state > LPFC_WARM_START))) {
  1934. if (i++ >= 100) {
  1935. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1936. spin_unlock_irqrestore(phba->host->host_lock,
  1937. drvr_flag);
  1938. return (MBX_NOT_FINISHED);
  1939. }
  1940. /* Check if we took a mbox interrupt while we were
  1941. polling */
  1942. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1943. && (evtctr != psli->slistat.mbox_event))
  1944. break;
  1945. spin_unlock_irqrestore(phba->host->host_lock,
  1946. drvr_flag);
  1947. /* Can be in interrupt context, do not sleep */
  1948. /* (or might be called with interrupts disabled) */
  1949. mdelay(i);
  1950. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1951. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1952. /* First copy command data */
  1953. word0 = *((volatile uint32_t *)
  1954. &phba->slim2p->mbx);
  1955. word0 = le32_to_cpu(word0);
  1956. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1957. MAILBOX_t *slimmb;
  1958. volatile uint32_t slimword0;
  1959. /* Check real SLIM for any errors */
  1960. slimword0 = readl(phba->MBslimaddr);
  1961. slimmb = (MAILBOX_t *) & slimword0;
  1962. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  1963. && slimmb->mbxStatus) {
  1964. psli->sli_flag &=
  1965. ~LPFC_SLI2_ACTIVE;
  1966. word0 = slimword0;
  1967. }
  1968. }
  1969. } else {
  1970. /* First copy command data */
  1971. word0 = readl(phba->MBslimaddr);
  1972. }
  1973. /* Read the HBA Host Attention Register */
  1974. ha_copy = readl(phba->HAregaddr);
  1975. }
  1976. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1977. /* copy results back to user */
  1978. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  1979. MAILBOX_CMD_SIZE);
  1980. } else {
  1981. /* First copy command data */
  1982. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  1983. MAILBOX_CMD_SIZE);
  1984. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  1985. pmbox->context2) {
  1986. lpfc_memcpy_from_slim((void *)pmbox->context2,
  1987. phba->MBslimaddr + DMP_RSP_OFFSET,
  1988. mb->un.varDmp.word_cnt);
  1989. }
  1990. }
  1991. writel(HA_MBATT, phba->HAregaddr);
  1992. readl(phba->HAregaddr); /* flush */
  1993. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1994. status = mb->mbxStatus;
  1995. }
  1996. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1997. return (status);
  1998. }
  1999. static int
  2000. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2001. struct lpfc_iocbq * piocb)
  2002. {
  2003. /* Insert the caller's iocb in the txq tail for later processing. */
  2004. list_add_tail(&piocb->list, &pring->txq);
  2005. pring->txq_cnt++;
  2006. return (0);
  2007. }
  2008. static struct lpfc_iocbq *
  2009. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2010. struct lpfc_iocbq ** piocb)
  2011. {
  2012. struct lpfc_iocbq * nextiocb;
  2013. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2014. if (!nextiocb) {
  2015. nextiocb = *piocb;
  2016. *piocb = NULL;
  2017. }
  2018. return nextiocb;
  2019. }
  2020. int
  2021. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2022. struct lpfc_iocbq *piocb, uint32_t flag)
  2023. {
  2024. struct lpfc_iocbq *nextiocb;
  2025. IOCB_t *iocb;
  2026. /*
  2027. * We should never get an IOCB if we are in a < LINK_DOWN state
  2028. */
  2029. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2030. return IOCB_ERROR;
  2031. /*
  2032. * Check to see if we are blocking IOCB processing because of a
  2033. * outstanding mbox command.
  2034. */
  2035. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2036. goto iocb_busy;
  2037. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2038. /*
  2039. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2040. * can be issued if the link is not up.
  2041. */
  2042. switch (piocb->iocb.ulpCommand) {
  2043. case CMD_QUE_RING_BUF_CN:
  2044. case CMD_QUE_RING_BUF64_CN:
  2045. /*
  2046. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2047. * completion, iocb_cmpl MUST be 0.
  2048. */
  2049. if (piocb->iocb_cmpl)
  2050. piocb->iocb_cmpl = NULL;
  2051. /*FALLTHROUGH*/
  2052. case CMD_CREATE_XRI_CR:
  2053. break;
  2054. default:
  2055. goto iocb_busy;
  2056. }
  2057. /*
  2058. * For FCP commands, we must be in a state where we can process link
  2059. * attention events.
  2060. */
  2061. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2062. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2063. goto iocb_busy;
  2064. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2065. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2066. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2067. if (iocb)
  2068. lpfc_sli_update_ring(phba, pring);
  2069. else
  2070. lpfc_sli_update_full_ring(phba, pring);
  2071. if (!piocb)
  2072. return IOCB_SUCCESS;
  2073. goto out_busy;
  2074. iocb_busy:
  2075. pring->stats.iocb_cmd_delay++;
  2076. out_busy:
  2077. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2078. lpfc_sli_ringtx_put(phba, pring, piocb);
  2079. return IOCB_SUCCESS;
  2080. }
  2081. return IOCB_BUSY;
  2082. }
  2083. int
  2084. lpfc_sli_setup(struct lpfc_hba *phba)
  2085. {
  2086. int i, totiocb = 0;
  2087. struct lpfc_sli *psli = &phba->sli;
  2088. struct lpfc_sli_ring *pring;
  2089. psli->num_rings = MAX_CONFIGURED_RINGS;
  2090. psli->sli_flag = 0;
  2091. psli->fcp_ring = LPFC_FCP_RING;
  2092. psli->next_ring = LPFC_FCP_NEXT_RING;
  2093. psli->ip_ring = LPFC_IP_RING;
  2094. psli->iocbq_lookup = NULL;
  2095. psli->iocbq_lookup_len = 0;
  2096. psli->last_iotag = 0;
  2097. for (i = 0; i < psli->num_rings; i++) {
  2098. pring = &psli->ring[i];
  2099. switch (i) {
  2100. case LPFC_FCP_RING: /* ring 0 - FCP */
  2101. /* numCiocb and numRiocb are used in config_port */
  2102. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2103. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2104. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2105. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2106. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2107. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2108. pring->iotag_ctr = 0;
  2109. pring->iotag_max =
  2110. (phba->cfg_hba_queue_depth * 2);
  2111. pring->fast_iotag = pring->iotag_max;
  2112. pring->num_mask = 0;
  2113. break;
  2114. case LPFC_IP_RING: /* ring 1 - IP */
  2115. /* numCiocb and numRiocb are used in config_port */
  2116. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2117. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2118. pring->num_mask = 0;
  2119. break;
  2120. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2121. /* numCiocb and numRiocb are used in config_port */
  2122. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2123. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2124. pring->fast_iotag = 0;
  2125. pring->iotag_ctr = 0;
  2126. pring->iotag_max = 4096;
  2127. pring->num_mask = 4;
  2128. pring->prt[0].profile = 0; /* Mask 0 */
  2129. pring->prt[0].rctl = FC_ELS_REQ;
  2130. pring->prt[0].type = FC_ELS_DATA;
  2131. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2132. lpfc_els_unsol_event;
  2133. pring->prt[1].profile = 0; /* Mask 1 */
  2134. pring->prt[1].rctl = FC_ELS_RSP;
  2135. pring->prt[1].type = FC_ELS_DATA;
  2136. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2137. lpfc_els_unsol_event;
  2138. pring->prt[2].profile = 0; /* Mask 2 */
  2139. /* NameServer Inquiry */
  2140. pring->prt[2].rctl = FC_UNSOL_CTL;
  2141. /* NameServer */
  2142. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2143. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2144. lpfc_ct_unsol_event;
  2145. pring->prt[3].profile = 0; /* Mask 3 */
  2146. /* NameServer response */
  2147. pring->prt[3].rctl = FC_SOL_CTL;
  2148. /* NameServer */
  2149. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2150. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2151. lpfc_ct_unsol_event;
  2152. break;
  2153. }
  2154. totiocb += (pring->numCiocb + pring->numRiocb);
  2155. }
  2156. if (totiocb > MAX_SLI2_IOCB) {
  2157. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2158. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2159. "%d:0462 Too many cmd / rsp ring entries in "
  2160. "SLI2 SLIM Data: x%x x%x\n",
  2161. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2162. }
  2163. return 0;
  2164. }
  2165. int
  2166. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2167. {
  2168. struct lpfc_sli *psli;
  2169. struct lpfc_sli_ring *pring;
  2170. int i;
  2171. psli = &phba->sli;
  2172. spin_lock_irq(phba->host->host_lock);
  2173. INIT_LIST_HEAD(&psli->mboxq);
  2174. /* Initialize list headers for txq and txcmplq as double linked lists */
  2175. for (i = 0; i < psli->num_rings; i++) {
  2176. pring = &psli->ring[i];
  2177. pring->ringno = i;
  2178. pring->next_cmdidx = 0;
  2179. pring->local_getidx = 0;
  2180. pring->cmdidx = 0;
  2181. INIT_LIST_HEAD(&pring->txq);
  2182. INIT_LIST_HEAD(&pring->txcmplq);
  2183. INIT_LIST_HEAD(&pring->iocb_continueq);
  2184. INIT_LIST_HEAD(&pring->postbufq);
  2185. }
  2186. spin_unlock_irq(phba->host->host_lock);
  2187. return (1);
  2188. }
  2189. int
  2190. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2191. {
  2192. struct lpfc_sli *psli;
  2193. struct lpfc_sli_ring *pring;
  2194. LPFC_MBOXQ_t *pmb;
  2195. struct lpfc_iocbq *iocb, *next_iocb;
  2196. IOCB_t *icmd = NULL;
  2197. int i;
  2198. unsigned long flags = 0;
  2199. psli = &phba->sli;
  2200. lpfc_hba_down_prep(phba);
  2201. spin_lock_irqsave(phba->host->host_lock, flags);
  2202. for (i = 0; i < psli->num_rings; i++) {
  2203. pring = &psli->ring[i];
  2204. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2205. /*
  2206. * Error everything on the txq since these iocbs have not been
  2207. * given to the FW yet.
  2208. */
  2209. pring->txq_cnt = 0;
  2210. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2211. list_del_init(&iocb->list);
  2212. if (iocb->iocb_cmpl) {
  2213. icmd = &iocb->iocb;
  2214. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2215. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2216. spin_unlock_irqrestore(phba->host->host_lock,
  2217. flags);
  2218. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2219. spin_lock_irqsave(phba->host->host_lock, flags);
  2220. } else
  2221. lpfc_sli_release_iocbq(phba, iocb);
  2222. }
  2223. INIT_LIST_HEAD(&(pring->txq));
  2224. kfree(pring->fast_lookup);
  2225. pring->fast_lookup = NULL;
  2226. }
  2227. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2228. /* Return any active mbox cmds */
  2229. del_timer_sync(&psli->mbox_tmo);
  2230. spin_lock_irqsave(phba->host->host_lock, flags);
  2231. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2232. if (psli->mbox_active) {
  2233. pmb = psli->mbox_active;
  2234. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2235. if (pmb->mbox_cmpl) {
  2236. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2237. pmb->mbox_cmpl(phba,pmb);
  2238. spin_lock_irqsave(phba->host->host_lock, flags);
  2239. }
  2240. }
  2241. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2242. psli->mbox_active = NULL;
  2243. /* Return any pending mbox cmds */
  2244. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2245. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2246. if (pmb->mbox_cmpl) {
  2247. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2248. pmb->mbox_cmpl(phba,pmb);
  2249. spin_lock_irqsave(phba->host->host_lock, flags);
  2250. }
  2251. }
  2252. INIT_LIST_HEAD(&psli->mboxq);
  2253. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2254. return 1;
  2255. }
  2256. void
  2257. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2258. {
  2259. uint32_t *src = srcp;
  2260. uint32_t *dest = destp;
  2261. uint32_t ldata;
  2262. int i;
  2263. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2264. ldata = *src;
  2265. ldata = le32_to_cpu(ldata);
  2266. *dest = ldata;
  2267. src++;
  2268. dest++;
  2269. }
  2270. }
  2271. int
  2272. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2273. struct lpfc_dmabuf * mp)
  2274. {
  2275. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2276. later */
  2277. list_add_tail(&mp->list, &pring->postbufq);
  2278. pring->postbufq_cnt++;
  2279. return 0;
  2280. }
  2281. struct lpfc_dmabuf *
  2282. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2283. dma_addr_t phys)
  2284. {
  2285. struct lpfc_dmabuf *mp, *next_mp;
  2286. struct list_head *slp = &pring->postbufq;
  2287. /* Search postbufq, from the begining, looking for a match on phys */
  2288. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2289. if (mp->phys == phys) {
  2290. list_del_init(&mp->list);
  2291. pring->postbufq_cnt--;
  2292. return mp;
  2293. }
  2294. }
  2295. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2296. "%d:0410 Cannot find virtual addr for mapped buf on "
  2297. "ring %d Data x%llx x%p x%p x%x\n",
  2298. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2299. slp->next, slp->prev, pring->postbufq_cnt);
  2300. return NULL;
  2301. }
  2302. static void
  2303. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2304. struct lpfc_iocbq * rspiocb)
  2305. {
  2306. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2307. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2308. * just aborted.
  2309. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2310. */
  2311. if (cmdiocb->context2) {
  2312. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2313. /* Free the response IOCB before completing the abort
  2314. command. */
  2315. buf_ptr = NULL;
  2316. list_remove_head((&buf_ptr1->list), buf_ptr,
  2317. struct lpfc_dmabuf, list);
  2318. if (buf_ptr) {
  2319. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2320. kfree(buf_ptr);
  2321. }
  2322. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2323. kfree(buf_ptr1);
  2324. }
  2325. if (cmdiocb->context3) {
  2326. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2327. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2328. kfree(buf_ptr);
  2329. }
  2330. lpfc_sli_release_iocbq(phba, cmdiocb);
  2331. return;
  2332. }
  2333. int
  2334. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2335. struct lpfc_sli_ring * pring,
  2336. struct lpfc_iocbq * cmdiocb)
  2337. {
  2338. struct lpfc_iocbq *abtsiocbp;
  2339. IOCB_t *icmd = NULL;
  2340. IOCB_t *iabt = NULL;
  2341. /* issue ABTS for this IOCB based on iotag */
  2342. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2343. if (abtsiocbp == NULL)
  2344. return 0;
  2345. iabt = &abtsiocbp->iocb;
  2346. icmd = &cmdiocb->iocb;
  2347. switch (icmd->ulpCommand) {
  2348. case CMD_ELS_REQUEST64_CR:
  2349. /* Even though we abort the ELS command, the firmware may access
  2350. * the BPL or other resources before it processes our
  2351. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2352. * resources till the actual abort request completes.
  2353. */
  2354. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2355. abtsiocbp->context2 = cmdiocb->context2;
  2356. abtsiocbp->context3 = cmdiocb->context3;
  2357. cmdiocb->context2 = NULL;
  2358. cmdiocb->context3 = NULL;
  2359. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2360. break;
  2361. default:
  2362. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2363. return 0;
  2364. }
  2365. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2366. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2367. iabt->ulpLe = 1;
  2368. iabt->ulpClass = CLASS3;
  2369. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2370. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2371. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2372. return 0;
  2373. }
  2374. return 1;
  2375. }
  2376. static int
  2377. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2378. uint64_t lun_id, uint32_t ctx,
  2379. lpfc_ctx_cmd ctx_cmd)
  2380. {
  2381. struct lpfc_scsi_buf *lpfc_cmd;
  2382. struct scsi_cmnd *cmnd;
  2383. int rc = 1;
  2384. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2385. return rc;
  2386. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2387. cmnd = lpfc_cmd->pCmd;
  2388. if (cmnd == NULL)
  2389. return rc;
  2390. switch (ctx_cmd) {
  2391. case LPFC_CTX_LUN:
  2392. if ((cmnd->device->id == tgt_id) &&
  2393. (cmnd->device->lun == lun_id))
  2394. rc = 0;
  2395. break;
  2396. case LPFC_CTX_TGT:
  2397. if (cmnd->device->id == tgt_id)
  2398. rc = 0;
  2399. break;
  2400. case LPFC_CTX_CTX:
  2401. if (iocbq->iocb.ulpContext == ctx)
  2402. rc = 0;
  2403. break;
  2404. case LPFC_CTX_HOST:
  2405. rc = 0;
  2406. break;
  2407. default:
  2408. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2409. __FUNCTION__, ctx_cmd);
  2410. break;
  2411. }
  2412. return rc;
  2413. }
  2414. int
  2415. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2416. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2417. {
  2418. struct lpfc_iocbq *iocbq;
  2419. int sum, i;
  2420. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2421. iocbq = phba->sli.iocbq_lookup[i];
  2422. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2423. 0, ctx_cmd) == 0)
  2424. sum++;
  2425. }
  2426. return sum;
  2427. }
  2428. void
  2429. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2430. struct lpfc_iocbq * rspiocb)
  2431. {
  2432. spin_lock_irq(phba->host->host_lock);
  2433. lpfc_sli_release_iocbq(phba, cmdiocb);
  2434. spin_unlock_irq(phba->host->host_lock);
  2435. return;
  2436. }
  2437. int
  2438. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2439. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2440. lpfc_ctx_cmd abort_cmd)
  2441. {
  2442. struct lpfc_iocbq *iocbq;
  2443. struct lpfc_iocbq *abtsiocb;
  2444. IOCB_t *cmd = NULL;
  2445. int errcnt = 0, ret_val = 0;
  2446. int i;
  2447. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2448. iocbq = phba->sli.iocbq_lookup[i];
  2449. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2450. 0, abort_cmd) != 0)
  2451. continue;
  2452. /* issue ABTS for this IOCB based on iotag */
  2453. abtsiocb = lpfc_sli_get_iocbq(phba);
  2454. if (abtsiocb == NULL) {
  2455. errcnt++;
  2456. continue;
  2457. }
  2458. cmd = &iocbq->iocb;
  2459. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2460. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2461. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2462. abtsiocb->iocb.ulpLe = 1;
  2463. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2464. if (phba->hba_state >= LPFC_LINK_UP)
  2465. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2466. else
  2467. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2468. /* Setup callback routine and issue the command. */
  2469. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2470. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2471. if (ret_val == IOCB_ERROR) {
  2472. lpfc_sli_release_iocbq(phba, abtsiocb);
  2473. errcnt++;
  2474. continue;
  2475. }
  2476. }
  2477. return errcnt;
  2478. }
  2479. static void
  2480. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2481. struct lpfc_iocbq *cmdiocbq,
  2482. struct lpfc_iocbq *rspiocbq)
  2483. {
  2484. wait_queue_head_t *pdone_q;
  2485. unsigned long iflags;
  2486. spin_lock_irqsave(phba->host->host_lock, iflags);
  2487. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2488. if (cmdiocbq->context2 && rspiocbq)
  2489. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2490. &rspiocbq->iocb, sizeof(IOCB_t));
  2491. pdone_q = cmdiocbq->context_un.wait_queue;
  2492. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2493. if (pdone_q)
  2494. wake_up(pdone_q);
  2495. return;
  2496. }
  2497. /*
  2498. * Issue the caller's iocb and wait for its completion, but no longer than the
  2499. * caller's timeout. Note that iocb_flags is cleared before the
  2500. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2501. * definition this is a wait function.
  2502. */
  2503. int
  2504. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2505. struct lpfc_sli_ring * pring,
  2506. struct lpfc_iocbq * piocb,
  2507. struct lpfc_iocbq * prspiocbq,
  2508. uint32_t timeout)
  2509. {
  2510. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2511. long timeleft, timeout_req = 0;
  2512. int retval = IOCB_SUCCESS;
  2513. uint32_t creg_val;
  2514. /*
  2515. * If the caller has provided a response iocbq buffer, then context2
  2516. * is NULL or its an error.
  2517. */
  2518. if (prspiocbq) {
  2519. if (piocb->context2)
  2520. return IOCB_ERROR;
  2521. piocb->context2 = prspiocbq;
  2522. }
  2523. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2524. piocb->context_un.wait_queue = &done_q;
  2525. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2526. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2527. creg_val = readl(phba->HCregaddr);
  2528. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2529. writel(creg_val, phba->HCregaddr);
  2530. readl(phba->HCregaddr); /* flush */
  2531. }
  2532. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2533. if (retval == IOCB_SUCCESS) {
  2534. timeout_req = timeout * HZ;
  2535. spin_unlock_irq(phba->host->host_lock);
  2536. timeleft = wait_event_timeout(done_q,
  2537. piocb->iocb_flag & LPFC_IO_WAKE,
  2538. timeout_req);
  2539. spin_lock_irq(phba->host->host_lock);
  2540. if (timeleft == 0) {
  2541. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2542. "%d:0329 IOCB wait timeout error - no "
  2543. "wake response Data x%x\n",
  2544. phba->brd_no, timeout);
  2545. retval = IOCB_TIMEDOUT;
  2546. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2547. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2548. "%d:0330 IOCB wake NOT set, "
  2549. "Data x%x x%lx\n", phba->brd_no,
  2550. timeout, (timeleft / jiffies));
  2551. retval = IOCB_TIMEDOUT;
  2552. } else {
  2553. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2554. "%d:0331 IOCB wake signaled\n",
  2555. phba->brd_no);
  2556. }
  2557. } else {
  2558. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2559. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2560. phba->brd_no, retval);
  2561. retval = IOCB_ERROR;
  2562. }
  2563. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2564. creg_val = readl(phba->HCregaddr);
  2565. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2566. writel(creg_val, phba->HCregaddr);
  2567. readl(phba->HCregaddr); /* flush */
  2568. }
  2569. if (prspiocbq)
  2570. piocb->context2 = NULL;
  2571. piocb->context_un.wait_queue = NULL;
  2572. piocb->iocb_cmpl = NULL;
  2573. return retval;
  2574. }
  2575. int
  2576. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2577. uint32_t timeout)
  2578. {
  2579. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2580. DECLARE_WAITQUEUE(wq_entry, current);
  2581. uint32_t timeleft = 0;
  2582. int retval;
  2583. /* The caller must leave context1 empty. */
  2584. if (pmboxq->context1 != 0) {
  2585. return (MBX_NOT_FINISHED);
  2586. }
  2587. /* setup wake call as IOCB callback */
  2588. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2589. /* setup context field to pass wait_queue pointer to wake function */
  2590. pmboxq->context1 = &done_q;
  2591. /* start to sleep before we wait, to avoid races */
  2592. set_current_state(TASK_INTERRUPTIBLE);
  2593. add_wait_queue(&done_q, &wq_entry);
  2594. /* now issue the command */
  2595. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2596. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2597. timeleft = schedule_timeout(timeout * HZ);
  2598. pmboxq->context1 = NULL;
  2599. /* if schedule_timeout returns 0, we timed out and were not
  2600. woken up */
  2601. if ((timeleft == 0) || signal_pending(current))
  2602. retval = MBX_TIMEOUT;
  2603. else
  2604. retval = MBX_SUCCESS;
  2605. }
  2606. set_current_state(TASK_RUNNING);
  2607. remove_wait_queue(&done_q, &wq_entry);
  2608. return retval;
  2609. }
  2610. irqreturn_t
  2611. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2612. {
  2613. struct lpfc_hba *phba;
  2614. uint32_t ha_copy;
  2615. uint32_t work_ha_copy;
  2616. unsigned long status;
  2617. int i;
  2618. uint32_t control;
  2619. /*
  2620. * Get the driver's phba structure from the dev_id and
  2621. * assume the HBA is not interrupting.
  2622. */
  2623. phba = (struct lpfc_hba *) dev_id;
  2624. if (unlikely(!phba))
  2625. return IRQ_NONE;
  2626. phba->sli.slistat.sli_intr++;
  2627. /*
  2628. * Call the HBA to see if it is interrupting. If not, don't claim
  2629. * the interrupt
  2630. */
  2631. /* Ignore all interrupts during initialization. */
  2632. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2633. return IRQ_NONE;
  2634. /*
  2635. * Read host attention register to determine interrupt source
  2636. * Clear Attention Sources, except Error Attention (to
  2637. * preserve status) and Link Attention
  2638. */
  2639. spin_lock(phba->host->host_lock);
  2640. ha_copy = readl(phba->HAregaddr);
  2641. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2642. readl(phba->HAregaddr); /* flush */
  2643. spin_unlock(phba->host->host_lock);
  2644. if (unlikely(!ha_copy))
  2645. return IRQ_NONE;
  2646. work_ha_copy = ha_copy & phba->work_ha_mask;
  2647. if (unlikely(work_ha_copy)) {
  2648. if (work_ha_copy & HA_LATT) {
  2649. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2650. /*
  2651. * Turn off Link Attention interrupts
  2652. * until CLEAR_LA done
  2653. */
  2654. spin_lock(phba->host->host_lock);
  2655. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2656. control = readl(phba->HCregaddr);
  2657. control &= ~HC_LAINT_ENA;
  2658. writel(control, phba->HCregaddr);
  2659. readl(phba->HCregaddr); /* flush */
  2660. spin_unlock(phba->host->host_lock);
  2661. }
  2662. else
  2663. work_ha_copy &= ~HA_LATT;
  2664. }
  2665. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2666. for (i = 0; i < phba->sli.num_rings; i++) {
  2667. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2668. /*
  2669. * Turn off Slow Rings interrupts
  2670. */
  2671. spin_lock(phba->host->host_lock);
  2672. control = readl(phba->HCregaddr);
  2673. control &= ~(HC_R0INT_ENA << i);
  2674. writel(control, phba->HCregaddr);
  2675. readl(phba->HCregaddr); /* flush */
  2676. spin_unlock(phba->host->host_lock);
  2677. }
  2678. }
  2679. }
  2680. if (work_ha_copy & HA_ERATT) {
  2681. phba->hba_state = LPFC_HBA_ERROR;
  2682. /*
  2683. * There was a link/board error. Read the
  2684. * status register to retrieve the error event
  2685. * and process it.
  2686. */
  2687. phba->sli.slistat.err_attn_event++;
  2688. /* Save status info */
  2689. phba->work_hs = readl(phba->HSregaddr);
  2690. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2691. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2692. /* Clear Chip error bit */
  2693. writel(HA_ERATT, phba->HAregaddr);
  2694. readl(phba->HAregaddr); /* flush */
  2695. }
  2696. spin_lock(phba->host->host_lock);
  2697. phba->work_ha |= work_ha_copy;
  2698. if (phba->work_wait)
  2699. wake_up(phba->work_wait);
  2700. spin_unlock(phba->host->host_lock);
  2701. }
  2702. ha_copy &= ~(phba->work_ha_mask);
  2703. /*
  2704. * Process all events on FCP ring. Take the optimized path for
  2705. * FCP IO. Any other IO is slow path and is handled by
  2706. * the worker thread.
  2707. */
  2708. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2709. status >>= (4*LPFC_FCP_RING);
  2710. if (status & HA_RXATT)
  2711. lpfc_sli_handle_fast_ring_event(phba,
  2712. &phba->sli.ring[LPFC_FCP_RING],
  2713. status);
  2714. return IRQ_HANDLED;
  2715. } /* lpfc_intr_handler */