cx18-streams.c 23 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  41. .ioctl = cx18_v4l2_ioctl,
  42. .release = cx18_v4l2_close,
  43. .poll = cx18_v4l2_enc_poll,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. static void cx18_stream_init(struct cx18 *cx, int type)
  95. {
  96. struct cx18_stream *s = &cx->streams[type];
  97. struct video_device *video_dev = s->video_dev;
  98. /* we need to keep video_dev, so restore it afterwards */
  99. memset(s, 0, sizeof(*s));
  100. s->video_dev = video_dev;
  101. /* initialize cx18_stream fields */
  102. s->cx = cx;
  103. s->type = type;
  104. s->name = cx18_stream_info[type].name;
  105. s->handle = CX18_INVALID_TASK_HANDLE;
  106. s->dma = cx18_stream_info[type].dma;
  107. s->buffers = cx->stream_buffers[type];
  108. s->buf_size = cx->stream_buf_size[type];
  109. init_waitqueue_head(&s->waitq);
  110. s->id = -1;
  111. spin_lock_init(&s->q_free.lock);
  112. cx18_queue_init(&s->q_free);
  113. spin_lock_init(&s->q_busy.lock);
  114. cx18_queue_init(&s->q_busy);
  115. spin_lock_init(&s->q_full.lock);
  116. cx18_queue_init(&s->q_full);
  117. }
  118. static int cx18_prep_dev(struct cx18 *cx, int type)
  119. {
  120. struct cx18_stream *s = &cx->streams[type];
  121. u32 cap = cx->v4l2_cap;
  122. int num_offset = cx18_stream_info[type].num_offset;
  123. int num = cx->instance + cx18_first_minor + num_offset;
  124. /* These four fields are always initialized. If video_dev == NULL, then
  125. this stream is not in use. In that case no other fields but these
  126. four can be used. */
  127. s->video_dev = NULL;
  128. s->cx = cx;
  129. s->type = type;
  130. s->name = cx18_stream_info[type].name;
  131. /* Check whether the radio is supported */
  132. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  133. return 0;
  134. /* Check whether VBI is supported */
  135. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  136. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  137. return 0;
  138. /* User explicitly selected 0 buffers for these streams, so don't
  139. create them. */
  140. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  141. cx->stream_buffers[type] == 0) {
  142. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  143. return 0;
  144. }
  145. cx18_stream_init(cx, type);
  146. if (num_offset == -1)
  147. return 0;
  148. /* allocate and initialize the v4l2 video device structure */
  149. s->video_dev = video_device_alloc();
  150. if (s->video_dev == NULL) {
  151. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  152. s->name);
  153. return -ENOMEM;
  154. }
  155. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  156. cx->v4l2_dev.name, s->name);
  157. s->video_dev->num = num;
  158. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  159. s->video_dev->fops = &cx18_v4l2_enc_fops;
  160. s->video_dev->release = video_device_release;
  161. s->video_dev->tvnorms = V4L2_STD_ALL;
  162. cx18_set_funcs(s->video_dev);
  163. return 0;
  164. }
  165. /* Initialize v4l2 variables and register v4l2 devices */
  166. int cx18_streams_setup(struct cx18 *cx)
  167. {
  168. int type, ret;
  169. /* Setup V4L2 Devices */
  170. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  171. /* Prepare device */
  172. ret = cx18_prep_dev(cx, type);
  173. if (ret < 0)
  174. break;
  175. /* Allocate Stream */
  176. ret = cx18_stream_alloc(&cx->streams[type]);
  177. if (ret < 0)
  178. break;
  179. }
  180. if (type == CX18_MAX_STREAMS)
  181. return 0;
  182. /* One or more streams could not be initialized. Clean 'em all up. */
  183. cx18_streams_cleanup(cx, 0);
  184. return ret;
  185. }
  186. static int cx18_reg_dev(struct cx18 *cx, int type)
  187. {
  188. struct cx18_stream *s = &cx->streams[type];
  189. int vfl_type = cx18_stream_info[type].vfl_type;
  190. int num, ret;
  191. /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
  192. * We need a VFL_TYPE_TS defined.
  193. */
  194. if (strcmp("TS", s->name) == 0) {
  195. /* just return if no DVB is supported */
  196. if ((cx->card->hw_all & CX18_HW_DVB) == 0)
  197. return 0;
  198. ret = cx18_dvb_register(s);
  199. if (ret < 0) {
  200. CX18_ERR("DVB failed to register\n");
  201. return ret;
  202. }
  203. }
  204. if (s->video_dev == NULL)
  205. return 0;
  206. num = s->video_dev->num;
  207. /* card number + user defined offset + device offset */
  208. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  209. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  210. if (s_mpg->video_dev)
  211. num = s_mpg->video_dev->num
  212. + cx18_stream_info[type].num_offset;
  213. }
  214. video_set_drvdata(s->video_dev, s);
  215. /* Register device. First try the desired minor, then any free one. */
  216. ret = video_register_device(s->video_dev, vfl_type, num);
  217. if (ret < 0) {
  218. CX18_ERR("Couldn't register v4l2 device for %s kernel number %d\n",
  219. s->name, num);
  220. video_device_release(s->video_dev);
  221. s->video_dev = NULL;
  222. return ret;
  223. }
  224. num = s->video_dev->num;
  225. switch (vfl_type) {
  226. case VFL_TYPE_GRABBER:
  227. CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
  228. num, s->name, cx->stream_buffers[type],
  229. cx->stream_buf_size[type]/1024);
  230. break;
  231. case VFL_TYPE_RADIO:
  232. CX18_INFO("Registered device radio%d for %s\n",
  233. num, s->name);
  234. break;
  235. case VFL_TYPE_VBI:
  236. if (cx->stream_buffers[type])
  237. CX18_INFO("Registered device vbi%d for %s "
  238. "(%d x %d bytes)\n",
  239. num, s->name, cx->stream_buffers[type],
  240. cx->stream_buf_size[type]);
  241. else
  242. CX18_INFO("Registered device vbi%d for %s\n",
  243. num, s->name);
  244. break;
  245. }
  246. return 0;
  247. }
  248. /* Register v4l2 devices */
  249. int cx18_streams_register(struct cx18 *cx)
  250. {
  251. int type;
  252. int err;
  253. int ret = 0;
  254. /* Register V4L2 devices */
  255. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  256. err = cx18_reg_dev(cx, type);
  257. if (err && ret == 0)
  258. ret = err;
  259. }
  260. if (ret == 0)
  261. return 0;
  262. /* One or more streams could not be initialized. Clean 'em all up. */
  263. cx18_streams_cleanup(cx, 1);
  264. return ret;
  265. }
  266. /* Unregister v4l2 devices */
  267. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  268. {
  269. struct video_device *vdev;
  270. int type;
  271. /* Teardown all streams */
  272. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  273. if (cx->streams[type].dvb.enabled) {
  274. cx18_dvb_unregister(&cx->streams[type]);
  275. cx->streams[type].dvb.enabled = false;
  276. }
  277. vdev = cx->streams[type].video_dev;
  278. cx->streams[type].video_dev = NULL;
  279. if (vdev == NULL)
  280. continue;
  281. cx18_stream_free(&cx->streams[type]);
  282. /* Unregister or release device */
  283. if (unregister)
  284. video_unregister_device(vdev);
  285. else
  286. video_device_release(vdev);
  287. }
  288. }
  289. static void cx18_vbi_setup(struct cx18_stream *s)
  290. {
  291. struct cx18 *cx = s->cx;
  292. int raw = cx18_raw_vbi(cx);
  293. u32 data[CX2341X_MBOX_MAX_DATA];
  294. int lines;
  295. if (cx->is_60hz) {
  296. cx->vbi.count = 12;
  297. cx->vbi.start[0] = 10;
  298. cx->vbi.start[1] = 273;
  299. } else { /* PAL/SECAM */
  300. cx->vbi.count = 18;
  301. cx->vbi.start[0] = 6;
  302. cx->vbi.start[1] = 318;
  303. }
  304. /* setup VBI registers */
  305. v4l2_subdev_call(cx->sd_av, video, s_fmt, &cx->vbi.in);
  306. /*
  307. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  308. * VBI when the first analog capture channel starts, as once it starts
  309. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  310. * (i.e. for the VBI capture channels). We also send it for each
  311. * analog capture channel anyway just to make sure we get the proper
  312. * behavior
  313. */
  314. if (raw) {
  315. lines = cx->vbi.count * 2;
  316. } else {
  317. /*
  318. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  319. * The EAV RP code's Field bit toggles on line 4, a few lines
  320. * after the Vertcal Blank bit has already toggled.
  321. * Tell the encoder to capture 21-4+1=18 lines per field,
  322. * since we want lines 10 through 21.
  323. *
  324. * FIXME - revisit for 625/50 systems
  325. */
  326. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : 38;
  327. }
  328. data[0] = s->handle;
  329. /* Lines per field */
  330. data[1] = (lines / 2) | ((lines / 2) << 16);
  331. /* bytes per line */
  332. data[2] = (raw ? vbi_active_samples
  333. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  334. : vbi_hblank_samples_50Hz));
  335. /* Every X number of frames a VBI interrupt arrives
  336. (frames as in 25 or 30 fps) */
  337. data[3] = 1;
  338. /*
  339. * Set the SAV/EAV RP codes to look for as start/stop points
  340. * when in VIP-1.1 mode
  341. */
  342. if (raw) {
  343. /*
  344. * Start codes for beginning of "active" line in vertical blank
  345. * 0x20 ( VerticalBlank )
  346. * 0x60 ( EvenField VerticalBlank )
  347. */
  348. data[4] = 0x20602060;
  349. /*
  350. * End codes for end of "active" raw lines and regular lines
  351. * 0x30 ( VerticalBlank HorizontalBlank)
  352. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  353. * 0x90 (Task HorizontalBlank)
  354. * 0xd0 (Task EvenField HorizontalBlank)
  355. */
  356. data[5] = 0x307090d0;
  357. } else {
  358. /*
  359. * End codes for active video, we want data in the hblank region
  360. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  361. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  362. *
  363. * Since the V bit is only allowed to toggle in the EAV RP code,
  364. * just before the first active region line, these two
  365. * are problematic:
  366. * 0x90 (Task HorizontalBlank)
  367. * 0xd0 (Task EvenField HorizontalBlank)
  368. *
  369. * We have set the digitzer such that we don't have to worry
  370. * about these problem codes.
  371. */
  372. data[4] = 0xB0F0B0F0;
  373. /*
  374. * Start codes for beginning of active line in vertical blank
  375. * 0xa0 (Task VerticalBlank )
  376. * 0xe0 (Task EvenField VerticalBlank )
  377. */
  378. data[5] = 0xA0E0A0E0;
  379. }
  380. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  381. data[0], data[1], data[2], data[3], data[4], data[5]);
  382. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  383. }
  384. static
  385. struct cx18_queue *_cx18_stream_put_buf_fw(struct cx18_stream *s,
  386. struct cx18_buffer *buf)
  387. {
  388. struct cx18 *cx = s->cx;
  389. struct cx18_queue *q;
  390. /* Don't give it to the firmware, if we're not running a capture */
  391. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  392. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  393. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  394. return cx18_enqueue(s, buf, &s->q_free);
  395. q = cx18_enqueue(s, buf, &s->q_busy);
  396. if (q != &s->q_busy)
  397. return q; /* The firmware has the max buffers it can handle */
  398. cx18_buf_sync_for_device(s, buf);
  399. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  400. (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
  401. 1, buf->id, s->buf_size);
  402. return q;
  403. }
  404. static
  405. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  406. {
  407. struct cx18_queue *q;
  408. struct cx18_buffer *buf;
  409. if (atomic_read(&s->q_free.buffers) == 0 ||
  410. atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
  411. return;
  412. /* Move from q_free to q_busy notifying the firmware, until the limit */
  413. do {
  414. buf = cx18_dequeue(s, &s->q_free);
  415. if (buf == NULL)
  416. break;
  417. q = _cx18_stream_put_buf_fw(s, buf);
  418. } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
  419. && q == &s->q_busy);
  420. }
  421. static inline
  422. void free_out_work_order(struct cx18_out_work_order *order)
  423. {
  424. atomic_set(&order->pending, 0);
  425. }
  426. void cx18_out_work_handler(struct work_struct *work)
  427. {
  428. struct cx18_out_work_order *order =
  429. container_of(work, struct cx18_out_work_order, work);
  430. struct cx18_stream *s = order->s;
  431. struct cx18_buffer *buf = order->buf;
  432. free_out_work_order(order);
  433. if (buf == NULL)
  434. _cx18_stream_load_fw_queue(s);
  435. else
  436. _cx18_stream_put_buf_fw(s, buf);
  437. }
  438. static
  439. struct cx18_out_work_order *alloc_out_work_order(struct cx18 *cx)
  440. {
  441. int i;
  442. struct cx18_out_work_order *order = NULL;
  443. for (i = 0; i < CX18_MAX_OUT_WORK_ORDERS; i++) {
  444. /*
  445. * We need "pending" to be atomic to inspect & set its contents
  446. * 1. "pending" is only set to 1 here, but needs multiple access
  447. * protection
  448. * 2. work handler threads only clear "pending" and only
  449. * on one, particular work order at a time, per handler thread.
  450. */
  451. if (atomic_add_unless(&cx->out_work_order[i].pending, 1, 1)) {
  452. order = &cx->out_work_order[i];
  453. break;
  454. }
  455. }
  456. return order;
  457. }
  458. struct cx18_queue *cx18_stream_put_buf_fw(struct cx18_stream *s,
  459. struct cx18_buffer *buf)
  460. {
  461. struct cx18 *cx = s->cx;
  462. struct cx18_out_work_order *order;
  463. order = alloc_out_work_order(cx);
  464. if (order == NULL) {
  465. CX18_DEBUG_WARN("No blank, outgoing-mailbox, deferred-work, "
  466. "order forms available; sending buffer %u back "
  467. "to the firmware immediately for stream %s\n",
  468. buf->id, s->name);
  469. return _cx18_stream_put_buf_fw(s, buf);
  470. }
  471. order->s = s;
  472. order->buf = buf;
  473. queue_work(cx->out_work_queue, &order->work);
  474. return NULL;
  475. }
  476. void cx18_stream_load_fw_queue(struct cx18_stream *s)
  477. {
  478. struct cx18 *cx = s->cx;
  479. struct cx18_out_work_order *order;
  480. order = alloc_out_work_order(cx);
  481. if (order == NULL) {
  482. CX18_DEBUG_WARN("No blank, outgoing-mailbox, deferred-work, "
  483. "order forms available; filling the firmware "
  484. "buffer queue immediately for stream %s\n",
  485. s->name);
  486. _cx18_stream_load_fw_queue(s);
  487. return;
  488. }
  489. order->s = s;
  490. order->buf = NULL; /* Indicates to load the fw queue */
  491. queue_work(cx->out_work_queue, &order->work);
  492. }
  493. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  494. {
  495. u32 data[MAX_MB_ARGUMENTS];
  496. struct cx18 *cx = s->cx;
  497. struct cx18_buffer *buf;
  498. int captype = 0;
  499. struct cx18_api_func_private priv;
  500. if (s->video_dev == NULL && s->dvb.enabled == 0)
  501. return -EINVAL;
  502. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  503. switch (s->type) {
  504. case CX18_ENC_STREAM_TYPE_MPG:
  505. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  506. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  507. cx->dualwatch_jiffies = jiffies;
  508. cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
  509. cx->search_pack_header = 0;
  510. break;
  511. case CX18_ENC_STREAM_TYPE_TS:
  512. captype = CAPTURE_CHANNEL_TYPE_TS;
  513. break;
  514. case CX18_ENC_STREAM_TYPE_YUV:
  515. captype = CAPTURE_CHANNEL_TYPE_YUV;
  516. break;
  517. case CX18_ENC_STREAM_TYPE_PCM:
  518. captype = CAPTURE_CHANNEL_TYPE_PCM;
  519. break;
  520. case CX18_ENC_STREAM_TYPE_VBI:
  521. #ifdef CX18_ENCODER_PARSES_SLICED
  522. captype = cx18_raw_vbi(cx) ?
  523. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  524. #else
  525. /*
  526. * Currently we set things up so that Sliced VBI from the
  527. * digitizer is handled as Raw VBI by the encoder
  528. */
  529. captype = CAPTURE_CHANNEL_TYPE_VBI;
  530. #endif
  531. cx->vbi.frame = 0;
  532. cx->vbi.inserted_frame = 0;
  533. memset(cx->vbi.sliced_mpeg_size,
  534. 0, sizeof(cx->vbi.sliced_mpeg_size));
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. /* Clear Streamoff flags in case left from last capture */
  540. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  541. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  542. s->handle = data[0];
  543. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  544. /*
  545. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  546. * set up all the parameters, as it is not obvious which parameters the
  547. * firmware shares across capture channel types and which it does not.
  548. *
  549. * Some of the cx18_vapi() calls below apply to only certain capture
  550. * channel types. We're hoping there's no harm in calling most of them
  551. * anyway, as long as the values are all consistent. Setting some
  552. * shared parameters will have no effect once an analog capture channel
  553. * has started streaming.
  554. */
  555. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  556. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  557. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  558. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  559. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  560. /*
  561. * Audio related reset according to
  562. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  563. */
  564. if (atomic_read(&cx->ana_capturing) == 0)
  565. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  566. s->handle, 12);
  567. /*
  568. * Number of lines for Field 1 & Field 2 according to
  569. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  570. * Field 1 is 312 for 625 line systems in BT.656
  571. * Field 2 is 313 for 625 line systems in BT.656
  572. */
  573. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  574. s->handle, 312, 313);
  575. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  576. cx18_vbi_setup(s);
  577. /*
  578. * assign program index info.
  579. * Mask 7: select I/P/B, Num_req: 400 max
  580. * FIXME - currently we have this hardcoded as disabled
  581. */
  582. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
  583. /* Call out to the common CX2341x API setup for user controls */
  584. priv.cx = cx;
  585. priv.s = s;
  586. cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
  587. /*
  588. * When starting a capture and we're set for radio,
  589. * ensure the video is muted, despite the user control.
  590. */
  591. if (!cx->params.video_mute &&
  592. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  593. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  594. (cx->params.video_mute_yuv << 8) | 1);
  595. }
  596. if (atomic_read(&cx->tot_capturing) == 0) {
  597. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  598. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  599. }
  600. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  601. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  602. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  603. /* Init all the cpu_mdls for this stream */
  604. cx18_flush_queues(s);
  605. spin_lock(&s->q_free.lock);
  606. list_for_each_entry(buf, &s->q_free.list, list) {
  607. cx18_writel(cx, buf->dma_handle,
  608. &cx->scb->cpu_mdl[buf->id].paddr);
  609. cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
  610. }
  611. spin_unlock(&s->q_free.lock);
  612. _cx18_stream_load_fw_queue(s);
  613. /* begin_capture */
  614. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  615. CX18_DEBUG_WARN("Error starting capture!\n");
  616. /* Ensure we're really not capturing before releasing MDLs */
  617. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  618. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  619. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  620. else
  621. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  622. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  623. /* FIXME - CX18_F_S_STREAMOFF as well? */
  624. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  625. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  626. s->handle = CX18_INVALID_TASK_HANDLE;
  627. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  628. if (atomic_read(&cx->tot_capturing) == 0) {
  629. set_bit(CX18_F_I_EOS, &cx->i_flags);
  630. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  631. }
  632. return -EINVAL;
  633. }
  634. /* you're live! sit back and await interrupts :) */
  635. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  636. atomic_inc(&cx->ana_capturing);
  637. atomic_inc(&cx->tot_capturing);
  638. return 0;
  639. }
  640. void cx18_stop_all_captures(struct cx18 *cx)
  641. {
  642. int i;
  643. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  644. struct cx18_stream *s = &cx->streams[i];
  645. if (s->video_dev == NULL && s->dvb.enabled == 0)
  646. continue;
  647. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  648. cx18_stop_v4l2_encode_stream(s, 0);
  649. }
  650. }
  651. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  652. {
  653. struct cx18 *cx = s->cx;
  654. unsigned long then;
  655. if (s->video_dev == NULL && s->dvb.enabled == 0)
  656. return -EINVAL;
  657. /* This function assumes that you are allowed to stop the capture
  658. and that we are actually capturing */
  659. CX18_DEBUG_INFO("Stop Capture\n");
  660. if (atomic_read(&cx->tot_capturing) == 0)
  661. return 0;
  662. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  663. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  664. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  665. else
  666. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  667. then = jiffies;
  668. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  669. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  670. }
  671. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  672. atomic_dec(&cx->ana_capturing);
  673. atomic_dec(&cx->tot_capturing);
  674. /* Clear capture and no-read bits */
  675. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  676. /* Tell the CX23418 it can't use our buffers anymore */
  677. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  678. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  679. s->handle = CX18_INVALID_TASK_HANDLE;
  680. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  681. if (atomic_read(&cx->tot_capturing) > 0)
  682. return 0;
  683. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  684. wake_up(&s->waitq);
  685. return 0;
  686. }
  687. u32 cx18_find_handle(struct cx18 *cx)
  688. {
  689. int i;
  690. /* find first available handle to be used for global settings */
  691. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  692. struct cx18_stream *s = &cx->streams[i];
  693. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  694. return s->handle;
  695. }
  696. return CX18_INVALID_TASK_HANDLE;
  697. }
  698. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  699. {
  700. int i;
  701. struct cx18_stream *s;
  702. if (handle == CX18_INVALID_TASK_HANDLE)
  703. return NULL;
  704. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  705. s = &cx->streams[i];
  706. if (s->handle != handle)
  707. continue;
  708. if (s->video_dev || s->dvb.enabled)
  709. return s;
  710. }
  711. return NULL;
  712. }