lp8788-ldo.c 17 KB

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  1. /*
  2. * TI LP8788 MFD - ldo regulator driver
  3. *
  4. * Copyright 2012 Texas Instruments
  5. *
  6. * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regulator/driver.h>
  18. #include <linux/gpio.h>
  19. #include <linux/mfd/lp8788.h>
  20. /* register address */
  21. #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */
  22. #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */
  23. #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */
  24. #define LP8788_EN_SEL 0x10
  25. #define LP8788_DLDO1_VOUT 0x2E
  26. #define LP8788_DLDO2_VOUT 0x2F
  27. #define LP8788_DLDO3_VOUT 0x30
  28. #define LP8788_DLDO4_VOUT 0x31
  29. #define LP8788_DLDO5_VOUT 0x32
  30. #define LP8788_DLDO6_VOUT 0x33
  31. #define LP8788_DLDO7_VOUT 0x34
  32. #define LP8788_DLDO8_VOUT 0x35
  33. #define LP8788_DLDO9_VOUT 0x36
  34. #define LP8788_DLDO10_VOUT 0x37
  35. #define LP8788_DLDO11_VOUT 0x38
  36. #define LP8788_DLDO12_VOUT 0x39
  37. #define LP8788_ALDO1_VOUT 0x3A
  38. #define LP8788_ALDO2_VOUT 0x3B
  39. #define LP8788_ALDO3_VOUT 0x3C
  40. #define LP8788_ALDO4_VOUT 0x3D
  41. #define LP8788_ALDO5_VOUT 0x3E
  42. #define LP8788_ALDO6_VOUT 0x3F
  43. #define LP8788_ALDO7_VOUT 0x40
  44. #define LP8788_ALDO8_VOUT 0x41
  45. #define LP8788_ALDO9_VOUT 0x42
  46. #define LP8788_ALDO10_VOUT 0x43
  47. #define LP8788_DLDO1_TIMESTEP 0x44
  48. /* mask/shift bits */
  49. #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */
  50. #define LP8788_EN_DLDO2_M BIT(1)
  51. #define LP8788_EN_DLDO3_M BIT(2)
  52. #define LP8788_EN_DLDO4_M BIT(3)
  53. #define LP8788_EN_DLDO5_M BIT(4)
  54. #define LP8788_EN_DLDO6_M BIT(5)
  55. #define LP8788_EN_DLDO7_M BIT(6)
  56. #define LP8788_EN_DLDO8_M BIT(7)
  57. #define LP8788_EN_DLDO9_M BIT(0)
  58. #define LP8788_EN_DLDO10_M BIT(1)
  59. #define LP8788_EN_DLDO11_M BIT(2)
  60. #define LP8788_EN_DLDO12_M BIT(3)
  61. #define LP8788_EN_ALDO1_M BIT(4)
  62. #define LP8788_EN_ALDO2_M BIT(5)
  63. #define LP8788_EN_ALDO3_M BIT(6)
  64. #define LP8788_EN_ALDO4_M BIT(7)
  65. #define LP8788_EN_ALDO5_M BIT(0)
  66. #define LP8788_EN_ALDO6_M BIT(1)
  67. #define LP8788_EN_ALDO7_M BIT(2)
  68. #define LP8788_EN_ALDO8_M BIT(3)
  69. #define LP8788_EN_ALDO9_M BIT(4)
  70. #define LP8788_EN_ALDO10_M BIT(5)
  71. #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */
  72. #define LP8788_EN_SEL_DLDO7_M BIT(1)
  73. #define LP8788_EN_SEL_ALDO7_M BIT(2)
  74. #define LP8788_EN_SEL_ALDO5_M BIT(3)
  75. #define LP8788_EN_SEL_ALDO234_M BIT(4)
  76. #define LP8788_EN_SEL_ALDO1_M BIT(5)
  77. #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */
  78. #define LP8788_VOUT_4BIT_M 0x0F
  79. #define LP8788_VOUT_3BIT_M 0x07
  80. #define LP8788_VOUT_1BIT_M 0x01
  81. #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */
  82. #define LP8788_STARTUP_TIME_S 3
  83. #define ENABLE_TIME_USEC 32
  84. #define ENABLE GPIOF_OUT_INIT_HIGH
  85. #define DISABLE GPIOF_OUT_INIT_LOW
  86. enum lp8788_ldo_id {
  87. DLDO1,
  88. DLDO2,
  89. DLDO3,
  90. DLDO4,
  91. DLDO5,
  92. DLDO6,
  93. DLDO7,
  94. DLDO8,
  95. DLDO9,
  96. DLDO10,
  97. DLDO11,
  98. DLDO12,
  99. ALDO1,
  100. ALDO2,
  101. ALDO3,
  102. ALDO4,
  103. ALDO5,
  104. ALDO6,
  105. ALDO7,
  106. ALDO8,
  107. ALDO9,
  108. ALDO10,
  109. };
  110. struct lp8788_ldo {
  111. struct lp8788 *lp;
  112. struct regulator_desc *desc;
  113. struct regulator_dev *regulator;
  114. struct lp8788_ldo_enable_pin *en_pin;
  115. };
  116. /* DLDO 1, 2, 3, 9 voltage table */
  117. static const int lp8788_dldo1239_vtbl[] = {
  118. 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
  119. 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000,
  120. 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
  121. 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
  122. };
  123. /* DLDO 4 voltage table */
  124. static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 };
  125. /* DLDO 5, 7, 8 and ALDO 6 voltage table */
  126. static const int lp8788_dldo578_aldo6_vtbl[] = {
  127. 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
  128. 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000,
  129. };
  130. /* DLDO 6 voltage table */
  131. static const int lp8788_dldo6_vtbl[] = {
  132. 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000,
  133. };
  134. /* DLDO 10, 11 voltage table */
  135. static const int lp8788_dldo1011_vtbl[] = {
  136. 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000,
  137. 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000,
  138. };
  139. /* ALDO 1 voltage table */
  140. static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 };
  141. /* ALDO 7 voltage table */
  142. static const int lp8788_aldo7_vtbl[] = {
  143. 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
  144. };
  145. static enum lp8788_ldo_id lp8788_dldo_id[] = {
  146. DLDO1,
  147. DLDO2,
  148. DLDO3,
  149. DLDO4,
  150. DLDO5,
  151. DLDO6,
  152. DLDO7,
  153. DLDO8,
  154. DLDO9,
  155. DLDO10,
  156. DLDO11,
  157. DLDO12,
  158. };
  159. static enum lp8788_ldo_id lp8788_aldo_id[] = {
  160. ALDO1,
  161. ALDO2,
  162. ALDO3,
  163. ALDO4,
  164. ALDO5,
  165. ALDO6,
  166. ALDO7,
  167. ALDO8,
  168. ALDO9,
  169. ALDO10,
  170. };
  171. static int lp8788_ldo_enable_time(struct regulator_dev *rdev)
  172. {
  173. struct lp8788_ldo *ldo = rdev_get_drvdata(rdev);
  174. enum lp8788_ldo_id id = rdev_get_id(rdev);
  175. u8 val, addr = LP8788_DLDO1_TIMESTEP + id;
  176. if (lp8788_read_byte(ldo->lp, addr, &val))
  177. return -EINVAL;
  178. val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S;
  179. return ENABLE_TIME_USEC * val;
  180. }
  181. static int lp8788_ldo_fixed_get_voltage(struct regulator_dev *rdev)
  182. {
  183. enum lp8788_ldo_id id = rdev_get_id(rdev);
  184. switch (id) {
  185. case ALDO2 ... ALDO5:
  186. return 2850000;
  187. case DLDO12:
  188. case ALDO8 ... ALDO9:
  189. return 2500000;
  190. case ALDO10:
  191. return 1100000;
  192. default:
  193. return -EINVAL;
  194. }
  195. }
  196. static struct regulator_ops lp8788_ldo_voltage_table_ops = {
  197. .list_voltage = regulator_list_voltage_table,
  198. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  199. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  200. .enable = regulator_enable_regmap,
  201. .disable = regulator_disable_regmap,
  202. .is_enabled = regulator_is_enabled_regmap,
  203. .enable_time = lp8788_ldo_enable_time,
  204. };
  205. static struct regulator_ops lp8788_ldo_voltage_fixed_ops = {
  206. .get_voltage = lp8788_ldo_fixed_get_voltage,
  207. .enable = regulator_enable_regmap,
  208. .disable = regulator_disable_regmap,
  209. .is_enabled = regulator_is_enabled_regmap,
  210. .enable_time = lp8788_ldo_enable_time,
  211. };
  212. static struct regulator_desc lp8788_dldo_desc[] = {
  213. {
  214. .name = "dldo1",
  215. .id = DLDO1,
  216. .ops = &lp8788_ldo_voltage_table_ops,
  217. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  218. .volt_table = lp8788_dldo1239_vtbl,
  219. .type = REGULATOR_VOLTAGE,
  220. .owner = THIS_MODULE,
  221. .vsel_reg = LP8788_DLDO1_VOUT,
  222. .vsel_mask = LP8788_VOUT_5BIT_M,
  223. .enable_reg = LP8788_EN_LDO_A,
  224. .enable_mask = LP8788_EN_DLDO1_M,
  225. },
  226. {
  227. .name = "dldo2",
  228. .id = DLDO2,
  229. .ops = &lp8788_ldo_voltage_table_ops,
  230. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  231. .volt_table = lp8788_dldo1239_vtbl,
  232. .type = REGULATOR_VOLTAGE,
  233. .owner = THIS_MODULE,
  234. .vsel_reg = LP8788_DLDO2_VOUT,
  235. .vsel_mask = LP8788_VOUT_5BIT_M,
  236. .enable_reg = LP8788_EN_LDO_A,
  237. .enable_mask = LP8788_EN_DLDO2_M,
  238. },
  239. {
  240. .name = "dldo3",
  241. .id = DLDO3,
  242. .ops = &lp8788_ldo_voltage_table_ops,
  243. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  244. .volt_table = lp8788_dldo1239_vtbl,
  245. .type = REGULATOR_VOLTAGE,
  246. .owner = THIS_MODULE,
  247. .vsel_reg = LP8788_DLDO3_VOUT,
  248. .vsel_mask = LP8788_VOUT_5BIT_M,
  249. .enable_reg = LP8788_EN_LDO_A,
  250. .enable_mask = LP8788_EN_DLDO3_M,
  251. },
  252. {
  253. .name = "dldo4",
  254. .id = DLDO4,
  255. .ops = &lp8788_ldo_voltage_table_ops,
  256. .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl),
  257. .volt_table = lp8788_dldo4_vtbl,
  258. .type = REGULATOR_VOLTAGE,
  259. .owner = THIS_MODULE,
  260. .vsel_reg = LP8788_DLDO4_VOUT,
  261. .vsel_mask = LP8788_VOUT_1BIT_M,
  262. .enable_reg = LP8788_EN_LDO_A,
  263. .enable_mask = LP8788_EN_DLDO4_M,
  264. },
  265. {
  266. .name = "dldo5",
  267. .id = DLDO5,
  268. .ops = &lp8788_ldo_voltage_table_ops,
  269. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  270. .volt_table = lp8788_dldo578_aldo6_vtbl,
  271. .type = REGULATOR_VOLTAGE,
  272. .owner = THIS_MODULE,
  273. .vsel_reg = LP8788_DLDO5_VOUT,
  274. .vsel_mask = LP8788_VOUT_4BIT_M,
  275. .enable_reg = LP8788_EN_LDO_A,
  276. .enable_mask = LP8788_EN_DLDO5_M,
  277. },
  278. {
  279. .name = "dldo6",
  280. .id = DLDO6,
  281. .ops = &lp8788_ldo_voltage_table_ops,
  282. .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl),
  283. .volt_table = lp8788_dldo6_vtbl,
  284. .type = REGULATOR_VOLTAGE,
  285. .owner = THIS_MODULE,
  286. .vsel_reg = LP8788_DLDO6_VOUT,
  287. .vsel_mask = LP8788_VOUT_3BIT_M,
  288. .enable_reg = LP8788_EN_LDO_A,
  289. .enable_mask = LP8788_EN_DLDO6_M,
  290. },
  291. {
  292. .name = "dldo7",
  293. .id = DLDO7,
  294. .ops = &lp8788_ldo_voltage_table_ops,
  295. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  296. .volt_table = lp8788_dldo578_aldo6_vtbl,
  297. .type = REGULATOR_VOLTAGE,
  298. .owner = THIS_MODULE,
  299. .vsel_reg = LP8788_DLDO7_VOUT,
  300. .vsel_mask = LP8788_VOUT_4BIT_M,
  301. .enable_reg = LP8788_EN_LDO_A,
  302. .enable_mask = LP8788_EN_DLDO7_M,
  303. },
  304. {
  305. .name = "dldo8",
  306. .id = DLDO8,
  307. .ops = &lp8788_ldo_voltage_table_ops,
  308. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  309. .volt_table = lp8788_dldo578_aldo6_vtbl,
  310. .type = REGULATOR_VOLTAGE,
  311. .owner = THIS_MODULE,
  312. .vsel_reg = LP8788_DLDO8_VOUT,
  313. .vsel_mask = LP8788_VOUT_4BIT_M,
  314. .enable_reg = LP8788_EN_LDO_A,
  315. .enable_mask = LP8788_EN_DLDO8_M,
  316. },
  317. {
  318. .name = "dldo9",
  319. .id = DLDO9,
  320. .ops = &lp8788_ldo_voltage_table_ops,
  321. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  322. .volt_table = lp8788_dldo1239_vtbl,
  323. .type = REGULATOR_VOLTAGE,
  324. .owner = THIS_MODULE,
  325. .vsel_reg = LP8788_DLDO9_VOUT,
  326. .vsel_mask = LP8788_VOUT_5BIT_M,
  327. .enable_reg = LP8788_EN_LDO_B,
  328. .enable_mask = LP8788_EN_DLDO9_M,
  329. },
  330. {
  331. .name = "dldo10",
  332. .id = DLDO10,
  333. .ops = &lp8788_ldo_voltage_table_ops,
  334. .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
  335. .volt_table = lp8788_dldo1011_vtbl,
  336. .type = REGULATOR_VOLTAGE,
  337. .owner = THIS_MODULE,
  338. .vsel_reg = LP8788_DLDO10_VOUT,
  339. .vsel_mask = LP8788_VOUT_4BIT_M,
  340. .enable_reg = LP8788_EN_LDO_B,
  341. .enable_mask = LP8788_EN_DLDO10_M,
  342. },
  343. {
  344. .name = "dldo11",
  345. .id = DLDO11,
  346. .ops = &lp8788_ldo_voltage_table_ops,
  347. .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
  348. .volt_table = lp8788_dldo1011_vtbl,
  349. .type = REGULATOR_VOLTAGE,
  350. .owner = THIS_MODULE,
  351. .vsel_reg = LP8788_DLDO11_VOUT,
  352. .vsel_mask = LP8788_VOUT_4BIT_M,
  353. .enable_reg = LP8788_EN_LDO_B,
  354. .enable_mask = LP8788_EN_DLDO11_M,
  355. },
  356. {
  357. .name = "dldo12",
  358. .id = DLDO12,
  359. .ops = &lp8788_ldo_voltage_fixed_ops,
  360. .n_voltages = 1,
  361. .type = REGULATOR_VOLTAGE,
  362. .owner = THIS_MODULE,
  363. .enable_reg = LP8788_EN_LDO_B,
  364. .enable_mask = LP8788_EN_DLDO12_M,
  365. },
  366. };
  367. static struct regulator_desc lp8788_aldo_desc[] = {
  368. {
  369. .name = "aldo1",
  370. .id = ALDO1,
  371. .ops = &lp8788_ldo_voltage_table_ops,
  372. .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl),
  373. .volt_table = lp8788_aldo1_vtbl,
  374. .type = REGULATOR_VOLTAGE,
  375. .owner = THIS_MODULE,
  376. .vsel_reg = LP8788_ALDO1_VOUT,
  377. .vsel_mask = LP8788_VOUT_1BIT_M,
  378. .enable_reg = LP8788_EN_LDO_B,
  379. .enable_mask = LP8788_EN_ALDO1_M,
  380. },
  381. {
  382. .name = "aldo2",
  383. .id = ALDO2,
  384. .ops = &lp8788_ldo_voltage_fixed_ops,
  385. .n_voltages = 1,
  386. .type = REGULATOR_VOLTAGE,
  387. .owner = THIS_MODULE,
  388. .enable_reg = LP8788_EN_LDO_B,
  389. .enable_mask = LP8788_EN_ALDO2_M,
  390. },
  391. {
  392. .name = "aldo3",
  393. .id = ALDO3,
  394. .ops = &lp8788_ldo_voltage_fixed_ops,
  395. .n_voltages = 1,
  396. .type = REGULATOR_VOLTAGE,
  397. .owner = THIS_MODULE,
  398. .enable_reg = LP8788_EN_LDO_B,
  399. .enable_mask = LP8788_EN_ALDO3_M,
  400. },
  401. {
  402. .name = "aldo4",
  403. .id = ALDO4,
  404. .ops = &lp8788_ldo_voltage_fixed_ops,
  405. .n_voltages = 1,
  406. .type = REGULATOR_VOLTAGE,
  407. .owner = THIS_MODULE,
  408. .enable_reg = LP8788_EN_LDO_B,
  409. .enable_mask = LP8788_EN_ALDO4_M,
  410. },
  411. {
  412. .name = "aldo5",
  413. .id = ALDO5,
  414. .ops = &lp8788_ldo_voltage_fixed_ops,
  415. .n_voltages = 1,
  416. .type = REGULATOR_VOLTAGE,
  417. .owner = THIS_MODULE,
  418. .enable_reg = LP8788_EN_LDO_C,
  419. .enable_mask = LP8788_EN_ALDO5_M,
  420. },
  421. {
  422. .name = "aldo6",
  423. .id = ALDO6,
  424. .ops = &lp8788_ldo_voltage_table_ops,
  425. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  426. .volt_table = lp8788_dldo578_aldo6_vtbl,
  427. .type = REGULATOR_VOLTAGE,
  428. .owner = THIS_MODULE,
  429. .vsel_reg = LP8788_ALDO6_VOUT,
  430. .vsel_mask = LP8788_VOUT_4BIT_M,
  431. .enable_reg = LP8788_EN_LDO_C,
  432. .enable_mask = LP8788_EN_ALDO6_M,
  433. },
  434. {
  435. .name = "aldo7",
  436. .id = ALDO7,
  437. .ops = &lp8788_ldo_voltage_table_ops,
  438. .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl),
  439. .volt_table = lp8788_aldo7_vtbl,
  440. .type = REGULATOR_VOLTAGE,
  441. .owner = THIS_MODULE,
  442. .vsel_reg = LP8788_ALDO7_VOUT,
  443. .vsel_mask = LP8788_VOUT_3BIT_M,
  444. .enable_reg = LP8788_EN_LDO_C,
  445. .enable_mask = LP8788_EN_ALDO7_M,
  446. },
  447. {
  448. .name = "aldo8",
  449. .id = ALDO8,
  450. .ops = &lp8788_ldo_voltage_fixed_ops,
  451. .n_voltages = 1,
  452. .type = REGULATOR_VOLTAGE,
  453. .owner = THIS_MODULE,
  454. .enable_reg = LP8788_EN_LDO_C,
  455. .enable_mask = LP8788_EN_ALDO8_M,
  456. },
  457. {
  458. .name = "aldo9",
  459. .id = ALDO9,
  460. .ops = &lp8788_ldo_voltage_fixed_ops,
  461. .n_voltages = 1,
  462. .type = REGULATOR_VOLTAGE,
  463. .owner = THIS_MODULE,
  464. .enable_reg = LP8788_EN_LDO_C,
  465. .enable_mask = LP8788_EN_ALDO9_M,
  466. },
  467. {
  468. .name = "aldo10",
  469. .id = ALDO10,
  470. .ops = &lp8788_ldo_voltage_fixed_ops,
  471. .n_voltages = 1,
  472. .type = REGULATOR_VOLTAGE,
  473. .owner = THIS_MODULE,
  474. .enable_reg = LP8788_EN_LDO_C,
  475. .enable_mask = LP8788_EN_ALDO10_M,
  476. },
  477. };
  478. static int lp8788_config_ldo_enable_mode(struct platform_device *pdev,
  479. struct lp8788_ldo *ldo,
  480. enum lp8788_ldo_id id)
  481. {
  482. struct lp8788 *lp = ldo->lp;
  483. struct lp8788_platform_data *pdata = lp->pdata;
  484. enum lp8788_ext_ldo_en_id enable_id;
  485. u8 en_mask[] = {
  486. [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M,
  487. [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M,
  488. [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M,
  489. [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M,
  490. [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M,
  491. [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M,
  492. };
  493. switch (id) {
  494. case DLDO7:
  495. enable_id = EN_DLDO7;
  496. break;
  497. case DLDO9:
  498. case DLDO11:
  499. enable_id = EN_DLDO911;
  500. break;
  501. case ALDO1:
  502. enable_id = EN_ALDO1;
  503. break;
  504. case ALDO2 ... ALDO4:
  505. enable_id = EN_ALDO234;
  506. break;
  507. case ALDO5:
  508. enable_id = EN_ALDO5;
  509. break;
  510. case ALDO7:
  511. enable_id = EN_ALDO7;
  512. break;
  513. default:
  514. return 0;
  515. }
  516. /* if no platform data for ldo pin, then set default enable mode */
  517. if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id])
  518. goto set_default_ldo_enable_mode;
  519. ldo->en_pin = pdata->ldo_pin[enable_id];
  520. return 0;
  521. set_default_ldo_enable_mode:
  522. return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0);
  523. }
  524. static int lp8788_dldo_probe(struct platform_device *pdev)
  525. {
  526. struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
  527. int id = pdev->id;
  528. struct lp8788_ldo *ldo;
  529. struct regulator_config cfg = { };
  530. struct regulator_dev *rdev;
  531. int ret;
  532. ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
  533. if (!ldo)
  534. return -ENOMEM;
  535. ldo->lp = lp;
  536. ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_dldo_id[id]);
  537. if (ret)
  538. return ret;
  539. if (ldo->en_pin) {
  540. cfg.ena_gpio = ldo->en_pin->gpio;
  541. cfg.ena_gpio_flags = ldo->en_pin->init_state;
  542. }
  543. cfg.dev = pdev->dev.parent;
  544. cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL;
  545. cfg.driver_data = ldo;
  546. cfg.regmap = lp->regmap;
  547. rdev = regulator_register(&lp8788_dldo_desc[id], &cfg);
  548. if (IS_ERR(rdev)) {
  549. ret = PTR_ERR(rdev);
  550. dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n",
  551. id + 1, ret);
  552. return ret;
  553. }
  554. ldo->regulator = rdev;
  555. platform_set_drvdata(pdev, ldo);
  556. return 0;
  557. }
  558. static int lp8788_dldo_remove(struct platform_device *pdev)
  559. {
  560. struct lp8788_ldo *ldo = platform_get_drvdata(pdev);
  561. platform_set_drvdata(pdev, NULL);
  562. regulator_unregister(ldo->regulator);
  563. return 0;
  564. }
  565. static struct platform_driver lp8788_dldo_driver = {
  566. .probe = lp8788_dldo_probe,
  567. .remove = lp8788_dldo_remove,
  568. .driver = {
  569. .name = LP8788_DEV_DLDO,
  570. .owner = THIS_MODULE,
  571. },
  572. };
  573. static int lp8788_aldo_probe(struct platform_device *pdev)
  574. {
  575. struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
  576. int id = pdev->id;
  577. struct lp8788_ldo *ldo;
  578. struct regulator_config cfg = { };
  579. struct regulator_dev *rdev;
  580. int ret;
  581. ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
  582. if (!ldo)
  583. return -ENOMEM;
  584. ldo->lp = lp;
  585. ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_aldo_id[id]);
  586. if (ret)
  587. return ret;
  588. if (ldo->en_pin) {
  589. cfg.ena_gpio = ldo->en_pin->gpio;
  590. cfg.ena_gpio_flags = ldo->en_pin->init_state;
  591. }
  592. cfg.dev = pdev->dev.parent;
  593. cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL;
  594. cfg.driver_data = ldo;
  595. cfg.regmap = lp->regmap;
  596. rdev = regulator_register(&lp8788_aldo_desc[id], &cfg);
  597. if (IS_ERR(rdev)) {
  598. ret = PTR_ERR(rdev);
  599. dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n",
  600. id + 1, ret);
  601. return ret;
  602. }
  603. ldo->regulator = rdev;
  604. platform_set_drvdata(pdev, ldo);
  605. return 0;
  606. }
  607. static int lp8788_aldo_remove(struct platform_device *pdev)
  608. {
  609. struct lp8788_ldo *ldo = platform_get_drvdata(pdev);
  610. platform_set_drvdata(pdev, NULL);
  611. regulator_unregister(ldo->regulator);
  612. return 0;
  613. }
  614. static struct platform_driver lp8788_aldo_driver = {
  615. .probe = lp8788_aldo_probe,
  616. .remove = lp8788_aldo_remove,
  617. .driver = {
  618. .name = LP8788_DEV_ALDO,
  619. .owner = THIS_MODULE,
  620. },
  621. };
  622. static int __init lp8788_ldo_init(void)
  623. {
  624. int ret;
  625. ret = platform_driver_register(&lp8788_dldo_driver);
  626. if (ret)
  627. return ret;
  628. return platform_driver_register(&lp8788_aldo_driver);
  629. }
  630. subsys_initcall(lp8788_ldo_init);
  631. static void __exit lp8788_ldo_exit(void)
  632. {
  633. platform_driver_unregister(&lp8788_aldo_driver);
  634. platform_driver_unregister(&lp8788_dldo_driver);
  635. }
  636. module_exit(lp8788_ldo_exit);
  637. MODULE_DESCRIPTION("TI LP8788 LDO Driver");
  638. MODULE_AUTHOR("Milo Kim");
  639. MODULE_LICENSE("GPL");
  640. MODULE_ALIAS("platform:lp8788-dldo");
  641. MODULE_ALIAS("platform:lp8788-aldo");