acpi-cpufreq.c 25 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/slab.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <linux/uaccess.h>
  40. #include <acpi/processor.h>
  41. #include <asm/msr.h>
  42. #include <asm/processor.h>
  43. #include <asm/cpufeature.h>
  44. #include "mperf.h"
  45. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  46. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  47. MODULE_LICENSE("GPL");
  48. #define PFX "acpi-cpufreq: "
  49. enum {
  50. UNDEFINED_CAPABLE = 0,
  51. SYSTEM_INTEL_MSR_CAPABLE,
  52. SYSTEM_AMD_MSR_CAPABLE,
  53. SYSTEM_IO_CAPABLE,
  54. };
  55. #define INTEL_MSR_RANGE (0xffff)
  56. #define AMD_MSR_RANGE (0x7)
  57. #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
  58. struct acpi_cpufreq_data {
  59. struct acpi_processor_performance *acpi_data;
  60. struct cpufreq_frequency_table *freq_table;
  61. unsigned int resume;
  62. unsigned int cpu_feature;
  63. };
  64. static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
  65. /* acpi_perf_data is a pointer to percpu data. */
  66. static struct acpi_processor_performance __percpu *acpi_perf_data;
  67. static struct cpufreq_driver acpi_cpufreq_driver;
  68. static unsigned int acpi_pstate_strict;
  69. static bool boost_enabled, boost_supported;
  70. static struct msr __percpu *msrs;
  71. static bool boost_state(unsigned int cpu)
  72. {
  73. u32 lo, hi;
  74. u64 msr;
  75. switch (boot_cpu_data.x86_vendor) {
  76. case X86_VENDOR_INTEL:
  77. rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  78. msr = lo | ((u64)hi << 32);
  79. return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  80. case X86_VENDOR_AMD:
  81. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  82. msr = lo | ((u64)hi << 32);
  83. return !(msr & MSR_K7_HWCR_CPB_DIS);
  84. }
  85. return false;
  86. }
  87. static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
  88. {
  89. u32 cpu;
  90. u32 msr_addr;
  91. u64 msr_mask;
  92. switch (boot_cpu_data.x86_vendor) {
  93. case X86_VENDOR_INTEL:
  94. msr_addr = MSR_IA32_MISC_ENABLE;
  95. msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
  96. break;
  97. case X86_VENDOR_AMD:
  98. msr_addr = MSR_K7_HWCR;
  99. msr_mask = MSR_K7_HWCR_CPB_DIS;
  100. break;
  101. default:
  102. return;
  103. }
  104. rdmsr_on_cpus(cpumask, msr_addr, msrs);
  105. for_each_cpu(cpu, cpumask) {
  106. struct msr *reg = per_cpu_ptr(msrs, cpu);
  107. if (enable)
  108. reg->q &= ~msr_mask;
  109. else
  110. reg->q |= msr_mask;
  111. }
  112. wrmsr_on_cpus(cpumask, msr_addr, msrs);
  113. }
  114. static ssize_t _store_boost(const char *buf, size_t count)
  115. {
  116. int ret;
  117. unsigned long val = 0;
  118. if (!boost_supported)
  119. return -EINVAL;
  120. ret = kstrtoul(buf, 10, &val);
  121. if (ret || (val > 1))
  122. return -EINVAL;
  123. if ((val && boost_enabled) || (!val && !boost_enabled))
  124. return count;
  125. get_online_cpus();
  126. boost_set_msrs(val, cpu_online_mask);
  127. put_online_cpus();
  128. boost_enabled = val;
  129. pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
  130. return count;
  131. }
  132. static ssize_t store_global_boost(struct kobject *kobj, struct attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. return _store_boost(buf, count);
  136. }
  137. static ssize_t show_global_boost(struct kobject *kobj,
  138. struct attribute *attr, char *buf)
  139. {
  140. return sprintf(buf, "%u\n", boost_enabled);
  141. }
  142. static struct global_attr global_boost = __ATTR(boost, 0644,
  143. show_global_boost,
  144. store_global_boost);
  145. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  146. static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
  147. size_t count)
  148. {
  149. return _store_boost(buf, count);
  150. }
  151. static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
  152. {
  153. return sprintf(buf, "%u\n", boost_enabled);
  154. }
  155. static struct freq_attr cpb = __ATTR(cpb, 0644, show_cpb, store_cpb);
  156. #endif
  157. static int check_est_cpu(unsigned int cpuid)
  158. {
  159. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  160. return cpu_has(cpu, X86_FEATURE_EST);
  161. }
  162. static int check_amd_hwpstate_cpu(unsigned int cpuid)
  163. {
  164. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  165. return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
  166. }
  167. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  168. {
  169. struct acpi_processor_performance *perf;
  170. int i;
  171. perf = data->acpi_data;
  172. for (i = 0; i < perf->state_count; i++) {
  173. if (value == perf->states[i].status)
  174. return data->freq_table[i].frequency;
  175. }
  176. return 0;
  177. }
  178. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  179. {
  180. int i;
  181. struct acpi_processor_performance *perf;
  182. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  183. msr &= AMD_MSR_RANGE;
  184. else
  185. msr &= INTEL_MSR_RANGE;
  186. perf = data->acpi_data;
  187. for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
  188. if (msr == perf->states[data->freq_table[i].driver_data].status)
  189. return data->freq_table[i].frequency;
  190. }
  191. return data->freq_table[0].frequency;
  192. }
  193. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  194. {
  195. switch (data->cpu_feature) {
  196. case SYSTEM_INTEL_MSR_CAPABLE:
  197. case SYSTEM_AMD_MSR_CAPABLE:
  198. return extract_msr(val, data);
  199. case SYSTEM_IO_CAPABLE:
  200. return extract_io(val, data);
  201. default:
  202. return 0;
  203. }
  204. }
  205. struct msr_addr {
  206. u32 reg;
  207. };
  208. struct io_addr {
  209. u16 port;
  210. u8 bit_width;
  211. };
  212. struct drv_cmd {
  213. unsigned int type;
  214. const struct cpumask *mask;
  215. union {
  216. struct msr_addr msr;
  217. struct io_addr io;
  218. } addr;
  219. u32 val;
  220. };
  221. /* Called via smp_call_function_single(), on the target CPU */
  222. static void do_drv_read(void *_cmd)
  223. {
  224. struct drv_cmd *cmd = _cmd;
  225. u32 h;
  226. switch (cmd->type) {
  227. case SYSTEM_INTEL_MSR_CAPABLE:
  228. case SYSTEM_AMD_MSR_CAPABLE:
  229. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  230. break;
  231. case SYSTEM_IO_CAPABLE:
  232. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  233. &cmd->val,
  234. (u32)cmd->addr.io.bit_width);
  235. break;
  236. default:
  237. break;
  238. }
  239. }
  240. /* Called via smp_call_function_many(), on the target CPUs */
  241. static void do_drv_write(void *_cmd)
  242. {
  243. struct drv_cmd *cmd = _cmd;
  244. u32 lo, hi;
  245. switch (cmd->type) {
  246. case SYSTEM_INTEL_MSR_CAPABLE:
  247. rdmsr(cmd->addr.msr.reg, lo, hi);
  248. lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
  249. wrmsr(cmd->addr.msr.reg, lo, hi);
  250. break;
  251. case SYSTEM_AMD_MSR_CAPABLE:
  252. wrmsr(cmd->addr.msr.reg, cmd->val, 0);
  253. break;
  254. case SYSTEM_IO_CAPABLE:
  255. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  256. cmd->val,
  257. (u32)cmd->addr.io.bit_width);
  258. break;
  259. default:
  260. break;
  261. }
  262. }
  263. static void drv_read(struct drv_cmd *cmd)
  264. {
  265. int err;
  266. cmd->val = 0;
  267. err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
  268. WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
  269. }
  270. static void drv_write(struct drv_cmd *cmd)
  271. {
  272. int this_cpu;
  273. this_cpu = get_cpu();
  274. if (cpumask_test_cpu(this_cpu, cmd->mask))
  275. do_drv_write(cmd);
  276. smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
  277. put_cpu();
  278. }
  279. static u32 get_cur_val(const struct cpumask *mask)
  280. {
  281. struct acpi_processor_performance *perf;
  282. struct drv_cmd cmd;
  283. if (unlikely(cpumask_empty(mask)))
  284. return 0;
  285. switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
  286. case SYSTEM_INTEL_MSR_CAPABLE:
  287. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  288. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  289. break;
  290. case SYSTEM_AMD_MSR_CAPABLE:
  291. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  292. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  293. break;
  294. case SYSTEM_IO_CAPABLE:
  295. cmd.type = SYSTEM_IO_CAPABLE;
  296. perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
  297. cmd.addr.io.port = perf->control_register.address;
  298. cmd.addr.io.bit_width = perf->control_register.bit_width;
  299. break;
  300. default:
  301. return 0;
  302. }
  303. cmd.mask = mask;
  304. drv_read(&cmd);
  305. pr_debug("get_cur_val = %u\n", cmd.val);
  306. return cmd.val;
  307. }
  308. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  309. {
  310. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
  311. unsigned int freq;
  312. unsigned int cached_freq;
  313. pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
  314. if (unlikely(data == NULL ||
  315. data->acpi_data == NULL || data->freq_table == NULL)) {
  316. return 0;
  317. }
  318. cached_freq = data->freq_table[data->acpi_data->state].frequency;
  319. freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
  320. if (freq != cached_freq) {
  321. /*
  322. * The dreaded BIOS frequency change behind our back.
  323. * Force set the frequency on next target call.
  324. */
  325. data->resume = 1;
  326. }
  327. pr_debug("cur freq = %u\n", freq);
  328. return freq;
  329. }
  330. static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
  331. struct acpi_cpufreq_data *data)
  332. {
  333. unsigned int cur_freq;
  334. unsigned int i;
  335. for (i = 0; i < 100; i++) {
  336. cur_freq = extract_freq(get_cur_val(mask), data);
  337. if (cur_freq == freq)
  338. return 1;
  339. udelay(10);
  340. }
  341. return 0;
  342. }
  343. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  344. unsigned int target_freq, unsigned int relation)
  345. {
  346. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  347. struct acpi_processor_performance *perf;
  348. struct cpufreq_freqs freqs;
  349. struct drv_cmd cmd;
  350. unsigned int next_state = 0; /* Index into freq_table */
  351. unsigned int next_perf_state = 0; /* Index into perf table */
  352. int result = 0;
  353. pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
  354. if (unlikely(data == NULL ||
  355. data->acpi_data == NULL || data->freq_table == NULL)) {
  356. return -ENODEV;
  357. }
  358. perf = data->acpi_data;
  359. result = cpufreq_frequency_table_target(policy,
  360. data->freq_table,
  361. target_freq,
  362. relation, &next_state);
  363. if (unlikely(result)) {
  364. result = -ENODEV;
  365. goto out;
  366. }
  367. next_perf_state = data->freq_table[next_state].driver_data;
  368. if (perf->state == next_perf_state) {
  369. if (unlikely(data->resume)) {
  370. pr_debug("Called after resume, resetting to P%d\n",
  371. next_perf_state);
  372. data->resume = 0;
  373. } else {
  374. pr_debug("Already at target state (P%d)\n",
  375. next_perf_state);
  376. goto out;
  377. }
  378. }
  379. switch (data->cpu_feature) {
  380. case SYSTEM_INTEL_MSR_CAPABLE:
  381. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  382. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  383. cmd.val = (u32) perf->states[next_perf_state].control;
  384. break;
  385. case SYSTEM_AMD_MSR_CAPABLE:
  386. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  387. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  388. cmd.val = (u32) perf->states[next_perf_state].control;
  389. break;
  390. case SYSTEM_IO_CAPABLE:
  391. cmd.type = SYSTEM_IO_CAPABLE;
  392. cmd.addr.io.port = perf->control_register.address;
  393. cmd.addr.io.bit_width = perf->control_register.bit_width;
  394. cmd.val = (u32) perf->states[next_perf_state].control;
  395. break;
  396. default:
  397. result = -ENODEV;
  398. goto out;
  399. }
  400. /* cpufreq holds the hotplug lock, so we are safe from here on */
  401. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  402. cmd.mask = policy->cpus;
  403. else
  404. cmd.mask = cpumask_of(policy->cpu);
  405. freqs.old = perf->states[perf->state].core_frequency * 1000;
  406. freqs.new = data->freq_table[next_state].frequency;
  407. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  408. drv_write(&cmd);
  409. if (acpi_pstate_strict) {
  410. if (!check_freqs(cmd.mask, freqs.new, data)) {
  411. pr_debug("acpi_cpufreq_target failed (%d)\n",
  412. policy->cpu);
  413. result = -EAGAIN;
  414. freqs.new = freqs.old;
  415. }
  416. }
  417. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  418. if (!result)
  419. perf->state = next_perf_state;
  420. out:
  421. return result;
  422. }
  423. static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
  424. {
  425. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  426. pr_debug("acpi_cpufreq_verify\n");
  427. return cpufreq_frequency_table_verify(policy, data->freq_table);
  428. }
  429. static unsigned long
  430. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  431. {
  432. struct acpi_processor_performance *perf = data->acpi_data;
  433. if (cpu_khz) {
  434. /* search the closest match to cpu_khz */
  435. unsigned int i;
  436. unsigned long freq;
  437. unsigned long freqn = perf->states[0].core_frequency * 1000;
  438. for (i = 0; i < (perf->state_count-1); i++) {
  439. freq = freqn;
  440. freqn = perf->states[i+1].core_frequency * 1000;
  441. if ((2 * cpu_khz) > (freqn + freq)) {
  442. perf->state = i;
  443. return freq;
  444. }
  445. }
  446. perf->state = perf->state_count-1;
  447. return freqn;
  448. } else {
  449. /* assume CPU is at P0... */
  450. perf->state = 0;
  451. return perf->states[0].core_frequency * 1000;
  452. }
  453. }
  454. static void free_acpi_perf_data(void)
  455. {
  456. unsigned int i;
  457. /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
  458. for_each_possible_cpu(i)
  459. free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
  460. ->shared_cpu_map);
  461. free_percpu(acpi_perf_data);
  462. }
  463. static int boost_notify(struct notifier_block *nb, unsigned long action,
  464. void *hcpu)
  465. {
  466. unsigned cpu = (long)hcpu;
  467. const struct cpumask *cpumask;
  468. cpumask = get_cpu_mask(cpu);
  469. /*
  470. * Clear the boost-disable bit on the CPU_DOWN path so that
  471. * this cpu cannot block the remaining ones from boosting. On
  472. * the CPU_UP path we simply keep the boost-disable flag in
  473. * sync with the current global state.
  474. */
  475. switch (action) {
  476. case CPU_UP_PREPARE:
  477. case CPU_UP_PREPARE_FROZEN:
  478. boost_set_msrs(boost_enabled, cpumask);
  479. break;
  480. case CPU_DOWN_PREPARE:
  481. case CPU_DOWN_PREPARE_FROZEN:
  482. boost_set_msrs(1, cpumask);
  483. break;
  484. default:
  485. break;
  486. }
  487. return NOTIFY_OK;
  488. }
  489. static struct notifier_block boost_nb = {
  490. .notifier_call = boost_notify,
  491. };
  492. /*
  493. * acpi_cpufreq_early_init - initialize ACPI P-States library
  494. *
  495. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  496. * in order to determine correct frequency and voltage pairings. We can
  497. * do _PDC and _PSD and find out the processor dependency for the
  498. * actual init that will happen later...
  499. */
  500. static int __init acpi_cpufreq_early_init(void)
  501. {
  502. unsigned int i;
  503. pr_debug("acpi_cpufreq_early_init\n");
  504. acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
  505. if (!acpi_perf_data) {
  506. pr_debug("Memory allocation error for acpi_perf_data.\n");
  507. return -ENOMEM;
  508. }
  509. for_each_possible_cpu(i) {
  510. if (!zalloc_cpumask_var_node(
  511. &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
  512. GFP_KERNEL, cpu_to_node(i))) {
  513. /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
  514. free_acpi_perf_data();
  515. return -ENOMEM;
  516. }
  517. }
  518. /* Do initialization in ACPI core */
  519. acpi_processor_preregister_performance(acpi_perf_data);
  520. return 0;
  521. }
  522. #ifdef CONFIG_SMP
  523. /*
  524. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  525. * or do it in BIOS firmware and won't inform about it to OS. If not
  526. * detected, this has a side effect of making CPU run at a different speed
  527. * than OS intended it to run at. Detect it and handle it cleanly.
  528. */
  529. static int bios_with_sw_any_bug;
  530. static int sw_any_bug_found(const struct dmi_system_id *d)
  531. {
  532. bios_with_sw_any_bug = 1;
  533. return 0;
  534. }
  535. static const struct dmi_system_id sw_any_bug_dmi_table[] = {
  536. {
  537. .callback = sw_any_bug_found,
  538. .ident = "Supermicro Server X6DLP",
  539. .matches = {
  540. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  541. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  542. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  543. },
  544. },
  545. { }
  546. };
  547. static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
  548. {
  549. /* Intel Xeon Processor 7100 Series Specification Update
  550. * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
  551. * AL30: A Machine Check Exception (MCE) Occurring during an
  552. * Enhanced Intel SpeedStep Technology Ratio Change May Cause
  553. * Both Processor Cores to Lock Up. */
  554. if (c->x86_vendor == X86_VENDOR_INTEL) {
  555. if ((c->x86 == 15) &&
  556. (c->x86_model == 6) &&
  557. (c->x86_mask == 8)) {
  558. printk(KERN_INFO "acpi-cpufreq: Intel(R) "
  559. "Xeon(R) 7100 Errata AL30, processors may "
  560. "lock up on frequency changes: disabling "
  561. "acpi-cpufreq.\n");
  562. return -ENODEV;
  563. }
  564. }
  565. return 0;
  566. }
  567. #endif
  568. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  569. {
  570. unsigned int i;
  571. unsigned int valid_states = 0;
  572. unsigned int cpu = policy->cpu;
  573. struct acpi_cpufreq_data *data;
  574. unsigned int result = 0;
  575. struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
  576. struct acpi_processor_performance *perf;
  577. #ifdef CONFIG_SMP
  578. static int blacklisted;
  579. #endif
  580. pr_debug("acpi_cpufreq_cpu_init\n");
  581. #ifdef CONFIG_SMP
  582. if (blacklisted)
  583. return blacklisted;
  584. blacklisted = acpi_cpufreq_blacklist(c);
  585. if (blacklisted)
  586. return blacklisted;
  587. #endif
  588. data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
  589. if (!data)
  590. return -ENOMEM;
  591. data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
  592. per_cpu(acfreq_data, cpu) = data;
  593. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  594. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  595. result = acpi_processor_register_performance(data->acpi_data, cpu);
  596. if (result)
  597. goto err_free;
  598. perf = data->acpi_data;
  599. policy->shared_type = perf->shared_type;
  600. /*
  601. * Will let policy->cpus know about dependency only when software
  602. * coordination is required.
  603. */
  604. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  605. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  606. cpumask_copy(policy->cpus, perf->shared_cpu_map);
  607. }
  608. #ifdef CONFIG_SMP
  609. dmi_check_system(sw_any_bug_dmi_table);
  610. if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
  611. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  612. cpumask_copy(policy->cpus, cpu_core_mask(cpu));
  613. }
  614. if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
  615. cpumask_clear(policy->cpus);
  616. cpumask_set_cpu(cpu, policy->cpus);
  617. policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
  618. pr_info_once(PFX "overriding BIOS provided _PSD data\n");
  619. }
  620. #endif
  621. /* capability check */
  622. if (perf->state_count <= 1) {
  623. pr_debug("No P-States\n");
  624. result = -ENODEV;
  625. goto err_unreg;
  626. }
  627. if (perf->control_register.space_id != perf->status_register.space_id) {
  628. result = -ENODEV;
  629. goto err_unreg;
  630. }
  631. switch (perf->control_register.space_id) {
  632. case ACPI_ADR_SPACE_SYSTEM_IO:
  633. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  634. boot_cpu_data.x86 == 0xf) {
  635. pr_debug("AMD K8 systems must use native drivers.\n");
  636. result = -ENODEV;
  637. goto err_unreg;
  638. }
  639. pr_debug("SYSTEM IO addr space\n");
  640. data->cpu_feature = SYSTEM_IO_CAPABLE;
  641. break;
  642. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  643. pr_debug("HARDWARE addr space\n");
  644. if (check_est_cpu(cpu)) {
  645. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  646. break;
  647. }
  648. if (check_amd_hwpstate_cpu(cpu)) {
  649. data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
  650. break;
  651. }
  652. result = -ENODEV;
  653. goto err_unreg;
  654. default:
  655. pr_debug("Unknown addr space %d\n",
  656. (u32) (perf->control_register.space_id));
  657. result = -ENODEV;
  658. goto err_unreg;
  659. }
  660. data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
  661. (perf->state_count+1), GFP_KERNEL);
  662. if (!data->freq_table) {
  663. result = -ENOMEM;
  664. goto err_unreg;
  665. }
  666. /* detect transition latency */
  667. policy->cpuinfo.transition_latency = 0;
  668. for (i = 0; i < perf->state_count; i++) {
  669. if ((perf->states[i].transition_latency * 1000) >
  670. policy->cpuinfo.transition_latency)
  671. policy->cpuinfo.transition_latency =
  672. perf->states[i].transition_latency * 1000;
  673. }
  674. /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
  675. if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
  676. policy->cpuinfo.transition_latency > 20 * 1000) {
  677. policy->cpuinfo.transition_latency = 20 * 1000;
  678. printk_once(KERN_INFO
  679. "P-state transition latency capped at 20 uS\n");
  680. }
  681. /* table init */
  682. for (i = 0; i < perf->state_count; i++) {
  683. if (i > 0 && perf->states[i].core_frequency >=
  684. data->freq_table[valid_states-1].frequency / 1000)
  685. continue;
  686. data->freq_table[valid_states].driver_data = i;
  687. data->freq_table[valid_states].frequency =
  688. perf->states[i].core_frequency * 1000;
  689. valid_states++;
  690. }
  691. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  692. perf->state = 0;
  693. result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
  694. if (result)
  695. goto err_freqfree;
  696. if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
  697. printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
  698. switch (perf->control_register.space_id) {
  699. case ACPI_ADR_SPACE_SYSTEM_IO:
  700. /* Current speed is unknown and not detectable by IO port */
  701. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  702. break;
  703. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  704. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  705. policy->cur = get_cur_freq_on_cpu(cpu);
  706. break;
  707. default:
  708. break;
  709. }
  710. /* notify BIOS that we exist */
  711. acpi_processor_notify_smm(THIS_MODULE);
  712. /* Check for APERF/MPERF support in hardware */
  713. if (boot_cpu_has(X86_FEATURE_APERFMPERF))
  714. acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf;
  715. pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
  716. for (i = 0; i < perf->state_count; i++)
  717. pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
  718. (i == perf->state ? '*' : ' '), i,
  719. (u32) perf->states[i].core_frequency,
  720. (u32) perf->states[i].power,
  721. (u32) perf->states[i].transition_latency);
  722. cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
  723. /*
  724. * the first call to ->target() should result in us actually
  725. * writing something to the appropriate registers.
  726. */
  727. data->resume = 1;
  728. return result;
  729. err_freqfree:
  730. kfree(data->freq_table);
  731. err_unreg:
  732. acpi_processor_unregister_performance(perf, cpu);
  733. err_free:
  734. kfree(data);
  735. per_cpu(acfreq_data, cpu) = NULL;
  736. return result;
  737. }
  738. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  739. {
  740. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  741. pr_debug("acpi_cpufreq_cpu_exit\n");
  742. if (data) {
  743. cpufreq_frequency_table_put_attr(policy->cpu);
  744. per_cpu(acfreq_data, policy->cpu) = NULL;
  745. acpi_processor_unregister_performance(data->acpi_data,
  746. policy->cpu);
  747. kfree(data->freq_table);
  748. kfree(data);
  749. }
  750. return 0;
  751. }
  752. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  753. {
  754. struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
  755. pr_debug("acpi_cpufreq_resume\n");
  756. data->resume = 1;
  757. return 0;
  758. }
  759. static struct freq_attr *acpi_cpufreq_attr[] = {
  760. &cpufreq_freq_attr_scaling_available_freqs,
  761. NULL, /* this is a placeholder for cpb, do not remove */
  762. NULL,
  763. };
  764. static struct cpufreq_driver acpi_cpufreq_driver = {
  765. .verify = acpi_cpufreq_verify,
  766. .target = acpi_cpufreq_target,
  767. .bios_limit = acpi_processor_get_bios_limit,
  768. .init = acpi_cpufreq_cpu_init,
  769. .exit = acpi_cpufreq_cpu_exit,
  770. .resume = acpi_cpufreq_resume,
  771. .name = "acpi-cpufreq",
  772. .owner = THIS_MODULE,
  773. .attr = acpi_cpufreq_attr,
  774. };
  775. static void __init acpi_cpufreq_boost_init(void)
  776. {
  777. if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
  778. msrs = msrs_alloc();
  779. if (!msrs)
  780. return;
  781. boost_supported = true;
  782. boost_enabled = boost_state(0);
  783. get_online_cpus();
  784. /* Force all MSRs to the same value */
  785. boost_set_msrs(boost_enabled, cpu_online_mask);
  786. register_cpu_notifier(&boost_nb);
  787. put_online_cpus();
  788. } else
  789. global_boost.attr.mode = 0444;
  790. /* We create the boost file in any case, though for systems without
  791. * hardware support it will be read-only and hardwired to return 0.
  792. */
  793. if (cpufreq_sysfs_create_file(&(global_boost.attr)))
  794. pr_warn(PFX "could not register global boost sysfs file\n");
  795. else
  796. pr_debug("registered global boost sysfs file\n");
  797. }
  798. static void __exit acpi_cpufreq_boost_exit(void)
  799. {
  800. cpufreq_sysfs_remove_file(&(global_boost.attr));
  801. if (msrs) {
  802. unregister_cpu_notifier(&boost_nb);
  803. msrs_free(msrs);
  804. msrs = NULL;
  805. }
  806. }
  807. static int __init acpi_cpufreq_init(void)
  808. {
  809. int ret;
  810. if (acpi_disabled)
  811. return 0;
  812. pr_debug("acpi_cpufreq_init\n");
  813. ret = acpi_cpufreq_early_init();
  814. if (ret)
  815. return ret;
  816. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  817. /* this is a sysfs file with a strange name and an even stranger
  818. * semantic - per CPU instantiation, but system global effect.
  819. * Lets enable it only on AMD CPUs for compatibility reasons and
  820. * only if configured. This is considered legacy code, which
  821. * will probably be removed at some point in the future.
  822. */
  823. if (check_amd_hwpstate_cpu(0)) {
  824. struct freq_attr **iter;
  825. pr_debug("adding sysfs entry for cpb\n");
  826. for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
  827. ;
  828. /* make sure there is a terminator behind it */
  829. if (iter[1] == NULL)
  830. *iter = &cpb;
  831. }
  832. #endif
  833. ret = cpufreq_register_driver(&acpi_cpufreq_driver);
  834. if (ret)
  835. free_acpi_perf_data();
  836. else
  837. acpi_cpufreq_boost_init();
  838. return ret;
  839. }
  840. static void __exit acpi_cpufreq_exit(void)
  841. {
  842. pr_debug("acpi_cpufreq_exit\n");
  843. acpi_cpufreq_boost_exit();
  844. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  845. free_acpi_perf_data();
  846. }
  847. module_param(acpi_pstate_strict, uint, 0644);
  848. MODULE_PARM_DESC(acpi_pstate_strict,
  849. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  850. "performed during frequency changes.");
  851. late_initcall(acpi_cpufreq_init);
  852. module_exit(acpi_cpufreq_exit);
  853. static const struct x86_cpu_id acpi_cpufreq_ids[] = {
  854. X86_FEATURE_MATCH(X86_FEATURE_ACPI),
  855. X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
  856. {}
  857. };
  858. MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
  859. static const struct acpi_device_id processor_device_ids[] = {
  860. {ACPI_PROCESSOR_OBJECT_HID, },
  861. {ACPI_PROCESSOR_DEVICE_HID, },
  862. {},
  863. };
  864. MODULE_DEVICE_TABLE(acpi, processor_device_ids);
  865. MODULE_ALIAS("acpi");