i915_gem_context.c 10.0 KB

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  1. /*
  2. * Copyright © 2011-2012 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Ben Widawsky <ben@bwidawsk.net>
  25. *
  26. */
  27. /*
  28. * This file implements HW context support. On gen5+ a HW context consists of an
  29. * opaque GPU object which is referenced at times of context saves and restores.
  30. * With RC6 enabled, the context is also referenced as the GPU enters and exists
  31. * from RC6 (GPU has it's own internal power context, except on gen5). Though
  32. * something like a context does exist for the media ring, the code only
  33. * supports contexts for the render ring.
  34. *
  35. * In software, there is a distinction between contexts created by the user,
  36. * and the default HW context. The default HW context is used by GPU clients
  37. * that do not request setup of their own hardware context. The default
  38. * context's state is never restored to help prevent programming errors. This
  39. * would happen if a client ran and piggy-backed off another clients GPU state.
  40. * The default context only exists to give the GPU some offset to load as the
  41. * current to invoke a save of the context we actually care about. In fact, the
  42. * code could likely be constructed, albeit in a more complicated fashion, to
  43. * never use the default context, though that limits the driver's ability to
  44. * swap out, and/or destroy other contexts.
  45. *
  46. * All other contexts are created as a request by the GPU client. These contexts
  47. * store GPU state, and thus allow GPU clients to not re-emit state (and
  48. * potentially query certain state) at any time. The kernel driver makes
  49. * certain that the appropriate commands are inserted.
  50. *
  51. * The context life cycle is semi-complicated in that context BOs may live
  52. * longer than the context itself because of the way the hardware, and object
  53. * tracking works. Below is a very crude representation of the state machine
  54. * describing the context life.
  55. * refcount pincount active
  56. * S0: initial state 0 0 0
  57. * S1: context created 1 0 0
  58. * S2: context is currently running 2 1 X
  59. * S3: GPU referenced, but not current 2 0 1
  60. * S4: context is current, but destroyed 1 1 0
  61. * S5: like S3, but destroyed 1 0 1
  62. *
  63. * The most common (but not all) transitions:
  64. * S0->S1: client creates a context
  65. * S1->S2: client submits execbuf with context
  66. * S2->S3: other clients submits execbuf with context
  67. * S3->S1: context object was retired
  68. * S3->S2: clients submits another execbuf
  69. * S2->S4: context destroy called with current context
  70. * S3->S5->S0: destroy path
  71. * S4->S5->S0: destroy path on current context
  72. *
  73. * There are two confusing terms used above:
  74. * The "current context" means the context which is currently running on the
  75. * GPU. The GPU has loaded it's state already and has stored away the gtt
  76. * offset of the BO. The GPU is not actively referencing the data at this
  77. * offset, but it will on the next context switch. The only way to avoid this
  78. * is to do a GPU reset.
  79. *
  80. * An "active context' is one which was previously the "current context" and is
  81. * on the active list waiting for the next context switch to occur. Until this
  82. * happens, the object must remain at the same gtt offset. It is therefore
  83. * possible to destroy a context, but it is still active.
  84. *
  85. */
  86. #include "drmP.h"
  87. #include "i915_drm.h"
  88. #include "i915_drv.h"
  89. /* This is a HW constraint. The value below is the largest known requirement
  90. * I've seen in a spec to date, and that was a workaround for a non-shipping
  91. * part. It should be safe to decrease this, but it's more future proof as is.
  92. */
  93. #define CONTEXT_ALIGN (64<<10)
  94. static struct i915_hw_context *
  95. i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
  96. static int get_context_size(struct drm_device *dev)
  97. {
  98. struct drm_i915_private *dev_priv = dev->dev_private;
  99. int ret;
  100. u32 reg;
  101. switch (INTEL_INFO(dev)->gen) {
  102. case 6:
  103. reg = I915_READ(CXT_SIZE);
  104. ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
  105. break;
  106. case 7:
  107. reg = I915_READ(GEN7_CTX_SIZE);
  108. ret = GEN7_CTX_TOTAL_SIZE(reg) * 64;
  109. break;
  110. default:
  111. BUG();
  112. }
  113. return ret;
  114. }
  115. static void do_destroy(struct i915_hw_context *ctx)
  116. {
  117. struct drm_device *dev = ctx->obj->base.dev;
  118. struct drm_i915_private *dev_priv = dev->dev_private;
  119. if (ctx->file_priv)
  120. idr_remove(&ctx->file_priv->context_idr, ctx->id);
  121. else
  122. BUG_ON(ctx != dev_priv->ring[RCS].default_context);
  123. drm_gem_object_unreference(&ctx->obj->base);
  124. kfree(ctx);
  125. }
  126. static int
  127. create_hw_context(struct drm_device *dev,
  128. struct drm_i915_file_private *file_priv,
  129. struct i915_hw_context **ctx_out)
  130. {
  131. struct drm_i915_private *dev_priv = dev->dev_private;
  132. int ret, id;
  133. *ctx_out = kzalloc(sizeof(struct drm_i915_file_private), GFP_KERNEL);
  134. if (*ctx_out == NULL)
  135. return -ENOMEM;
  136. (*ctx_out)->obj = i915_gem_alloc_object(dev,
  137. dev_priv->hw_context_size);
  138. if ((*ctx_out)->obj == NULL) {
  139. kfree(*ctx_out);
  140. DRM_DEBUG_DRIVER("Context object allocated failed\n");
  141. return -ENOMEM;
  142. }
  143. /* The ring associated with the context object is handled by the normal
  144. * object tracking code. We give an initial ring value simple to pass an
  145. * assertion in the context switch code.
  146. */
  147. (*ctx_out)->ring = &dev_priv->ring[RCS];
  148. /* Default context will never have a file_priv */
  149. if (file_priv == NULL)
  150. return 0;
  151. (*ctx_out)->file_priv = file_priv;
  152. again:
  153. if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
  154. ret = -ENOMEM;
  155. DRM_DEBUG_DRIVER("idr allocation failed\n");
  156. goto err_out;
  157. }
  158. ret = idr_get_new_above(&file_priv->context_idr, *ctx_out,
  159. DEFAULT_CONTEXT_ID + 1, &id);
  160. if (ret == 0)
  161. (*ctx_out)->id = id;
  162. if (ret == -EAGAIN)
  163. goto again;
  164. else if (ret)
  165. goto err_out;
  166. return 0;
  167. err_out:
  168. do_destroy(*ctx_out);
  169. return ret;
  170. }
  171. /**
  172. * The default context needs to exist per ring that uses contexts. It stores the
  173. * context state of the GPU for applications that don't utilize HW contexts, as
  174. * well as an idle case.
  175. */
  176. static int create_default_context(struct drm_i915_private *dev_priv)
  177. {
  178. struct i915_hw_context *ctx;
  179. int ret;
  180. BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
  181. ret = create_hw_context(dev_priv->dev, NULL,
  182. &dev_priv->ring[RCS].default_context);
  183. if (ret)
  184. return ret;
  185. /* We may need to do things with the shrinker which require us to
  186. * immediately switch back to the default context. This can cause a
  187. * problem as pinning the default context also requires GTT space which
  188. * may not be available. To avoid this we always pin the
  189. * default context.
  190. */
  191. ctx = dev_priv->ring[RCS].default_context;
  192. ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false);
  193. if (ret) {
  194. do_destroy(ctx);
  195. return ret;
  196. }
  197. return ret;
  198. }
  199. void i915_gem_context_init(struct drm_device *dev)
  200. {
  201. struct drm_i915_private *dev_priv = dev->dev_private;
  202. uint32_t ctx_size;
  203. if (!HAS_HW_CONTEXTS(dev))
  204. return;
  205. /* If called from reset, or thaw... we've been here already */
  206. if (dev_priv->hw_contexts_disabled ||
  207. dev_priv->ring[RCS].default_context)
  208. return;
  209. ctx_size = get_context_size(dev);
  210. dev_priv->hw_context_size = get_context_size(dev);
  211. dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
  212. if (ctx_size <= 0 || ctx_size > (1<<20)) {
  213. dev_priv->hw_contexts_disabled = true;
  214. return;
  215. }
  216. if (create_default_context(dev_priv)) {
  217. dev_priv->hw_contexts_disabled = true;
  218. return;
  219. }
  220. DRM_DEBUG_DRIVER("HW context support initialized\n");
  221. }
  222. void i915_gem_context_fini(struct drm_device *dev)
  223. {
  224. struct drm_i915_private *dev_priv = dev->dev_private;
  225. if (dev_priv->hw_contexts_disabled)
  226. return;
  227. i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
  228. do_destroy(dev_priv->ring[RCS].default_context);
  229. }
  230. void i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
  231. {
  232. struct drm_i915_private *dev_priv = dev->dev_private;
  233. struct drm_i915_file_private *file_priv = file->driver_priv;
  234. if (dev_priv->hw_contexts_disabled)
  235. return;
  236. idr_init(&file_priv->context_idr);
  237. }
  238. static int context_idr_cleanup(int id, void *p, void *data)
  239. {
  240. struct drm_file *file = (struct drm_file *)data;
  241. struct drm_i915_file_private *file_priv = file->driver_priv;
  242. struct i915_hw_context *ctx;
  243. BUG_ON(id == DEFAULT_CONTEXT_ID);
  244. ctx = i915_gem_context_get(file_priv, id);
  245. if (WARN_ON(ctx == NULL))
  246. return -ENXIO;
  247. do_destroy(ctx);
  248. return 0;
  249. }
  250. void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
  251. {
  252. struct drm_i915_private *dev_priv = dev->dev_private;
  253. struct drm_i915_file_private *file_priv = file->driver_priv;
  254. if (dev_priv->hw_contexts_disabled)
  255. return;
  256. mutex_lock(&dev->struct_mutex);
  257. idr_for_each(&file_priv->context_idr, context_idr_cleanup, file);
  258. idr_destroy(&file_priv->context_idr);
  259. mutex_unlock(&dev->struct_mutex);
  260. }
  261. static __used struct i915_hw_context *
  262. i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
  263. {
  264. return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
  265. }