p54common.c 31 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_rates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_channels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_channels,
  56. .n_channels = ARRAY_SIZE(p54_channels),
  57. .bitrates = p54_rates,
  58. .n_bitrates = ARRAY_SIZE(p54_rates),
  59. };
  60. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  61. {
  62. struct p54_common *priv = dev->priv;
  63. struct bootrec_exp_if *exp_if;
  64. struct bootrec *bootrec;
  65. u32 *data = (u32 *)fw->data;
  66. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  67. u8 *fw_version = NULL;
  68. size_t len;
  69. int i;
  70. if (priv->rx_start)
  71. return;
  72. while (data < end_data && *data)
  73. data++;
  74. while (data < end_data && !*data)
  75. data++;
  76. bootrec = (struct bootrec *) data;
  77. while (bootrec->data <= end_data &&
  78. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  79. u32 code = le32_to_cpu(bootrec->code);
  80. switch (code) {
  81. case BR_CODE_COMPONENT_ID:
  82. switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
  83. case FW_FMAC:
  84. printk(KERN_INFO "p54: FreeMAC firmware\n");
  85. break;
  86. case FW_LM20:
  87. printk(KERN_INFO "p54: LM20 firmware\n");
  88. break;
  89. case FW_LM86:
  90. printk(KERN_INFO "p54: LM86 firmware\n");
  91. break;
  92. case FW_LM87:
  93. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  94. break;
  95. default:
  96. printk(KERN_INFO "p54: unknown firmware\n");
  97. break;
  98. }
  99. break;
  100. case BR_CODE_COMPONENT_VERSION:
  101. /* 24 bytes should be enough for all firmwares */
  102. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  103. fw_version = (unsigned char*)bootrec->data;
  104. break;
  105. case BR_CODE_DESCR:
  106. priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
  107. /* FIXME add sanity checking */
  108. priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
  109. break;
  110. case BR_CODE_EXPOSED_IF:
  111. exp_if = (struct bootrec_exp_if *) bootrec->data;
  112. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  113. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  114. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  115. break;
  116. case BR_CODE_DEPENDENT_IF:
  117. break;
  118. case BR_CODE_END_OF_BRA:
  119. case LEGACY_BR_CODE_END_OF_BRA:
  120. end_data = NULL;
  121. break;
  122. default:
  123. break;
  124. }
  125. bootrec = (struct bootrec *)&bootrec->data[len];
  126. }
  127. if (fw_version)
  128. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  129. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  130. if (priv->fw_var >= 0x300) {
  131. /* Firmware supports QoS, use it! */
  132. priv->tx_stats[4].limit = 3;
  133. priv->tx_stats[5].limit = 4;
  134. priv->tx_stats[6].limit = 3;
  135. priv->tx_stats[7].limit = 1;
  136. dev->queues = 4;
  137. }
  138. }
  139. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  140. static int p54_convert_rev0(struct ieee80211_hw *dev,
  141. struct pda_pa_curve_data *curve_data)
  142. {
  143. struct p54_common *priv = dev->priv;
  144. struct p54_pa_curve_data_sample *dst;
  145. struct pda_pa_curve_data_sample_rev0 *src;
  146. size_t cd_len = sizeof(*curve_data) +
  147. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  148. curve_data->channels;
  149. unsigned int i, j;
  150. void *source, *target;
  151. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  152. if (!priv->curve_data)
  153. return -ENOMEM;
  154. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  155. source = curve_data->data;
  156. target = priv->curve_data->data;
  157. for (i = 0; i < curve_data->channels; i++) {
  158. __le16 *freq = source;
  159. source += sizeof(__le16);
  160. *((__le16 *)target) = *freq;
  161. target += sizeof(__le16);
  162. for (j = 0; j < curve_data->points_per_channel; j++) {
  163. dst = target;
  164. src = source;
  165. dst->rf_power = src->rf_power;
  166. dst->pa_detector = src->pa_detector;
  167. dst->data_64qam = src->pcv;
  168. /* "invent" the points for the other modulations */
  169. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  170. dst->data_16qam = SUB(src->pcv, 12);
  171. dst->data_qpsk = SUB(dst->data_16qam, 12);
  172. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  173. dst->data_barker = SUB(dst->data_bpsk, 14);
  174. #undef SUB
  175. target += sizeof(*dst);
  176. source += sizeof(*src);
  177. }
  178. }
  179. return 0;
  180. }
  181. static int p54_convert_rev1(struct ieee80211_hw *dev,
  182. struct pda_pa_curve_data *curve_data)
  183. {
  184. struct p54_common *priv = dev->priv;
  185. struct p54_pa_curve_data_sample *dst;
  186. struct pda_pa_curve_data_sample_rev1 *src;
  187. size_t cd_len = sizeof(*curve_data) +
  188. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  189. curve_data->channels;
  190. unsigned int i, j;
  191. void *source, *target;
  192. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  193. if (!priv->curve_data)
  194. return -ENOMEM;
  195. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  196. source = curve_data->data;
  197. target = priv->curve_data->data;
  198. for (i = 0; i < curve_data->channels; i++) {
  199. __le16 *freq = source;
  200. source += sizeof(__le16);
  201. *((__le16 *)target) = *freq;
  202. target += sizeof(__le16);
  203. for (j = 0; j < curve_data->points_per_channel; j++) {
  204. memcpy(target, source, sizeof(*src));
  205. target += sizeof(*dst);
  206. source += sizeof(*src);
  207. }
  208. source++;
  209. }
  210. return 0;
  211. }
  212. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  213. {
  214. struct p54_common *priv = dev->priv;
  215. struct eeprom_pda_wrap *wrap = NULL;
  216. struct pda_entry *entry;
  217. unsigned int data_len, entry_len;
  218. void *tmp;
  219. int err;
  220. u8 *end = (u8 *)eeprom + len;
  221. wrap = (struct eeprom_pda_wrap *) eeprom;
  222. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  223. /* verify that at least the entry length/code fits */
  224. while ((u8 *)entry <= end - sizeof(*entry)) {
  225. entry_len = le16_to_cpu(entry->len);
  226. data_len = ((entry_len - 1) << 1);
  227. /* abort if entry exceeds whole structure */
  228. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  229. break;
  230. switch (le16_to_cpu(entry->code)) {
  231. case PDR_MAC_ADDRESS:
  232. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  233. break;
  234. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  235. if (data_len < 2) {
  236. err = -EINVAL;
  237. goto err;
  238. }
  239. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  240. err = -EINVAL;
  241. goto err;
  242. }
  243. priv->output_limit = kmalloc(entry->data[1] *
  244. sizeof(*priv->output_limit), GFP_KERNEL);
  245. if (!priv->output_limit) {
  246. err = -ENOMEM;
  247. goto err;
  248. }
  249. memcpy(priv->output_limit, &entry->data[2],
  250. entry->data[1]*sizeof(*priv->output_limit));
  251. priv->output_limit_len = entry->data[1];
  252. break;
  253. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  254. struct pda_pa_curve_data *curve_data =
  255. (struct pda_pa_curve_data *)entry->data;
  256. if (data_len < sizeof(*curve_data)) {
  257. err = -EINVAL;
  258. goto err;
  259. }
  260. switch (curve_data->cal_method_rev) {
  261. case 0:
  262. err = p54_convert_rev0(dev, curve_data);
  263. break;
  264. case 1:
  265. err = p54_convert_rev1(dev, curve_data);
  266. break;
  267. default:
  268. printk(KERN_ERR "p54: unknown curve data "
  269. "revision %d\n",
  270. curve_data->cal_method_rev);
  271. err = -ENODEV;
  272. break;
  273. }
  274. if (err)
  275. goto err;
  276. }
  277. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  278. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  279. if (!priv->iq_autocal) {
  280. err = -ENOMEM;
  281. goto err;
  282. }
  283. memcpy(priv->iq_autocal, entry->data, data_len);
  284. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  285. break;
  286. case PDR_INTERFACE_LIST:
  287. tmp = entry->data;
  288. while ((u8 *)tmp < entry->data + data_len) {
  289. struct bootrec_exp_if *exp_if = tmp;
  290. if (le16_to_cpu(exp_if->if_id) == 0xF)
  291. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  292. tmp += sizeof(struct bootrec_exp_if);
  293. }
  294. break;
  295. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  296. priv->version = *(u8 *)(entry->data + 1);
  297. break;
  298. case PDR_END:
  299. /* make it overrun */
  300. entry_len = len;
  301. break;
  302. default:
  303. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  304. le16_to_cpu(entry->code));
  305. break;
  306. }
  307. entry = (void *)entry + (entry_len + 1)*2;
  308. }
  309. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  310. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  311. err = -EINVAL;
  312. goto err;
  313. }
  314. return 0;
  315. err:
  316. if (priv->iq_autocal) {
  317. kfree(priv->iq_autocal);
  318. priv->iq_autocal = NULL;
  319. }
  320. if (priv->output_limit) {
  321. kfree(priv->output_limit);
  322. priv->output_limit = NULL;
  323. }
  324. if (priv->curve_data) {
  325. kfree(priv->curve_data);
  326. priv->curve_data = NULL;
  327. }
  328. printk(KERN_ERR "p54: eeprom parse failed!\n");
  329. return err;
  330. }
  331. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  332. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  333. {
  334. struct p54_eeprom_lm86 *eeprom_hdr;
  335. hdr->magic1 = cpu_to_le16(0x8000);
  336. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  337. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  338. hdr->retry1 = hdr->retry2 = 0;
  339. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  340. eeprom_hdr->offset = 0x0;
  341. eeprom_hdr->len = cpu_to_le16(0x2000);
  342. }
  343. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  344. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  345. {
  346. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  347. struct ieee80211_rx_status rx_status = {0};
  348. u16 freq = le16_to_cpu(hdr->freq);
  349. rx_status.signal = hdr->rssi;
  350. /* XX correct? */
  351. rx_status.qual = (100 * hdr->rssi) / 127;
  352. rx_status.rate_idx = hdr->rate & 0xf;
  353. rx_status.freq = freq;
  354. rx_status.band = IEEE80211_BAND_2GHZ;
  355. rx_status.antenna = hdr->antenna;
  356. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  357. rx_status.flag |= RX_FLAG_TSFT;
  358. skb_pull(skb, sizeof(*hdr));
  359. skb_trim(skb, le16_to_cpu(hdr->len));
  360. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  361. }
  362. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  363. {
  364. struct p54_common *priv = dev->priv;
  365. int i;
  366. for (i = 0; i < dev->queues; i++)
  367. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  368. ieee80211_wake_queue(dev, i);
  369. }
  370. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  371. {
  372. struct p54_common *priv = dev->priv;
  373. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  374. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  375. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  376. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  377. struct memrecord *range = NULL;
  378. u32 freed = 0;
  379. u32 last_addr = priv->rx_start;
  380. unsigned long flags;
  381. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  382. while (entry != (struct sk_buff *)&priv->tx_queue) {
  383. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  384. range = (void *)info->driver_data;
  385. if (range->start_addr == addr) {
  386. struct p54_control_hdr *entry_hdr;
  387. struct p54_tx_control_allocdata *entry_data;
  388. int pad = 0;
  389. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  390. struct ieee80211_tx_info *ni;
  391. struct memrecord *mr;
  392. ni = IEEE80211_SKB_CB(entry->next);
  393. mr = (struct memrecord *)ni->driver_data;
  394. freed = mr->start_addr - last_addr;
  395. } else
  396. freed = priv->rx_end - last_addr;
  397. last_addr = range->end_addr;
  398. __skb_unlink(entry, &priv->tx_queue);
  399. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  400. memset(&info->status, 0, sizeof(info->status));
  401. entry_hdr = (struct p54_control_hdr *) entry->data;
  402. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  403. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  404. pad = entry_data->align[0];
  405. priv->tx_stats[entry_data->hw_queue].len--;
  406. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  407. if (!(payload->status & 0x01))
  408. info->flags |= IEEE80211_TX_STAT_ACK;
  409. else
  410. info->status.excessive_retries = 1;
  411. }
  412. info->status.retry_count = payload->retries - 1;
  413. info->status.ack_signal = le16_to_cpu(payload->ack_rssi);
  414. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  415. ieee80211_tx_status_irqsafe(dev, entry);
  416. goto out;
  417. } else
  418. last_addr = range->end_addr;
  419. entry = entry->next;
  420. }
  421. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  422. out:
  423. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  424. sizeof(struct p54_control_hdr))
  425. p54_wake_free_queues(dev);
  426. }
  427. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  428. {
  429. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  430. switch (le16_to_cpu(hdr->type)) {
  431. case P54_CONTROL_TYPE_TXDONE:
  432. p54_rx_frame_sent(dev, skb);
  433. break;
  434. case P54_CONTROL_TYPE_BBP:
  435. break;
  436. default:
  437. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  438. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  439. break;
  440. }
  441. }
  442. /* returns zero if skb can be reused */
  443. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  444. {
  445. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  446. switch (type) {
  447. case 0x00:
  448. case 0x01:
  449. p54_rx_data(dev, skb);
  450. return -1;
  451. case 0x4d:
  452. /* TODO: do something better... but then again, I've never seen this happen */
  453. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  454. wiphy_name(dev->wiphy));
  455. break;
  456. case 0x80:
  457. p54_rx_control(dev, skb);
  458. break;
  459. default:
  460. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  461. wiphy_name(dev->wiphy), type);
  462. break;
  463. }
  464. return 0;
  465. }
  466. EXPORT_SYMBOL_GPL(p54_rx);
  467. /*
  468. * So, the firmware is somewhat stupid and doesn't know what places in its
  469. * memory incoming data should go to. By poking around in the firmware, we
  470. * can find some unused memory to upload our packets to. However, data that we
  471. * want the card to TX needs to stay intact until the card has told us that
  472. * it is done with it. This function finds empty places we can upload to and
  473. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  474. * allocated areas.
  475. */
  476. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  477. struct p54_control_hdr *data, u32 len)
  478. {
  479. struct p54_common *priv = dev->priv;
  480. struct sk_buff *entry = priv->tx_queue.next;
  481. struct sk_buff *target_skb = NULL;
  482. u32 last_addr = priv->rx_start;
  483. u32 largest_hole = 0;
  484. u32 target_addr = priv->rx_start;
  485. unsigned long flags;
  486. unsigned int left;
  487. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  488. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  489. left = skb_queue_len(&priv->tx_queue);
  490. while (left--) {
  491. u32 hole_size;
  492. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  493. struct memrecord *range = (void *)info->driver_data;
  494. hole_size = range->start_addr - last_addr;
  495. if (!target_skb && hole_size >= len) {
  496. target_skb = entry->prev;
  497. hole_size -= len;
  498. target_addr = last_addr;
  499. }
  500. largest_hole = max(largest_hole, hole_size);
  501. last_addr = range->end_addr;
  502. entry = entry->next;
  503. }
  504. if (!target_skb && priv->rx_end - last_addr >= len) {
  505. target_skb = priv->tx_queue.prev;
  506. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  507. if (!skb_queue_empty(&priv->tx_queue)) {
  508. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
  509. struct memrecord *range = (void *)info->driver_data;
  510. target_addr = range->end_addr;
  511. }
  512. } else
  513. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  514. if (skb) {
  515. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  516. struct memrecord *range = (void *)info->driver_data;
  517. range->start_addr = target_addr;
  518. range->end_addr = target_addr + len;
  519. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  520. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  521. sizeof(struct p54_control_hdr))
  522. ieee80211_stop_queues(dev);
  523. }
  524. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  525. data->req_id = cpu_to_le32(target_addr + 0x70);
  526. }
  527. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  528. {
  529. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  530. struct ieee80211_tx_queue_stats *current_queue;
  531. struct p54_common *priv = dev->priv;
  532. struct p54_control_hdr *hdr;
  533. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  534. struct p54_tx_control_allocdata *txhdr;
  535. size_t padding, len;
  536. u8 rate;
  537. u8 cts_rate = 0x20;
  538. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
  539. if (unlikely(current_queue->len > current_queue->limit))
  540. return NETDEV_TX_BUSY;
  541. current_queue->len++;
  542. current_queue->count++;
  543. if (current_queue->len == current_queue->limit)
  544. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  545. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  546. len = skb->len;
  547. txhdr = (struct p54_tx_control_allocdata *)
  548. skb_push(skb, sizeof(*txhdr) + padding);
  549. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  550. if (padding)
  551. hdr->magic1 = cpu_to_le16(0x4010);
  552. else
  553. hdr->magic1 = cpu_to_le16(0x0010);
  554. hdr->len = cpu_to_le16(len);
  555. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  556. hdr->retry1 = hdr->retry2 = info->control.retry_limit;
  557. /* TODO: add support for alternate retry TX rates */
  558. rate = ieee80211_get_tx_rate(dev, info)->hw_value;
  559. if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
  560. rate |= 0x10;
  561. cts_rate |= 0x10;
  562. }
  563. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  564. rate |= 0x40;
  565. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  566. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  567. rate |= 0x20;
  568. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  569. }
  570. memset(txhdr->rateset, rate, 8);
  571. txhdr->key_type = 0;
  572. txhdr->key_len = 0;
  573. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  574. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  575. 2 : info->antenna_sel_tx - 1;
  576. txhdr->output_power = 0x7f; // HW Maximum
  577. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  578. 0 : cts_rate;
  579. if (padding)
  580. txhdr->align[0] = padding;
  581. /* FIXME: The sequence that follows is needed for this driver to
  582. * work with mac80211 since "mac80211: fix TX sequence numbers".
  583. * As with the temporary code in rt2x00, changes will be needed
  584. * to get proper sequence numbers on beacons. In addition, this
  585. * patch places the sequence number in the hardware state, which
  586. * limits us to a single virtual state.
  587. */
  588. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  589. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  590. priv->seqno += 0x10;
  591. ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  592. ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  593. }
  594. /* modifies skb->cb and with it info, so must be last! */
  595. p54_assign_address(dev, skb, hdr, skb->len);
  596. priv->tx(dev, hdr, skb->len, 0);
  597. return 0;
  598. }
  599. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  600. const u8 *dst, const u8 *src, u8 antenna,
  601. u32 magic3, u32 magic8, u32 magic9)
  602. {
  603. struct p54_common *priv = dev->priv;
  604. struct p54_control_hdr *hdr;
  605. struct p54_tx_control_filter *filter;
  606. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  607. priv->tx_hdr_len, GFP_ATOMIC);
  608. if (!hdr)
  609. return -ENOMEM;
  610. hdr = (void *)hdr + priv->tx_hdr_len;
  611. filter = (struct p54_tx_control_filter *) hdr->data;
  612. hdr->magic1 = cpu_to_le16(0x8001);
  613. hdr->len = cpu_to_le16(sizeof(*filter));
  614. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter));
  615. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  616. filter->filter_type = cpu_to_le16(filter_type);
  617. memcpy(filter->dst, dst, ETH_ALEN);
  618. if (!src)
  619. memset(filter->src, ~0, ETH_ALEN);
  620. else
  621. memcpy(filter->src, src, ETH_ALEN);
  622. filter->antenna = antenna;
  623. filter->magic3 = cpu_to_le32(magic3);
  624. filter->rx_addr = cpu_to_le32(priv->rx_end);
  625. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  626. filter->rxhw = priv->rxhw;
  627. filter->magic8 = cpu_to_le16(magic8);
  628. filter->magic9 = cpu_to_le16(magic9);
  629. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  630. return 0;
  631. }
  632. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  633. {
  634. struct p54_common *priv = dev->priv;
  635. struct p54_control_hdr *hdr;
  636. struct p54_tx_control_channel *chan;
  637. unsigned int i;
  638. void *entry;
  639. hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
  640. priv->tx_hdr_len, GFP_KERNEL);
  641. if (!hdr)
  642. return -ENOMEM;
  643. hdr = (void *)hdr + priv->tx_hdr_len;
  644. chan = (struct p54_tx_control_channel *) hdr->data;
  645. hdr->magic1 = cpu_to_le16(0x8001);
  646. hdr->len = cpu_to_le16(sizeof(*chan));
  647. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  648. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*chan));
  649. chan->flags = cpu_to_le16(0x1);
  650. chan->dwell = cpu_to_le16(0x0);
  651. for (i = 0; i < priv->iq_autocal_len; i++) {
  652. if (priv->iq_autocal[i].freq != freq)
  653. continue;
  654. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  655. sizeof(*priv->iq_autocal));
  656. break;
  657. }
  658. if (i == priv->iq_autocal_len)
  659. goto err;
  660. for (i = 0; i < priv->output_limit_len; i++) {
  661. if (priv->output_limit[i].freq != freq)
  662. continue;
  663. chan->val_barker = 0x38;
  664. chan->val_bpsk = chan->dup_bpsk =
  665. priv->output_limit[i].val_bpsk;
  666. chan->val_qpsk = chan->dup_qpsk =
  667. priv->output_limit[i].val_qpsk;
  668. chan->val_16qam = chan->dup_16qam =
  669. priv->output_limit[i].val_16qam;
  670. chan->val_64qam = chan->dup_64qam =
  671. priv->output_limit[i].val_64qam;
  672. break;
  673. }
  674. if (i == priv->output_limit_len)
  675. goto err;
  676. entry = priv->curve_data->data;
  677. for (i = 0; i < priv->curve_data->channels; i++) {
  678. if (*((__le16 *)entry) != freq) {
  679. entry += sizeof(__le16);
  680. entry += sizeof(struct p54_pa_curve_data_sample) *
  681. priv->curve_data->points_per_channel;
  682. continue;
  683. }
  684. entry += sizeof(__le16);
  685. chan->pa_points_per_curve =
  686. min(priv->curve_data->points_per_channel, (u8) 8);
  687. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  688. chan->pa_points_per_curve);
  689. break;
  690. }
  691. chan->rssical_mul = cpu_to_le16(130);
  692. chan->rssical_add = cpu_to_le16(0xfe70); /* -400 */
  693. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*chan), 1);
  694. return 0;
  695. err:
  696. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  697. kfree(hdr);
  698. return -EINVAL;
  699. }
  700. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  701. {
  702. struct p54_common *priv = dev->priv;
  703. struct p54_control_hdr *hdr;
  704. struct p54_tx_control_led *led;
  705. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  706. priv->tx_hdr_len, GFP_KERNEL);
  707. if (!hdr)
  708. return -ENOMEM;
  709. hdr = (void *)hdr + priv->tx_hdr_len;
  710. hdr->magic1 = cpu_to_le16(0x8001);
  711. hdr->len = cpu_to_le16(sizeof(*led));
  712. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  713. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
  714. led = (struct p54_tx_control_led *) hdr->data;
  715. led->mode = cpu_to_le16(mode);
  716. led->led_permanent = cpu_to_le16(link);
  717. led->led_temporary = cpu_to_le16(act);
  718. led->duration = cpu_to_le16(1000);
  719. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  720. return 0;
  721. }
  722. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  723. do { \
  724. queue.aifs = cpu_to_le16(ai_fs); \
  725. queue.cwmin = cpu_to_le16(cw_min); \
  726. queue.cwmax = cpu_to_le16(cw_max); \
  727. queue.txop = cpu_to_le16(_txop); \
  728. } while(0)
  729. static void p54_init_vdcf(struct ieee80211_hw *dev)
  730. {
  731. struct p54_common *priv = dev->priv;
  732. struct p54_control_hdr *hdr;
  733. struct p54_tx_control_vdcf *vdcf;
  734. /* all USB V1 adapters need a extra headroom */
  735. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  736. hdr->magic1 = cpu_to_le16(0x8001);
  737. hdr->len = cpu_to_le16(sizeof(*vdcf));
  738. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  739. hdr->req_id = cpu_to_le32(priv->rx_start);
  740. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  741. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  742. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  743. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  744. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  745. }
  746. static void p54_set_vdcf(struct ieee80211_hw *dev)
  747. {
  748. struct p54_common *priv = dev->priv;
  749. struct p54_control_hdr *hdr;
  750. struct p54_tx_control_vdcf *vdcf;
  751. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  752. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
  753. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  754. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  755. vdcf->slottime = 9;
  756. vdcf->magic1 = 0x10;
  757. vdcf->magic2 = 0x00;
  758. } else {
  759. vdcf->slottime = 20;
  760. vdcf->magic1 = 0x0a;
  761. vdcf->magic2 = 0x06;
  762. }
  763. /* (see prism54/isl_oid.h for further details) */
  764. vdcf->frameburst = cpu_to_le16(0);
  765. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  766. }
  767. static int p54_start(struct ieee80211_hw *dev)
  768. {
  769. struct p54_common *priv = dev->priv;
  770. int err;
  771. if (!priv->cached_vdcf) {
  772. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
  773. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  774. GFP_KERNEL);
  775. if (!priv->cached_vdcf)
  776. return -ENOMEM;
  777. }
  778. err = priv->open(dev);
  779. if (!err)
  780. priv->mode = IEEE80211_IF_TYPE_MNTR;
  781. p54_init_vdcf(dev);
  782. return err;
  783. }
  784. static void p54_stop(struct ieee80211_hw *dev)
  785. {
  786. struct p54_common *priv = dev->priv;
  787. struct sk_buff *skb;
  788. while ((skb = skb_dequeue(&priv->tx_queue)))
  789. kfree_skb(skb);
  790. priv->stop(dev);
  791. priv->mode = IEEE80211_IF_TYPE_INVALID;
  792. }
  793. static int p54_add_interface(struct ieee80211_hw *dev,
  794. struct ieee80211_if_init_conf *conf)
  795. {
  796. struct p54_common *priv = dev->priv;
  797. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  798. return -EOPNOTSUPP;
  799. switch (conf->type) {
  800. case IEEE80211_IF_TYPE_STA:
  801. priv->mode = conf->type;
  802. break;
  803. default:
  804. return -EOPNOTSUPP;
  805. }
  806. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  807. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  808. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  809. switch (conf->type) {
  810. case IEEE80211_IF_TYPE_STA:
  811. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  812. break;
  813. default:
  814. BUG(); /* impossible */
  815. break;
  816. }
  817. p54_set_leds(dev, 1, 0, 0);
  818. return 0;
  819. }
  820. static void p54_remove_interface(struct ieee80211_hw *dev,
  821. struct ieee80211_if_init_conf *conf)
  822. {
  823. struct p54_common *priv = dev->priv;
  824. priv->mode = IEEE80211_IF_TYPE_MNTR;
  825. memset(priv->mac_addr, 0, ETH_ALEN);
  826. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  827. }
  828. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  829. {
  830. int ret;
  831. struct p54_common *priv = dev->priv;
  832. mutex_lock(&priv->conf_mutex);
  833. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  834. p54_set_vdcf(dev);
  835. mutex_unlock(&priv->conf_mutex);
  836. return ret;
  837. }
  838. static int p54_config_interface(struct ieee80211_hw *dev,
  839. struct ieee80211_vif *vif,
  840. struct ieee80211_if_conf *conf)
  841. {
  842. struct p54_common *priv = dev->priv;
  843. mutex_lock(&priv->conf_mutex);
  844. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  845. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  846. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  847. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  848. mutex_unlock(&priv->conf_mutex);
  849. return 0;
  850. }
  851. static void p54_configure_filter(struct ieee80211_hw *dev,
  852. unsigned int changed_flags,
  853. unsigned int *total_flags,
  854. int mc_count, struct dev_mc_list *mclist)
  855. {
  856. struct p54_common *priv = dev->priv;
  857. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  858. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  859. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  860. p54_set_filter(dev, 0, priv->mac_addr,
  861. NULL, 2, 0, 0, 0);
  862. else
  863. p54_set_filter(dev, 0, priv->mac_addr,
  864. priv->bssid, 2, 0, 0, 0);
  865. }
  866. }
  867. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  868. const struct ieee80211_tx_queue_params *params)
  869. {
  870. struct p54_common *priv = dev->priv;
  871. struct p54_tx_control_vdcf *vdcf;
  872. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  873. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  874. if ((params) && !(queue > 4)) {
  875. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  876. params->cw_min, params->cw_max, params->txop);
  877. } else
  878. return -EINVAL;
  879. p54_set_vdcf(dev);
  880. return 0;
  881. }
  882. static int p54_get_stats(struct ieee80211_hw *dev,
  883. struct ieee80211_low_level_stats *stats)
  884. {
  885. /* TODO */
  886. return 0;
  887. }
  888. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  889. struct ieee80211_tx_queue_stats *stats)
  890. {
  891. struct p54_common *priv = dev->priv;
  892. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  893. return 0;
  894. }
  895. static const struct ieee80211_ops p54_ops = {
  896. .tx = p54_tx,
  897. .start = p54_start,
  898. .stop = p54_stop,
  899. .add_interface = p54_add_interface,
  900. .remove_interface = p54_remove_interface,
  901. .config = p54_config,
  902. .config_interface = p54_config_interface,
  903. .configure_filter = p54_configure_filter,
  904. .conf_tx = p54_conf_tx,
  905. .get_stats = p54_get_stats,
  906. .get_tx_stats = p54_get_tx_stats
  907. };
  908. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  909. {
  910. struct ieee80211_hw *dev;
  911. struct p54_common *priv;
  912. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  913. if (!dev)
  914. return NULL;
  915. priv = dev->priv;
  916. priv->mode = IEEE80211_IF_TYPE_INVALID;
  917. skb_queue_head_init(&priv->tx_queue);
  918. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  919. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  920. IEEE80211_HW_RX_INCLUDES_FCS |
  921. IEEE80211_HW_SIGNAL_UNSPEC;
  922. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  923. dev->channel_change_time = 1000; /* TODO: find actual value */
  924. dev->max_signal = 127;
  925. priv->tx_stats[0].limit = 1;
  926. priv->tx_stats[1].limit = 1;
  927. priv->tx_stats[2].limit = 1;
  928. priv->tx_stats[3].limit = 1;
  929. priv->tx_stats[4].limit = 5;
  930. dev->queues = 1;
  931. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  932. sizeof(struct p54_tx_control_allocdata);
  933. mutex_init(&priv->conf_mutex);
  934. return dev;
  935. }
  936. EXPORT_SYMBOL_GPL(p54_init_common);
  937. void p54_free_common(struct ieee80211_hw *dev)
  938. {
  939. struct p54_common *priv = dev->priv;
  940. kfree(priv->iq_autocal);
  941. kfree(priv->output_limit);
  942. kfree(priv->curve_data);
  943. kfree(priv->cached_vdcf);
  944. }
  945. EXPORT_SYMBOL_GPL(p54_free_common);
  946. static int __init p54_init(void)
  947. {
  948. return 0;
  949. }
  950. static void __exit p54_exit(void)
  951. {
  952. }
  953. module_init(p54_init);
  954. module_exit(p54_exit);