intel_i2c.c 6.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222
  1. /*
  2. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/i2c-id.h>
  30. #include <linux/i2c-algo-bit.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "intel_drv.h"
  34. #include "i915_drm.h"
  35. #include "i915_drv.h"
  36. void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
  37. {
  38. struct drm_i915_private *dev_priv = dev->dev_private;
  39. /* When using bit bashing for I2C, this bit needs to be set to 1 */
  40. if (!IS_PINEVIEW(dev))
  41. return;
  42. if (enable)
  43. I915_WRITE(DSPCLK_GATE_D,
  44. I915_READ(DSPCLK_GATE_D) | DPCUNIT_CLOCK_GATE_DISABLE);
  45. else
  46. I915_WRITE(DSPCLK_GATE_D,
  47. I915_READ(DSPCLK_GATE_D) & (~DPCUNIT_CLOCK_GATE_DISABLE));
  48. }
  49. /*
  50. * Intel GPIO access functions
  51. */
  52. #define I2C_RISEFALL_TIME 20
  53. static int get_clock(void *data)
  54. {
  55. struct intel_i2c_chan *chan = data;
  56. struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
  57. u32 val;
  58. val = I915_READ(chan->reg);
  59. return ((val & GPIO_CLOCK_VAL_IN) != 0);
  60. }
  61. static int get_data(void *data)
  62. {
  63. struct intel_i2c_chan *chan = data;
  64. struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
  65. u32 val;
  66. val = I915_READ(chan->reg);
  67. return ((val & GPIO_DATA_VAL_IN) != 0);
  68. }
  69. static void set_clock(void *data, int state_high)
  70. {
  71. struct intel_i2c_chan *chan = data;
  72. struct drm_device *dev = chan->drm_dev;
  73. struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
  74. u32 reserved = 0, clock_bits;
  75. /* On most chips, these bits must be preserved in software. */
  76. if (!IS_I830(dev) && !IS_845G(dev))
  77. reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
  78. GPIO_CLOCK_PULLUP_DISABLE);
  79. if (state_high)
  80. clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK;
  81. else
  82. clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
  83. GPIO_CLOCK_VAL_MASK;
  84. I915_WRITE(chan->reg, reserved | clock_bits);
  85. udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
  86. }
  87. static void set_data(void *data, int state_high)
  88. {
  89. struct intel_i2c_chan *chan = data;
  90. struct drm_device *dev = chan->drm_dev;
  91. struct drm_i915_private *dev_priv = chan->drm_dev->dev_private;
  92. u32 reserved = 0, data_bits;
  93. /* On most chips, these bits must be preserved in software. */
  94. if (!IS_I830(dev) && !IS_845G(dev))
  95. reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE |
  96. GPIO_CLOCK_PULLUP_DISABLE);
  97. if (state_high)
  98. data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK;
  99. else
  100. data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
  101. GPIO_DATA_VAL_MASK;
  102. I915_WRITE(chan->reg, reserved | data_bits);
  103. udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
  104. }
  105. /* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C
  106. * engine, but if the BIOS leaves it enabled, then that can break our use
  107. * of the bit-banging I2C interfaces. This is notably the case with the
  108. * Mac Mini in EFI mode.
  109. */
  110. void
  111. intel_i2c_reset_gmbus(struct drm_device *dev)
  112. {
  113. struct drm_i915_private *dev_priv = dev->dev_private;
  114. if (IS_IRONLAKE(dev)) {
  115. I915_WRITE(PCH_GMBUS0, 0);
  116. } else {
  117. I915_WRITE(GMBUS0, 0);
  118. }
  119. }
  120. /**
  121. * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
  122. * @dev: DRM device
  123. * @output: driver specific output device
  124. * @reg: GPIO reg to use
  125. * @name: name for this bus
  126. * @slave_addr: slave address (if fixed)
  127. *
  128. * Creates and registers a new i2c bus with the Linux i2c layer, for use
  129. * in output probing and control (e.g. DDC or SDVO control functions).
  130. *
  131. * Possible values for @reg include:
  132. * %GPIOA
  133. * %GPIOB
  134. * %GPIOC
  135. * %GPIOD
  136. * %GPIOE
  137. * %GPIOF
  138. * %GPIOG
  139. * %GPIOH
  140. * see PRM for details on how these different busses are used.
  141. */
  142. struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
  143. const char *name)
  144. {
  145. struct intel_i2c_chan *chan;
  146. chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL);
  147. if (!chan)
  148. goto out_free;
  149. chan->drm_dev = dev;
  150. chan->reg = reg;
  151. snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name);
  152. chan->adapter.owner = THIS_MODULE;
  153. chan->adapter.algo_data = &chan->algo;
  154. chan->adapter.dev.parent = &dev->pdev->dev;
  155. chan->algo.setsda = set_data;
  156. chan->algo.setscl = set_clock;
  157. chan->algo.getsda = get_data;
  158. chan->algo.getscl = get_clock;
  159. chan->algo.udelay = 20;
  160. chan->algo.timeout = usecs_to_jiffies(2200);
  161. chan->algo.data = chan;
  162. i2c_set_adapdata(&chan->adapter, chan);
  163. if(i2c_bit_add_bus(&chan->adapter))
  164. goto out_free;
  165. intel_i2c_reset_gmbus(dev);
  166. /* JJJ: raise SCL and SDA? */
  167. intel_i2c_quirk_set(dev, true);
  168. set_data(chan, 1);
  169. set_clock(chan, 1);
  170. intel_i2c_quirk_set(dev, false);
  171. udelay(20);
  172. return &chan->adapter;
  173. out_free:
  174. kfree(chan);
  175. return NULL;
  176. }
  177. /**
  178. * intel_i2c_destroy - unregister and free i2c bus resources
  179. * @output: channel to free
  180. *
  181. * Unregister the adapter from the i2c layer, then free the structure.
  182. */
  183. void intel_i2c_destroy(struct i2c_adapter *adapter)
  184. {
  185. struct intel_i2c_chan *chan;
  186. if (!adapter)
  187. return;
  188. chan = container_of(adapter,
  189. struct intel_i2c_chan,
  190. adapter);
  191. i2c_del_adapter(&chan->adapter);
  192. kfree(chan);
  193. }