nouveau_drm.c 20 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include <engine/disp.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_irq.h"
  36. #include "nouveau_dma.h"
  37. #include "nouveau_ttm.h"
  38. #include "nouveau_gem.h"
  39. #include "nouveau_agp.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_pm.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. MODULE_PARM_DESC(config, "option string to pass to driver core");
  50. static char *nouveau_config;
  51. module_param_named(config, nouveau_config, charp, 0400);
  52. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  53. static char *nouveau_debug;
  54. module_param_named(debug, nouveau_debug, charp, 0400);
  55. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  56. static int nouveau_noaccel = 0;
  57. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  58. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  59. "0 = disabled, 1 = enabled, 2 = headless)");
  60. int nouveau_modeset = -1;
  61. module_param_named(modeset, nouveau_modeset, int, 0400);
  62. static struct drm_driver driver;
  63. static int
  64. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  65. {
  66. struct nouveau_drm *drm =
  67. container_of(event, struct nouveau_drm, vblank[head]);
  68. drm_handle_vblank(drm->dev, head);
  69. return NVKM_EVENT_KEEP;
  70. }
  71. static int
  72. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  73. {
  74. struct nouveau_drm *drm = nouveau_drm(dev);
  75. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  76. if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
  77. return -EIO;
  78. WARN_ON_ONCE(drm->vblank[head].func);
  79. drm->vblank[head].func = nouveau_drm_vblank_handler;
  80. nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
  81. return 0;
  82. }
  83. static void
  84. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  85. {
  86. struct nouveau_drm *drm = nouveau_drm(dev);
  87. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  88. if (drm->vblank[head].func)
  89. nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
  90. else
  91. WARN_ON_ONCE(1);
  92. drm->vblank[head].func = NULL;
  93. }
  94. static u64
  95. nouveau_name(struct pci_dev *pdev)
  96. {
  97. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  98. name |= pdev->bus->number << 16;
  99. name |= PCI_SLOT(pdev->devfn) << 8;
  100. return name | PCI_FUNC(pdev->devfn);
  101. }
  102. static int
  103. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  104. int size, void **pcli)
  105. {
  106. struct nouveau_cli *cli;
  107. int ret;
  108. *pcli = NULL;
  109. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  110. nouveau_debug, size, pcli);
  111. cli = *pcli;
  112. if (ret) {
  113. if (cli)
  114. nouveau_client_destroy(&cli->base);
  115. *pcli = NULL;
  116. return ret;
  117. }
  118. mutex_init(&cli->mutex);
  119. return 0;
  120. }
  121. static void
  122. nouveau_cli_destroy(struct nouveau_cli *cli)
  123. {
  124. struct nouveau_object *client = nv_object(cli);
  125. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  126. nouveau_client_fini(&cli->base, false);
  127. atomic_set(&client->refcount, 1);
  128. nouveau_object_ref(NULL, &client);
  129. }
  130. static void
  131. nouveau_accel_fini(struct nouveau_drm *drm)
  132. {
  133. nouveau_gpuobj_ref(NULL, &drm->notify);
  134. nouveau_channel_del(&drm->channel);
  135. nouveau_channel_del(&drm->cechan);
  136. if (drm->fence)
  137. nouveau_fence(drm)->dtor(drm);
  138. }
  139. static void
  140. nouveau_accel_init(struct nouveau_drm *drm)
  141. {
  142. struct nouveau_device *device = nv_device(drm->device);
  143. struct nouveau_object *object;
  144. u32 arg0, arg1;
  145. int ret;
  146. if (nouveau_noaccel)
  147. return;
  148. /* initialise synchronisation routines */
  149. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  150. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  151. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  152. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  153. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  154. else ret = nvc0_fence_create(drm);
  155. if (ret) {
  156. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  157. nouveau_accel_fini(drm);
  158. return;
  159. }
  160. if (device->card_type >= NV_E0) {
  161. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  162. NVDRM_CHAN + 1,
  163. NVE0_CHANNEL_IND_ENGINE_CE0 |
  164. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  165. &drm->cechan);
  166. if (ret)
  167. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  168. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  169. arg1 = 1;
  170. } else {
  171. arg0 = NvDmaFB;
  172. arg1 = NvDmaTT;
  173. }
  174. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  175. arg0, arg1, &drm->channel);
  176. if (ret) {
  177. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  178. nouveau_accel_fini(drm);
  179. return;
  180. }
  181. if (device->card_type < NV_C0) {
  182. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  183. &drm->notify);
  184. if (ret) {
  185. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  186. nouveau_accel_fini(drm);
  187. return;
  188. }
  189. ret = nouveau_object_new(nv_object(drm),
  190. drm->channel->handle, NvNotify0,
  191. 0x003d, &(struct nv_dma_class) {
  192. .flags = NV_DMA_TARGET_VRAM |
  193. NV_DMA_ACCESS_RDWR,
  194. .start = drm->notify->addr,
  195. .limit = drm->notify->addr + 31
  196. }, sizeof(struct nv_dma_class),
  197. &object);
  198. if (ret) {
  199. nouveau_accel_fini(drm);
  200. return;
  201. }
  202. }
  203. nouveau_bo_move_init(drm);
  204. }
  205. static int nouveau_drm_probe(struct pci_dev *pdev,
  206. const struct pci_device_id *pent)
  207. {
  208. struct nouveau_device *device;
  209. struct apertures_struct *aper;
  210. bool boot = false;
  211. int ret;
  212. /* remove conflicting drivers (vesafb, efifb etc) */
  213. aper = alloc_apertures(3);
  214. if (!aper)
  215. return -ENOMEM;
  216. aper->ranges[0].base = pci_resource_start(pdev, 1);
  217. aper->ranges[0].size = pci_resource_len(pdev, 1);
  218. aper->count = 1;
  219. if (pci_resource_len(pdev, 2)) {
  220. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  221. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  222. aper->count++;
  223. }
  224. if (pci_resource_len(pdev, 3)) {
  225. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  226. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  227. aper->count++;
  228. }
  229. #ifdef CONFIG_X86
  230. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  231. #endif
  232. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  233. kfree(aper);
  234. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  235. nouveau_config, nouveau_debug, &device);
  236. if (ret)
  237. return ret;
  238. pci_set_master(pdev);
  239. ret = drm_get_pci_dev(pdev, pent, &driver);
  240. if (ret) {
  241. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  242. return ret;
  243. }
  244. return 0;
  245. }
  246. static struct lock_class_key drm_client_lock_class_key;
  247. static int
  248. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  249. {
  250. struct pci_dev *pdev = dev->pdev;
  251. struct nouveau_device *device;
  252. struct nouveau_drm *drm;
  253. int ret;
  254. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  255. if (ret)
  256. return ret;
  257. lockdep_set_class(&drm->client.mutex, &drm_client_lock_class_key);
  258. dev->dev_private = drm;
  259. drm->dev = dev;
  260. INIT_LIST_HEAD(&drm->clients);
  261. spin_lock_init(&drm->tile.lock);
  262. /* make sure AGP controller is in a consistent state before we
  263. * (possibly) execute vbios init tables (see nouveau_agp.h)
  264. */
  265. if (drm_pci_device_is_agp(dev) && dev->agp) {
  266. /* dummy device object, doesn't init anything, but allows
  267. * agp code access to registers
  268. */
  269. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  270. NVDRM_DEVICE, 0x0080,
  271. &(struct nv_device_class) {
  272. .device = ~0,
  273. .disable =
  274. ~(NV_DEVICE_DISABLE_MMIO |
  275. NV_DEVICE_DISABLE_IDENTIFY),
  276. .debug0 = ~0,
  277. }, sizeof(struct nv_device_class),
  278. &drm->device);
  279. if (ret)
  280. goto fail_device;
  281. nouveau_agp_reset(drm);
  282. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  283. }
  284. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  285. 0x0080, &(struct nv_device_class) {
  286. .device = ~0,
  287. .disable = 0,
  288. .debug0 = 0,
  289. }, sizeof(struct nv_device_class),
  290. &drm->device);
  291. if (ret)
  292. goto fail_device;
  293. /* workaround an odd issue on nvc1 by disabling the device's
  294. * nosnoop capability. hopefully won't cause issues until a
  295. * better fix is found - assuming there is one...
  296. */
  297. device = nv_device(drm->device);
  298. if (nv_device(drm->device)->chipset == 0xc1)
  299. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  300. nouveau_vga_init(drm);
  301. nouveau_agp_init(drm);
  302. if (device->card_type >= NV_50) {
  303. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  304. 0x1000, &drm->client.base.vm);
  305. if (ret)
  306. goto fail_device;
  307. }
  308. ret = nouveau_ttm_init(drm);
  309. if (ret)
  310. goto fail_ttm;
  311. ret = nouveau_bios_init(dev);
  312. if (ret)
  313. goto fail_bios;
  314. ret = nouveau_irq_init(dev);
  315. if (ret)
  316. goto fail_irq;
  317. ret = nouveau_display_create(dev);
  318. if (ret)
  319. goto fail_dispctor;
  320. if (dev->mode_config.num_crtc) {
  321. ret = nouveau_display_init(dev);
  322. if (ret)
  323. goto fail_dispinit;
  324. }
  325. nouveau_pm_init(dev);
  326. nouveau_accel_init(drm);
  327. nouveau_fbcon_init(dev);
  328. return 0;
  329. fail_dispinit:
  330. nouveau_display_destroy(dev);
  331. fail_dispctor:
  332. nouveau_irq_fini(dev);
  333. fail_irq:
  334. nouveau_bios_takedown(dev);
  335. fail_bios:
  336. nouveau_ttm_fini(drm);
  337. fail_ttm:
  338. nouveau_agp_fini(drm);
  339. nouveau_vga_fini(drm);
  340. fail_device:
  341. nouveau_cli_destroy(&drm->client);
  342. return ret;
  343. }
  344. static int
  345. nouveau_drm_unload(struct drm_device *dev)
  346. {
  347. struct nouveau_drm *drm = nouveau_drm(dev);
  348. nouveau_fbcon_fini(dev);
  349. nouveau_accel_fini(drm);
  350. nouveau_pm_fini(dev);
  351. if (dev->mode_config.num_crtc)
  352. nouveau_display_fini(dev);
  353. nouveau_display_destroy(dev);
  354. nouveau_irq_fini(dev);
  355. nouveau_bios_takedown(dev);
  356. nouveau_ttm_fini(drm);
  357. nouveau_agp_fini(drm);
  358. nouveau_vga_fini(drm);
  359. nouveau_cli_destroy(&drm->client);
  360. return 0;
  361. }
  362. static void
  363. nouveau_drm_remove(struct pci_dev *pdev)
  364. {
  365. struct drm_device *dev = pci_get_drvdata(pdev);
  366. struct nouveau_drm *drm = nouveau_drm(dev);
  367. struct nouveau_object *device;
  368. device = drm->client.base.device;
  369. drm_put_dev(dev);
  370. nouveau_object_ref(NULL, &device);
  371. nouveau_object_debug();
  372. }
  373. static int
  374. nouveau_do_suspend(struct drm_device *dev)
  375. {
  376. struct nouveau_drm *drm = nouveau_drm(dev);
  377. struct nouveau_cli *cli;
  378. int ret;
  379. if (dev->mode_config.num_crtc) {
  380. NV_INFO(drm, "suspending fbcon...\n");
  381. nouveau_fbcon_set_suspend(dev, 1);
  382. NV_INFO(drm, "suspending display...\n");
  383. ret = nouveau_display_suspend(dev);
  384. if (ret)
  385. return ret;
  386. }
  387. NV_INFO(drm, "evicting buffers...\n");
  388. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  389. if (drm->fence && nouveau_fence(drm)->suspend) {
  390. if (!nouveau_fence(drm)->suspend(drm))
  391. return -ENOMEM;
  392. }
  393. NV_INFO(drm, "suspending client object trees...\n");
  394. list_for_each_entry(cli, &drm->clients, head) {
  395. ret = nouveau_client_fini(&cli->base, true);
  396. if (ret)
  397. goto fail_client;
  398. }
  399. ret = nouveau_client_fini(&drm->client.base, true);
  400. if (ret)
  401. goto fail_client;
  402. nouveau_agp_fini(drm);
  403. return 0;
  404. fail_client:
  405. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  406. nouveau_client_init(&cli->base);
  407. }
  408. if (dev->mode_config.num_crtc) {
  409. NV_INFO(drm, "resuming display...\n");
  410. nouveau_display_resume(dev);
  411. }
  412. return ret;
  413. }
  414. int nouveau_pmops_suspend(struct device *dev)
  415. {
  416. struct pci_dev *pdev = to_pci_dev(dev);
  417. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  418. int ret;
  419. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  420. return 0;
  421. ret = nouveau_do_suspend(drm_dev);
  422. if (ret)
  423. return ret;
  424. pci_save_state(pdev);
  425. pci_disable_device(pdev);
  426. pci_set_power_state(pdev, PCI_D3hot);
  427. return 0;
  428. }
  429. static int
  430. nouveau_do_resume(struct drm_device *dev)
  431. {
  432. struct nouveau_drm *drm = nouveau_drm(dev);
  433. struct nouveau_cli *cli;
  434. NV_INFO(drm, "re-enabling device...\n");
  435. nouveau_agp_reset(drm);
  436. NV_INFO(drm, "resuming client object trees...\n");
  437. nouveau_client_init(&drm->client.base);
  438. nouveau_agp_init(drm);
  439. list_for_each_entry(cli, &drm->clients, head) {
  440. nouveau_client_init(&cli->base);
  441. }
  442. if (drm->fence && nouveau_fence(drm)->resume)
  443. nouveau_fence(drm)->resume(drm);
  444. nouveau_run_vbios_init(dev);
  445. nouveau_irq_postinstall(dev);
  446. nouveau_pm_resume(dev);
  447. if (dev->mode_config.num_crtc) {
  448. NV_INFO(drm, "resuming display...\n");
  449. nouveau_display_resume(dev);
  450. }
  451. return 0;
  452. }
  453. int nouveau_pmops_resume(struct device *dev)
  454. {
  455. struct pci_dev *pdev = to_pci_dev(dev);
  456. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  457. int ret;
  458. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  459. return 0;
  460. pci_set_power_state(pdev, PCI_D0);
  461. pci_restore_state(pdev);
  462. ret = pci_enable_device(pdev);
  463. if (ret)
  464. return ret;
  465. pci_set_master(pdev);
  466. return nouveau_do_resume(drm_dev);
  467. }
  468. static int nouveau_pmops_freeze(struct device *dev)
  469. {
  470. struct pci_dev *pdev = to_pci_dev(dev);
  471. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  472. return nouveau_do_suspend(drm_dev);
  473. }
  474. static int nouveau_pmops_thaw(struct device *dev)
  475. {
  476. struct pci_dev *pdev = to_pci_dev(dev);
  477. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  478. return nouveau_do_resume(drm_dev);
  479. }
  480. static int
  481. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  482. {
  483. struct pci_dev *pdev = dev->pdev;
  484. struct nouveau_drm *drm = nouveau_drm(dev);
  485. struct nouveau_cli *cli;
  486. char name[32], tmpname[TASK_COMM_LEN];
  487. int ret;
  488. get_task_comm(tmpname, current);
  489. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  490. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  491. if (ret)
  492. return ret;
  493. if (nv_device(drm->device)->card_type >= NV_50) {
  494. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  495. 0x1000, &cli->base.vm);
  496. if (ret) {
  497. nouveau_cli_destroy(cli);
  498. return ret;
  499. }
  500. }
  501. fpriv->driver_priv = cli;
  502. mutex_lock(&drm->client.mutex);
  503. list_add(&cli->head, &drm->clients);
  504. mutex_unlock(&drm->client.mutex);
  505. return 0;
  506. }
  507. static void
  508. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  509. {
  510. struct nouveau_cli *cli = nouveau_cli(fpriv);
  511. struct nouveau_drm *drm = nouveau_drm(dev);
  512. if (cli->abi16)
  513. nouveau_abi16_fini(cli->abi16);
  514. mutex_lock(&drm->client.mutex);
  515. list_del(&cli->head);
  516. mutex_unlock(&drm->client.mutex);
  517. }
  518. static void
  519. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  520. {
  521. struct nouveau_cli *cli = nouveau_cli(fpriv);
  522. nouveau_cli_destroy(cli);
  523. }
  524. static struct drm_ioctl_desc
  525. nouveau_ioctls[] = {
  526. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  527. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  528. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  529. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  530. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  531. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  532. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  533. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  534. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  535. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  536. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  537. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  538. };
  539. static const struct file_operations
  540. nouveau_driver_fops = {
  541. .owner = THIS_MODULE,
  542. .open = drm_open,
  543. .release = drm_release,
  544. .unlocked_ioctl = drm_ioctl,
  545. .mmap = nouveau_ttm_mmap,
  546. .poll = drm_poll,
  547. .fasync = drm_fasync,
  548. .read = drm_read,
  549. #if defined(CONFIG_COMPAT)
  550. .compat_ioctl = nouveau_compat_ioctl,
  551. #endif
  552. .llseek = noop_llseek,
  553. };
  554. static struct drm_driver
  555. driver = {
  556. .driver_features =
  557. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  558. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  559. DRIVER_MODESET | DRIVER_PRIME,
  560. .load = nouveau_drm_load,
  561. .unload = nouveau_drm_unload,
  562. .open = nouveau_drm_open,
  563. .preclose = nouveau_drm_preclose,
  564. .postclose = nouveau_drm_postclose,
  565. .lastclose = nouveau_vga_lastclose,
  566. #if defined(CONFIG_DEBUG_FS)
  567. .debugfs_init = nouveau_debugfs_init,
  568. .debugfs_cleanup = nouveau_debugfs_takedown,
  569. #endif
  570. .irq_preinstall = nouveau_irq_preinstall,
  571. .irq_postinstall = nouveau_irq_postinstall,
  572. .irq_uninstall = nouveau_irq_uninstall,
  573. .irq_handler = nouveau_irq_handler,
  574. .get_vblank_counter = drm_vblank_count,
  575. .enable_vblank = nouveau_drm_vblank_enable,
  576. .disable_vblank = nouveau_drm_vblank_disable,
  577. .ioctls = nouveau_ioctls,
  578. .fops = &nouveau_driver_fops,
  579. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  580. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  581. .gem_prime_export = drm_gem_prime_export,
  582. .gem_prime_import = drm_gem_prime_import,
  583. .gem_prime_pin = nouveau_gem_prime_pin,
  584. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  585. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  586. .gem_prime_vmap = nouveau_gem_prime_vmap,
  587. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  588. .gem_init_object = nouveau_gem_object_new,
  589. .gem_free_object = nouveau_gem_object_del,
  590. .gem_open_object = nouveau_gem_object_open,
  591. .gem_close_object = nouveau_gem_object_close,
  592. .dumb_create = nouveau_display_dumb_create,
  593. .dumb_map_offset = nouveau_display_dumb_map_offset,
  594. .dumb_destroy = nouveau_display_dumb_destroy,
  595. .name = DRIVER_NAME,
  596. .desc = DRIVER_DESC,
  597. #ifdef GIT_REVISION
  598. .date = GIT_REVISION,
  599. #else
  600. .date = DRIVER_DATE,
  601. #endif
  602. .major = DRIVER_MAJOR,
  603. .minor = DRIVER_MINOR,
  604. .patchlevel = DRIVER_PATCHLEVEL,
  605. };
  606. static struct pci_device_id
  607. nouveau_drm_pci_table[] = {
  608. {
  609. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  610. .class = PCI_BASE_CLASS_DISPLAY << 16,
  611. .class_mask = 0xff << 16,
  612. },
  613. {
  614. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  615. .class = PCI_BASE_CLASS_DISPLAY << 16,
  616. .class_mask = 0xff << 16,
  617. },
  618. {}
  619. };
  620. static const struct dev_pm_ops nouveau_pm_ops = {
  621. .suspend = nouveau_pmops_suspend,
  622. .resume = nouveau_pmops_resume,
  623. .freeze = nouveau_pmops_freeze,
  624. .thaw = nouveau_pmops_thaw,
  625. .poweroff = nouveau_pmops_freeze,
  626. .restore = nouveau_pmops_resume,
  627. };
  628. static struct pci_driver
  629. nouveau_drm_pci_driver = {
  630. .name = "nouveau",
  631. .id_table = nouveau_drm_pci_table,
  632. .probe = nouveau_drm_probe,
  633. .remove = nouveau_drm_remove,
  634. .driver.pm = &nouveau_pm_ops,
  635. };
  636. static int __init
  637. nouveau_drm_init(void)
  638. {
  639. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  640. if (nouveau_modeset == -1) {
  641. #ifdef CONFIG_VGA_CONSOLE
  642. if (vgacon_text_force())
  643. nouveau_modeset = 0;
  644. #endif
  645. }
  646. if (!nouveau_modeset)
  647. return 0;
  648. nouveau_register_dsm_handler();
  649. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  650. }
  651. static void __exit
  652. nouveau_drm_exit(void)
  653. {
  654. if (!nouveau_modeset)
  655. return;
  656. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  657. nouveau_unregister_dsm_handler();
  658. }
  659. module_init(nouveau_drm_init);
  660. module_exit(nouveau_drm_exit);
  661. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  662. MODULE_AUTHOR(DRIVER_AUTHOR);
  663. MODULE_DESCRIPTION(DRIVER_DESC);
  664. MODULE_LICENSE("GPL and additional rights");