e1000_main.c 136 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.1.9-k6"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  44. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  58. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  65. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  69. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  83. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  94. /* required last entry */
  95. {0,}
  96. };
  97. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  98. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  99. struct e1000_tx_ring *txdr);
  100. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  101. struct e1000_rx_ring *rxdr);
  102. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  103. struct e1000_tx_ring *tx_ring);
  104. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  105. struct e1000_rx_ring *rx_ring);
  106. /* Local Function Prototypes */
  107. static int e1000_init_module(void);
  108. static void e1000_exit_module(void);
  109. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  110. static void __devexit e1000_remove(struct pci_dev *pdev);
  111. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  112. static int e1000_sw_init(struct e1000_adapter *adapter);
  113. static int e1000_open(struct net_device *netdev);
  114. static int e1000_close(struct net_device *netdev);
  115. static void e1000_configure_tx(struct e1000_adapter *adapter);
  116. static void e1000_configure_rx(struct e1000_adapter *adapter);
  117. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  118. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  121. struct e1000_tx_ring *tx_ring);
  122. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  123. struct e1000_rx_ring *rx_ring);
  124. static void e1000_set_multi(struct net_device *netdev);
  125. static void e1000_update_phy_info(unsigned long data);
  126. static void e1000_watchdog(unsigned long data);
  127. static void e1000_82547_tx_fifo_stall(unsigned long data);
  128. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  129. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  130. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  131. static int e1000_set_mac(struct net_device *netdev, void *p);
  132. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  133. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  134. struct e1000_tx_ring *tx_ring);
  135. #ifdef CONFIG_E1000_NAPI
  136. static int e1000_clean(struct net_device *poll_dev, int *budget);
  137. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  138. struct e1000_rx_ring *rx_ring,
  139. int *work_done, int work_to_do);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring,
  142. int *work_done, int work_to_do);
  143. #else
  144. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  145. struct e1000_rx_ring *rx_ring);
  146. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. #endif
  149. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  150. struct e1000_rx_ring *rx_ring,
  151. int cleaned_count);
  152. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring,
  154. int cleaned_count);
  155. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  156. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  157. int cmd);
  158. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  159. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_tx_timeout(struct net_device *dev);
  161. static void e1000_reset_task(struct net_device *dev);
  162. static void e1000_smartspeed(struct e1000_adapter *adapter);
  163. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  164. struct sk_buff *skb);
  165. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  166. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  167. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  169. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  170. #ifdef CONFIG_PM
  171. static int e1000_resume(struct pci_dev *pdev);
  172. #endif
  173. static void e1000_shutdown(struct pci_dev *pdev);
  174. #ifdef CONFIG_NET_POLL_CONTROLLER
  175. /* for netdump / net console */
  176. static void e1000_netpoll (struct net_device *netdev);
  177. #endif
  178. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  179. pci_channel_state_t state);
  180. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  181. static void e1000_io_resume(struct pci_dev *pdev);
  182. static struct pci_error_handlers e1000_err_handler = {
  183. .error_detected = e1000_io_error_detected,
  184. .slot_reset = e1000_io_slot_reset,
  185. .resume = e1000_io_resume,
  186. };
  187. static struct pci_driver e1000_driver = {
  188. .name = e1000_driver_name,
  189. .id_table = e1000_pci_tbl,
  190. .probe = e1000_probe,
  191. .remove = __devexit_p(e1000_remove),
  192. /* Power Managment Hooks */
  193. .suspend = e1000_suspend,
  194. #ifdef CONFIG_PM
  195. .resume = e1000_resume,
  196. #endif
  197. .shutdown = e1000_shutdown,
  198. .err_handler = &e1000_err_handler
  199. };
  200. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  201. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  202. MODULE_LICENSE("GPL");
  203. MODULE_VERSION(DRV_VERSION);
  204. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  205. module_param(debug, int, 0);
  206. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  207. /**
  208. * e1000_init_module - Driver Registration Routine
  209. *
  210. * e1000_init_module is the first routine called when the driver is
  211. * loaded. All it does is register with the PCI subsystem.
  212. **/
  213. static int __init
  214. e1000_init_module(void)
  215. {
  216. int ret;
  217. printk(KERN_INFO "%s - version %s\n",
  218. e1000_driver_string, e1000_driver_version);
  219. printk(KERN_INFO "%s\n", e1000_copyright);
  220. ret = pci_register_driver(&e1000_driver);
  221. return ret;
  222. }
  223. module_init(e1000_init_module);
  224. /**
  225. * e1000_exit_module - Driver Exit Cleanup Routine
  226. *
  227. * e1000_exit_module is called just before the driver is removed
  228. * from memory.
  229. **/
  230. static void __exit
  231. e1000_exit_module(void)
  232. {
  233. pci_unregister_driver(&e1000_driver);
  234. }
  235. module_exit(e1000_exit_module);
  236. static int e1000_request_irq(struct e1000_adapter *adapter)
  237. {
  238. struct net_device *netdev = adapter->netdev;
  239. int flags, err = 0;
  240. flags = IRQF_SHARED;
  241. #ifdef CONFIG_PCI_MSI
  242. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  243. adapter->have_msi = TRUE;
  244. if ((err = pci_enable_msi(adapter->pdev))) {
  245. DPRINTK(PROBE, ERR,
  246. "Unable to allocate MSI interrupt Error: %d\n", err);
  247. adapter->have_msi = FALSE;
  248. }
  249. }
  250. if (adapter->have_msi)
  251. flags &= ~IRQF_SHARED;
  252. #endif
  253. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  254. netdev->name, netdev)))
  255. DPRINTK(PROBE, ERR,
  256. "Unable to allocate interrupt Error: %d\n", err);
  257. return err;
  258. }
  259. static void e1000_free_irq(struct e1000_adapter *adapter)
  260. {
  261. struct net_device *netdev = adapter->netdev;
  262. free_irq(adapter->pdev->irq, netdev);
  263. #ifdef CONFIG_PCI_MSI
  264. if (adapter->have_msi)
  265. pci_disable_msi(adapter->pdev);
  266. #endif
  267. }
  268. /**
  269. * e1000_irq_disable - Mask off interrupt generation on the NIC
  270. * @adapter: board private structure
  271. **/
  272. static void
  273. e1000_irq_disable(struct e1000_adapter *adapter)
  274. {
  275. atomic_inc(&adapter->irq_sem);
  276. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  277. E1000_WRITE_FLUSH(&adapter->hw);
  278. synchronize_irq(adapter->pdev->irq);
  279. }
  280. /**
  281. * e1000_irq_enable - Enable default interrupt generation settings
  282. * @adapter: board private structure
  283. **/
  284. static void
  285. e1000_irq_enable(struct e1000_adapter *adapter)
  286. {
  287. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  288. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  289. E1000_WRITE_FLUSH(&adapter->hw);
  290. }
  291. }
  292. static void
  293. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  294. {
  295. struct net_device *netdev = adapter->netdev;
  296. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  297. uint16_t old_vid = adapter->mng_vlan_id;
  298. if (adapter->vlgrp) {
  299. if (!adapter->vlgrp->vlan_devices[vid]) {
  300. if (adapter->hw.mng_cookie.status &
  301. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  302. e1000_vlan_rx_add_vid(netdev, vid);
  303. adapter->mng_vlan_id = vid;
  304. } else
  305. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  306. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  307. (vid != old_vid) &&
  308. !adapter->vlgrp->vlan_devices[old_vid])
  309. e1000_vlan_rx_kill_vid(netdev, old_vid);
  310. } else
  311. adapter->mng_vlan_id = vid;
  312. }
  313. }
  314. /**
  315. * e1000_release_hw_control - release control of the h/w to f/w
  316. * @adapter: address of board private structure
  317. *
  318. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  319. * For ASF and Pass Through versions of f/w this means that the
  320. * driver is no longer loaded. For AMT version (only with 82573) i
  321. * of the f/w this means that the netowrk i/f is closed.
  322. *
  323. **/
  324. static void
  325. e1000_release_hw_control(struct e1000_adapter *adapter)
  326. {
  327. uint32_t ctrl_ext;
  328. uint32_t swsm;
  329. uint32_t extcnf;
  330. /* Let firmware taken over control of h/w */
  331. switch (adapter->hw.mac_type) {
  332. case e1000_82571:
  333. case e1000_82572:
  334. case e1000_80003es2lan:
  335. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  336. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  337. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  338. break;
  339. case e1000_82573:
  340. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  341. E1000_WRITE_REG(&adapter->hw, SWSM,
  342. swsm & ~E1000_SWSM_DRV_LOAD);
  343. case e1000_ich8lan:
  344. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  345. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  346. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  347. break;
  348. default:
  349. break;
  350. }
  351. }
  352. /**
  353. * e1000_get_hw_control - get control of the h/w from f/w
  354. * @adapter: address of board private structure
  355. *
  356. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  357. * For ASF and Pass Through versions of f/w this means that
  358. * the driver is loaded. For AMT version (only with 82573)
  359. * of the f/w this means that the netowrk i/f is open.
  360. *
  361. **/
  362. static void
  363. e1000_get_hw_control(struct e1000_adapter *adapter)
  364. {
  365. uint32_t ctrl_ext;
  366. uint32_t swsm;
  367. uint32_t extcnf;
  368. /* Let firmware know the driver has taken over */
  369. switch (adapter->hw.mac_type) {
  370. case e1000_82571:
  371. case e1000_82572:
  372. case e1000_80003es2lan:
  373. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  374. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  375. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  376. break;
  377. case e1000_82573:
  378. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  379. E1000_WRITE_REG(&adapter->hw, SWSM,
  380. swsm | E1000_SWSM_DRV_LOAD);
  381. break;
  382. case e1000_ich8lan:
  383. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  384. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  385. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  386. break;
  387. default:
  388. break;
  389. }
  390. }
  391. int
  392. e1000_up(struct e1000_adapter *adapter)
  393. {
  394. struct net_device *netdev = adapter->netdev;
  395. int i;
  396. /* hardware has been reset, we need to reload some things */
  397. e1000_set_multi(netdev);
  398. e1000_restore_vlan(adapter);
  399. e1000_configure_tx(adapter);
  400. e1000_setup_rctl(adapter);
  401. e1000_configure_rx(adapter);
  402. /* call E1000_DESC_UNUSED which always leaves
  403. * at least 1 descriptor unused to make sure
  404. * next_to_use != next_to_clean */
  405. for (i = 0; i < adapter->num_rx_queues; i++) {
  406. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  407. adapter->alloc_rx_buf(adapter, ring,
  408. E1000_DESC_UNUSED(ring));
  409. }
  410. adapter->tx_queue_len = netdev->tx_queue_len;
  411. mod_timer(&adapter->watchdog_timer, jiffies);
  412. #ifdef CONFIG_E1000_NAPI
  413. netif_poll_enable(netdev);
  414. #endif
  415. e1000_irq_enable(adapter);
  416. return 0;
  417. }
  418. /**
  419. * e1000_power_up_phy - restore link in case the phy was powered down
  420. * @adapter: address of board private structure
  421. *
  422. * The phy may be powered down to save power and turn off link when the
  423. * driver is unloaded and wake on lan is not enabled (among others)
  424. * *** this routine MUST be followed by a call to e1000_reset ***
  425. *
  426. **/
  427. void e1000_power_up_phy(struct e1000_adapter *adapter)
  428. {
  429. uint16_t mii_reg = 0;
  430. /* Just clear the power down bit to wake the phy back up */
  431. if (adapter->hw.media_type == e1000_media_type_copper) {
  432. /* according to the manual, the phy will retain its
  433. * settings across a power-down/up cycle */
  434. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  435. mii_reg &= ~MII_CR_POWER_DOWN;
  436. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  437. }
  438. }
  439. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  440. {
  441. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  442. e1000_check_mng_mode(&adapter->hw);
  443. /* Power down the PHY so no link is implied when interface is down
  444. * The PHY cannot be powered down if any of the following is TRUE
  445. * (a) WoL is enabled
  446. * (b) AMT is active
  447. * (c) SoL/IDER session is active */
  448. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  449. adapter->hw.mac_type != e1000_ich8lan &&
  450. adapter->hw.media_type == e1000_media_type_copper &&
  451. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  452. !mng_mode_enabled &&
  453. !e1000_check_phy_reset_block(&adapter->hw)) {
  454. uint16_t mii_reg = 0;
  455. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  456. mii_reg |= MII_CR_POWER_DOWN;
  457. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  458. mdelay(1);
  459. }
  460. }
  461. void
  462. e1000_down(struct e1000_adapter *adapter)
  463. {
  464. struct net_device *netdev = adapter->netdev;
  465. e1000_irq_disable(adapter);
  466. del_timer_sync(&adapter->tx_fifo_stall_timer);
  467. del_timer_sync(&adapter->watchdog_timer);
  468. del_timer_sync(&adapter->phy_info_timer);
  469. #ifdef CONFIG_E1000_NAPI
  470. netif_poll_disable(netdev);
  471. #endif
  472. netdev->tx_queue_len = adapter->tx_queue_len;
  473. adapter->link_speed = 0;
  474. adapter->link_duplex = 0;
  475. netif_carrier_off(netdev);
  476. netif_stop_queue(netdev);
  477. e1000_reset(adapter);
  478. e1000_clean_all_tx_rings(adapter);
  479. e1000_clean_all_rx_rings(adapter);
  480. }
  481. void
  482. e1000_reinit_locked(struct e1000_adapter *adapter)
  483. {
  484. WARN_ON(in_interrupt());
  485. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  486. msleep(1);
  487. e1000_down(adapter);
  488. e1000_up(adapter);
  489. clear_bit(__E1000_RESETTING, &adapter->flags);
  490. }
  491. void
  492. e1000_reset(struct e1000_adapter *adapter)
  493. {
  494. uint32_t pba, manc;
  495. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  496. /* Repartition Pba for greater than 9k mtu
  497. * To take effect CTRL.RST is required.
  498. */
  499. switch (adapter->hw.mac_type) {
  500. case e1000_82547:
  501. case e1000_82547_rev_2:
  502. pba = E1000_PBA_30K;
  503. break;
  504. case e1000_82571:
  505. case e1000_82572:
  506. case e1000_80003es2lan:
  507. pba = E1000_PBA_38K;
  508. break;
  509. case e1000_82573:
  510. pba = E1000_PBA_12K;
  511. break;
  512. case e1000_ich8lan:
  513. pba = E1000_PBA_8K;
  514. break;
  515. default:
  516. pba = E1000_PBA_48K;
  517. break;
  518. }
  519. if ((adapter->hw.mac_type != e1000_82573) &&
  520. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  521. pba -= 8; /* allocate more FIFO for Tx */
  522. if (adapter->hw.mac_type == e1000_82547) {
  523. adapter->tx_fifo_head = 0;
  524. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  525. adapter->tx_fifo_size =
  526. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  527. atomic_set(&adapter->tx_fifo_stall, 0);
  528. }
  529. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  530. /* flow control settings */
  531. /* Set the FC high water mark to 90% of the FIFO size.
  532. * Required to clear last 3 LSB */
  533. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  534. /* We can't use 90% on small FIFOs because the remainder
  535. * would be less than 1 full frame. In this case, we size
  536. * it to allow at least a full frame above the high water
  537. * mark. */
  538. if (pba < E1000_PBA_16K)
  539. fc_high_water_mark = (pba * 1024) - 1600;
  540. adapter->hw.fc_high_water = fc_high_water_mark;
  541. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  542. if (adapter->hw.mac_type == e1000_80003es2lan)
  543. adapter->hw.fc_pause_time = 0xFFFF;
  544. else
  545. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  546. adapter->hw.fc_send_xon = 1;
  547. adapter->hw.fc = adapter->hw.original_fc;
  548. /* Allow time for pending master requests to run */
  549. e1000_reset_hw(&adapter->hw);
  550. if (adapter->hw.mac_type >= e1000_82544)
  551. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  552. if (e1000_init_hw(&adapter->hw))
  553. DPRINTK(PROBE, ERR, "Hardware Error\n");
  554. e1000_update_mng_vlan(adapter);
  555. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  556. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  557. e1000_reset_adaptive(&adapter->hw);
  558. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  559. if (!adapter->smart_power_down &&
  560. (adapter->hw.mac_type == e1000_82571 ||
  561. adapter->hw.mac_type == e1000_82572)) {
  562. uint16_t phy_data = 0;
  563. /* speed up time to link by disabling smart power down, ignore
  564. * the return value of this function because there is nothing
  565. * different we would do if it failed */
  566. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  567. &phy_data);
  568. phy_data &= ~IGP02E1000_PM_SPD;
  569. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  570. phy_data);
  571. }
  572. if (adapter->hw.mac_type < e1000_ich8lan)
  573. /* FIXME: this code is duplicate and wrong for PCI Express */
  574. if (adapter->en_mng_pt) {
  575. manc = E1000_READ_REG(&adapter->hw, MANC);
  576. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  577. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  578. }
  579. }
  580. /**
  581. * e1000_probe - Device Initialization Routine
  582. * @pdev: PCI device information struct
  583. * @ent: entry in e1000_pci_tbl
  584. *
  585. * Returns 0 on success, negative on failure
  586. *
  587. * e1000_probe initializes an adapter identified by a pci_dev structure.
  588. * The OS initialization, configuring of the adapter private structure,
  589. * and a hardware reset occur.
  590. **/
  591. static int __devinit
  592. e1000_probe(struct pci_dev *pdev,
  593. const struct pci_device_id *ent)
  594. {
  595. struct net_device *netdev;
  596. struct e1000_adapter *adapter;
  597. unsigned long mmio_start, mmio_len;
  598. unsigned long flash_start, flash_len;
  599. static int cards_found = 0;
  600. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  601. int i, err, pci_using_dac;
  602. uint16_t eeprom_data;
  603. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  604. if ((err = pci_enable_device(pdev)))
  605. return err;
  606. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  607. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  608. pci_using_dac = 1;
  609. } else {
  610. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  611. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  612. E1000_ERR("No usable DMA configuration, aborting\n");
  613. goto err_dma;
  614. }
  615. pci_using_dac = 0;
  616. }
  617. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  618. goto err_pci_reg;
  619. pci_set_master(pdev);
  620. err = -ENOMEM;
  621. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  622. if (!netdev)
  623. goto err_alloc_etherdev;
  624. SET_MODULE_OWNER(netdev);
  625. SET_NETDEV_DEV(netdev, &pdev->dev);
  626. pci_set_drvdata(pdev, netdev);
  627. adapter = netdev_priv(netdev);
  628. adapter->netdev = netdev;
  629. adapter->pdev = pdev;
  630. adapter->hw.back = adapter;
  631. adapter->msg_enable = (1 << debug) - 1;
  632. mmio_start = pci_resource_start(pdev, BAR_0);
  633. mmio_len = pci_resource_len(pdev, BAR_0);
  634. err = -EIO;
  635. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  636. if (!adapter->hw.hw_addr)
  637. goto err_ioremap;
  638. for (i = BAR_1; i <= BAR_5; i++) {
  639. if (pci_resource_len(pdev, i) == 0)
  640. continue;
  641. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  642. adapter->hw.io_base = pci_resource_start(pdev, i);
  643. break;
  644. }
  645. }
  646. netdev->open = &e1000_open;
  647. netdev->stop = &e1000_close;
  648. netdev->hard_start_xmit = &e1000_xmit_frame;
  649. netdev->get_stats = &e1000_get_stats;
  650. netdev->set_multicast_list = &e1000_set_multi;
  651. netdev->set_mac_address = &e1000_set_mac;
  652. netdev->change_mtu = &e1000_change_mtu;
  653. netdev->do_ioctl = &e1000_ioctl;
  654. e1000_set_ethtool_ops(netdev);
  655. netdev->tx_timeout = &e1000_tx_timeout;
  656. netdev->watchdog_timeo = 5 * HZ;
  657. #ifdef CONFIG_E1000_NAPI
  658. netdev->poll = &e1000_clean;
  659. netdev->weight = 64;
  660. #endif
  661. netdev->vlan_rx_register = e1000_vlan_rx_register;
  662. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  663. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  664. #ifdef CONFIG_NET_POLL_CONTROLLER
  665. netdev->poll_controller = e1000_netpoll;
  666. #endif
  667. strcpy(netdev->name, pci_name(pdev));
  668. netdev->mem_start = mmio_start;
  669. netdev->mem_end = mmio_start + mmio_len;
  670. netdev->base_addr = adapter->hw.io_base;
  671. adapter->bd_number = cards_found;
  672. /* setup the private structure */
  673. if ((err = e1000_sw_init(adapter)))
  674. goto err_sw_init;
  675. err = -EIO;
  676. /* Flash BAR mapping must happen after e1000_sw_init
  677. * because it depends on mac_type */
  678. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  679. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  680. flash_start = pci_resource_start(pdev, 1);
  681. flash_len = pci_resource_len(pdev, 1);
  682. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  683. if (!adapter->hw.flash_address)
  684. goto err_flashmap;
  685. }
  686. if (e1000_check_phy_reset_block(&adapter->hw))
  687. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  688. /* if ksp3, indicate if it's port a being setup */
  689. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  690. e1000_ksp3_port_a == 0)
  691. adapter->ksp3_port_a = 1;
  692. e1000_ksp3_port_a++;
  693. /* Reset for multiple KP3 adapters */
  694. if (e1000_ksp3_port_a == 4)
  695. e1000_ksp3_port_a = 0;
  696. if (adapter->hw.mac_type >= e1000_82543) {
  697. netdev->features = NETIF_F_SG |
  698. NETIF_F_HW_CSUM |
  699. NETIF_F_HW_VLAN_TX |
  700. NETIF_F_HW_VLAN_RX |
  701. NETIF_F_HW_VLAN_FILTER;
  702. if (adapter->hw.mac_type == e1000_ich8lan)
  703. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  704. }
  705. #ifdef NETIF_F_TSO
  706. if ((adapter->hw.mac_type >= e1000_82544) &&
  707. (adapter->hw.mac_type != e1000_82547))
  708. netdev->features |= NETIF_F_TSO;
  709. #ifdef NETIF_F_TSO_IPV6
  710. if (adapter->hw.mac_type > e1000_82547_rev_2)
  711. netdev->features |= NETIF_F_TSO_IPV6;
  712. #endif
  713. #endif
  714. if (pci_using_dac)
  715. netdev->features |= NETIF_F_HIGHDMA;
  716. netdev->features |= NETIF_F_LLTX;
  717. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  718. /* initialize eeprom parameters */
  719. if (e1000_init_eeprom_params(&adapter->hw)) {
  720. E1000_ERR("EEPROM initialization failed\n");
  721. goto err_eeprom;
  722. }
  723. /* before reading the EEPROM, reset the controller to
  724. * put the device in a known good starting state */
  725. e1000_reset_hw(&adapter->hw);
  726. /* make sure the EEPROM is good */
  727. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  728. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  729. goto err_eeprom;
  730. }
  731. /* copy the MAC address out of the EEPROM */
  732. if (e1000_read_mac_addr(&adapter->hw))
  733. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  734. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  735. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  736. if (!is_valid_ether_addr(netdev->perm_addr)) {
  737. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  738. goto err_eeprom;
  739. }
  740. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  741. e1000_get_bus_info(&adapter->hw);
  742. init_timer(&adapter->tx_fifo_stall_timer);
  743. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  744. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  745. init_timer(&adapter->watchdog_timer);
  746. adapter->watchdog_timer.function = &e1000_watchdog;
  747. adapter->watchdog_timer.data = (unsigned long) adapter;
  748. init_timer(&adapter->phy_info_timer);
  749. adapter->phy_info_timer.function = &e1000_update_phy_info;
  750. adapter->phy_info_timer.data = (unsigned long) adapter;
  751. INIT_WORK(&adapter->reset_task,
  752. (void (*)(void *))e1000_reset_task, netdev);
  753. /* we're going to reset, so assume we have no link for now */
  754. netif_carrier_off(netdev);
  755. netif_stop_queue(netdev);
  756. e1000_check_options(adapter);
  757. /* Initial Wake on LAN setting
  758. * If APM wake is enabled in the EEPROM,
  759. * enable the ACPI Magic Packet filter
  760. */
  761. switch (adapter->hw.mac_type) {
  762. case e1000_82542_rev2_0:
  763. case e1000_82542_rev2_1:
  764. case e1000_82543:
  765. break;
  766. case e1000_82544:
  767. e1000_read_eeprom(&adapter->hw,
  768. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  769. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  770. break;
  771. case e1000_ich8lan:
  772. e1000_read_eeprom(&adapter->hw,
  773. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  774. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  775. break;
  776. case e1000_82546:
  777. case e1000_82546_rev_3:
  778. case e1000_82571:
  779. case e1000_80003es2lan:
  780. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  781. e1000_read_eeprom(&adapter->hw,
  782. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  783. break;
  784. }
  785. /* Fall Through */
  786. default:
  787. e1000_read_eeprom(&adapter->hw,
  788. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  789. break;
  790. }
  791. if (eeprom_data & eeprom_apme_mask)
  792. adapter->wol |= E1000_WUFC_MAG;
  793. /* print bus type/speed/width info */
  794. {
  795. struct e1000_hw *hw = &adapter->hw;
  796. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  797. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  798. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  799. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  800. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  801. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  802. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  803. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  804. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  805. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  806. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  807. "32-bit"));
  808. }
  809. for (i = 0; i < 6; i++)
  810. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  811. /* reset the hardware with the new settings */
  812. e1000_reset(adapter);
  813. /* If the controller is 82573 and f/w is AMT, do not set
  814. * DRV_LOAD until the interface is up. For all other cases,
  815. * let the f/w know that the h/w is now under the control
  816. * of the driver. */
  817. if (adapter->hw.mac_type != e1000_82573 ||
  818. !e1000_check_mng_mode(&adapter->hw))
  819. e1000_get_hw_control(adapter);
  820. strcpy(netdev->name, "eth%d");
  821. if ((err = register_netdev(netdev)))
  822. goto err_register;
  823. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  824. cards_found++;
  825. return 0;
  826. err_register:
  827. e1000_release_hw_control(adapter);
  828. err_eeprom:
  829. if (!e1000_check_phy_reset_block(&adapter->hw))
  830. e1000_phy_hw_reset(&adapter->hw);
  831. if (adapter->hw.flash_address)
  832. iounmap(adapter->hw.flash_address);
  833. err_flashmap:
  834. #ifdef CONFIG_E1000_NAPI
  835. for (i = 0; i < adapter->num_rx_queues; i++)
  836. dev_put(&adapter->polling_netdev[i]);
  837. #endif
  838. kfree(adapter->tx_ring);
  839. kfree(adapter->rx_ring);
  840. #ifdef CONFIG_E1000_NAPI
  841. kfree(adapter->polling_netdev);
  842. #endif
  843. err_sw_init:
  844. iounmap(adapter->hw.hw_addr);
  845. err_ioremap:
  846. free_netdev(netdev);
  847. err_alloc_etherdev:
  848. pci_release_regions(pdev);
  849. err_pci_reg:
  850. err_dma:
  851. pci_disable_device(pdev);
  852. return err;
  853. }
  854. /**
  855. * e1000_remove - Device Removal Routine
  856. * @pdev: PCI device information struct
  857. *
  858. * e1000_remove is called by the PCI subsystem to alert the driver
  859. * that it should release a PCI device. The could be caused by a
  860. * Hot-Plug event, or because the driver is going to be removed from
  861. * memory.
  862. **/
  863. static void __devexit
  864. e1000_remove(struct pci_dev *pdev)
  865. {
  866. struct net_device *netdev = pci_get_drvdata(pdev);
  867. struct e1000_adapter *adapter = netdev_priv(netdev);
  868. uint32_t manc;
  869. #ifdef CONFIG_E1000_NAPI
  870. int i;
  871. #endif
  872. flush_scheduled_work();
  873. if (adapter->hw.mac_type >= e1000_82540 &&
  874. adapter->hw.mac_type != e1000_ich8lan &&
  875. adapter->hw.media_type == e1000_media_type_copper) {
  876. manc = E1000_READ_REG(&adapter->hw, MANC);
  877. if (manc & E1000_MANC_SMBUS_EN) {
  878. manc |= E1000_MANC_ARP_EN;
  879. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  880. }
  881. }
  882. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  883. * would have already happened in close and is redundant. */
  884. e1000_release_hw_control(adapter);
  885. unregister_netdev(netdev);
  886. #ifdef CONFIG_E1000_NAPI
  887. for (i = 0; i < adapter->num_rx_queues; i++)
  888. dev_put(&adapter->polling_netdev[i]);
  889. #endif
  890. if (!e1000_check_phy_reset_block(&adapter->hw))
  891. e1000_phy_hw_reset(&adapter->hw);
  892. kfree(adapter->tx_ring);
  893. kfree(adapter->rx_ring);
  894. #ifdef CONFIG_E1000_NAPI
  895. kfree(adapter->polling_netdev);
  896. #endif
  897. iounmap(adapter->hw.hw_addr);
  898. if (adapter->hw.flash_address)
  899. iounmap(adapter->hw.flash_address);
  900. pci_release_regions(pdev);
  901. free_netdev(netdev);
  902. pci_disable_device(pdev);
  903. }
  904. /**
  905. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  906. * @adapter: board private structure to initialize
  907. *
  908. * e1000_sw_init initializes the Adapter private data structure.
  909. * Fields are initialized based on PCI device information and
  910. * OS network device settings (MTU size).
  911. **/
  912. static int __devinit
  913. e1000_sw_init(struct e1000_adapter *adapter)
  914. {
  915. struct e1000_hw *hw = &adapter->hw;
  916. struct net_device *netdev = adapter->netdev;
  917. struct pci_dev *pdev = adapter->pdev;
  918. #ifdef CONFIG_E1000_NAPI
  919. int i;
  920. #endif
  921. /* PCI config space info */
  922. hw->vendor_id = pdev->vendor;
  923. hw->device_id = pdev->device;
  924. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  925. hw->subsystem_id = pdev->subsystem_device;
  926. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  927. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  928. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  929. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  930. hw->max_frame_size = netdev->mtu +
  931. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  932. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  933. /* identify the MAC */
  934. if (e1000_set_mac_type(hw)) {
  935. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  936. return -EIO;
  937. }
  938. switch (hw->mac_type) {
  939. default:
  940. break;
  941. case e1000_82541:
  942. case e1000_82547:
  943. case e1000_82541_rev_2:
  944. case e1000_82547_rev_2:
  945. hw->phy_init_script = 1;
  946. break;
  947. }
  948. e1000_set_media_type(hw);
  949. hw->wait_autoneg_complete = FALSE;
  950. hw->tbi_compatibility_en = TRUE;
  951. hw->adaptive_ifs = TRUE;
  952. /* Copper options */
  953. if (hw->media_type == e1000_media_type_copper) {
  954. hw->mdix = AUTO_ALL_MODES;
  955. hw->disable_polarity_correction = FALSE;
  956. hw->master_slave = E1000_MASTER_SLAVE;
  957. }
  958. adapter->num_tx_queues = 1;
  959. adapter->num_rx_queues = 1;
  960. if (e1000_alloc_queues(adapter)) {
  961. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  962. return -ENOMEM;
  963. }
  964. #ifdef CONFIG_E1000_NAPI
  965. for (i = 0; i < adapter->num_rx_queues; i++) {
  966. adapter->polling_netdev[i].priv = adapter;
  967. adapter->polling_netdev[i].poll = &e1000_clean;
  968. adapter->polling_netdev[i].weight = 64;
  969. dev_hold(&adapter->polling_netdev[i]);
  970. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  971. }
  972. spin_lock_init(&adapter->tx_queue_lock);
  973. #endif
  974. atomic_set(&adapter->irq_sem, 1);
  975. spin_lock_init(&adapter->stats_lock);
  976. return 0;
  977. }
  978. /**
  979. * e1000_alloc_queues - Allocate memory for all rings
  980. * @adapter: board private structure to initialize
  981. *
  982. * We allocate one ring per queue at run-time since we don't know the
  983. * number of queues at compile-time. The polling_netdev array is
  984. * intended for Multiqueue, but should work fine with a single queue.
  985. **/
  986. static int __devinit
  987. e1000_alloc_queues(struct e1000_adapter *adapter)
  988. {
  989. int size;
  990. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  991. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  992. if (!adapter->tx_ring)
  993. return -ENOMEM;
  994. memset(adapter->tx_ring, 0, size);
  995. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  996. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  997. if (!adapter->rx_ring) {
  998. kfree(adapter->tx_ring);
  999. return -ENOMEM;
  1000. }
  1001. memset(adapter->rx_ring, 0, size);
  1002. #ifdef CONFIG_E1000_NAPI
  1003. size = sizeof(struct net_device) * adapter->num_rx_queues;
  1004. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  1005. if (!adapter->polling_netdev) {
  1006. kfree(adapter->tx_ring);
  1007. kfree(adapter->rx_ring);
  1008. return -ENOMEM;
  1009. }
  1010. memset(adapter->polling_netdev, 0, size);
  1011. #endif
  1012. return E1000_SUCCESS;
  1013. }
  1014. /**
  1015. * e1000_open - Called when a network interface is made active
  1016. * @netdev: network interface device structure
  1017. *
  1018. * Returns 0 on success, negative value on failure
  1019. *
  1020. * The open entry point is called when a network interface is made
  1021. * active by the system (IFF_UP). At this point all resources needed
  1022. * for transmit and receive operations are allocated, the interrupt
  1023. * handler is registered with the OS, the watchdog timer is started,
  1024. * and the stack is notified that the interface is ready.
  1025. **/
  1026. static int
  1027. e1000_open(struct net_device *netdev)
  1028. {
  1029. struct e1000_adapter *adapter = netdev_priv(netdev);
  1030. int err;
  1031. /* disallow open during test */
  1032. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1033. return -EBUSY;
  1034. /* allocate transmit descriptors */
  1035. if ((err = e1000_setup_all_tx_resources(adapter)))
  1036. goto err_setup_tx;
  1037. /* allocate receive descriptors */
  1038. if ((err = e1000_setup_all_rx_resources(adapter)))
  1039. goto err_setup_rx;
  1040. err = e1000_request_irq(adapter);
  1041. if (err)
  1042. goto err_req_irq;
  1043. e1000_power_up_phy(adapter);
  1044. if ((err = e1000_up(adapter)))
  1045. goto err_up;
  1046. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1047. if ((adapter->hw.mng_cookie.status &
  1048. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1049. e1000_update_mng_vlan(adapter);
  1050. }
  1051. /* If AMT is enabled, let the firmware know that the network
  1052. * interface is now open */
  1053. if (adapter->hw.mac_type == e1000_82573 &&
  1054. e1000_check_mng_mode(&adapter->hw))
  1055. e1000_get_hw_control(adapter);
  1056. return E1000_SUCCESS;
  1057. err_up:
  1058. e1000_power_down_phy(adapter);
  1059. e1000_free_irq(adapter);
  1060. err_req_irq:
  1061. e1000_free_all_rx_resources(adapter);
  1062. err_setup_rx:
  1063. e1000_free_all_tx_resources(adapter);
  1064. err_setup_tx:
  1065. e1000_reset(adapter);
  1066. return err;
  1067. }
  1068. /**
  1069. * e1000_close - Disables a network interface
  1070. * @netdev: network interface device structure
  1071. *
  1072. * Returns 0, this is not allowed to fail
  1073. *
  1074. * The close entry point is called when an interface is de-activated
  1075. * by the OS. The hardware is still under the drivers control, but
  1076. * needs to be disabled. A global MAC reset is issued to stop the
  1077. * hardware, and all transmit and receive resources are freed.
  1078. **/
  1079. static int
  1080. e1000_close(struct net_device *netdev)
  1081. {
  1082. struct e1000_adapter *adapter = netdev_priv(netdev);
  1083. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1084. e1000_down(adapter);
  1085. e1000_power_down_phy(adapter);
  1086. e1000_free_irq(adapter);
  1087. e1000_free_all_tx_resources(adapter);
  1088. e1000_free_all_rx_resources(adapter);
  1089. if ((adapter->hw.mng_cookie.status &
  1090. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1091. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1092. }
  1093. /* If AMT is enabled, let the firmware know that the network
  1094. * interface is now closed */
  1095. if (adapter->hw.mac_type == e1000_82573 &&
  1096. e1000_check_mng_mode(&adapter->hw))
  1097. e1000_release_hw_control(adapter);
  1098. return 0;
  1099. }
  1100. /**
  1101. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1102. * @adapter: address of board private structure
  1103. * @start: address of beginning of memory
  1104. * @len: length of memory
  1105. **/
  1106. static boolean_t
  1107. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1108. void *start, unsigned long len)
  1109. {
  1110. unsigned long begin = (unsigned long) start;
  1111. unsigned long end = begin + len;
  1112. /* First rev 82545 and 82546 need to not allow any memory
  1113. * write location to cross 64k boundary due to errata 23 */
  1114. if (adapter->hw.mac_type == e1000_82545 ||
  1115. adapter->hw.mac_type == e1000_82546) {
  1116. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1117. }
  1118. return TRUE;
  1119. }
  1120. /**
  1121. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1122. * @adapter: board private structure
  1123. * @txdr: tx descriptor ring (for a specific queue) to setup
  1124. *
  1125. * Return 0 on success, negative on failure
  1126. **/
  1127. static int
  1128. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1129. struct e1000_tx_ring *txdr)
  1130. {
  1131. struct pci_dev *pdev = adapter->pdev;
  1132. int size;
  1133. size = sizeof(struct e1000_buffer) * txdr->count;
  1134. txdr->buffer_info = vmalloc(size);
  1135. if (!txdr->buffer_info) {
  1136. DPRINTK(PROBE, ERR,
  1137. "Unable to allocate memory for the transmit descriptor ring\n");
  1138. return -ENOMEM;
  1139. }
  1140. memset(txdr->buffer_info, 0, size);
  1141. /* round up to nearest 4K */
  1142. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1143. E1000_ROUNDUP(txdr->size, 4096);
  1144. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1145. if (!txdr->desc) {
  1146. setup_tx_desc_die:
  1147. vfree(txdr->buffer_info);
  1148. DPRINTK(PROBE, ERR,
  1149. "Unable to allocate memory for the transmit descriptor ring\n");
  1150. return -ENOMEM;
  1151. }
  1152. /* Fix for errata 23, can't cross 64kB boundary */
  1153. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1154. void *olddesc = txdr->desc;
  1155. dma_addr_t olddma = txdr->dma;
  1156. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1157. "at %p\n", txdr->size, txdr->desc);
  1158. /* Try again, without freeing the previous */
  1159. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1160. /* Failed allocation, critical failure */
  1161. if (!txdr->desc) {
  1162. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1163. goto setup_tx_desc_die;
  1164. }
  1165. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1166. /* give up */
  1167. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1168. txdr->dma);
  1169. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1170. DPRINTK(PROBE, ERR,
  1171. "Unable to allocate aligned memory "
  1172. "for the transmit descriptor ring\n");
  1173. vfree(txdr->buffer_info);
  1174. return -ENOMEM;
  1175. } else {
  1176. /* Free old allocation, new allocation was successful */
  1177. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1178. }
  1179. }
  1180. memset(txdr->desc, 0, txdr->size);
  1181. txdr->next_to_use = 0;
  1182. txdr->next_to_clean = 0;
  1183. spin_lock_init(&txdr->tx_lock);
  1184. return 0;
  1185. }
  1186. /**
  1187. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1188. * (Descriptors) for all queues
  1189. * @adapter: board private structure
  1190. *
  1191. * Return 0 on success, negative on failure
  1192. **/
  1193. int
  1194. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1195. {
  1196. int i, err = 0;
  1197. for (i = 0; i < adapter->num_tx_queues; i++) {
  1198. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1199. if (err) {
  1200. DPRINTK(PROBE, ERR,
  1201. "Allocation for Tx Queue %u failed\n", i);
  1202. for (i-- ; i >= 0; i--)
  1203. e1000_free_tx_resources(adapter,
  1204. &adapter->tx_ring[i]);
  1205. break;
  1206. }
  1207. }
  1208. return err;
  1209. }
  1210. /**
  1211. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1212. * @adapter: board private structure
  1213. *
  1214. * Configure the Tx unit of the MAC after a reset.
  1215. **/
  1216. static void
  1217. e1000_configure_tx(struct e1000_adapter *adapter)
  1218. {
  1219. uint64_t tdba;
  1220. struct e1000_hw *hw = &adapter->hw;
  1221. uint32_t tdlen, tctl, tipg, tarc;
  1222. uint32_t ipgr1, ipgr2;
  1223. /* Setup the HW Tx Head and Tail descriptor pointers */
  1224. switch (adapter->num_tx_queues) {
  1225. case 1:
  1226. default:
  1227. tdba = adapter->tx_ring[0].dma;
  1228. tdlen = adapter->tx_ring[0].count *
  1229. sizeof(struct e1000_tx_desc);
  1230. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1231. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1232. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1233. E1000_WRITE_REG(hw, TDT, 0);
  1234. E1000_WRITE_REG(hw, TDH, 0);
  1235. adapter->tx_ring[0].tdh = E1000_TDH;
  1236. adapter->tx_ring[0].tdt = E1000_TDT;
  1237. break;
  1238. }
  1239. /* Set the default values for the Tx Inter Packet Gap timer */
  1240. if (hw->media_type == e1000_media_type_fiber ||
  1241. hw->media_type == e1000_media_type_internal_serdes)
  1242. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1243. else
  1244. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1245. switch (hw->mac_type) {
  1246. case e1000_82542_rev2_0:
  1247. case e1000_82542_rev2_1:
  1248. tipg = DEFAULT_82542_TIPG_IPGT;
  1249. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1250. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1251. break;
  1252. case e1000_80003es2lan:
  1253. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1254. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1255. break;
  1256. default:
  1257. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1258. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1259. break;
  1260. }
  1261. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1262. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1263. E1000_WRITE_REG(hw, TIPG, tipg);
  1264. /* Set the Tx Interrupt Delay register */
  1265. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1266. if (hw->mac_type >= e1000_82540)
  1267. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1268. /* Program the Transmit Control Register */
  1269. tctl = E1000_READ_REG(hw, TCTL);
  1270. tctl &= ~E1000_TCTL_CT;
  1271. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1272. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1273. #ifdef DISABLE_MULR
  1274. /* disable Multiple Reads for debugging */
  1275. tctl &= ~E1000_TCTL_MULR;
  1276. #endif
  1277. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1278. tarc = E1000_READ_REG(hw, TARC0);
  1279. tarc |= ((1 << 25) | (1 << 21));
  1280. E1000_WRITE_REG(hw, TARC0, tarc);
  1281. tarc = E1000_READ_REG(hw, TARC1);
  1282. tarc |= (1 << 25);
  1283. if (tctl & E1000_TCTL_MULR)
  1284. tarc &= ~(1 << 28);
  1285. else
  1286. tarc |= (1 << 28);
  1287. E1000_WRITE_REG(hw, TARC1, tarc);
  1288. } else if (hw->mac_type == e1000_80003es2lan) {
  1289. tarc = E1000_READ_REG(hw, TARC0);
  1290. tarc |= 1;
  1291. E1000_WRITE_REG(hw, TARC0, tarc);
  1292. tarc = E1000_READ_REG(hw, TARC1);
  1293. tarc |= 1;
  1294. E1000_WRITE_REG(hw, TARC1, tarc);
  1295. }
  1296. e1000_config_collision_dist(hw);
  1297. /* Setup Transmit Descriptor Settings for eop descriptor */
  1298. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1299. E1000_TXD_CMD_IFCS;
  1300. if (hw->mac_type < e1000_82543)
  1301. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1302. else
  1303. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1304. /* Cache if we're 82544 running in PCI-X because we'll
  1305. * need this to apply a workaround later in the send path. */
  1306. if (hw->mac_type == e1000_82544 &&
  1307. hw->bus_type == e1000_bus_type_pcix)
  1308. adapter->pcix_82544 = 1;
  1309. E1000_WRITE_REG(hw, TCTL, tctl);
  1310. }
  1311. /**
  1312. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1313. * @adapter: board private structure
  1314. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1315. *
  1316. * Returns 0 on success, negative on failure
  1317. **/
  1318. static int
  1319. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1320. struct e1000_rx_ring *rxdr)
  1321. {
  1322. struct pci_dev *pdev = adapter->pdev;
  1323. int size, desc_len;
  1324. size = sizeof(struct e1000_buffer) * rxdr->count;
  1325. rxdr->buffer_info = vmalloc(size);
  1326. if (!rxdr->buffer_info) {
  1327. DPRINTK(PROBE, ERR,
  1328. "Unable to allocate memory for the receive descriptor ring\n");
  1329. return -ENOMEM;
  1330. }
  1331. memset(rxdr->buffer_info, 0, size);
  1332. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1333. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1334. if (!rxdr->ps_page) {
  1335. vfree(rxdr->buffer_info);
  1336. DPRINTK(PROBE, ERR,
  1337. "Unable to allocate memory for the receive descriptor ring\n");
  1338. return -ENOMEM;
  1339. }
  1340. memset(rxdr->ps_page, 0, size);
  1341. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1342. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1343. if (!rxdr->ps_page_dma) {
  1344. vfree(rxdr->buffer_info);
  1345. kfree(rxdr->ps_page);
  1346. DPRINTK(PROBE, ERR,
  1347. "Unable to allocate memory for the receive descriptor ring\n");
  1348. return -ENOMEM;
  1349. }
  1350. memset(rxdr->ps_page_dma, 0, size);
  1351. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1352. desc_len = sizeof(struct e1000_rx_desc);
  1353. else
  1354. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1355. /* Round up to nearest 4K */
  1356. rxdr->size = rxdr->count * desc_len;
  1357. E1000_ROUNDUP(rxdr->size, 4096);
  1358. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1359. if (!rxdr->desc) {
  1360. DPRINTK(PROBE, ERR,
  1361. "Unable to allocate memory for the receive descriptor ring\n");
  1362. setup_rx_desc_die:
  1363. vfree(rxdr->buffer_info);
  1364. kfree(rxdr->ps_page);
  1365. kfree(rxdr->ps_page_dma);
  1366. return -ENOMEM;
  1367. }
  1368. /* Fix for errata 23, can't cross 64kB boundary */
  1369. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1370. void *olddesc = rxdr->desc;
  1371. dma_addr_t olddma = rxdr->dma;
  1372. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1373. "at %p\n", rxdr->size, rxdr->desc);
  1374. /* Try again, without freeing the previous */
  1375. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1376. /* Failed allocation, critical failure */
  1377. if (!rxdr->desc) {
  1378. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1379. DPRINTK(PROBE, ERR,
  1380. "Unable to allocate memory "
  1381. "for the receive descriptor ring\n");
  1382. goto setup_rx_desc_die;
  1383. }
  1384. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1385. /* give up */
  1386. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1387. rxdr->dma);
  1388. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1389. DPRINTK(PROBE, ERR,
  1390. "Unable to allocate aligned memory "
  1391. "for the receive descriptor ring\n");
  1392. goto setup_rx_desc_die;
  1393. } else {
  1394. /* Free old allocation, new allocation was successful */
  1395. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1396. }
  1397. }
  1398. memset(rxdr->desc, 0, rxdr->size);
  1399. rxdr->next_to_clean = 0;
  1400. rxdr->next_to_use = 0;
  1401. return 0;
  1402. }
  1403. /**
  1404. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1405. * (Descriptors) for all queues
  1406. * @adapter: board private structure
  1407. *
  1408. * Return 0 on success, negative on failure
  1409. **/
  1410. int
  1411. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1412. {
  1413. int i, err = 0;
  1414. for (i = 0; i < adapter->num_rx_queues; i++) {
  1415. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1416. if (err) {
  1417. DPRINTK(PROBE, ERR,
  1418. "Allocation for Rx Queue %u failed\n", i);
  1419. for (i-- ; i >= 0; i--)
  1420. e1000_free_rx_resources(adapter,
  1421. &adapter->rx_ring[i]);
  1422. break;
  1423. }
  1424. }
  1425. return err;
  1426. }
  1427. /**
  1428. * e1000_setup_rctl - configure the receive control registers
  1429. * @adapter: Board private structure
  1430. **/
  1431. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1432. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1433. static void
  1434. e1000_setup_rctl(struct e1000_adapter *adapter)
  1435. {
  1436. uint32_t rctl, rfctl;
  1437. uint32_t psrctl = 0;
  1438. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1439. uint32_t pages = 0;
  1440. #endif
  1441. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1442. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1443. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1444. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1445. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1446. if (adapter->hw.tbi_compatibility_on == 1)
  1447. rctl |= E1000_RCTL_SBP;
  1448. else
  1449. rctl &= ~E1000_RCTL_SBP;
  1450. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1451. rctl &= ~E1000_RCTL_LPE;
  1452. else
  1453. rctl |= E1000_RCTL_LPE;
  1454. /* Setup buffer sizes */
  1455. rctl &= ~E1000_RCTL_SZ_4096;
  1456. rctl |= E1000_RCTL_BSEX;
  1457. switch (adapter->rx_buffer_len) {
  1458. case E1000_RXBUFFER_256:
  1459. rctl |= E1000_RCTL_SZ_256;
  1460. rctl &= ~E1000_RCTL_BSEX;
  1461. break;
  1462. case E1000_RXBUFFER_512:
  1463. rctl |= E1000_RCTL_SZ_512;
  1464. rctl &= ~E1000_RCTL_BSEX;
  1465. break;
  1466. case E1000_RXBUFFER_1024:
  1467. rctl |= E1000_RCTL_SZ_1024;
  1468. rctl &= ~E1000_RCTL_BSEX;
  1469. break;
  1470. case E1000_RXBUFFER_2048:
  1471. default:
  1472. rctl |= E1000_RCTL_SZ_2048;
  1473. rctl &= ~E1000_RCTL_BSEX;
  1474. break;
  1475. case E1000_RXBUFFER_4096:
  1476. rctl |= E1000_RCTL_SZ_4096;
  1477. break;
  1478. case E1000_RXBUFFER_8192:
  1479. rctl |= E1000_RCTL_SZ_8192;
  1480. break;
  1481. case E1000_RXBUFFER_16384:
  1482. rctl |= E1000_RCTL_SZ_16384;
  1483. break;
  1484. }
  1485. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1486. /* 82571 and greater support packet-split where the protocol
  1487. * header is placed in skb->data and the packet data is
  1488. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1489. * In the case of a non-split, skb->data is linearly filled,
  1490. * followed by the page buffers. Therefore, skb->data is
  1491. * sized to hold the largest protocol header.
  1492. */
  1493. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1494. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1495. PAGE_SIZE <= 16384)
  1496. adapter->rx_ps_pages = pages;
  1497. else
  1498. adapter->rx_ps_pages = 0;
  1499. #endif
  1500. if (adapter->rx_ps_pages) {
  1501. /* Configure extra packet-split registers */
  1502. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1503. rfctl |= E1000_RFCTL_EXTEN;
  1504. /* disable IPv6 packet split support */
  1505. rfctl |= E1000_RFCTL_IPV6_DIS;
  1506. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1507. rctl |= E1000_RCTL_DTYP_PS;
  1508. psrctl |= adapter->rx_ps_bsize0 >>
  1509. E1000_PSRCTL_BSIZE0_SHIFT;
  1510. switch (adapter->rx_ps_pages) {
  1511. case 3:
  1512. psrctl |= PAGE_SIZE <<
  1513. E1000_PSRCTL_BSIZE3_SHIFT;
  1514. case 2:
  1515. psrctl |= PAGE_SIZE <<
  1516. E1000_PSRCTL_BSIZE2_SHIFT;
  1517. case 1:
  1518. psrctl |= PAGE_SIZE >>
  1519. E1000_PSRCTL_BSIZE1_SHIFT;
  1520. break;
  1521. }
  1522. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1523. }
  1524. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1525. }
  1526. /**
  1527. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1528. * @adapter: board private structure
  1529. *
  1530. * Configure the Rx unit of the MAC after a reset.
  1531. **/
  1532. static void
  1533. e1000_configure_rx(struct e1000_adapter *adapter)
  1534. {
  1535. uint64_t rdba;
  1536. struct e1000_hw *hw = &adapter->hw;
  1537. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1538. if (adapter->rx_ps_pages) {
  1539. /* this is a 32 byte descriptor */
  1540. rdlen = adapter->rx_ring[0].count *
  1541. sizeof(union e1000_rx_desc_packet_split);
  1542. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1543. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1544. } else {
  1545. rdlen = adapter->rx_ring[0].count *
  1546. sizeof(struct e1000_rx_desc);
  1547. adapter->clean_rx = e1000_clean_rx_irq;
  1548. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1549. }
  1550. /* disable receives while setting up the descriptors */
  1551. rctl = E1000_READ_REG(hw, RCTL);
  1552. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1553. /* set the Receive Delay Timer Register */
  1554. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1555. if (hw->mac_type >= e1000_82540) {
  1556. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1557. if (adapter->itr > 1)
  1558. E1000_WRITE_REG(hw, ITR,
  1559. 1000000000 / (adapter->itr * 256));
  1560. }
  1561. if (hw->mac_type >= e1000_82571) {
  1562. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1563. /* Reset delay timers after every interrupt */
  1564. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1565. #ifdef CONFIG_E1000_NAPI
  1566. /* Auto-Mask interrupts upon ICR read. */
  1567. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1568. #endif
  1569. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1570. E1000_WRITE_REG(hw, IAM, ~0);
  1571. E1000_WRITE_FLUSH(hw);
  1572. }
  1573. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1574. * the Base and Length of the Rx Descriptor Ring */
  1575. switch (adapter->num_rx_queues) {
  1576. case 1:
  1577. default:
  1578. rdba = adapter->rx_ring[0].dma;
  1579. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1580. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1581. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1582. E1000_WRITE_REG(hw, RDT, 0);
  1583. E1000_WRITE_REG(hw, RDH, 0);
  1584. adapter->rx_ring[0].rdh = E1000_RDH;
  1585. adapter->rx_ring[0].rdt = E1000_RDT;
  1586. break;
  1587. }
  1588. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1589. if (hw->mac_type >= e1000_82543) {
  1590. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1591. if (adapter->rx_csum == TRUE) {
  1592. rxcsum |= E1000_RXCSUM_TUOFL;
  1593. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1594. * Must be used in conjunction with packet-split. */
  1595. if ((hw->mac_type >= e1000_82571) &&
  1596. (adapter->rx_ps_pages)) {
  1597. rxcsum |= E1000_RXCSUM_IPPCSE;
  1598. }
  1599. } else {
  1600. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1601. /* don't need to clear IPPCSE as it defaults to 0 */
  1602. }
  1603. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1604. }
  1605. /* Enable Receives */
  1606. E1000_WRITE_REG(hw, RCTL, rctl);
  1607. }
  1608. /**
  1609. * e1000_free_tx_resources - Free Tx Resources per Queue
  1610. * @adapter: board private structure
  1611. * @tx_ring: Tx descriptor ring for a specific queue
  1612. *
  1613. * Free all transmit software resources
  1614. **/
  1615. static void
  1616. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1617. struct e1000_tx_ring *tx_ring)
  1618. {
  1619. struct pci_dev *pdev = adapter->pdev;
  1620. e1000_clean_tx_ring(adapter, tx_ring);
  1621. vfree(tx_ring->buffer_info);
  1622. tx_ring->buffer_info = NULL;
  1623. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1624. tx_ring->desc = NULL;
  1625. }
  1626. /**
  1627. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1628. * @adapter: board private structure
  1629. *
  1630. * Free all transmit software resources
  1631. **/
  1632. void
  1633. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1634. {
  1635. int i;
  1636. for (i = 0; i < adapter->num_tx_queues; i++)
  1637. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1638. }
  1639. static void
  1640. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1641. struct e1000_buffer *buffer_info)
  1642. {
  1643. if (buffer_info->dma) {
  1644. pci_unmap_page(adapter->pdev,
  1645. buffer_info->dma,
  1646. buffer_info->length,
  1647. PCI_DMA_TODEVICE);
  1648. }
  1649. if (buffer_info->skb)
  1650. dev_kfree_skb_any(buffer_info->skb);
  1651. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1652. }
  1653. /**
  1654. * e1000_clean_tx_ring - Free Tx Buffers
  1655. * @adapter: board private structure
  1656. * @tx_ring: ring to be cleaned
  1657. **/
  1658. static void
  1659. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1660. struct e1000_tx_ring *tx_ring)
  1661. {
  1662. struct e1000_buffer *buffer_info;
  1663. unsigned long size;
  1664. unsigned int i;
  1665. /* Free all the Tx ring sk_buffs */
  1666. for (i = 0; i < tx_ring->count; i++) {
  1667. buffer_info = &tx_ring->buffer_info[i];
  1668. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1669. }
  1670. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1671. memset(tx_ring->buffer_info, 0, size);
  1672. /* Zero out the descriptor ring */
  1673. memset(tx_ring->desc, 0, tx_ring->size);
  1674. tx_ring->next_to_use = 0;
  1675. tx_ring->next_to_clean = 0;
  1676. tx_ring->last_tx_tso = 0;
  1677. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1678. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1679. }
  1680. /**
  1681. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1682. * @adapter: board private structure
  1683. **/
  1684. static void
  1685. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1686. {
  1687. int i;
  1688. for (i = 0; i < adapter->num_tx_queues; i++)
  1689. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1690. }
  1691. /**
  1692. * e1000_free_rx_resources - Free Rx Resources
  1693. * @adapter: board private structure
  1694. * @rx_ring: ring to clean the resources from
  1695. *
  1696. * Free all receive software resources
  1697. **/
  1698. static void
  1699. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1700. struct e1000_rx_ring *rx_ring)
  1701. {
  1702. struct pci_dev *pdev = adapter->pdev;
  1703. e1000_clean_rx_ring(adapter, rx_ring);
  1704. vfree(rx_ring->buffer_info);
  1705. rx_ring->buffer_info = NULL;
  1706. kfree(rx_ring->ps_page);
  1707. rx_ring->ps_page = NULL;
  1708. kfree(rx_ring->ps_page_dma);
  1709. rx_ring->ps_page_dma = NULL;
  1710. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1711. rx_ring->desc = NULL;
  1712. }
  1713. /**
  1714. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1715. * @adapter: board private structure
  1716. *
  1717. * Free all receive software resources
  1718. **/
  1719. void
  1720. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1721. {
  1722. int i;
  1723. for (i = 0; i < adapter->num_rx_queues; i++)
  1724. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1725. }
  1726. /**
  1727. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1728. * @adapter: board private structure
  1729. * @rx_ring: ring to free buffers from
  1730. **/
  1731. static void
  1732. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1733. struct e1000_rx_ring *rx_ring)
  1734. {
  1735. struct e1000_buffer *buffer_info;
  1736. struct e1000_ps_page *ps_page;
  1737. struct e1000_ps_page_dma *ps_page_dma;
  1738. struct pci_dev *pdev = adapter->pdev;
  1739. unsigned long size;
  1740. unsigned int i, j;
  1741. /* Free all the Rx ring sk_buffs */
  1742. for (i = 0; i < rx_ring->count; i++) {
  1743. buffer_info = &rx_ring->buffer_info[i];
  1744. if (buffer_info->skb) {
  1745. pci_unmap_single(pdev,
  1746. buffer_info->dma,
  1747. buffer_info->length,
  1748. PCI_DMA_FROMDEVICE);
  1749. dev_kfree_skb(buffer_info->skb);
  1750. buffer_info->skb = NULL;
  1751. }
  1752. ps_page = &rx_ring->ps_page[i];
  1753. ps_page_dma = &rx_ring->ps_page_dma[i];
  1754. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1755. if (!ps_page->ps_page[j]) break;
  1756. pci_unmap_page(pdev,
  1757. ps_page_dma->ps_page_dma[j],
  1758. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1759. ps_page_dma->ps_page_dma[j] = 0;
  1760. put_page(ps_page->ps_page[j]);
  1761. ps_page->ps_page[j] = NULL;
  1762. }
  1763. }
  1764. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1765. memset(rx_ring->buffer_info, 0, size);
  1766. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1767. memset(rx_ring->ps_page, 0, size);
  1768. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1769. memset(rx_ring->ps_page_dma, 0, size);
  1770. /* Zero out the descriptor ring */
  1771. memset(rx_ring->desc, 0, rx_ring->size);
  1772. rx_ring->next_to_clean = 0;
  1773. rx_ring->next_to_use = 0;
  1774. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1775. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1776. }
  1777. /**
  1778. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1779. * @adapter: board private structure
  1780. **/
  1781. static void
  1782. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1783. {
  1784. int i;
  1785. for (i = 0; i < adapter->num_rx_queues; i++)
  1786. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1787. }
  1788. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1789. * and memory write and invalidate disabled for certain operations
  1790. */
  1791. static void
  1792. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1793. {
  1794. struct net_device *netdev = adapter->netdev;
  1795. uint32_t rctl;
  1796. e1000_pci_clear_mwi(&adapter->hw);
  1797. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1798. rctl |= E1000_RCTL_RST;
  1799. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1800. E1000_WRITE_FLUSH(&adapter->hw);
  1801. mdelay(5);
  1802. if (netif_running(netdev))
  1803. e1000_clean_all_rx_rings(adapter);
  1804. }
  1805. static void
  1806. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1807. {
  1808. struct net_device *netdev = adapter->netdev;
  1809. uint32_t rctl;
  1810. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1811. rctl &= ~E1000_RCTL_RST;
  1812. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1813. E1000_WRITE_FLUSH(&adapter->hw);
  1814. mdelay(5);
  1815. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1816. e1000_pci_set_mwi(&adapter->hw);
  1817. if (netif_running(netdev)) {
  1818. /* No need to loop, because 82542 supports only 1 queue */
  1819. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1820. e1000_configure_rx(adapter);
  1821. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1822. }
  1823. }
  1824. /**
  1825. * e1000_set_mac - Change the Ethernet Address of the NIC
  1826. * @netdev: network interface device structure
  1827. * @p: pointer to an address structure
  1828. *
  1829. * Returns 0 on success, negative on failure
  1830. **/
  1831. static int
  1832. e1000_set_mac(struct net_device *netdev, void *p)
  1833. {
  1834. struct e1000_adapter *adapter = netdev_priv(netdev);
  1835. struct sockaddr *addr = p;
  1836. if (!is_valid_ether_addr(addr->sa_data))
  1837. return -EADDRNOTAVAIL;
  1838. /* 82542 2.0 needs to be in reset to write receive address registers */
  1839. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1840. e1000_enter_82542_rst(adapter);
  1841. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1842. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1843. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1844. /* With 82571 controllers, LAA may be overwritten (with the default)
  1845. * due to controller reset from the other port. */
  1846. if (adapter->hw.mac_type == e1000_82571) {
  1847. /* activate the work around */
  1848. adapter->hw.laa_is_present = 1;
  1849. /* Hold a copy of the LAA in RAR[14] This is done so that
  1850. * between the time RAR[0] gets clobbered and the time it
  1851. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1852. * of the RARs and no incoming packets directed to this port
  1853. * are dropped. Eventaully the LAA will be in RAR[0] and
  1854. * RAR[14] */
  1855. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1856. E1000_RAR_ENTRIES - 1);
  1857. }
  1858. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1859. e1000_leave_82542_rst(adapter);
  1860. return 0;
  1861. }
  1862. /**
  1863. * e1000_set_multi - Multicast and Promiscuous mode set
  1864. * @netdev: network interface device structure
  1865. *
  1866. * The set_multi entry point is called whenever the multicast address
  1867. * list or the network interface flags are updated. This routine is
  1868. * responsible for configuring the hardware for proper multicast,
  1869. * promiscuous mode, and all-multi behavior.
  1870. **/
  1871. static void
  1872. e1000_set_multi(struct net_device *netdev)
  1873. {
  1874. struct e1000_adapter *adapter = netdev_priv(netdev);
  1875. struct e1000_hw *hw = &adapter->hw;
  1876. struct dev_mc_list *mc_ptr;
  1877. uint32_t rctl;
  1878. uint32_t hash_value;
  1879. int i, rar_entries = E1000_RAR_ENTRIES;
  1880. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1881. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1882. E1000_NUM_MTA_REGISTERS;
  1883. if (adapter->hw.mac_type == e1000_ich8lan)
  1884. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1885. /* reserve RAR[14] for LAA over-write work-around */
  1886. if (adapter->hw.mac_type == e1000_82571)
  1887. rar_entries--;
  1888. /* Check for Promiscuous and All Multicast modes */
  1889. rctl = E1000_READ_REG(hw, RCTL);
  1890. if (netdev->flags & IFF_PROMISC) {
  1891. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1892. } else if (netdev->flags & IFF_ALLMULTI) {
  1893. rctl |= E1000_RCTL_MPE;
  1894. rctl &= ~E1000_RCTL_UPE;
  1895. } else {
  1896. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1897. }
  1898. E1000_WRITE_REG(hw, RCTL, rctl);
  1899. /* 82542 2.0 needs to be in reset to write receive address registers */
  1900. if (hw->mac_type == e1000_82542_rev2_0)
  1901. e1000_enter_82542_rst(adapter);
  1902. /* load the first 14 multicast address into the exact filters 1-14
  1903. * RAR 0 is used for the station MAC adddress
  1904. * if there are not 14 addresses, go ahead and clear the filters
  1905. * -- with 82571 controllers only 0-13 entries are filled here
  1906. */
  1907. mc_ptr = netdev->mc_list;
  1908. for (i = 1; i < rar_entries; i++) {
  1909. if (mc_ptr) {
  1910. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1911. mc_ptr = mc_ptr->next;
  1912. } else {
  1913. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1914. E1000_WRITE_FLUSH(hw);
  1915. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1916. E1000_WRITE_FLUSH(hw);
  1917. }
  1918. }
  1919. /* clear the old settings from the multicast hash table */
  1920. for (i = 0; i < mta_reg_count; i++) {
  1921. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1922. E1000_WRITE_FLUSH(hw);
  1923. }
  1924. /* load any remaining addresses into the hash table */
  1925. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1926. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1927. e1000_mta_set(hw, hash_value);
  1928. }
  1929. if (hw->mac_type == e1000_82542_rev2_0)
  1930. e1000_leave_82542_rst(adapter);
  1931. }
  1932. /* Need to wait a few seconds after link up to get diagnostic information from
  1933. * the phy */
  1934. static void
  1935. e1000_update_phy_info(unsigned long data)
  1936. {
  1937. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1938. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1939. }
  1940. /**
  1941. * e1000_82547_tx_fifo_stall - Timer Call-back
  1942. * @data: pointer to adapter cast into an unsigned long
  1943. **/
  1944. static void
  1945. e1000_82547_tx_fifo_stall(unsigned long data)
  1946. {
  1947. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1948. struct net_device *netdev = adapter->netdev;
  1949. uint32_t tctl;
  1950. if (atomic_read(&adapter->tx_fifo_stall)) {
  1951. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1952. E1000_READ_REG(&adapter->hw, TDH)) &&
  1953. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1954. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1955. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1956. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1957. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1958. E1000_WRITE_REG(&adapter->hw, TCTL,
  1959. tctl & ~E1000_TCTL_EN);
  1960. E1000_WRITE_REG(&adapter->hw, TDFT,
  1961. adapter->tx_head_addr);
  1962. E1000_WRITE_REG(&adapter->hw, TDFH,
  1963. adapter->tx_head_addr);
  1964. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1965. adapter->tx_head_addr);
  1966. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1967. adapter->tx_head_addr);
  1968. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1969. E1000_WRITE_FLUSH(&adapter->hw);
  1970. adapter->tx_fifo_head = 0;
  1971. atomic_set(&adapter->tx_fifo_stall, 0);
  1972. netif_wake_queue(netdev);
  1973. } else {
  1974. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1975. }
  1976. }
  1977. }
  1978. /**
  1979. * e1000_watchdog - Timer Call-back
  1980. * @data: pointer to adapter cast into an unsigned long
  1981. **/
  1982. static void
  1983. e1000_watchdog(unsigned long data)
  1984. {
  1985. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1986. struct net_device *netdev = adapter->netdev;
  1987. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1988. uint32_t link, tctl;
  1989. int32_t ret_val;
  1990. ret_val = e1000_check_for_link(&adapter->hw);
  1991. if ((ret_val == E1000_ERR_PHY) &&
  1992. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  1993. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  1994. /* See e1000_kumeran_lock_loss_workaround() */
  1995. DPRINTK(LINK, INFO,
  1996. "Gigabit has been disabled, downgrading speed\n");
  1997. }
  1998. if (adapter->hw.mac_type == e1000_82573) {
  1999. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2000. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2001. e1000_update_mng_vlan(adapter);
  2002. }
  2003. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2004. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2005. link = !adapter->hw.serdes_link_down;
  2006. else
  2007. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2008. if (link) {
  2009. if (!netif_carrier_ok(netdev)) {
  2010. boolean_t txb2b = 1;
  2011. e1000_get_speed_and_duplex(&adapter->hw,
  2012. &adapter->link_speed,
  2013. &adapter->link_duplex);
  2014. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2015. adapter->link_speed,
  2016. adapter->link_duplex == FULL_DUPLEX ?
  2017. "Full Duplex" : "Half Duplex");
  2018. /* tweak tx_queue_len according to speed/duplex
  2019. * and adjust the timeout factor */
  2020. netdev->tx_queue_len = adapter->tx_queue_len;
  2021. adapter->tx_timeout_factor = 1;
  2022. switch (adapter->link_speed) {
  2023. case SPEED_10:
  2024. txb2b = 0;
  2025. netdev->tx_queue_len = 10;
  2026. adapter->tx_timeout_factor = 8;
  2027. break;
  2028. case SPEED_100:
  2029. txb2b = 0;
  2030. netdev->tx_queue_len = 100;
  2031. /* maybe add some timeout factor ? */
  2032. break;
  2033. }
  2034. if ((adapter->hw.mac_type == e1000_82571 ||
  2035. adapter->hw.mac_type == e1000_82572) &&
  2036. txb2b == 0) {
  2037. #define SPEED_MODE_BIT (1 << 21)
  2038. uint32_t tarc0;
  2039. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2040. tarc0 &= ~SPEED_MODE_BIT;
  2041. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2042. }
  2043. #ifdef NETIF_F_TSO
  2044. /* disable TSO for pcie and 10/100 speeds, to avoid
  2045. * some hardware issues */
  2046. if (!adapter->tso_force &&
  2047. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2048. switch (adapter->link_speed) {
  2049. case SPEED_10:
  2050. case SPEED_100:
  2051. DPRINTK(PROBE,INFO,
  2052. "10/100 speed: disabling TSO\n");
  2053. netdev->features &= ~NETIF_F_TSO;
  2054. break;
  2055. case SPEED_1000:
  2056. netdev->features |= NETIF_F_TSO;
  2057. break;
  2058. default:
  2059. /* oops */
  2060. break;
  2061. }
  2062. }
  2063. #endif
  2064. /* enable transmits in the hardware, need to do this
  2065. * after setting TARC0 */
  2066. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2067. tctl |= E1000_TCTL_EN;
  2068. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2069. netif_carrier_on(netdev);
  2070. netif_wake_queue(netdev);
  2071. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2072. adapter->smartspeed = 0;
  2073. }
  2074. } else {
  2075. if (netif_carrier_ok(netdev)) {
  2076. adapter->link_speed = 0;
  2077. adapter->link_duplex = 0;
  2078. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2079. netif_carrier_off(netdev);
  2080. netif_stop_queue(netdev);
  2081. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2082. /* 80003ES2LAN workaround--
  2083. * For packet buffer work-around on link down event;
  2084. * disable receives in the ISR and
  2085. * reset device here in the watchdog
  2086. */
  2087. if (adapter->hw.mac_type == e1000_80003es2lan)
  2088. /* reset device */
  2089. schedule_work(&adapter->reset_task);
  2090. }
  2091. e1000_smartspeed(adapter);
  2092. }
  2093. e1000_update_stats(adapter);
  2094. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2095. adapter->tpt_old = adapter->stats.tpt;
  2096. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2097. adapter->colc_old = adapter->stats.colc;
  2098. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2099. adapter->gorcl_old = adapter->stats.gorcl;
  2100. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2101. adapter->gotcl_old = adapter->stats.gotcl;
  2102. e1000_update_adaptive(&adapter->hw);
  2103. if (!netif_carrier_ok(netdev)) {
  2104. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2105. /* We've lost link, so the controller stops DMA,
  2106. * but we've got queued Tx work that's never going
  2107. * to get done, so reset controller to flush Tx.
  2108. * (Do the reset outside of interrupt context). */
  2109. adapter->tx_timeout_count++;
  2110. schedule_work(&adapter->reset_task);
  2111. }
  2112. }
  2113. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2114. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2115. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2116. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2117. * else is between 2000-8000. */
  2118. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2119. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2120. adapter->gotcl - adapter->gorcl :
  2121. adapter->gorcl - adapter->gotcl) / 10000;
  2122. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2123. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2124. }
  2125. /* Cause software interrupt to ensure rx ring is cleaned */
  2126. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2127. /* Force detection of hung controller every watchdog period */
  2128. adapter->detect_tx_hung = TRUE;
  2129. /* With 82571 controllers, LAA may be overwritten due to controller
  2130. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2131. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2132. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2133. /* Reset the timer */
  2134. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2135. }
  2136. #define E1000_TX_FLAGS_CSUM 0x00000001
  2137. #define E1000_TX_FLAGS_VLAN 0x00000002
  2138. #define E1000_TX_FLAGS_TSO 0x00000004
  2139. #define E1000_TX_FLAGS_IPV4 0x00000008
  2140. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2141. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2142. static int
  2143. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2144. struct sk_buff *skb)
  2145. {
  2146. #ifdef NETIF_F_TSO
  2147. struct e1000_context_desc *context_desc;
  2148. struct e1000_buffer *buffer_info;
  2149. unsigned int i;
  2150. uint32_t cmd_length = 0;
  2151. uint16_t ipcse = 0, tucse, mss;
  2152. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2153. int err;
  2154. if (skb_is_gso(skb)) {
  2155. if (skb_header_cloned(skb)) {
  2156. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2157. if (err)
  2158. return err;
  2159. }
  2160. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2161. mss = skb_shinfo(skb)->gso_size;
  2162. if (skb->protocol == htons(ETH_P_IP)) {
  2163. skb->nh.iph->tot_len = 0;
  2164. skb->nh.iph->check = 0;
  2165. skb->h.th->check =
  2166. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2167. skb->nh.iph->daddr,
  2168. 0,
  2169. IPPROTO_TCP,
  2170. 0);
  2171. cmd_length = E1000_TXD_CMD_IP;
  2172. ipcse = skb->h.raw - skb->data - 1;
  2173. #ifdef NETIF_F_TSO_IPV6
  2174. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2175. skb->nh.ipv6h->payload_len = 0;
  2176. skb->h.th->check =
  2177. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2178. &skb->nh.ipv6h->daddr,
  2179. 0,
  2180. IPPROTO_TCP,
  2181. 0);
  2182. ipcse = 0;
  2183. #endif
  2184. }
  2185. ipcss = skb->nh.raw - skb->data;
  2186. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2187. tucss = skb->h.raw - skb->data;
  2188. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2189. tucse = 0;
  2190. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2191. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2192. i = tx_ring->next_to_use;
  2193. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2194. buffer_info = &tx_ring->buffer_info[i];
  2195. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2196. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2197. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2198. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2199. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2200. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2201. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2202. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2203. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2204. buffer_info->time_stamp = jiffies;
  2205. if (++i == tx_ring->count) i = 0;
  2206. tx_ring->next_to_use = i;
  2207. return TRUE;
  2208. }
  2209. #endif
  2210. return FALSE;
  2211. }
  2212. static boolean_t
  2213. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2214. struct sk_buff *skb)
  2215. {
  2216. struct e1000_context_desc *context_desc;
  2217. struct e1000_buffer *buffer_info;
  2218. unsigned int i;
  2219. uint8_t css;
  2220. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2221. css = skb->h.raw - skb->data;
  2222. i = tx_ring->next_to_use;
  2223. buffer_info = &tx_ring->buffer_info[i];
  2224. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2225. context_desc->upper_setup.tcp_fields.tucss = css;
  2226. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2227. context_desc->upper_setup.tcp_fields.tucse = 0;
  2228. context_desc->tcp_seg_setup.data = 0;
  2229. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2230. buffer_info->time_stamp = jiffies;
  2231. if (unlikely(++i == tx_ring->count)) i = 0;
  2232. tx_ring->next_to_use = i;
  2233. return TRUE;
  2234. }
  2235. return FALSE;
  2236. }
  2237. #define E1000_MAX_TXD_PWR 12
  2238. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2239. static int
  2240. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2241. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2242. unsigned int nr_frags, unsigned int mss)
  2243. {
  2244. struct e1000_buffer *buffer_info;
  2245. unsigned int len = skb->len;
  2246. unsigned int offset = 0, size, count = 0, i;
  2247. unsigned int f;
  2248. len -= skb->data_len;
  2249. i = tx_ring->next_to_use;
  2250. while (len) {
  2251. buffer_info = &tx_ring->buffer_info[i];
  2252. size = min(len, max_per_txd);
  2253. #ifdef NETIF_F_TSO
  2254. /* Workaround for Controller erratum --
  2255. * descriptor for non-tso packet in a linear SKB that follows a
  2256. * tso gets written back prematurely before the data is fully
  2257. * DMA'd to the controller */
  2258. if (!skb->data_len && tx_ring->last_tx_tso &&
  2259. !skb_is_gso(skb)) {
  2260. tx_ring->last_tx_tso = 0;
  2261. size -= 4;
  2262. }
  2263. /* Workaround for premature desc write-backs
  2264. * in TSO mode. Append 4-byte sentinel desc */
  2265. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2266. size -= 4;
  2267. #endif
  2268. /* work-around for errata 10 and it applies
  2269. * to all controllers in PCI-X mode
  2270. * The fix is to make sure that the first descriptor of a
  2271. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2272. */
  2273. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2274. (size > 2015) && count == 0))
  2275. size = 2015;
  2276. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2277. * terminating buffers within evenly-aligned dwords. */
  2278. if (unlikely(adapter->pcix_82544 &&
  2279. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2280. size > 4))
  2281. size -= 4;
  2282. buffer_info->length = size;
  2283. buffer_info->dma =
  2284. pci_map_single(adapter->pdev,
  2285. skb->data + offset,
  2286. size,
  2287. PCI_DMA_TODEVICE);
  2288. buffer_info->time_stamp = jiffies;
  2289. len -= size;
  2290. offset += size;
  2291. count++;
  2292. if (unlikely(++i == tx_ring->count)) i = 0;
  2293. }
  2294. for (f = 0; f < nr_frags; f++) {
  2295. struct skb_frag_struct *frag;
  2296. frag = &skb_shinfo(skb)->frags[f];
  2297. len = frag->size;
  2298. offset = frag->page_offset;
  2299. while (len) {
  2300. buffer_info = &tx_ring->buffer_info[i];
  2301. size = min(len, max_per_txd);
  2302. #ifdef NETIF_F_TSO
  2303. /* Workaround for premature desc write-backs
  2304. * in TSO mode. Append 4-byte sentinel desc */
  2305. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2306. size -= 4;
  2307. #endif
  2308. /* Workaround for potential 82544 hang in PCI-X.
  2309. * Avoid terminating buffers within evenly-aligned
  2310. * dwords. */
  2311. if (unlikely(adapter->pcix_82544 &&
  2312. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2313. size > 4))
  2314. size -= 4;
  2315. buffer_info->length = size;
  2316. buffer_info->dma =
  2317. pci_map_page(adapter->pdev,
  2318. frag->page,
  2319. offset,
  2320. size,
  2321. PCI_DMA_TODEVICE);
  2322. buffer_info->time_stamp = jiffies;
  2323. len -= size;
  2324. offset += size;
  2325. count++;
  2326. if (unlikely(++i == tx_ring->count)) i = 0;
  2327. }
  2328. }
  2329. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2330. tx_ring->buffer_info[i].skb = skb;
  2331. tx_ring->buffer_info[first].next_to_watch = i;
  2332. return count;
  2333. }
  2334. static void
  2335. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2336. int tx_flags, int count)
  2337. {
  2338. struct e1000_tx_desc *tx_desc = NULL;
  2339. struct e1000_buffer *buffer_info;
  2340. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2341. unsigned int i;
  2342. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2343. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2344. E1000_TXD_CMD_TSE;
  2345. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2346. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2347. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2348. }
  2349. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2350. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2351. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2352. }
  2353. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2354. txd_lower |= E1000_TXD_CMD_VLE;
  2355. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2356. }
  2357. i = tx_ring->next_to_use;
  2358. while (count--) {
  2359. buffer_info = &tx_ring->buffer_info[i];
  2360. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2361. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2362. tx_desc->lower.data =
  2363. cpu_to_le32(txd_lower | buffer_info->length);
  2364. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2365. if (unlikely(++i == tx_ring->count)) i = 0;
  2366. }
  2367. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2368. /* Force memory writes to complete before letting h/w
  2369. * know there are new descriptors to fetch. (Only
  2370. * applicable for weak-ordered memory model archs,
  2371. * such as IA-64). */
  2372. wmb();
  2373. tx_ring->next_to_use = i;
  2374. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2375. }
  2376. /**
  2377. * 82547 workaround to avoid controller hang in half-duplex environment.
  2378. * The workaround is to avoid queuing a large packet that would span
  2379. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2380. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2381. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2382. * to the beginning of the Tx FIFO.
  2383. **/
  2384. #define E1000_FIFO_HDR 0x10
  2385. #define E1000_82547_PAD_LEN 0x3E0
  2386. static int
  2387. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2388. {
  2389. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2390. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2391. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2392. if (adapter->link_duplex != HALF_DUPLEX)
  2393. goto no_fifo_stall_required;
  2394. if (atomic_read(&adapter->tx_fifo_stall))
  2395. return 1;
  2396. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2397. atomic_set(&adapter->tx_fifo_stall, 1);
  2398. return 1;
  2399. }
  2400. no_fifo_stall_required:
  2401. adapter->tx_fifo_head += skb_fifo_len;
  2402. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2403. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2404. return 0;
  2405. }
  2406. #define MINIMUM_DHCP_PACKET_SIZE 282
  2407. static int
  2408. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2409. {
  2410. struct e1000_hw *hw = &adapter->hw;
  2411. uint16_t length, offset;
  2412. if (vlan_tx_tag_present(skb)) {
  2413. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2414. ( adapter->hw.mng_cookie.status &
  2415. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2416. return 0;
  2417. }
  2418. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2419. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2420. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2421. const struct iphdr *ip =
  2422. (struct iphdr *)((uint8_t *)skb->data+14);
  2423. if (IPPROTO_UDP == ip->protocol) {
  2424. struct udphdr *udp =
  2425. (struct udphdr *)((uint8_t *)ip +
  2426. (ip->ihl << 2));
  2427. if (ntohs(udp->dest) == 67) {
  2428. offset = (uint8_t *)udp + 8 - skb->data;
  2429. length = skb->len - offset;
  2430. return e1000_mng_write_dhcp_info(hw,
  2431. (uint8_t *)udp + 8,
  2432. length);
  2433. }
  2434. }
  2435. }
  2436. }
  2437. return 0;
  2438. }
  2439. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2440. static int
  2441. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2442. {
  2443. struct e1000_adapter *adapter = netdev_priv(netdev);
  2444. struct e1000_tx_ring *tx_ring;
  2445. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2446. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2447. unsigned int tx_flags = 0;
  2448. unsigned int len = skb->len;
  2449. unsigned long flags;
  2450. unsigned int nr_frags = 0;
  2451. unsigned int mss = 0;
  2452. int count = 0;
  2453. int tso;
  2454. unsigned int f;
  2455. len -= skb->data_len;
  2456. tx_ring = adapter->tx_ring;
  2457. if (unlikely(skb->len <= 0)) {
  2458. dev_kfree_skb_any(skb);
  2459. return NETDEV_TX_OK;
  2460. }
  2461. #ifdef NETIF_F_TSO
  2462. mss = skb_shinfo(skb)->gso_size;
  2463. /* The controller does a simple calculation to
  2464. * make sure there is enough room in the FIFO before
  2465. * initiating the DMA for each buffer. The calc is:
  2466. * 4 = ceil(buffer len/mss). To make sure we don't
  2467. * overrun the FIFO, adjust the max buffer len if mss
  2468. * drops. */
  2469. if (mss) {
  2470. uint8_t hdr_len;
  2471. max_per_txd = min(mss << 2, max_per_txd);
  2472. max_txd_pwr = fls(max_per_txd) - 1;
  2473. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2474. * points to just header, pull a few bytes of payload from
  2475. * frags into skb->data */
  2476. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2477. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2478. switch (adapter->hw.mac_type) {
  2479. unsigned int pull_size;
  2480. case e1000_82571:
  2481. case e1000_82572:
  2482. case e1000_82573:
  2483. case e1000_ich8lan:
  2484. pull_size = min((unsigned int)4, skb->data_len);
  2485. if (!__pskb_pull_tail(skb, pull_size)) {
  2486. DPRINTK(DRV, ERR,
  2487. "__pskb_pull_tail failed.\n");
  2488. dev_kfree_skb_any(skb);
  2489. return NETDEV_TX_OK;
  2490. }
  2491. len = skb->len - skb->data_len;
  2492. break;
  2493. default:
  2494. /* do nothing */
  2495. break;
  2496. }
  2497. }
  2498. }
  2499. /* reserve a descriptor for the offload context */
  2500. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2501. count++;
  2502. count++;
  2503. #else
  2504. if (skb->ip_summed == CHECKSUM_HW)
  2505. count++;
  2506. #endif
  2507. #ifdef NETIF_F_TSO
  2508. /* Controller Erratum workaround */
  2509. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2510. count++;
  2511. #endif
  2512. count += TXD_USE_COUNT(len, max_txd_pwr);
  2513. if (adapter->pcix_82544)
  2514. count++;
  2515. /* work-around for errata 10 and it applies to all controllers
  2516. * in PCI-X mode, so add one more descriptor to the count
  2517. */
  2518. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2519. (len > 2015)))
  2520. count++;
  2521. nr_frags = skb_shinfo(skb)->nr_frags;
  2522. for (f = 0; f < nr_frags; f++)
  2523. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2524. max_txd_pwr);
  2525. if (adapter->pcix_82544)
  2526. count += nr_frags;
  2527. if (adapter->hw.tx_pkt_filtering &&
  2528. (adapter->hw.mac_type == e1000_82573))
  2529. e1000_transfer_dhcp_info(adapter, skb);
  2530. local_irq_save(flags);
  2531. if (!spin_trylock(&tx_ring->tx_lock)) {
  2532. /* Collision - tell upper layer to requeue */
  2533. local_irq_restore(flags);
  2534. return NETDEV_TX_LOCKED;
  2535. }
  2536. /* need: count + 2 desc gap to keep tail from touching
  2537. * head, otherwise try next time */
  2538. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2539. netif_stop_queue(netdev);
  2540. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2541. return NETDEV_TX_BUSY;
  2542. }
  2543. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2544. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2545. netif_stop_queue(netdev);
  2546. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2547. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2548. return NETDEV_TX_BUSY;
  2549. }
  2550. }
  2551. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2552. tx_flags |= E1000_TX_FLAGS_VLAN;
  2553. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2554. }
  2555. first = tx_ring->next_to_use;
  2556. tso = e1000_tso(adapter, tx_ring, skb);
  2557. if (tso < 0) {
  2558. dev_kfree_skb_any(skb);
  2559. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2560. return NETDEV_TX_OK;
  2561. }
  2562. if (likely(tso)) {
  2563. tx_ring->last_tx_tso = 1;
  2564. tx_flags |= E1000_TX_FLAGS_TSO;
  2565. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2566. tx_flags |= E1000_TX_FLAGS_CSUM;
  2567. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2568. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2569. * no longer assume, we must. */
  2570. if (likely(skb->protocol == htons(ETH_P_IP)))
  2571. tx_flags |= E1000_TX_FLAGS_IPV4;
  2572. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2573. e1000_tx_map(adapter, tx_ring, skb, first,
  2574. max_per_txd, nr_frags, mss));
  2575. netdev->trans_start = jiffies;
  2576. /* Make sure there is space in the ring for the next send. */
  2577. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2578. netif_stop_queue(netdev);
  2579. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2580. return NETDEV_TX_OK;
  2581. }
  2582. /**
  2583. * e1000_tx_timeout - Respond to a Tx Hang
  2584. * @netdev: network interface device structure
  2585. **/
  2586. static void
  2587. e1000_tx_timeout(struct net_device *netdev)
  2588. {
  2589. struct e1000_adapter *adapter = netdev_priv(netdev);
  2590. /* Do the reset outside of interrupt context */
  2591. adapter->tx_timeout_count++;
  2592. schedule_work(&adapter->reset_task);
  2593. }
  2594. static void
  2595. e1000_reset_task(struct net_device *netdev)
  2596. {
  2597. struct e1000_adapter *adapter = netdev_priv(netdev);
  2598. e1000_reinit_locked(adapter);
  2599. }
  2600. /**
  2601. * e1000_get_stats - Get System Network Statistics
  2602. * @netdev: network interface device structure
  2603. *
  2604. * Returns the address of the device statistics structure.
  2605. * The statistics are actually updated from the timer callback.
  2606. **/
  2607. static struct net_device_stats *
  2608. e1000_get_stats(struct net_device *netdev)
  2609. {
  2610. struct e1000_adapter *adapter = netdev_priv(netdev);
  2611. /* only return the current stats */
  2612. return &adapter->net_stats;
  2613. }
  2614. /**
  2615. * e1000_change_mtu - Change the Maximum Transfer Unit
  2616. * @netdev: network interface device structure
  2617. * @new_mtu: new value for maximum frame size
  2618. *
  2619. * Returns 0 on success, negative on failure
  2620. **/
  2621. static int
  2622. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2623. {
  2624. struct e1000_adapter *adapter = netdev_priv(netdev);
  2625. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2626. uint16_t eeprom_data = 0;
  2627. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2628. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2629. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2630. return -EINVAL;
  2631. }
  2632. /* Adapter-specific max frame size limits. */
  2633. switch (adapter->hw.mac_type) {
  2634. case e1000_undefined ... e1000_82542_rev2_1:
  2635. case e1000_ich8lan:
  2636. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2637. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2638. return -EINVAL;
  2639. }
  2640. break;
  2641. case e1000_82573:
  2642. /* only enable jumbo frames if ASPM is disabled completely
  2643. * this means both bits must be zero in 0x1A bits 3:2 */
  2644. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2645. &eeprom_data);
  2646. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2647. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2648. DPRINTK(PROBE, ERR,
  2649. "Jumbo Frames not supported.\n");
  2650. return -EINVAL;
  2651. }
  2652. break;
  2653. }
  2654. /* fall through to get support */
  2655. case e1000_82571:
  2656. case e1000_82572:
  2657. case e1000_80003es2lan:
  2658. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2659. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2660. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2661. return -EINVAL;
  2662. }
  2663. break;
  2664. default:
  2665. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2666. break;
  2667. }
  2668. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2669. * means we reserve 2 more, this pushes us to allocate from the next
  2670. * larger slab size
  2671. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2672. if (max_frame <= E1000_RXBUFFER_256)
  2673. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2674. else if (max_frame <= E1000_RXBUFFER_512)
  2675. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2676. else if (max_frame <= E1000_RXBUFFER_1024)
  2677. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2678. else if (max_frame <= E1000_RXBUFFER_2048)
  2679. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2680. else if (max_frame <= E1000_RXBUFFER_4096)
  2681. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2682. else if (max_frame <= E1000_RXBUFFER_8192)
  2683. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2684. else if (max_frame <= E1000_RXBUFFER_16384)
  2685. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2686. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2687. if (!adapter->hw.tbi_compatibility_on &&
  2688. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2689. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2690. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2691. netdev->mtu = new_mtu;
  2692. if (netif_running(netdev))
  2693. e1000_reinit_locked(adapter);
  2694. adapter->hw.max_frame_size = max_frame;
  2695. return 0;
  2696. }
  2697. /**
  2698. * e1000_update_stats - Update the board statistics counters
  2699. * @adapter: board private structure
  2700. **/
  2701. void
  2702. e1000_update_stats(struct e1000_adapter *adapter)
  2703. {
  2704. struct e1000_hw *hw = &adapter->hw;
  2705. struct pci_dev *pdev = adapter->pdev;
  2706. unsigned long flags;
  2707. uint16_t phy_tmp;
  2708. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2709. /*
  2710. * Prevent stats update while adapter is being reset, or if the pci
  2711. * connection is down.
  2712. */
  2713. if (adapter->link_speed == 0)
  2714. return;
  2715. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2716. return;
  2717. spin_lock_irqsave(&adapter->stats_lock, flags);
  2718. /* these counters are modified from e1000_adjust_tbi_stats,
  2719. * called from the interrupt context, so they must only
  2720. * be written while holding adapter->stats_lock
  2721. */
  2722. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2723. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2724. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2725. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2726. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2727. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2728. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2729. if (adapter->hw.mac_type != e1000_ich8lan) {
  2730. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2731. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2732. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2733. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2734. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2735. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2736. }
  2737. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2738. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2739. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2740. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2741. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2742. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2743. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2744. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2745. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2746. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2747. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2748. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2749. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2750. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2751. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2752. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2753. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2754. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2755. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2756. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2757. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2758. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2759. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2760. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2761. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2762. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2763. if (adapter->hw.mac_type != e1000_ich8lan) {
  2764. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2765. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2766. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2767. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2768. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2769. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2770. }
  2771. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2772. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2773. /* used for adaptive IFS */
  2774. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2775. adapter->stats.tpt += hw->tx_packet_delta;
  2776. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2777. adapter->stats.colc += hw->collision_delta;
  2778. if (hw->mac_type >= e1000_82543) {
  2779. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2780. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2781. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2782. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2783. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2784. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2785. }
  2786. if (hw->mac_type > e1000_82547_rev_2) {
  2787. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2788. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2789. if (adapter->hw.mac_type != e1000_ich8lan) {
  2790. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2791. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2792. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2793. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2794. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2795. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2796. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2797. }
  2798. }
  2799. /* Fill out the OS statistics structure */
  2800. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2801. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2802. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2803. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2804. adapter->net_stats.multicast = adapter->stats.mprc;
  2805. adapter->net_stats.collisions = adapter->stats.colc;
  2806. /* Rx Errors */
  2807. /* RLEC on some newer hardware can be incorrect so build
  2808. * our own version based on RUC and ROC */
  2809. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2810. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2811. adapter->stats.ruc + adapter->stats.roc +
  2812. adapter->stats.cexterr;
  2813. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2814. adapter->stats.roc;
  2815. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2816. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2817. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2818. /* Tx Errors */
  2819. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2820. adapter->stats.latecol;
  2821. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2822. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2823. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2824. /* Tx Dropped needs to be maintained elsewhere */
  2825. /* Phy Stats */
  2826. if (hw->media_type == e1000_media_type_copper) {
  2827. if ((adapter->link_speed == SPEED_1000) &&
  2828. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2829. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2830. adapter->phy_stats.idle_errors += phy_tmp;
  2831. }
  2832. if ((hw->mac_type <= e1000_82546) &&
  2833. (hw->phy_type == e1000_phy_m88) &&
  2834. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2835. adapter->phy_stats.receive_errors += phy_tmp;
  2836. }
  2837. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2838. }
  2839. /**
  2840. * e1000_intr - Interrupt Handler
  2841. * @irq: interrupt number
  2842. * @data: pointer to a network interface device structure
  2843. * @pt_regs: CPU registers structure
  2844. **/
  2845. static irqreturn_t
  2846. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2847. {
  2848. struct net_device *netdev = data;
  2849. struct e1000_adapter *adapter = netdev_priv(netdev);
  2850. struct e1000_hw *hw = &adapter->hw;
  2851. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2852. #ifndef CONFIG_E1000_NAPI
  2853. int i;
  2854. #else
  2855. /* Interrupt Auto-Mask...upon reading ICR,
  2856. * interrupts are masked. No need for the
  2857. * IMC write, but it does mean we should
  2858. * account for it ASAP. */
  2859. if (likely(hw->mac_type >= e1000_82571))
  2860. atomic_inc(&adapter->irq_sem);
  2861. #endif
  2862. if (unlikely(!icr)) {
  2863. #ifdef CONFIG_E1000_NAPI
  2864. if (hw->mac_type >= e1000_82571)
  2865. e1000_irq_enable(adapter);
  2866. #endif
  2867. return IRQ_NONE; /* Not our interrupt */
  2868. }
  2869. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2870. hw->get_link_status = 1;
  2871. /* 80003ES2LAN workaround--
  2872. * For packet buffer work-around on link down event;
  2873. * disable receives here in the ISR and
  2874. * reset adapter in watchdog
  2875. */
  2876. if (netif_carrier_ok(netdev) &&
  2877. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2878. /* disable receives */
  2879. rctl = E1000_READ_REG(hw, RCTL);
  2880. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2881. }
  2882. mod_timer(&adapter->watchdog_timer, jiffies);
  2883. }
  2884. #ifdef CONFIG_E1000_NAPI
  2885. if (unlikely(hw->mac_type < e1000_82571)) {
  2886. atomic_inc(&adapter->irq_sem);
  2887. E1000_WRITE_REG(hw, IMC, ~0);
  2888. E1000_WRITE_FLUSH(hw);
  2889. }
  2890. if (likely(netif_rx_schedule_prep(netdev)))
  2891. __netif_rx_schedule(netdev);
  2892. else
  2893. e1000_irq_enable(adapter);
  2894. #else
  2895. /* Writing IMC and IMS is needed for 82547.
  2896. * Due to Hub Link bus being occupied, an interrupt
  2897. * de-assertion message is not able to be sent.
  2898. * When an interrupt assertion message is generated later,
  2899. * two messages are re-ordered and sent out.
  2900. * That causes APIC to think 82547 is in de-assertion
  2901. * state, while 82547 is in assertion state, resulting
  2902. * in dead lock. Writing IMC forces 82547 into
  2903. * de-assertion state.
  2904. */
  2905. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2906. atomic_inc(&adapter->irq_sem);
  2907. E1000_WRITE_REG(hw, IMC, ~0);
  2908. }
  2909. for (i = 0; i < E1000_MAX_INTR; i++)
  2910. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2911. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2912. break;
  2913. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2914. e1000_irq_enable(adapter);
  2915. #endif
  2916. return IRQ_HANDLED;
  2917. }
  2918. #ifdef CONFIG_E1000_NAPI
  2919. /**
  2920. * e1000_clean - NAPI Rx polling callback
  2921. * @adapter: board private structure
  2922. **/
  2923. static int
  2924. e1000_clean(struct net_device *poll_dev, int *budget)
  2925. {
  2926. struct e1000_adapter *adapter;
  2927. int work_to_do = min(*budget, poll_dev->quota);
  2928. int tx_cleaned = 0, work_done = 0;
  2929. /* Must NOT use netdev_priv macro here. */
  2930. adapter = poll_dev->priv;
  2931. /* Keep link state information with original netdev */
  2932. if (!netif_carrier_ok(poll_dev))
  2933. goto quit_polling;
  2934. /* e1000_clean is called per-cpu. This lock protects
  2935. * tx_ring[0] from being cleaned by multiple cpus
  2936. * simultaneously. A failure obtaining the lock means
  2937. * tx_ring[0] is currently being cleaned anyway. */
  2938. if (spin_trylock(&adapter->tx_queue_lock)) {
  2939. tx_cleaned = e1000_clean_tx_irq(adapter,
  2940. &adapter->tx_ring[0]);
  2941. spin_unlock(&adapter->tx_queue_lock);
  2942. }
  2943. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2944. &work_done, work_to_do);
  2945. *budget -= work_done;
  2946. poll_dev->quota -= work_done;
  2947. /* If no Tx and not enough Rx work done, exit the polling mode */
  2948. if ((!tx_cleaned && (work_done == 0)) ||
  2949. !netif_running(poll_dev)) {
  2950. quit_polling:
  2951. netif_rx_complete(poll_dev);
  2952. e1000_irq_enable(adapter);
  2953. return 0;
  2954. }
  2955. return 1;
  2956. }
  2957. #endif
  2958. /**
  2959. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2960. * @adapter: board private structure
  2961. **/
  2962. static boolean_t
  2963. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2964. struct e1000_tx_ring *tx_ring)
  2965. {
  2966. struct net_device *netdev = adapter->netdev;
  2967. struct e1000_tx_desc *tx_desc, *eop_desc;
  2968. struct e1000_buffer *buffer_info;
  2969. unsigned int i, eop;
  2970. #ifdef CONFIG_E1000_NAPI
  2971. unsigned int count = 0;
  2972. #endif
  2973. boolean_t cleaned = FALSE;
  2974. i = tx_ring->next_to_clean;
  2975. eop = tx_ring->buffer_info[i].next_to_watch;
  2976. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2977. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2978. for (cleaned = FALSE; !cleaned; ) {
  2979. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2980. buffer_info = &tx_ring->buffer_info[i];
  2981. cleaned = (i == eop);
  2982. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2983. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2984. if (unlikely(++i == tx_ring->count)) i = 0;
  2985. }
  2986. eop = tx_ring->buffer_info[i].next_to_watch;
  2987. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2988. #ifdef CONFIG_E1000_NAPI
  2989. #define E1000_TX_WEIGHT 64
  2990. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2991. if (count++ == E1000_TX_WEIGHT) break;
  2992. #endif
  2993. }
  2994. tx_ring->next_to_clean = i;
  2995. #define TX_WAKE_THRESHOLD 32
  2996. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2997. netif_carrier_ok(netdev))) {
  2998. spin_lock(&tx_ring->tx_lock);
  2999. if (netif_queue_stopped(netdev) &&
  3000. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  3001. netif_wake_queue(netdev);
  3002. spin_unlock(&tx_ring->tx_lock);
  3003. }
  3004. if (adapter->detect_tx_hung) {
  3005. /* Detect a transmit hang in hardware, this serializes the
  3006. * check with the clearing of time_stamp and movement of i */
  3007. adapter->detect_tx_hung = FALSE;
  3008. if (tx_ring->buffer_info[eop].dma &&
  3009. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3010. (adapter->tx_timeout_factor * HZ))
  3011. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3012. E1000_STATUS_TXOFF)) {
  3013. /* detected Tx unit hang */
  3014. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3015. " Tx Queue <%lu>\n"
  3016. " TDH <%x>\n"
  3017. " TDT <%x>\n"
  3018. " next_to_use <%x>\n"
  3019. " next_to_clean <%x>\n"
  3020. "buffer_info[next_to_clean]\n"
  3021. " time_stamp <%lx>\n"
  3022. " next_to_watch <%x>\n"
  3023. " jiffies <%lx>\n"
  3024. " next_to_watch.status <%x>\n",
  3025. (unsigned long)((tx_ring - adapter->tx_ring) /
  3026. sizeof(struct e1000_tx_ring)),
  3027. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3028. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3029. tx_ring->next_to_use,
  3030. tx_ring->next_to_clean,
  3031. tx_ring->buffer_info[eop].time_stamp,
  3032. eop,
  3033. jiffies,
  3034. eop_desc->upper.fields.status);
  3035. netif_stop_queue(netdev);
  3036. }
  3037. }
  3038. return cleaned;
  3039. }
  3040. /**
  3041. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3042. * @adapter: board private structure
  3043. * @status_err: receive descriptor status and error fields
  3044. * @csum: receive descriptor csum field
  3045. * @sk_buff: socket buffer with received data
  3046. **/
  3047. static void
  3048. e1000_rx_checksum(struct e1000_adapter *adapter,
  3049. uint32_t status_err, uint32_t csum,
  3050. struct sk_buff *skb)
  3051. {
  3052. uint16_t status = (uint16_t)status_err;
  3053. uint8_t errors = (uint8_t)(status_err >> 24);
  3054. skb->ip_summed = CHECKSUM_NONE;
  3055. /* 82543 or newer only */
  3056. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3057. /* Ignore Checksum bit is set */
  3058. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3059. /* TCP/UDP checksum error bit is set */
  3060. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3061. /* let the stack verify checksum errors */
  3062. adapter->hw_csum_err++;
  3063. return;
  3064. }
  3065. /* TCP/UDP Checksum has not been calculated */
  3066. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3067. if (!(status & E1000_RXD_STAT_TCPCS))
  3068. return;
  3069. } else {
  3070. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3071. return;
  3072. }
  3073. /* It must be a TCP or UDP packet with a valid checksum */
  3074. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3075. /* TCP checksum is good */
  3076. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3077. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3078. /* IP fragment with UDP payload */
  3079. /* Hardware complements the payload checksum, so we undo it
  3080. * and then put the value in host order for further stack use.
  3081. */
  3082. csum = ntohl(csum ^ 0xFFFF);
  3083. skb->csum = csum;
  3084. skb->ip_summed = CHECKSUM_HW;
  3085. }
  3086. adapter->hw_csum_good++;
  3087. }
  3088. /**
  3089. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3090. * @adapter: board private structure
  3091. **/
  3092. static boolean_t
  3093. #ifdef CONFIG_E1000_NAPI
  3094. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3095. struct e1000_rx_ring *rx_ring,
  3096. int *work_done, int work_to_do)
  3097. #else
  3098. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3099. struct e1000_rx_ring *rx_ring)
  3100. #endif
  3101. {
  3102. struct net_device *netdev = adapter->netdev;
  3103. struct pci_dev *pdev = adapter->pdev;
  3104. struct e1000_rx_desc *rx_desc, *next_rxd;
  3105. struct e1000_buffer *buffer_info, *next_buffer;
  3106. unsigned long flags;
  3107. uint32_t length;
  3108. uint8_t last_byte;
  3109. unsigned int i;
  3110. int cleaned_count = 0;
  3111. boolean_t cleaned = FALSE;
  3112. i = rx_ring->next_to_clean;
  3113. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3114. buffer_info = &rx_ring->buffer_info[i];
  3115. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3116. struct sk_buff *skb;
  3117. u8 status;
  3118. #ifdef CONFIG_E1000_NAPI
  3119. if (*work_done >= work_to_do)
  3120. break;
  3121. (*work_done)++;
  3122. #endif
  3123. status = rx_desc->status;
  3124. skb = buffer_info->skb;
  3125. buffer_info->skb = NULL;
  3126. prefetch(skb->data - NET_IP_ALIGN);
  3127. if (++i == rx_ring->count) i = 0;
  3128. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3129. prefetch(next_rxd);
  3130. next_buffer = &rx_ring->buffer_info[i];
  3131. cleaned = TRUE;
  3132. cleaned_count++;
  3133. pci_unmap_single(pdev,
  3134. buffer_info->dma,
  3135. buffer_info->length,
  3136. PCI_DMA_FROMDEVICE);
  3137. length = le16_to_cpu(rx_desc->length);
  3138. /* adjust length to remove Ethernet CRC */
  3139. length -= 4;
  3140. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3141. /* All receives must fit into a single buffer */
  3142. E1000_DBG("%s: Receive packet consumed multiple"
  3143. " buffers\n", netdev->name);
  3144. /* recycle */
  3145. buffer_info->skb = skb;
  3146. goto next_desc;
  3147. }
  3148. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3149. last_byte = *(skb->data + length - 1);
  3150. if (TBI_ACCEPT(&adapter->hw, status,
  3151. rx_desc->errors, length, last_byte)) {
  3152. spin_lock_irqsave(&adapter->stats_lock, flags);
  3153. e1000_tbi_adjust_stats(&adapter->hw,
  3154. &adapter->stats,
  3155. length, skb->data);
  3156. spin_unlock_irqrestore(&adapter->stats_lock,
  3157. flags);
  3158. length--;
  3159. } else {
  3160. /* recycle */
  3161. buffer_info->skb = skb;
  3162. goto next_desc;
  3163. }
  3164. }
  3165. /* code added for copybreak, this should improve
  3166. * performance for small packets with large amounts
  3167. * of reassembly being done in the stack */
  3168. #define E1000_CB_LENGTH 256
  3169. if (length < E1000_CB_LENGTH) {
  3170. struct sk_buff *new_skb =
  3171. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3172. if (new_skb) {
  3173. skb_reserve(new_skb, NET_IP_ALIGN);
  3174. new_skb->dev = netdev;
  3175. memcpy(new_skb->data - NET_IP_ALIGN,
  3176. skb->data - NET_IP_ALIGN,
  3177. length + NET_IP_ALIGN);
  3178. /* save the skb in buffer_info as good */
  3179. buffer_info->skb = skb;
  3180. skb = new_skb;
  3181. skb_put(skb, length);
  3182. }
  3183. } else
  3184. skb_put(skb, length);
  3185. /* end copybreak code */
  3186. /* Receive Checksum Offload */
  3187. e1000_rx_checksum(adapter,
  3188. (uint32_t)(status) |
  3189. ((uint32_t)(rx_desc->errors) << 24),
  3190. le16_to_cpu(rx_desc->csum), skb);
  3191. skb->protocol = eth_type_trans(skb, netdev);
  3192. #ifdef CONFIG_E1000_NAPI
  3193. if (unlikely(adapter->vlgrp &&
  3194. (status & E1000_RXD_STAT_VP))) {
  3195. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3196. le16_to_cpu(rx_desc->special) &
  3197. E1000_RXD_SPC_VLAN_MASK);
  3198. } else {
  3199. netif_receive_skb(skb);
  3200. }
  3201. #else /* CONFIG_E1000_NAPI */
  3202. if (unlikely(adapter->vlgrp &&
  3203. (status & E1000_RXD_STAT_VP))) {
  3204. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3205. le16_to_cpu(rx_desc->special) &
  3206. E1000_RXD_SPC_VLAN_MASK);
  3207. } else {
  3208. netif_rx(skb);
  3209. }
  3210. #endif /* CONFIG_E1000_NAPI */
  3211. netdev->last_rx = jiffies;
  3212. next_desc:
  3213. rx_desc->status = 0;
  3214. /* return some buffers to hardware, one at a time is too slow */
  3215. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3216. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3217. cleaned_count = 0;
  3218. }
  3219. /* use prefetched values */
  3220. rx_desc = next_rxd;
  3221. buffer_info = next_buffer;
  3222. }
  3223. rx_ring->next_to_clean = i;
  3224. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3225. if (cleaned_count)
  3226. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3227. return cleaned;
  3228. }
  3229. /**
  3230. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3231. * @adapter: board private structure
  3232. **/
  3233. static boolean_t
  3234. #ifdef CONFIG_E1000_NAPI
  3235. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3236. struct e1000_rx_ring *rx_ring,
  3237. int *work_done, int work_to_do)
  3238. #else
  3239. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3240. struct e1000_rx_ring *rx_ring)
  3241. #endif
  3242. {
  3243. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3244. struct net_device *netdev = adapter->netdev;
  3245. struct pci_dev *pdev = adapter->pdev;
  3246. struct e1000_buffer *buffer_info, *next_buffer;
  3247. struct e1000_ps_page *ps_page;
  3248. struct e1000_ps_page_dma *ps_page_dma;
  3249. struct sk_buff *skb;
  3250. unsigned int i, j;
  3251. uint32_t length, staterr;
  3252. int cleaned_count = 0;
  3253. boolean_t cleaned = FALSE;
  3254. i = rx_ring->next_to_clean;
  3255. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3256. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3257. buffer_info = &rx_ring->buffer_info[i];
  3258. while (staterr & E1000_RXD_STAT_DD) {
  3259. ps_page = &rx_ring->ps_page[i];
  3260. ps_page_dma = &rx_ring->ps_page_dma[i];
  3261. #ifdef CONFIG_E1000_NAPI
  3262. if (unlikely(*work_done >= work_to_do))
  3263. break;
  3264. (*work_done)++;
  3265. #endif
  3266. skb = buffer_info->skb;
  3267. /* in the packet split case this is header only */
  3268. prefetch(skb->data - NET_IP_ALIGN);
  3269. if (++i == rx_ring->count) i = 0;
  3270. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3271. prefetch(next_rxd);
  3272. next_buffer = &rx_ring->buffer_info[i];
  3273. cleaned = TRUE;
  3274. cleaned_count++;
  3275. pci_unmap_single(pdev, buffer_info->dma,
  3276. buffer_info->length,
  3277. PCI_DMA_FROMDEVICE);
  3278. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3279. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3280. " the full packet\n", netdev->name);
  3281. dev_kfree_skb_irq(skb);
  3282. goto next_desc;
  3283. }
  3284. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3285. dev_kfree_skb_irq(skb);
  3286. goto next_desc;
  3287. }
  3288. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3289. if (unlikely(!length)) {
  3290. E1000_DBG("%s: Last part of the packet spanning"
  3291. " multiple descriptors\n", netdev->name);
  3292. dev_kfree_skb_irq(skb);
  3293. goto next_desc;
  3294. }
  3295. /* Good Receive */
  3296. skb_put(skb, length);
  3297. {
  3298. /* this looks ugly, but it seems compiler issues make it
  3299. more efficient than reusing j */
  3300. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3301. /* page alloc/put takes too long and effects small packet
  3302. * throughput, so unsplit small packets and save the alloc/put*/
  3303. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3304. u8 *vaddr;
  3305. /* there is no documentation about how to call
  3306. * kmap_atomic, so we can't hold the mapping
  3307. * very long */
  3308. pci_dma_sync_single_for_cpu(pdev,
  3309. ps_page_dma->ps_page_dma[0],
  3310. PAGE_SIZE,
  3311. PCI_DMA_FROMDEVICE);
  3312. vaddr = kmap_atomic(ps_page->ps_page[0],
  3313. KM_SKB_DATA_SOFTIRQ);
  3314. memcpy(skb->tail, vaddr, l1);
  3315. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3316. pci_dma_sync_single_for_device(pdev,
  3317. ps_page_dma->ps_page_dma[0],
  3318. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3319. /* remove the CRC */
  3320. l1 -= 4;
  3321. skb_put(skb, l1);
  3322. goto copydone;
  3323. } /* if */
  3324. }
  3325. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3326. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3327. break;
  3328. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3329. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3330. ps_page_dma->ps_page_dma[j] = 0;
  3331. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3332. length);
  3333. ps_page->ps_page[j] = NULL;
  3334. skb->len += length;
  3335. skb->data_len += length;
  3336. skb->truesize += length;
  3337. }
  3338. /* strip the ethernet crc, problem is we're using pages now so
  3339. * this whole operation can get a little cpu intensive */
  3340. pskb_trim(skb, skb->len - 4);
  3341. copydone:
  3342. e1000_rx_checksum(adapter, staterr,
  3343. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3344. skb->protocol = eth_type_trans(skb, netdev);
  3345. if (likely(rx_desc->wb.upper.header_status &
  3346. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3347. adapter->rx_hdr_split++;
  3348. #ifdef CONFIG_E1000_NAPI
  3349. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3350. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3351. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3352. E1000_RXD_SPC_VLAN_MASK);
  3353. } else {
  3354. netif_receive_skb(skb);
  3355. }
  3356. #else /* CONFIG_E1000_NAPI */
  3357. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3358. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3359. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3360. E1000_RXD_SPC_VLAN_MASK);
  3361. } else {
  3362. netif_rx(skb);
  3363. }
  3364. #endif /* CONFIG_E1000_NAPI */
  3365. netdev->last_rx = jiffies;
  3366. next_desc:
  3367. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3368. buffer_info->skb = NULL;
  3369. /* return some buffers to hardware, one at a time is too slow */
  3370. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3371. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3372. cleaned_count = 0;
  3373. }
  3374. /* use prefetched values */
  3375. rx_desc = next_rxd;
  3376. buffer_info = next_buffer;
  3377. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3378. }
  3379. rx_ring->next_to_clean = i;
  3380. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3381. if (cleaned_count)
  3382. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3383. return cleaned;
  3384. }
  3385. /**
  3386. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3387. * @adapter: address of board private structure
  3388. **/
  3389. static void
  3390. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3391. struct e1000_rx_ring *rx_ring,
  3392. int cleaned_count)
  3393. {
  3394. struct net_device *netdev = adapter->netdev;
  3395. struct pci_dev *pdev = adapter->pdev;
  3396. struct e1000_rx_desc *rx_desc;
  3397. struct e1000_buffer *buffer_info;
  3398. struct sk_buff *skb;
  3399. unsigned int i;
  3400. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3401. i = rx_ring->next_to_use;
  3402. buffer_info = &rx_ring->buffer_info[i];
  3403. while (cleaned_count--) {
  3404. if (!(skb = buffer_info->skb))
  3405. skb = netdev_alloc_skb(netdev, bufsz);
  3406. else {
  3407. skb_trim(skb, 0);
  3408. goto map_skb;
  3409. }
  3410. if (unlikely(!skb)) {
  3411. /* Better luck next round */
  3412. adapter->alloc_rx_buff_failed++;
  3413. break;
  3414. }
  3415. /* Fix for errata 23, can't cross 64kB boundary */
  3416. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3417. struct sk_buff *oldskb = skb;
  3418. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3419. "at %p\n", bufsz, skb->data);
  3420. /* Try again, without freeing the previous */
  3421. skb = netdev_alloc_skb(netdev, bufsz);
  3422. /* Failed allocation, critical failure */
  3423. if (!skb) {
  3424. dev_kfree_skb(oldskb);
  3425. break;
  3426. }
  3427. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3428. /* give up */
  3429. dev_kfree_skb(skb);
  3430. dev_kfree_skb(oldskb);
  3431. break; /* while !buffer_info->skb */
  3432. } else {
  3433. /* Use new allocation */
  3434. dev_kfree_skb(oldskb);
  3435. }
  3436. }
  3437. /* Make buffer alignment 2 beyond a 16 byte boundary
  3438. * this will result in a 16 byte aligned IP header after
  3439. * the 14 byte MAC header is removed
  3440. */
  3441. skb_reserve(skb, NET_IP_ALIGN);
  3442. skb->dev = netdev;
  3443. buffer_info->skb = skb;
  3444. buffer_info->length = adapter->rx_buffer_len;
  3445. map_skb:
  3446. buffer_info->dma = pci_map_single(pdev,
  3447. skb->data,
  3448. adapter->rx_buffer_len,
  3449. PCI_DMA_FROMDEVICE);
  3450. /* Fix for errata 23, can't cross 64kB boundary */
  3451. if (!e1000_check_64k_bound(adapter,
  3452. (void *)(unsigned long)buffer_info->dma,
  3453. adapter->rx_buffer_len)) {
  3454. DPRINTK(RX_ERR, ERR,
  3455. "dma align check failed: %u bytes at %p\n",
  3456. adapter->rx_buffer_len,
  3457. (void *)(unsigned long)buffer_info->dma);
  3458. dev_kfree_skb(skb);
  3459. buffer_info->skb = NULL;
  3460. pci_unmap_single(pdev, buffer_info->dma,
  3461. adapter->rx_buffer_len,
  3462. PCI_DMA_FROMDEVICE);
  3463. break; /* while !buffer_info->skb */
  3464. }
  3465. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3466. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3467. if (unlikely(++i == rx_ring->count))
  3468. i = 0;
  3469. buffer_info = &rx_ring->buffer_info[i];
  3470. }
  3471. if (likely(rx_ring->next_to_use != i)) {
  3472. rx_ring->next_to_use = i;
  3473. if (unlikely(i-- == 0))
  3474. i = (rx_ring->count - 1);
  3475. /* Force memory writes to complete before letting h/w
  3476. * know there are new descriptors to fetch. (Only
  3477. * applicable for weak-ordered memory model archs,
  3478. * such as IA-64). */
  3479. wmb();
  3480. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3481. }
  3482. }
  3483. /**
  3484. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3485. * @adapter: address of board private structure
  3486. **/
  3487. static void
  3488. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3489. struct e1000_rx_ring *rx_ring,
  3490. int cleaned_count)
  3491. {
  3492. struct net_device *netdev = adapter->netdev;
  3493. struct pci_dev *pdev = adapter->pdev;
  3494. union e1000_rx_desc_packet_split *rx_desc;
  3495. struct e1000_buffer *buffer_info;
  3496. struct e1000_ps_page *ps_page;
  3497. struct e1000_ps_page_dma *ps_page_dma;
  3498. struct sk_buff *skb;
  3499. unsigned int i, j;
  3500. i = rx_ring->next_to_use;
  3501. buffer_info = &rx_ring->buffer_info[i];
  3502. ps_page = &rx_ring->ps_page[i];
  3503. ps_page_dma = &rx_ring->ps_page_dma[i];
  3504. while (cleaned_count--) {
  3505. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3506. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3507. if (j < adapter->rx_ps_pages) {
  3508. if (likely(!ps_page->ps_page[j])) {
  3509. ps_page->ps_page[j] =
  3510. alloc_page(GFP_ATOMIC);
  3511. if (unlikely(!ps_page->ps_page[j])) {
  3512. adapter->alloc_rx_buff_failed++;
  3513. goto no_buffers;
  3514. }
  3515. ps_page_dma->ps_page_dma[j] =
  3516. pci_map_page(pdev,
  3517. ps_page->ps_page[j],
  3518. 0, PAGE_SIZE,
  3519. PCI_DMA_FROMDEVICE);
  3520. }
  3521. /* Refresh the desc even if buffer_addrs didn't
  3522. * change because each write-back erases
  3523. * this info.
  3524. */
  3525. rx_desc->read.buffer_addr[j+1] =
  3526. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3527. } else
  3528. rx_desc->read.buffer_addr[j+1] = ~0;
  3529. }
  3530. skb = netdev_alloc_skb(netdev,
  3531. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3532. if (unlikely(!skb)) {
  3533. adapter->alloc_rx_buff_failed++;
  3534. break;
  3535. }
  3536. /* Make buffer alignment 2 beyond a 16 byte boundary
  3537. * this will result in a 16 byte aligned IP header after
  3538. * the 14 byte MAC header is removed
  3539. */
  3540. skb_reserve(skb, NET_IP_ALIGN);
  3541. skb->dev = netdev;
  3542. buffer_info->skb = skb;
  3543. buffer_info->length = adapter->rx_ps_bsize0;
  3544. buffer_info->dma = pci_map_single(pdev, skb->data,
  3545. adapter->rx_ps_bsize0,
  3546. PCI_DMA_FROMDEVICE);
  3547. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3548. if (unlikely(++i == rx_ring->count)) i = 0;
  3549. buffer_info = &rx_ring->buffer_info[i];
  3550. ps_page = &rx_ring->ps_page[i];
  3551. ps_page_dma = &rx_ring->ps_page_dma[i];
  3552. }
  3553. no_buffers:
  3554. if (likely(rx_ring->next_to_use != i)) {
  3555. rx_ring->next_to_use = i;
  3556. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3557. /* Force memory writes to complete before letting h/w
  3558. * know there are new descriptors to fetch. (Only
  3559. * applicable for weak-ordered memory model archs,
  3560. * such as IA-64). */
  3561. wmb();
  3562. /* Hardware increments by 16 bytes, but packet split
  3563. * descriptors are 32 bytes...so we increment tail
  3564. * twice as much.
  3565. */
  3566. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3567. }
  3568. }
  3569. /**
  3570. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3571. * @adapter:
  3572. **/
  3573. static void
  3574. e1000_smartspeed(struct e1000_adapter *adapter)
  3575. {
  3576. uint16_t phy_status;
  3577. uint16_t phy_ctrl;
  3578. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3579. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3580. return;
  3581. if (adapter->smartspeed == 0) {
  3582. /* If Master/Slave config fault is asserted twice,
  3583. * we assume back-to-back */
  3584. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3585. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3586. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3587. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3588. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3589. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3590. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3591. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3592. phy_ctrl);
  3593. adapter->smartspeed++;
  3594. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3595. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3596. &phy_ctrl)) {
  3597. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3598. MII_CR_RESTART_AUTO_NEG);
  3599. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3600. phy_ctrl);
  3601. }
  3602. }
  3603. return;
  3604. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3605. /* If still no link, perhaps using 2/3 pair cable */
  3606. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3607. phy_ctrl |= CR_1000T_MS_ENABLE;
  3608. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3609. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3610. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3611. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3612. MII_CR_RESTART_AUTO_NEG);
  3613. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3614. }
  3615. }
  3616. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3617. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3618. adapter->smartspeed = 0;
  3619. }
  3620. /**
  3621. * e1000_ioctl -
  3622. * @netdev:
  3623. * @ifreq:
  3624. * @cmd:
  3625. **/
  3626. static int
  3627. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3628. {
  3629. switch (cmd) {
  3630. case SIOCGMIIPHY:
  3631. case SIOCGMIIREG:
  3632. case SIOCSMIIREG:
  3633. return e1000_mii_ioctl(netdev, ifr, cmd);
  3634. default:
  3635. return -EOPNOTSUPP;
  3636. }
  3637. }
  3638. /**
  3639. * e1000_mii_ioctl -
  3640. * @netdev:
  3641. * @ifreq:
  3642. * @cmd:
  3643. **/
  3644. static int
  3645. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3646. {
  3647. struct e1000_adapter *adapter = netdev_priv(netdev);
  3648. struct mii_ioctl_data *data = if_mii(ifr);
  3649. int retval;
  3650. uint16_t mii_reg;
  3651. uint16_t spddplx;
  3652. unsigned long flags;
  3653. if (adapter->hw.media_type != e1000_media_type_copper)
  3654. return -EOPNOTSUPP;
  3655. switch (cmd) {
  3656. case SIOCGMIIPHY:
  3657. data->phy_id = adapter->hw.phy_addr;
  3658. break;
  3659. case SIOCGMIIREG:
  3660. if (!capable(CAP_NET_ADMIN))
  3661. return -EPERM;
  3662. spin_lock_irqsave(&adapter->stats_lock, flags);
  3663. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3664. &data->val_out)) {
  3665. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3666. return -EIO;
  3667. }
  3668. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3669. break;
  3670. case SIOCSMIIREG:
  3671. if (!capable(CAP_NET_ADMIN))
  3672. return -EPERM;
  3673. if (data->reg_num & ~(0x1F))
  3674. return -EFAULT;
  3675. mii_reg = data->val_in;
  3676. spin_lock_irqsave(&adapter->stats_lock, flags);
  3677. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3678. mii_reg)) {
  3679. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3680. return -EIO;
  3681. }
  3682. if (adapter->hw.media_type == e1000_media_type_copper) {
  3683. switch (data->reg_num) {
  3684. case PHY_CTRL:
  3685. if (mii_reg & MII_CR_POWER_DOWN)
  3686. break;
  3687. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3688. adapter->hw.autoneg = 1;
  3689. adapter->hw.autoneg_advertised = 0x2F;
  3690. } else {
  3691. if (mii_reg & 0x40)
  3692. spddplx = SPEED_1000;
  3693. else if (mii_reg & 0x2000)
  3694. spddplx = SPEED_100;
  3695. else
  3696. spddplx = SPEED_10;
  3697. spddplx += (mii_reg & 0x100)
  3698. ? DUPLEX_FULL :
  3699. DUPLEX_HALF;
  3700. retval = e1000_set_spd_dplx(adapter,
  3701. spddplx);
  3702. if (retval) {
  3703. spin_unlock_irqrestore(
  3704. &adapter->stats_lock,
  3705. flags);
  3706. return retval;
  3707. }
  3708. }
  3709. if (netif_running(adapter->netdev))
  3710. e1000_reinit_locked(adapter);
  3711. else
  3712. e1000_reset(adapter);
  3713. break;
  3714. case M88E1000_PHY_SPEC_CTRL:
  3715. case M88E1000_EXT_PHY_SPEC_CTRL:
  3716. if (e1000_phy_reset(&adapter->hw)) {
  3717. spin_unlock_irqrestore(
  3718. &adapter->stats_lock, flags);
  3719. return -EIO;
  3720. }
  3721. break;
  3722. }
  3723. } else {
  3724. switch (data->reg_num) {
  3725. case PHY_CTRL:
  3726. if (mii_reg & MII_CR_POWER_DOWN)
  3727. break;
  3728. if (netif_running(adapter->netdev))
  3729. e1000_reinit_locked(adapter);
  3730. else
  3731. e1000_reset(adapter);
  3732. break;
  3733. }
  3734. }
  3735. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3736. break;
  3737. default:
  3738. return -EOPNOTSUPP;
  3739. }
  3740. return E1000_SUCCESS;
  3741. }
  3742. void
  3743. e1000_pci_set_mwi(struct e1000_hw *hw)
  3744. {
  3745. struct e1000_adapter *adapter = hw->back;
  3746. int ret_val = pci_set_mwi(adapter->pdev);
  3747. if (ret_val)
  3748. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3749. }
  3750. void
  3751. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3752. {
  3753. struct e1000_adapter *adapter = hw->back;
  3754. pci_clear_mwi(adapter->pdev);
  3755. }
  3756. void
  3757. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3758. {
  3759. struct e1000_adapter *adapter = hw->back;
  3760. pci_read_config_word(adapter->pdev, reg, value);
  3761. }
  3762. void
  3763. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3764. {
  3765. struct e1000_adapter *adapter = hw->back;
  3766. pci_write_config_word(adapter->pdev, reg, *value);
  3767. }
  3768. #if 0
  3769. uint32_t
  3770. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3771. {
  3772. return inl(port);
  3773. }
  3774. #endif /* 0 */
  3775. void
  3776. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3777. {
  3778. outl(value, port);
  3779. }
  3780. static void
  3781. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3782. {
  3783. struct e1000_adapter *adapter = netdev_priv(netdev);
  3784. uint32_t ctrl, rctl;
  3785. e1000_irq_disable(adapter);
  3786. adapter->vlgrp = grp;
  3787. if (grp) {
  3788. /* enable VLAN tag insert/strip */
  3789. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3790. ctrl |= E1000_CTRL_VME;
  3791. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3792. if (adapter->hw.mac_type != e1000_ich8lan) {
  3793. /* enable VLAN receive filtering */
  3794. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3795. rctl |= E1000_RCTL_VFE;
  3796. rctl &= ~E1000_RCTL_CFIEN;
  3797. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3798. e1000_update_mng_vlan(adapter);
  3799. }
  3800. } else {
  3801. /* disable VLAN tag insert/strip */
  3802. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3803. ctrl &= ~E1000_CTRL_VME;
  3804. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3805. if (adapter->hw.mac_type != e1000_ich8lan) {
  3806. /* disable VLAN filtering */
  3807. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3808. rctl &= ~E1000_RCTL_VFE;
  3809. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3810. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3811. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3812. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3813. }
  3814. }
  3815. }
  3816. e1000_irq_enable(adapter);
  3817. }
  3818. static void
  3819. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3820. {
  3821. struct e1000_adapter *adapter = netdev_priv(netdev);
  3822. uint32_t vfta, index;
  3823. if ((adapter->hw.mng_cookie.status &
  3824. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3825. (vid == adapter->mng_vlan_id))
  3826. return;
  3827. /* add VID to filter table */
  3828. index = (vid >> 5) & 0x7F;
  3829. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3830. vfta |= (1 << (vid & 0x1F));
  3831. e1000_write_vfta(&adapter->hw, index, vfta);
  3832. }
  3833. static void
  3834. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3835. {
  3836. struct e1000_adapter *adapter = netdev_priv(netdev);
  3837. uint32_t vfta, index;
  3838. e1000_irq_disable(adapter);
  3839. if (adapter->vlgrp)
  3840. adapter->vlgrp->vlan_devices[vid] = NULL;
  3841. e1000_irq_enable(adapter);
  3842. if ((adapter->hw.mng_cookie.status &
  3843. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3844. (vid == adapter->mng_vlan_id)) {
  3845. /* release control to f/w */
  3846. e1000_release_hw_control(adapter);
  3847. return;
  3848. }
  3849. /* remove VID from filter table */
  3850. index = (vid >> 5) & 0x7F;
  3851. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3852. vfta &= ~(1 << (vid & 0x1F));
  3853. e1000_write_vfta(&adapter->hw, index, vfta);
  3854. }
  3855. static void
  3856. e1000_restore_vlan(struct e1000_adapter *adapter)
  3857. {
  3858. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3859. if (adapter->vlgrp) {
  3860. uint16_t vid;
  3861. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3862. if (!adapter->vlgrp->vlan_devices[vid])
  3863. continue;
  3864. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3865. }
  3866. }
  3867. }
  3868. int
  3869. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3870. {
  3871. adapter->hw.autoneg = 0;
  3872. /* Fiber NICs only allow 1000 gbps Full duplex */
  3873. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3874. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3875. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3876. return -EINVAL;
  3877. }
  3878. switch (spddplx) {
  3879. case SPEED_10 + DUPLEX_HALF:
  3880. adapter->hw.forced_speed_duplex = e1000_10_half;
  3881. break;
  3882. case SPEED_10 + DUPLEX_FULL:
  3883. adapter->hw.forced_speed_duplex = e1000_10_full;
  3884. break;
  3885. case SPEED_100 + DUPLEX_HALF:
  3886. adapter->hw.forced_speed_duplex = e1000_100_half;
  3887. break;
  3888. case SPEED_100 + DUPLEX_FULL:
  3889. adapter->hw.forced_speed_duplex = e1000_100_full;
  3890. break;
  3891. case SPEED_1000 + DUPLEX_FULL:
  3892. adapter->hw.autoneg = 1;
  3893. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3894. break;
  3895. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3896. default:
  3897. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3898. return -EINVAL;
  3899. }
  3900. return 0;
  3901. }
  3902. #ifdef CONFIG_PM
  3903. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3904. * bus we're on (PCI(X) vs. PCI-E)
  3905. */
  3906. #define PCIE_CONFIG_SPACE_LEN 256
  3907. #define PCI_CONFIG_SPACE_LEN 64
  3908. static int
  3909. e1000_pci_save_state(struct e1000_adapter *adapter)
  3910. {
  3911. struct pci_dev *dev = adapter->pdev;
  3912. int size;
  3913. int i;
  3914. if (adapter->hw.mac_type >= e1000_82571)
  3915. size = PCIE_CONFIG_SPACE_LEN;
  3916. else
  3917. size = PCI_CONFIG_SPACE_LEN;
  3918. WARN_ON(adapter->config_space != NULL);
  3919. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3920. if (!adapter->config_space) {
  3921. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3922. return -ENOMEM;
  3923. }
  3924. for (i = 0; i < (size / 4); i++)
  3925. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3926. return 0;
  3927. }
  3928. static void
  3929. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3930. {
  3931. struct pci_dev *dev = adapter->pdev;
  3932. int size;
  3933. int i;
  3934. if (adapter->config_space == NULL)
  3935. return;
  3936. if (adapter->hw.mac_type >= e1000_82571)
  3937. size = PCIE_CONFIG_SPACE_LEN;
  3938. else
  3939. size = PCI_CONFIG_SPACE_LEN;
  3940. for (i = 0; i < (size / 4); i++)
  3941. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3942. kfree(adapter->config_space);
  3943. adapter->config_space = NULL;
  3944. return;
  3945. }
  3946. #endif /* CONFIG_PM */
  3947. static int
  3948. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3949. {
  3950. struct net_device *netdev = pci_get_drvdata(pdev);
  3951. struct e1000_adapter *adapter = netdev_priv(netdev);
  3952. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3953. uint32_t wufc = adapter->wol;
  3954. #ifdef CONFIG_PM
  3955. int retval = 0;
  3956. #endif
  3957. netif_device_detach(netdev);
  3958. if (netif_running(netdev)) {
  3959. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3960. e1000_down(adapter);
  3961. }
  3962. #ifdef CONFIG_PM
  3963. /* Implement our own version of pci_save_state(pdev) because pci-
  3964. * express adapters have 256-byte config spaces. */
  3965. retval = e1000_pci_save_state(adapter);
  3966. if (retval)
  3967. return retval;
  3968. #endif
  3969. status = E1000_READ_REG(&adapter->hw, STATUS);
  3970. if (status & E1000_STATUS_LU)
  3971. wufc &= ~E1000_WUFC_LNKC;
  3972. if (wufc) {
  3973. e1000_setup_rctl(adapter);
  3974. e1000_set_multi(netdev);
  3975. /* turn on all-multi mode if wake on multicast is enabled */
  3976. if (adapter->wol & E1000_WUFC_MC) {
  3977. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3978. rctl |= E1000_RCTL_MPE;
  3979. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3980. }
  3981. if (adapter->hw.mac_type >= e1000_82540) {
  3982. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3983. /* advertise wake from D3Cold */
  3984. #define E1000_CTRL_ADVD3WUC 0x00100000
  3985. /* phy power management enable */
  3986. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3987. ctrl |= E1000_CTRL_ADVD3WUC |
  3988. E1000_CTRL_EN_PHY_PWR_MGMT;
  3989. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3990. }
  3991. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3992. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3993. /* keep the laser running in D3 */
  3994. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3995. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3996. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3997. }
  3998. /* Allow time for pending master requests to run */
  3999. e1000_disable_pciex_master(&adapter->hw);
  4000. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4001. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4002. pci_enable_wake(pdev, PCI_D3hot, 1);
  4003. pci_enable_wake(pdev, PCI_D3cold, 1);
  4004. } else {
  4005. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4006. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4007. pci_enable_wake(pdev, PCI_D3hot, 0);
  4008. pci_enable_wake(pdev, PCI_D3cold, 0);
  4009. }
  4010. /* FIXME: this code is incorrect for PCI Express */
  4011. if (adapter->hw.mac_type >= e1000_82540 &&
  4012. adapter->hw.mac_type != e1000_ich8lan &&
  4013. adapter->hw.media_type == e1000_media_type_copper) {
  4014. manc = E1000_READ_REG(&adapter->hw, MANC);
  4015. if (manc & E1000_MANC_SMBUS_EN) {
  4016. manc |= E1000_MANC_ARP_EN;
  4017. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4018. pci_enable_wake(pdev, PCI_D3hot, 1);
  4019. pci_enable_wake(pdev, PCI_D3cold, 1);
  4020. }
  4021. }
  4022. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4023. e1000_phy_powerdown_workaround(&adapter->hw);
  4024. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4025. * would have already happened in close and is redundant. */
  4026. e1000_release_hw_control(adapter);
  4027. pci_disable_device(pdev);
  4028. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4029. return 0;
  4030. }
  4031. #ifdef CONFIG_PM
  4032. static int
  4033. e1000_resume(struct pci_dev *pdev)
  4034. {
  4035. struct net_device *netdev = pci_get_drvdata(pdev);
  4036. struct e1000_adapter *adapter = netdev_priv(netdev);
  4037. uint32_t manc, ret_val;
  4038. pci_set_power_state(pdev, PCI_D0);
  4039. e1000_pci_restore_state(adapter);
  4040. ret_val = pci_enable_device(pdev);
  4041. pci_set_master(pdev);
  4042. pci_enable_wake(pdev, PCI_D3hot, 0);
  4043. pci_enable_wake(pdev, PCI_D3cold, 0);
  4044. e1000_reset(adapter);
  4045. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4046. if (netif_running(netdev))
  4047. e1000_up(adapter);
  4048. netif_device_attach(netdev);
  4049. /* FIXME: this code is incorrect for PCI Express */
  4050. if (adapter->hw.mac_type >= e1000_82540 &&
  4051. adapter->hw.mac_type != e1000_ich8lan &&
  4052. adapter->hw.media_type == e1000_media_type_copper) {
  4053. manc = E1000_READ_REG(&adapter->hw, MANC);
  4054. manc &= ~(E1000_MANC_ARP_EN);
  4055. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4056. }
  4057. /* If the controller is 82573 and f/w is AMT, do not set
  4058. * DRV_LOAD until the interface is up. For all other cases,
  4059. * let the f/w know that the h/w is now under the control
  4060. * of the driver. */
  4061. if (adapter->hw.mac_type != e1000_82573 ||
  4062. !e1000_check_mng_mode(&adapter->hw))
  4063. e1000_get_hw_control(adapter);
  4064. return 0;
  4065. }
  4066. #endif
  4067. static void e1000_shutdown(struct pci_dev *pdev)
  4068. {
  4069. e1000_suspend(pdev, PMSG_SUSPEND);
  4070. }
  4071. #ifdef CONFIG_NET_POLL_CONTROLLER
  4072. /*
  4073. * Polling 'interrupt' - used by things like netconsole to send skbs
  4074. * without having to re-enable interrupts. It's not called while
  4075. * the interrupt routine is executing.
  4076. */
  4077. static void
  4078. e1000_netpoll(struct net_device *netdev)
  4079. {
  4080. struct e1000_adapter *adapter = netdev_priv(netdev);
  4081. disable_irq(adapter->pdev->irq);
  4082. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4083. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4084. #ifndef CONFIG_E1000_NAPI
  4085. adapter->clean_rx(adapter, adapter->rx_ring);
  4086. #endif
  4087. enable_irq(adapter->pdev->irq);
  4088. }
  4089. #endif
  4090. /**
  4091. * e1000_io_error_detected - called when PCI error is detected
  4092. * @pdev: Pointer to PCI device
  4093. * @state: The current pci conneection state
  4094. *
  4095. * This function is called after a PCI bus error affecting
  4096. * this device has been detected.
  4097. */
  4098. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4099. {
  4100. struct net_device *netdev = pci_get_drvdata(pdev);
  4101. struct e1000_adapter *adapter = netdev->priv;
  4102. netif_device_detach(netdev);
  4103. if (netif_running(netdev))
  4104. e1000_down(adapter);
  4105. /* Request a slot slot reset. */
  4106. return PCI_ERS_RESULT_NEED_RESET;
  4107. }
  4108. /**
  4109. * e1000_io_slot_reset - called after the pci bus has been reset.
  4110. * @pdev: Pointer to PCI device
  4111. *
  4112. * Restart the card from scratch, as if from a cold-boot. Implementation
  4113. * resembles the first-half of the e1000_resume routine.
  4114. */
  4115. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4116. {
  4117. struct net_device *netdev = pci_get_drvdata(pdev);
  4118. struct e1000_adapter *adapter = netdev->priv;
  4119. if (pci_enable_device(pdev)) {
  4120. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4121. return PCI_ERS_RESULT_DISCONNECT;
  4122. }
  4123. pci_set_master(pdev);
  4124. pci_enable_wake(pdev, 3, 0);
  4125. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4126. /* Perform card reset only on one instance of the card */
  4127. if (PCI_FUNC (pdev->devfn) != 0)
  4128. return PCI_ERS_RESULT_RECOVERED;
  4129. e1000_reset(adapter);
  4130. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4131. return PCI_ERS_RESULT_RECOVERED;
  4132. }
  4133. /**
  4134. * e1000_io_resume - called when traffic can start flowing again.
  4135. * @pdev: Pointer to PCI device
  4136. *
  4137. * This callback is called when the error recovery driver tells us that
  4138. * its OK to resume normal operation. Implementation resembles the
  4139. * second-half of the e1000_resume routine.
  4140. */
  4141. static void e1000_io_resume(struct pci_dev *pdev)
  4142. {
  4143. struct net_device *netdev = pci_get_drvdata(pdev);
  4144. struct e1000_adapter *adapter = netdev->priv;
  4145. uint32_t manc, swsm;
  4146. if (netif_running(netdev)) {
  4147. if (e1000_up(adapter)) {
  4148. printk("e1000: can't bring device back up after reset\n");
  4149. return;
  4150. }
  4151. }
  4152. netif_device_attach(netdev);
  4153. if (adapter->hw.mac_type >= e1000_82540 &&
  4154. adapter->hw.media_type == e1000_media_type_copper) {
  4155. manc = E1000_READ_REG(&adapter->hw, MANC);
  4156. manc &= ~(E1000_MANC_ARP_EN);
  4157. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4158. }
  4159. switch (adapter->hw.mac_type) {
  4160. case e1000_82573:
  4161. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4162. E1000_WRITE_REG(&adapter->hw, SWSM,
  4163. swsm | E1000_SWSM_DRV_LOAD);
  4164. break;
  4165. default:
  4166. break;
  4167. }
  4168. if (netif_running(netdev))
  4169. mod_timer(&adapter->watchdog_timer, jiffies);
  4170. }
  4171. /* e1000_main.c */