xilinxfb.c 9.8 KB

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  1. /*
  2. * xilinxfb.c
  3. *
  4. * Xilinx TFT LCD frame buffer driver
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * source@mvista.com
  8. *
  9. * 2002-2007 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is licensed
  11. * "as is" without any warranty of any kind, whether express or implied.
  12. */
  13. /*
  14. * This driver was based on au1100fb.c by MontaVista rewritten for 2.6
  15. * by Embedded Alley Solutions <source@embeddedalley.com>, which in turn
  16. * was based on skeletonfb.c, Skeleton for a frame buffer device by
  17. * Geert Uytterhoeven.
  18. */
  19. #include <linux/device.h>
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/version.h>
  23. #include <linux/errno.h>
  24. #include <linux/string.h>
  25. #include <linux/mm.h>
  26. #include <linux/fb.h>
  27. #include <linux/init.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/platform_device.h>
  30. #include <asm/io.h>
  31. #include <linux/xilinxfb.h>
  32. #define DRIVER_NAME "xilinxfb"
  33. #define DRIVER_DESCRIPTION "Xilinx TFT LCD frame buffer driver"
  34. /*
  35. * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
  36. * the VGA port on the Xilinx ML40x board. This is a hardware display controller
  37. * for a 640x480 resolution TFT or VGA screen.
  38. *
  39. * The interface to the framebuffer is nice and simple. There are two
  40. * control registers. The first tells the LCD interface where in memory
  41. * the frame buffer is (only the 11 most significant bits are used, so
  42. * don't start thinking about scrolling). The second allows the LCD to
  43. * be turned on or off as well as rotated 180 degrees.
  44. */
  45. #define NUM_REGS 2
  46. #define REG_FB_ADDR 0
  47. #define REG_CTRL 1
  48. #define REG_CTRL_ENABLE 0x0001
  49. #define REG_CTRL_ROTATE 0x0002
  50. /*
  51. * The hardware only handles a single mode: 640x480 24 bit true
  52. * color. Each pixel gets a word (32 bits) of memory. Within each word,
  53. * the 8 most significant bits are ignored, the next 8 bits are the red
  54. * level, the next 8 bits are the green level and the 8 least
  55. * significant bits are the blue level. Each row of the LCD uses 1024
  56. * words, but only the first 640 pixels are displayed with the other 384
  57. * words being ignored. There are 480 rows.
  58. */
  59. #define BYTES_PER_PIXEL 4
  60. #define BITS_PER_PIXEL (BYTES_PER_PIXEL * 8)
  61. #define XRES 640
  62. #define YRES 480
  63. #define XRES_VIRTUAL 1024
  64. #define YRES_VIRTUAL YRES
  65. #define LINE_LENGTH (XRES_VIRTUAL * BYTES_PER_PIXEL)
  66. #define FB_SIZE (YRES_VIRTUAL * LINE_LENGTH)
  67. #define RED_SHIFT 16
  68. #define GREEN_SHIFT 8
  69. #define BLUE_SHIFT 0
  70. #define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */
  71. /*
  72. * Here are the default fb_fix_screeninfo and fb_var_screeninfo structures
  73. */
  74. static struct fb_fix_screeninfo xilinx_fb_fix = {
  75. .id = "Xilinx",
  76. .type = FB_TYPE_PACKED_PIXELS,
  77. .visual = FB_VISUAL_TRUECOLOR,
  78. .smem_len = FB_SIZE,
  79. .line_length = LINE_LENGTH,
  80. .accel = FB_ACCEL_NONE
  81. };
  82. static struct fb_var_screeninfo xilinx_fb_var = {
  83. .xres = XRES,
  84. .yres = YRES,
  85. .xres_virtual = XRES_VIRTUAL,
  86. .yres_virtual = YRES_VIRTUAL,
  87. .bits_per_pixel = BITS_PER_PIXEL,
  88. .red = { RED_SHIFT, 8, 0 },
  89. .green = { GREEN_SHIFT, 8, 0 },
  90. .blue = { BLUE_SHIFT, 8, 0 },
  91. .transp = { 0, 0, 0 },
  92. .activate = FB_ACTIVATE_NOW
  93. };
  94. struct xilinxfb_drvdata {
  95. struct fb_info info; /* FB driver info record */
  96. u32 regs_phys; /* phys. address of the control registers */
  97. u32 __iomem *regs; /* virt. address of the control registers */
  98. unsigned char __iomem *fb_virt; /* virt. address of the frame buffer */
  99. dma_addr_t fb_phys; /* phys. address of the frame buffer */
  100. u32 reg_ctrl_default;
  101. u32 pseudo_palette[PALETTE_ENTRIES_NO];
  102. /* Fake palette of 16 colors */
  103. };
  104. #define to_xilinxfb_drvdata(_info) \
  105. container_of(_info, struct xilinxfb_drvdata, info)
  106. /*
  107. * The LCD controller has DCR interface to its registers, but all
  108. * the boards and configurations the driver has been tested with
  109. * use opb2dcr bridge. So the registers are seen as memory mapped.
  110. * This macro is to make it simple to add the direct DCR access
  111. * when it's needed.
  112. */
  113. #define xilinx_fb_out_be32(driverdata, offset, val) \
  114. out_be32(driverdata->regs + offset, val)
  115. static int
  116. xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
  117. unsigned transp, struct fb_info *fbi)
  118. {
  119. u32 *palette = fbi->pseudo_palette;
  120. if (regno >= PALETTE_ENTRIES_NO)
  121. return -EINVAL;
  122. if (fbi->var.grayscale) {
  123. /* Convert color to grayscale.
  124. * grayscale = 0.30*R + 0.59*G + 0.11*B */
  125. red = green = blue =
  126. (red * 77 + green * 151 + blue * 28 + 127) >> 8;
  127. }
  128. /* fbi->fix.visual is always FB_VISUAL_TRUECOLOR */
  129. /* We only handle 8 bits of each color. */
  130. red >>= 8;
  131. green >>= 8;
  132. blue >>= 8;
  133. palette[regno] = (red << RED_SHIFT) | (green << GREEN_SHIFT) |
  134. (blue << BLUE_SHIFT);
  135. return 0;
  136. }
  137. static int
  138. xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
  139. {
  140. struct xilinxfb_drvdata *drvdata = to_xilinxfb_drvdata(fbi);
  141. switch (blank_mode) {
  142. case FB_BLANK_UNBLANK:
  143. /* turn on panel */
  144. xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
  145. break;
  146. case FB_BLANK_NORMAL:
  147. case FB_BLANK_VSYNC_SUSPEND:
  148. case FB_BLANK_HSYNC_SUSPEND:
  149. case FB_BLANK_POWERDOWN:
  150. /* turn off panel */
  151. xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
  152. default:
  153. break;
  154. }
  155. return 0; /* success */
  156. }
  157. static struct fb_ops xilinxfb_ops =
  158. {
  159. .owner = THIS_MODULE,
  160. .fb_setcolreg = xilinx_fb_setcolreg,
  161. .fb_blank = xilinx_fb_blank,
  162. .fb_fillrect = cfb_fillrect,
  163. .fb_copyarea = cfb_copyarea,
  164. .fb_imageblit = cfb_imageblit,
  165. };
  166. /* === The device driver === */
  167. static int
  168. xilinxfb_drv_probe(struct device *dev)
  169. {
  170. struct platform_device *pdev;
  171. struct xilinxfb_platform_data *pdata;
  172. struct xilinxfb_drvdata *drvdata;
  173. struct resource *regs_res;
  174. int retval;
  175. if (!dev)
  176. return -EINVAL;
  177. pdev = to_platform_device(dev);
  178. pdata = pdev->dev.platform_data;
  179. drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
  180. if (!drvdata) {
  181. dev_err(dev, "Couldn't allocate device private record\n");
  182. return -ENOMEM;
  183. }
  184. dev_set_drvdata(dev, drvdata);
  185. /* Map the control registers in */
  186. regs_res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  187. if (!regs_res || (regs_res->end - regs_res->start + 1 < 8)) {
  188. dev_err(dev, "Couldn't get registers resource\n");
  189. retval = -EFAULT;
  190. goto err_region;
  191. }
  192. if (!request_mem_region(regs_res->start, 8, DRIVER_NAME)) {
  193. dev_err(dev, "Couldn't lock memory region at 0x%08X\n",
  194. regs_res->start);
  195. retval = -EBUSY;
  196. goto err_region;
  197. }
  198. drvdata->regs = (u32 __iomem*) ioremap(regs_res->start, 8);
  199. drvdata->regs_phys = regs_res->start;
  200. /* Allocate the framebuffer memory */
  201. drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(FB_SIZE),
  202. &drvdata->fb_phys, GFP_KERNEL);
  203. if (!drvdata->fb_virt) {
  204. dev_err(dev, "Could not allocate frame buffer memory\n");
  205. retval = -ENOMEM;
  206. goto err_fbmem;
  207. }
  208. /* Clear (turn to black) the framebuffer */
  209. memset_io((void *) drvdata->fb_virt, 0, FB_SIZE);
  210. /* Tell the hardware where the frame buffer is */
  211. xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
  212. /* Turn on the display */
  213. drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
  214. if (pdata && pdata->rotate_screen)
  215. drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
  216. xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
  217. /* Fill struct fb_info */
  218. drvdata->info.device = dev;
  219. drvdata->info.screen_base = drvdata->fb_virt;
  220. drvdata->info.fbops = &xilinxfb_ops;
  221. drvdata->info.fix = xilinx_fb_fix;
  222. drvdata->info.fix.smem_start = drvdata->fb_phys;
  223. drvdata->info.pseudo_palette = drvdata->pseudo_palette;
  224. if (fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0) < 0) {
  225. dev_err(dev, "Fail to allocate colormap (%d entries)\n",
  226. PALETTE_ENTRIES_NO);
  227. retval = -EFAULT;
  228. goto err_cmap;
  229. }
  230. drvdata->info.flags = FBINFO_DEFAULT;
  231. if (pdata) {
  232. xilinx_fb_var.height = pdata->screen_height_mm;
  233. xilinx_fb_var.width = pdata->screen_width_mm;
  234. }
  235. drvdata->info.var = xilinx_fb_var;
  236. /* Register new frame buffer */
  237. if (register_framebuffer(&drvdata->info) < 0) {
  238. dev_err(dev, "Could not register frame buffer\n");
  239. retval = -EINVAL;
  240. goto err_regfb;
  241. }
  242. /* Put a banner in the log (for DEBUG) */
  243. dev_dbg(dev, "regs: phys=%x, virt=%p\n",
  244. drvdata->regs_phys, drvdata->regs);
  245. dev_dbg(dev, "fb: phys=%p, virt=%p, size=%x\n",
  246. (void*)drvdata->fb_phys, drvdata->fb_virt, FB_SIZE);
  247. return 0; /* success */
  248. err_regfb:
  249. fb_dealloc_cmap(&drvdata->info.cmap);
  250. err_cmap:
  251. dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
  252. drvdata->fb_phys);
  253. /* Turn off the display */
  254. xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
  255. iounmap(drvdata->regs);
  256. err_fbmem:
  257. release_mem_region(regs_res->start, 8);
  258. err_region:
  259. kfree(drvdata);
  260. dev_set_drvdata(dev, NULL);
  261. return retval;
  262. }
  263. static int
  264. xilinxfb_drv_remove(struct device *dev)
  265. {
  266. struct xilinxfb_drvdata *drvdata;
  267. if (!dev)
  268. return -ENODEV;
  269. drvdata = (struct xilinxfb_drvdata *) dev_get_drvdata(dev);
  270. #if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
  271. xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
  272. #endif
  273. unregister_framebuffer(&drvdata->info);
  274. fb_dealloc_cmap(&drvdata->info.cmap);
  275. dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
  276. drvdata->fb_phys);
  277. /* Turn off the display */
  278. xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
  279. iounmap(drvdata->regs);
  280. release_mem_region(drvdata->regs_phys, 8);
  281. kfree(drvdata);
  282. dev_set_drvdata(dev, NULL);
  283. return 0;
  284. }
  285. static struct device_driver xilinxfb_driver = {
  286. .name = DRIVER_NAME,
  287. .bus = &platform_bus_type,
  288. .probe = xilinxfb_drv_probe,
  289. .remove = xilinxfb_drv_remove
  290. };
  291. static int __init
  292. xilinxfb_init(void)
  293. {
  294. /*
  295. * No kernel boot options used,
  296. * so we just need to register the driver
  297. */
  298. return driver_register(&xilinxfb_driver);
  299. }
  300. static void __exit
  301. xilinxfb_cleanup(void)
  302. {
  303. driver_unregister(&xilinxfb_driver);
  304. }
  305. module_init(xilinxfb_init);
  306. module_exit(xilinxfb_cleanup);
  307. MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
  308. MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
  309. MODULE_LICENSE("GPL");