em28xx-core.c 18 KB

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  1. /*
  2. em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  3. Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  4. Markus Rechberger <mrechberger@gmail.com>
  5. Mauro Carvalho Chehab <mchehab@infradead.org>
  6. Sascha Sommer <saschasommer@freenet.de>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/init.h>
  20. #include <linux/list.h>
  21. #include <linux/module.h>
  22. #include <linux/usb.h>
  23. #include <linux/vmalloc.h>
  24. #include "em28xx.h"
  25. /* #define ENABLE_DEBUG_ISOC_FRAMES */
  26. static unsigned int core_debug;
  27. module_param(core_debug,int,0644);
  28. MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  29. #define em28xx_coredbg(fmt, arg...) do {\
  30. if (core_debug) \
  31. printk(KERN_INFO "%s %s :"fmt, \
  32. dev->name, __func__ , ##arg); } while (0)
  33. static unsigned int reg_debug;
  34. module_param(reg_debug,int,0644);
  35. MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  36. #define em28xx_regdbg(fmt, arg...) do {\
  37. if (reg_debug) \
  38. printk(KERN_INFO "%s %s :"fmt, \
  39. dev->name, __func__ , ##arg); } while (0)
  40. static int alt = EM28XX_PINOUT;
  41. module_param(alt, int, 0644);
  42. MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  43. /* FIXME */
  44. #define em28xx_isocdbg(fmt, arg...) do {\
  45. if (core_debug) \
  46. printk(KERN_INFO "%s %s :"fmt, \
  47. dev->name, __func__ , ##arg); } while (0)
  48. /*
  49. * em28xx_read_reg_req()
  50. * reads data from the usb device specifying bRequest
  51. */
  52. int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  53. char *buf, int len)
  54. {
  55. int ret, byte;
  56. if (dev->state & DEV_DISCONNECTED)
  57. return(-ENODEV);
  58. em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  59. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  60. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  61. 0x0000, reg, buf, len, HZ);
  62. if (reg_debug) {
  63. printk(ret < 0 ? " failed!\n" : "%02x values: ", ret);
  64. for (byte = 0; byte < len; byte++)
  65. printk(" %02x", (unsigned char)buf[byte]);
  66. printk("\n");
  67. }
  68. return ret;
  69. }
  70. /*
  71. * em28xx_read_reg_req()
  72. * reads data from the usb device specifying bRequest
  73. */
  74. int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
  75. {
  76. u8 val;
  77. int ret;
  78. if (dev->state & DEV_DISCONNECTED)
  79. return(-ENODEV);
  80. em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
  81. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  82. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  83. 0x0000, reg, &val, 1, HZ);
  84. if (reg_debug)
  85. printk(ret < 0 ? " failed!\n" :
  86. "%02x\n", (unsigned char) val);
  87. if (ret < 0)
  88. return ret;
  89. return val;
  90. }
  91. int em28xx_read_reg(struct em28xx *dev, u16 reg)
  92. {
  93. return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
  94. }
  95. /*
  96. * em28xx_write_regs_req()
  97. * sends data to the usb device, specifying bRequest
  98. */
  99. int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
  100. int len)
  101. {
  102. int ret;
  103. /*usb_control_msg seems to expect a kmalloced buffer */
  104. unsigned char *bufs;
  105. if (dev->state & DEV_DISCONNECTED)
  106. return -ENODEV;
  107. if (len < 1)
  108. return -EINVAL;
  109. bufs = kmalloc(len, GFP_KERNEL);
  110. em28xx_regdbg("req=%02x reg=%02x:", req, reg);
  111. if (reg_debug) {
  112. int i;
  113. for (i = 0; i < len; ++i)
  114. printk(" %02x", (unsigned char)buf[i]);
  115. printk("\n");
  116. }
  117. if (!bufs)
  118. return -ENOMEM;
  119. memcpy(bufs, buf, len);
  120. ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
  121. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  122. 0x0000, reg, bufs, len, HZ);
  123. if (dev->wait_after_write)
  124. msleep(dev->wait_after_write);
  125. kfree(bufs);
  126. return ret;
  127. }
  128. int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
  129. {
  130. int rc;
  131. rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
  132. /* Stores GPO/GPIO values at the cache, if changed
  133. Only write values should be stored, since input on a GPIO
  134. register will return the input bits.
  135. Not sure what happens on reading GPO register.
  136. */
  137. if (rc >= 0) {
  138. if (reg == EM2880_R04_GPO)
  139. dev->reg_gpo = buf[0];
  140. else if (reg == EM28XX_R08_GPIO)
  141. dev->reg_gpio = buf[0];
  142. }
  143. return rc;
  144. }
  145. /*
  146. * em28xx_write_reg_bits()
  147. * sets only some bits (specified by bitmask) of a register, by first reading
  148. * the actual value
  149. */
  150. static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
  151. u8 bitmask)
  152. {
  153. int oldval;
  154. u8 newval;
  155. /* Uses cache for gpo/gpio registers */
  156. if (reg == EM2880_R04_GPO)
  157. oldval = dev->reg_gpo;
  158. else if (reg == EM28XX_R08_GPIO)
  159. oldval = dev->reg_gpio;
  160. else
  161. oldval = em28xx_read_reg(dev, reg);
  162. if (oldval < 0)
  163. return oldval;
  164. newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
  165. return em28xx_write_regs(dev, reg, &newval, 1);
  166. }
  167. /*
  168. * em28xx_write_ac97()
  169. * write a 16 bit value to the specified AC97 address (LSB first!)
  170. */
  171. static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val)
  172. {
  173. int ret, i;
  174. u8 addr = reg & 0x7f;
  175. ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, val, 2);
  176. if (ret < 0)
  177. return ret;
  178. ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
  179. if (ret < 0)
  180. return ret;
  181. /* Wait up to 50 ms for AC97 command to complete */
  182. for (i = 0; i < 10; i++) {
  183. ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
  184. if (ret < 0)
  185. return ret;
  186. if (!(ret & 0x01))
  187. return 0;
  188. msleep(5);
  189. }
  190. em28xx_warn("AC97 command still being executed: not handled properly!\n");
  191. return 0;
  192. }
  193. static int em28xx_set_audio_source(struct em28xx *dev)
  194. {
  195. static char *enable = "\x08\x08";
  196. static char *disable = "\x08\x88";
  197. char *video = enable, *line = disable;
  198. int ret;
  199. u8 input;
  200. if (dev->is_em2800) {
  201. if (dev->ctl_ainput)
  202. input = EM2800_AUDIO_SRC_LINE;
  203. else
  204. input = EM2800_AUDIO_SRC_TUNER;
  205. ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
  206. if (ret < 0)
  207. return ret;
  208. }
  209. if (dev->has_msp34xx)
  210. input = EM28XX_AUDIO_SRC_TUNER;
  211. else {
  212. switch (dev->ctl_ainput) {
  213. case EM28XX_AMUX_VIDEO:
  214. input = EM28XX_AUDIO_SRC_TUNER;
  215. break;
  216. case EM28XX_AMUX_LINE_IN:
  217. input = EM28XX_AUDIO_SRC_LINE;
  218. video = disable;
  219. line = enable;
  220. break;
  221. case EM28XX_AMUX_AC97_VIDEO:
  222. input = EM28XX_AUDIO_SRC_LINE;
  223. break;
  224. case EM28XX_AMUX_AC97_LINE_IN:
  225. input = EM28XX_AUDIO_SRC_LINE;
  226. video = disable;
  227. line = enable;
  228. break;
  229. }
  230. }
  231. ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
  232. if (ret < 0)
  233. return ret;
  234. msleep(5);
  235. /* Sets AC97 mixer registers
  236. This is seems to be needed, even for non-ac97 configs
  237. */
  238. ret = em28xx_write_ac97(dev, EM28XX_R14_VIDEO_AC97, video);
  239. if (ret < 0)
  240. return ret;
  241. ret = em28xx_write_ac97(dev, EM28XX_R10_LINE_IN_AC97, line);
  242. return ret;
  243. }
  244. int em28xx_audio_analog_set(struct em28xx *dev)
  245. {
  246. int ret;
  247. char s[2] = { 0x00, 0x00 };
  248. u8 xclk = 0x07;
  249. s[0] |= 0x1f - dev->volume;
  250. s[1] |= 0x1f - dev->volume;
  251. /* Mute */
  252. s[1] |= 0x80;
  253. ret = em28xx_write_ac97(dev, EM28XX_R02_MASTER_AC97, s);
  254. if (ret < 0)
  255. return ret;
  256. if (dev->has_12mhz_i2s)
  257. xclk |= 0x20;
  258. if (!dev->mute)
  259. xclk |= 0x80;
  260. ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7);
  261. if (ret < 0)
  262. return ret;
  263. msleep(10);
  264. /* Selects the proper audio input */
  265. ret = em28xx_set_audio_source(dev);
  266. /* Unmute device */
  267. if (!dev->mute)
  268. s[1] &= ~0x80;
  269. ret = em28xx_write_ac97(dev, EM28XX_R02_MASTER_AC97, s);
  270. return ret;
  271. }
  272. EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
  273. int em28xx_colorlevels_set_default(struct em28xx *dev)
  274. {
  275. em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1); /* contrast */
  276. em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1); /* brightness */
  277. em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1); /* saturation */
  278. em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
  279. em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
  280. em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
  281. em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
  282. em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
  283. em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
  284. em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
  285. em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
  286. em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
  287. return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
  288. }
  289. int em28xx_capture_start(struct em28xx *dev, int start)
  290. {
  291. int rc;
  292. /* FIXME: which is the best order? */
  293. /* video registers are sampled by VREF */
  294. rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
  295. start ? 0x10 : 0x00, 0x10);
  296. if (rc < 0)
  297. return rc;
  298. if (!start) {
  299. /* disable video capture */
  300. rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
  301. return rc;
  302. }
  303. /* enable video capture */
  304. rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
  305. if (dev->mode == EM28XX_ANALOG_MODE)
  306. rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
  307. else
  308. rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
  309. msleep(6);
  310. return rc;
  311. }
  312. int em28xx_outfmt_set_yuv422(struct em28xx *dev)
  313. {
  314. em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
  315. em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
  316. return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
  317. }
  318. static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
  319. u8 ymin, u8 ymax)
  320. {
  321. em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
  322. xmin, ymin, xmax, ymax);
  323. em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
  324. em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
  325. em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
  326. return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
  327. }
  328. static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
  329. u16 width, u16 height)
  330. {
  331. u8 cwidth = width;
  332. u8 cheight = height;
  333. u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
  334. em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
  335. (width | (overflow & 2) << 7),
  336. (height | (overflow & 1) << 8));
  337. em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
  338. em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
  339. em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
  340. em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
  341. return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
  342. }
  343. static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
  344. {
  345. u8 mode;
  346. /* the em2800 scaler only supports scaling down to 50% */
  347. if (dev->is_em2800)
  348. mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
  349. else {
  350. u8 buf[2];
  351. buf[0] = h;
  352. buf[1] = h >> 8;
  353. em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
  354. buf[0] = v;
  355. buf[1] = v >> 8;
  356. em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
  357. /* it seems that both H and V scalers must be active
  358. to work correctly */
  359. mode = (h || v)? 0x30: 0x00;
  360. }
  361. return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
  362. }
  363. /* FIXME: this only function read values from dev */
  364. int em28xx_resolution_set(struct em28xx *dev)
  365. {
  366. int width, height;
  367. width = norm_maxw(dev);
  368. height = norm_maxh(dev) >> 1;
  369. em28xx_outfmt_set_yuv422(dev);
  370. em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
  371. em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
  372. return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
  373. }
  374. int em28xx_set_alternate(struct em28xx *dev)
  375. {
  376. int errCode, prev_alt = dev->alt;
  377. int i;
  378. unsigned int min_pkt_size = dev->width * 2 + 4;
  379. /* When image size is bigger than a certain value,
  380. the frame size should be increased, otherwise, only
  381. green screen will be received.
  382. */
  383. if (dev->width * 2 * dev->height > 720 * 240 * 2)
  384. min_pkt_size *= 2;
  385. for (i = 0; i < dev->num_alt; i++) {
  386. /* stop when the selected alt setting offers enough bandwidth */
  387. if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
  388. dev->alt = i;
  389. break;
  390. /* otherwise make sure that we end up with the maximum bandwidth
  391. because the min_pkt_size equation might be wrong...
  392. */
  393. } else if (dev->alt_max_pkt_size[i] >
  394. dev->alt_max_pkt_size[dev->alt])
  395. dev->alt = i;
  396. }
  397. if (dev->alt != prev_alt) {
  398. em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
  399. min_pkt_size, dev->alt);
  400. dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
  401. em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
  402. dev->alt, dev->max_pkt_size);
  403. errCode = usb_set_interface(dev->udev, 0, dev->alt);
  404. if (errCode < 0) {
  405. em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
  406. dev->alt, errCode);
  407. return errCode;
  408. }
  409. }
  410. return 0;
  411. }
  412. int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
  413. {
  414. int rc = 0;
  415. if (!gpio)
  416. return rc;
  417. dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
  418. if (dev->mode == EM28XX_ANALOG_MODE)
  419. dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
  420. else
  421. dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
  422. msleep(6);
  423. /* Send GPIO reset sequences specified at board entry */
  424. while (gpio->sleep >= 0) {
  425. if (gpio->reg >= 0) {
  426. rc = em28xx_write_reg_bits(dev,
  427. gpio->reg,
  428. gpio->val,
  429. gpio->mask);
  430. if (rc < 0)
  431. return rc;
  432. }
  433. if (gpio->sleep > 0)
  434. msleep(gpio->sleep);
  435. gpio++;
  436. }
  437. return rc;
  438. }
  439. int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
  440. {
  441. if (dev->mode == set_mode)
  442. return 0;
  443. if (set_mode == EM28XX_MODE_UNDEFINED) {
  444. dev->mode = set_mode;
  445. return 0;
  446. }
  447. dev->mode = set_mode;
  448. if (dev->mode == EM28XX_DIGITAL_MODE)
  449. return em28xx_gpio_set(dev, dev->digital_gpio);
  450. else
  451. return em28xx_gpio_set(dev, dev->analog_gpio);
  452. }
  453. EXPORT_SYMBOL_GPL(em28xx_set_mode);
  454. /* ------------------------------------------------------------------
  455. URB control
  456. ------------------------------------------------------------------*/
  457. /*
  458. * IRQ callback, called by URB callback
  459. */
  460. static void em28xx_irq_callback(struct urb *urb)
  461. {
  462. struct em28xx_dmaqueue *dma_q = urb->context;
  463. struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
  464. int rc, i;
  465. /* Copy data from URB */
  466. spin_lock(&dev->slock);
  467. rc = dev->isoc_ctl.isoc_copy(dev, urb);
  468. spin_unlock(&dev->slock);
  469. /* Reset urb buffers */
  470. for (i = 0; i < urb->number_of_packets; i++) {
  471. urb->iso_frame_desc[i].status = 0;
  472. urb->iso_frame_desc[i].actual_length = 0;
  473. }
  474. urb->status = 0;
  475. urb->status = usb_submit_urb(urb, GFP_ATOMIC);
  476. if (urb->status) {
  477. em28xx_isocdbg("urb resubmit failed (error=%i)\n",
  478. urb->status);
  479. }
  480. }
  481. /*
  482. * Stop and Deallocate URBs
  483. */
  484. void em28xx_uninit_isoc(struct em28xx *dev)
  485. {
  486. struct urb *urb;
  487. int i;
  488. em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
  489. dev->isoc_ctl.nfields = -1;
  490. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  491. urb = dev->isoc_ctl.urb[i];
  492. if (urb) {
  493. usb_kill_urb(urb);
  494. usb_unlink_urb(urb);
  495. if (dev->isoc_ctl.transfer_buffer[i]) {
  496. usb_buffer_free(dev->udev,
  497. urb->transfer_buffer_length,
  498. dev->isoc_ctl.transfer_buffer[i],
  499. urb->transfer_dma);
  500. }
  501. usb_free_urb(urb);
  502. dev->isoc_ctl.urb[i] = NULL;
  503. }
  504. dev->isoc_ctl.transfer_buffer[i] = NULL;
  505. }
  506. kfree(dev->isoc_ctl.urb);
  507. kfree(dev->isoc_ctl.transfer_buffer);
  508. dev->isoc_ctl.urb = NULL;
  509. dev->isoc_ctl.transfer_buffer = NULL;
  510. dev->isoc_ctl.num_bufs = 0;
  511. em28xx_capture_start(dev, 0);
  512. }
  513. EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
  514. /*
  515. * Allocate URBs and start IRQ
  516. */
  517. int em28xx_init_isoc(struct em28xx *dev, int max_packets,
  518. int num_bufs, int max_pkt_size,
  519. int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
  520. {
  521. struct em28xx_dmaqueue *dma_q = &dev->vidq;
  522. int i;
  523. int sb_size, pipe;
  524. struct urb *urb;
  525. int j, k;
  526. int rc;
  527. em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
  528. /* De-allocates all pending stuff */
  529. em28xx_uninit_isoc(dev);
  530. dev->isoc_ctl.isoc_copy = isoc_copy;
  531. dev->isoc_ctl.num_bufs = num_bufs;
  532. dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
  533. if (!dev->isoc_ctl.urb) {
  534. em28xx_errdev("cannot alloc memory for usb buffers\n");
  535. return -ENOMEM;
  536. }
  537. dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
  538. GFP_KERNEL);
  539. if (!dev->isoc_ctl.transfer_buffer) {
  540. em28xx_errdev("cannot allocate memory for usbtransfer\n");
  541. kfree(dev->isoc_ctl.urb);
  542. return -ENOMEM;
  543. }
  544. dev->isoc_ctl.max_pkt_size = max_pkt_size;
  545. dev->isoc_ctl.buf = NULL;
  546. sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
  547. /* allocate urbs and transfer buffers */
  548. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  549. urb = usb_alloc_urb(max_packets, GFP_KERNEL);
  550. if (!urb) {
  551. em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
  552. em28xx_uninit_isoc(dev);
  553. return -ENOMEM;
  554. }
  555. dev->isoc_ctl.urb[i] = urb;
  556. dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
  557. sb_size, GFP_KERNEL, &urb->transfer_dma);
  558. if (!dev->isoc_ctl.transfer_buffer[i]) {
  559. em28xx_err("unable to allocate %i bytes for transfer"
  560. " buffer %i%s\n",
  561. sb_size, i,
  562. in_interrupt()?" while in int":"");
  563. em28xx_uninit_isoc(dev);
  564. return -ENOMEM;
  565. }
  566. memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
  567. /* FIXME: this is a hack - should be
  568. 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
  569. should also be using 'desc.bInterval'
  570. */
  571. pipe = usb_rcvisocpipe(dev->udev,
  572. dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
  573. usb_fill_int_urb(urb, dev->udev, pipe,
  574. dev->isoc_ctl.transfer_buffer[i], sb_size,
  575. em28xx_irq_callback, dma_q, 1);
  576. urb->number_of_packets = max_packets;
  577. urb->transfer_flags = URB_ISO_ASAP;
  578. k = 0;
  579. for (j = 0; j < max_packets; j++) {
  580. urb->iso_frame_desc[j].offset = k;
  581. urb->iso_frame_desc[j].length =
  582. dev->isoc_ctl.max_pkt_size;
  583. k += dev->isoc_ctl.max_pkt_size;
  584. }
  585. }
  586. init_waitqueue_head(&dma_q->wq);
  587. em28xx_capture_start(dev, 1);
  588. /* submit urbs and enables IRQ */
  589. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  590. rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
  591. if (rc) {
  592. em28xx_err("submit of urb %i failed (error=%i)\n", i,
  593. rc);
  594. em28xx_uninit_isoc(dev);
  595. return rc;
  596. }
  597. }
  598. return 0;
  599. }
  600. EXPORT_SYMBOL_GPL(em28xx_init_isoc);