omap_hwmod.c 101 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "prm2xxx_3xxx.h"
  150. #include "prm44xx.h"
  151. #include "prminst44xx.h"
  152. #include "mux.h"
  153. /* Maximum microseconds to wait for OMAP module to softreset */
  154. #define MAX_MODULE_SOFTRESET_WAIT 10000
  155. /* Name of the OMAP hwmod for the MPU */
  156. #define MPU_INITIATOR_NAME "mpu"
  157. /*
  158. * Number of struct omap_hwmod_link records per struct
  159. * omap_hwmod_ocp_if record (master->slave and slave->master)
  160. */
  161. #define LINKS_PER_OCP_IF 2
  162. /**
  163. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  164. * @enable_module: function to enable a module (via MODULEMODE)
  165. * @disable_module: function to disable a module (via MODULEMODE)
  166. *
  167. * XXX Eventually this functionality will be hidden inside the PRM/CM
  168. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  169. * conditionals in this code.
  170. */
  171. struct omap_hwmod_soc_ops {
  172. void (*enable_module)(struct omap_hwmod *oh);
  173. int (*disable_module)(struct omap_hwmod *oh);
  174. int (*wait_target_ready)(struct omap_hwmod *oh);
  175. int (*assert_hardreset)(struct omap_hwmod *oh,
  176. struct omap_hwmod_rst_info *ohri);
  177. int (*deassert_hardreset)(struct omap_hwmod *oh,
  178. struct omap_hwmod_rst_info *ohri);
  179. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  180. struct omap_hwmod_rst_info *ohri);
  181. int (*init_clkdm)(struct omap_hwmod *oh);
  182. };
  183. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  184. static struct omap_hwmod_soc_ops soc_ops;
  185. /* omap_hwmod_list contains all registered struct omap_hwmods */
  186. static LIST_HEAD(omap_hwmod_list);
  187. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  188. static struct omap_hwmod *mpu_oh;
  189. /*
  190. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  191. * allocated from - used to reduce the number of small memory
  192. * allocations, which has a significant impact on performance
  193. */
  194. static struct omap_hwmod_link *linkspace;
  195. /*
  196. * free_ls, max_ls: array indexes into linkspace; representing the
  197. * next free struct omap_hwmod_link index, and the maximum number of
  198. * struct omap_hwmod_link records allocated (respectively)
  199. */
  200. static unsigned short free_ls, max_ls, ls_supp;
  201. /* inited: set to true once the hwmod code is initialized */
  202. static bool inited;
  203. /* Private functions */
  204. /**
  205. * _fetch_next_ocp_if - return the next OCP interface in a list
  206. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  207. * @i: pointer to the index of the element pointed to by @p in the list
  208. *
  209. * Return a pointer to the struct omap_hwmod_ocp_if record
  210. * containing the struct list_head pointed to by @p, and increment
  211. * @p such that a future call to this routine will return the next
  212. * record.
  213. */
  214. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  215. int *i)
  216. {
  217. struct omap_hwmod_ocp_if *oi;
  218. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  219. *p = (*p)->next;
  220. *i = *i + 1;
  221. return oi;
  222. }
  223. /**
  224. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  225. * @oh: struct omap_hwmod *
  226. *
  227. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  228. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  229. * OCP_SYSCONFIG register or 0 upon success.
  230. */
  231. static int _update_sysc_cache(struct omap_hwmod *oh)
  232. {
  233. if (!oh->class->sysc) {
  234. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  235. return -EINVAL;
  236. }
  237. /* XXX ensure module interface clock is up */
  238. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  239. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  240. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  241. return 0;
  242. }
  243. /**
  244. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  245. * @v: OCP_SYSCONFIG value to write
  246. * @oh: struct omap_hwmod *
  247. *
  248. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  249. * one. No return value.
  250. */
  251. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  252. {
  253. if (!oh->class->sysc) {
  254. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  255. return;
  256. }
  257. /* XXX ensure module interface clock is up */
  258. /* Module might have lost context, always update cache and register */
  259. oh->_sysc_cache = v;
  260. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  261. }
  262. /**
  263. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  264. * @oh: struct omap_hwmod *
  265. * @standbymode: MIDLEMODE field bits
  266. * @v: pointer to register contents to modify
  267. *
  268. * Update the master standby mode bits in @v to be @standbymode for
  269. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  270. * upon error or 0 upon success.
  271. */
  272. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  273. u32 *v)
  274. {
  275. u32 mstandby_mask;
  276. u8 mstandby_shift;
  277. if (!oh->class->sysc ||
  278. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  279. return -EINVAL;
  280. if (!oh->class->sysc->sysc_fields) {
  281. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  282. return -EINVAL;
  283. }
  284. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  285. mstandby_mask = (0x3 << mstandby_shift);
  286. *v &= ~mstandby_mask;
  287. *v |= __ffs(standbymode) << mstandby_shift;
  288. return 0;
  289. }
  290. /**
  291. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  292. * @oh: struct omap_hwmod *
  293. * @idlemode: SIDLEMODE field bits
  294. * @v: pointer to register contents to modify
  295. *
  296. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  297. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  298. * or 0 upon success.
  299. */
  300. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  301. {
  302. u32 sidle_mask;
  303. u8 sidle_shift;
  304. if (!oh->class->sysc ||
  305. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  306. return -EINVAL;
  307. if (!oh->class->sysc->sysc_fields) {
  308. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  309. return -EINVAL;
  310. }
  311. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  312. sidle_mask = (0x3 << sidle_shift);
  313. *v &= ~sidle_mask;
  314. *v |= __ffs(idlemode) << sidle_shift;
  315. return 0;
  316. }
  317. /**
  318. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  319. * @oh: struct omap_hwmod *
  320. * @clockact: CLOCKACTIVITY field bits
  321. * @v: pointer to register contents to modify
  322. *
  323. * Update the clockactivity mode bits in @v to be @clockact for the
  324. * @oh hwmod. Used for additional powersaving on some modules. Does
  325. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  326. * success.
  327. */
  328. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  329. {
  330. u32 clkact_mask;
  331. u8 clkact_shift;
  332. if (!oh->class->sysc ||
  333. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  334. return -EINVAL;
  335. if (!oh->class->sysc->sysc_fields) {
  336. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  337. return -EINVAL;
  338. }
  339. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  340. clkact_mask = (0x3 << clkact_shift);
  341. *v &= ~clkact_mask;
  342. *v |= clockact << clkact_shift;
  343. return 0;
  344. }
  345. /**
  346. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  347. * @oh: struct omap_hwmod *
  348. * @v: pointer to register contents to modify
  349. *
  350. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  351. * error or 0 upon success.
  352. */
  353. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  354. {
  355. u32 softrst_mask;
  356. if (!oh->class->sysc ||
  357. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  358. return -EINVAL;
  359. if (!oh->class->sysc->sysc_fields) {
  360. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  361. return -EINVAL;
  362. }
  363. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  364. *v |= softrst_mask;
  365. return 0;
  366. }
  367. /**
  368. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  369. * @oh: struct omap_hwmod *
  370. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  371. * @v: pointer to register contents to modify
  372. *
  373. * Update the module autoidle bit in @v to be @autoidle for the @oh
  374. * hwmod. The autoidle bit controls whether the module can gate
  375. * internal clocks automatically when it isn't doing anything; the
  376. * exact function of this bit varies on a per-module basis. This
  377. * function does not write to the hardware. Returns -EINVAL upon
  378. * error or 0 upon success.
  379. */
  380. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  381. u32 *v)
  382. {
  383. u32 autoidle_mask;
  384. u8 autoidle_shift;
  385. if (!oh->class->sysc ||
  386. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  387. return -EINVAL;
  388. if (!oh->class->sysc->sysc_fields) {
  389. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  390. return -EINVAL;
  391. }
  392. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  393. autoidle_mask = (0x1 << autoidle_shift);
  394. *v &= ~autoidle_mask;
  395. *v |= autoidle << autoidle_shift;
  396. return 0;
  397. }
  398. /**
  399. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  400. * @oh: struct omap_hwmod *
  401. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  402. *
  403. * Set or clear the I/O pad wakeup flag in the mux entries for the
  404. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  405. * in memory. If the hwmod is currently idled, and the new idle
  406. * values don't match the previous ones, this function will also
  407. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  408. * currently idled, this function won't touch the hardware: the new
  409. * mux settings are written to the SCM PADCTRL registers when the
  410. * hwmod is idled. No return value.
  411. */
  412. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  413. {
  414. struct omap_device_pad *pad;
  415. bool change = false;
  416. u16 prev_idle;
  417. int j;
  418. if (!oh->mux || !oh->mux->enabled)
  419. return;
  420. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  421. pad = oh->mux->pads_dynamic[j];
  422. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  423. continue;
  424. prev_idle = pad->idle;
  425. if (set_wake)
  426. pad->idle |= OMAP_WAKEUP_EN;
  427. else
  428. pad->idle &= ~OMAP_WAKEUP_EN;
  429. if (prev_idle != pad->idle)
  430. change = true;
  431. }
  432. if (change && oh->_state == _HWMOD_STATE_IDLE)
  433. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  434. }
  435. /**
  436. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  437. * @oh: struct omap_hwmod *
  438. *
  439. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  440. * upon error or 0 upon success.
  441. */
  442. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  443. {
  444. if (!oh->class->sysc ||
  445. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  446. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  447. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  448. return -EINVAL;
  449. if (!oh->class->sysc->sysc_fields) {
  450. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  451. return -EINVAL;
  452. }
  453. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  454. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  455. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  456. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  457. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  458. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  459. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  460. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  461. return 0;
  462. }
  463. /**
  464. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  465. * @oh: struct omap_hwmod *
  466. *
  467. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  468. * upon error or 0 upon success.
  469. */
  470. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  471. {
  472. if (!oh->class->sysc ||
  473. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  474. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  475. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  476. return -EINVAL;
  477. if (!oh->class->sysc->sysc_fields) {
  478. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  479. return -EINVAL;
  480. }
  481. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  482. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  483. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  484. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  485. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  486. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  487. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  488. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  489. return 0;
  490. }
  491. /**
  492. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  493. * @oh: struct omap_hwmod *
  494. *
  495. * Prevent the hardware module @oh from entering idle while the
  496. * hardare module initiator @init_oh is active. Useful when a module
  497. * will be accessed by a particular initiator (e.g., if a module will
  498. * be accessed by the IVA, there should be a sleepdep between the IVA
  499. * initiator and the module). Only applies to modules in smart-idle
  500. * mode. If the clockdomain is marked as not needing autodeps, return
  501. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  502. * passes along clkdm_add_sleepdep() value upon success.
  503. */
  504. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  505. {
  506. if (!oh->_clk)
  507. return -EINVAL;
  508. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  509. return 0;
  510. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  511. }
  512. /**
  513. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  514. * @oh: struct omap_hwmod *
  515. *
  516. * Allow the hardware module @oh to enter idle while the hardare
  517. * module initiator @init_oh is active. Useful when a module will not
  518. * be accessed by a particular initiator (e.g., if a module will not
  519. * be accessed by the IVA, there should be no sleepdep between the IVA
  520. * initiator and the module). Only applies to modules in smart-idle
  521. * mode. If the clockdomain is marked as not needing autodeps, return
  522. * 0 without doing anything. Returns -EINVAL upon error or passes
  523. * along clkdm_del_sleepdep() value upon success.
  524. */
  525. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  526. {
  527. if (!oh->_clk)
  528. return -EINVAL;
  529. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  530. return 0;
  531. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  532. }
  533. /**
  534. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Called from _init_clocks(). Populates the @oh _clk (main
  538. * functional clock pointer) if a main_clk is present. Returns 0 on
  539. * success or -EINVAL on error.
  540. */
  541. static int _init_main_clk(struct omap_hwmod *oh)
  542. {
  543. int ret = 0;
  544. if (!oh->main_clk)
  545. return 0;
  546. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  547. if (!oh->_clk) {
  548. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  549. oh->name, oh->main_clk);
  550. return -EINVAL;
  551. }
  552. if (!oh->_clk->clkdm)
  553. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  554. oh->main_clk, oh->_clk->name);
  555. return ret;
  556. }
  557. /**
  558. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  559. * @oh: struct omap_hwmod *
  560. *
  561. * Called from _init_clocks(). Populates the @oh OCP slave interface
  562. * clock pointers. Returns 0 on success or -EINVAL on error.
  563. */
  564. static int _init_interface_clks(struct omap_hwmod *oh)
  565. {
  566. struct omap_hwmod_ocp_if *os;
  567. struct list_head *p;
  568. struct clk *c;
  569. int i = 0;
  570. int ret = 0;
  571. p = oh->slave_ports.next;
  572. while (i < oh->slaves_cnt) {
  573. os = _fetch_next_ocp_if(&p, &i);
  574. if (!os->clk)
  575. continue;
  576. c = omap_clk_get_by_name(os->clk);
  577. if (!c) {
  578. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  579. oh->name, os->clk);
  580. ret = -EINVAL;
  581. }
  582. os->_clk = c;
  583. }
  584. return ret;
  585. }
  586. /**
  587. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  588. * @oh: struct omap_hwmod *
  589. *
  590. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  591. * clock pointers. Returns 0 on success or -EINVAL on error.
  592. */
  593. static int _init_opt_clks(struct omap_hwmod *oh)
  594. {
  595. struct omap_hwmod_opt_clk *oc;
  596. struct clk *c;
  597. int i;
  598. int ret = 0;
  599. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  600. c = omap_clk_get_by_name(oc->clk);
  601. if (!c) {
  602. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  603. oh->name, oc->clk);
  604. ret = -EINVAL;
  605. }
  606. oc->_clk = c;
  607. }
  608. return ret;
  609. }
  610. /**
  611. * _enable_clocks - enable hwmod main clock and interface clocks
  612. * @oh: struct omap_hwmod *
  613. *
  614. * Enables all clocks necessary for register reads and writes to succeed
  615. * on the hwmod @oh. Returns 0.
  616. */
  617. static int _enable_clocks(struct omap_hwmod *oh)
  618. {
  619. struct omap_hwmod_ocp_if *os;
  620. struct list_head *p;
  621. int i = 0;
  622. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  623. if (oh->_clk)
  624. clk_enable(oh->_clk);
  625. p = oh->slave_ports.next;
  626. while (i < oh->slaves_cnt) {
  627. os = _fetch_next_ocp_if(&p, &i);
  628. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  629. clk_enable(os->_clk);
  630. }
  631. /* The opt clocks are controlled by the device driver. */
  632. return 0;
  633. }
  634. /**
  635. * _disable_clocks - disable hwmod main clock and interface clocks
  636. * @oh: struct omap_hwmod *
  637. *
  638. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  639. */
  640. static int _disable_clocks(struct omap_hwmod *oh)
  641. {
  642. struct omap_hwmod_ocp_if *os;
  643. struct list_head *p;
  644. int i = 0;
  645. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  646. if (oh->_clk)
  647. clk_disable(oh->_clk);
  648. p = oh->slave_ports.next;
  649. while (i < oh->slaves_cnt) {
  650. os = _fetch_next_ocp_if(&p, &i);
  651. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  652. clk_disable(os->_clk);
  653. }
  654. /* The opt clocks are controlled by the device driver. */
  655. return 0;
  656. }
  657. static void _enable_optional_clocks(struct omap_hwmod *oh)
  658. {
  659. struct omap_hwmod_opt_clk *oc;
  660. int i;
  661. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  662. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  663. if (oc->_clk) {
  664. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  665. oc->_clk->name);
  666. clk_enable(oc->_clk);
  667. }
  668. }
  669. static void _disable_optional_clocks(struct omap_hwmod *oh)
  670. {
  671. struct omap_hwmod_opt_clk *oc;
  672. int i;
  673. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  674. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  675. if (oc->_clk) {
  676. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  677. oc->_clk->name);
  678. clk_disable(oc->_clk);
  679. }
  680. }
  681. /**
  682. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  683. * @oh: struct omap_hwmod *
  684. *
  685. * Enables the PRCM module mode related to the hwmod @oh.
  686. * No return value.
  687. */
  688. static void _omap4_enable_module(struct omap_hwmod *oh)
  689. {
  690. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  691. return;
  692. pr_debug("omap_hwmod: %s: %s: %d\n",
  693. oh->name, __func__, oh->prcm.omap4.modulemode);
  694. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  695. oh->clkdm->prcm_partition,
  696. oh->clkdm->cm_inst,
  697. oh->clkdm->clkdm_offs,
  698. oh->prcm.omap4.clkctrl_offs);
  699. }
  700. /**
  701. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  702. * @oh: struct omap_hwmod *
  703. *
  704. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  705. * does not have an IDLEST bit or if the module successfully enters
  706. * slave idle; otherwise, pass along the return value of the
  707. * appropriate *_cm*_wait_module_idle() function.
  708. */
  709. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  710. {
  711. if (!oh || !oh->clkdm)
  712. return -EINVAL;
  713. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  714. return 0;
  715. if (oh->flags & HWMOD_NO_IDLEST)
  716. return 0;
  717. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  718. oh->clkdm->cm_inst,
  719. oh->clkdm->clkdm_offs,
  720. oh->prcm.omap4.clkctrl_offs);
  721. }
  722. /**
  723. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  724. * @oh: struct omap_hwmod *oh
  725. *
  726. * Count and return the number of MPU IRQs associated with the hwmod
  727. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  728. * NULL.
  729. */
  730. static int _count_mpu_irqs(struct omap_hwmod *oh)
  731. {
  732. struct omap_hwmod_irq_info *ohii;
  733. int i = 0;
  734. if (!oh || !oh->mpu_irqs)
  735. return 0;
  736. do {
  737. ohii = &oh->mpu_irqs[i++];
  738. } while (ohii->irq != -1);
  739. return i-1;
  740. }
  741. /**
  742. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  743. * @oh: struct omap_hwmod *oh
  744. *
  745. * Count and return the number of SDMA request lines associated with
  746. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  747. * if @oh is NULL.
  748. */
  749. static int _count_sdma_reqs(struct omap_hwmod *oh)
  750. {
  751. struct omap_hwmod_dma_info *ohdi;
  752. int i = 0;
  753. if (!oh || !oh->sdma_reqs)
  754. return 0;
  755. do {
  756. ohdi = &oh->sdma_reqs[i++];
  757. } while (ohdi->dma_req != -1);
  758. return i-1;
  759. }
  760. /**
  761. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  762. * @oh: struct omap_hwmod *oh
  763. *
  764. * Count and return the number of address space ranges associated with
  765. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  766. * if @oh is NULL.
  767. */
  768. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  769. {
  770. struct omap_hwmod_addr_space *mem;
  771. int i = 0;
  772. if (!os || !os->addr)
  773. return 0;
  774. do {
  775. mem = &os->addr[i++];
  776. } while (mem->pa_start != mem->pa_end);
  777. return i-1;
  778. }
  779. /**
  780. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  781. * @oh: struct omap_hwmod * to operate on
  782. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  783. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  784. *
  785. * Retrieve a MPU hardware IRQ line number named by @name associated
  786. * with the IP block pointed to by @oh. The IRQ number will be filled
  787. * into the address pointed to by @dma. When @name is non-null, the
  788. * IRQ line number associated with the named entry will be returned.
  789. * If @name is null, the first matching entry will be returned. Data
  790. * order is not meaningful in hwmod data, so callers are strongly
  791. * encouraged to use a non-null @name whenever possible to avoid
  792. * unpredictable effects if hwmod data is later added that causes data
  793. * ordering to change. Returns 0 upon success or a negative error
  794. * code upon error.
  795. */
  796. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  797. unsigned int *irq)
  798. {
  799. int i;
  800. bool found = false;
  801. if (!oh->mpu_irqs)
  802. return -ENOENT;
  803. i = 0;
  804. while (oh->mpu_irqs[i].irq != -1) {
  805. if (name == oh->mpu_irqs[i].name ||
  806. !strcmp(name, oh->mpu_irqs[i].name)) {
  807. found = true;
  808. break;
  809. }
  810. i++;
  811. }
  812. if (!found)
  813. return -ENOENT;
  814. *irq = oh->mpu_irqs[i].irq;
  815. return 0;
  816. }
  817. /**
  818. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  819. * @oh: struct omap_hwmod * to operate on
  820. * @name: pointer to the name of the SDMA request line to fetch (optional)
  821. * @dma: pointer to an unsigned int to store the request line ID to
  822. *
  823. * Retrieve an SDMA request line ID named by @name on the IP block
  824. * pointed to by @oh. The ID will be filled into the address pointed
  825. * to by @dma. When @name is non-null, the request line ID associated
  826. * with the named entry will be returned. If @name is null, the first
  827. * matching entry will be returned. Data order is not meaningful in
  828. * hwmod data, so callers are strongly encouraged to use a non-null
  829. * @name whenever possible to avoid unpredictable effects if hwmod
  830. * data is later added that causes data ordering to change. Returns 0
  831. * upon success or a negative error code upon error.
  832. */
  833. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  834. unsigned int *dma)
  835. {
  836. int i;
  837. bool found = false;
  838. if (!oh->sdma_reqs)
  839. return -ENOENT;
  840. i = 0;
  841. while (oh->sdma_reqs[i].dma_req != -1) {
  842. if (name == oh->sdma_reqs[i].name ||
  843. !strcmp(name, oh->sdma_reqs[i].name)) {
  844. found = true;
  845. break;
  846. }
  847. i++;
  848. }
  849. if (!found)
  850. return -ENOENT;
  851. *dma = oh->sdma_reqs[i].dma_req;
  852. return 0;
  853. }
  854. /**
  855. * _get_addr_space_by_name - fetch address space start & end by name
  856. * @oh: struct omap_hwmod * to operate on
  857. * @name: pointer to the name of the address space to fetch (optional)
  858. * @pa_start: pointer to a u32 to store the starting address to
  859. * @pa_end: pointer to a u32 to store the ending address to
  860. *
  861. * Retrieve address space start and end addresses for the IP block
  862. * pointed to by @oh. The data will be filled into the addresses
  863. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  864. * address space data associated with the named entry will be
  865. * returned. If @name is null, the first matching entry will be
  866. * returned. Data order is not meaningful in hwmod data, so callers
  867. * are strongly encouraged to use a non-null @name whenever possible
  868. * to avoid unpredictable effects if hwmod data is later added that
  869. * causes data ordering to change. Returns 0 upon success or a
  870. * negative error code upon error.
  871. */
  872. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  873. u32 *pa_start, u32 *pa_end)
  874. {
  875. int i, j;
  876. struct omap_hwmod_ocp_if *os;
  877. struct list_head *p = NULL;
  878. bool found = false;
  879. p = oh->slave_ports.next;
  880. i = 0;
  881. while (i < oh->slaves_cnt) {
  882. os = _fetch_next_ocp_if(&p, &i);
  883. if (!os->addr)
  884. return -ENOENT;
  885. j = 0;
  886. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  887. if (name == os->addr[j].name ||
  888. !strcmp(name, os->addr[j].name)) {
  889. found = true;
  890. break;
  891. }
  892. j++;
  893. }
  894. if (found)
  895. break;
  896. }
  897. if (!found)
  898. return -ENOENT;
  899. *pa_start = os->addr[j].pa_start;
  900. *pa_end = os->addr[j].pa_end;
  901. return 0;
  902. }
  903. /**
  904. * _save_mpu_port_index - find and save the index to @oh's MPU port
  905. * @oh: struct omap_hwmod *
  906. *
  907. * Determines the array index of the OCP slave port that the MPU uses
  908. * to address the device, and saves it into the struct omap_hwmod.
  909. * Intended to be called during hwmod registration only. No return
  910. * value.
  911. */
  912. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  913. {
  914. struct omap_hwmod_ocp_if *os = NULL;
  915. struct list_head *p;
  916. int i = 0;
  917. if (!oh)
  918. return;
  919. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  920. p = oh->slave_ports.next;
  921. while (i < oh->slaves_cnt) {
  922. os = _fetch_next_ocp_if(&p, &i);
  923. if (os->user & OCP_USER_MPU) {
  924. oh->_mpu_port = os;
  925. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  926. break;
  927. }
  928. }
  929. return;
  930. }
  931. /**
  932. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  933. * @oh: struct omap_hwmod *
  934. *
  935. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  936. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  937. * communicate with the IP block. This interface need not be directly
  938. * connected to the MPU (and almost certainly is not), but is directly
  939. * connected to the IP block represented by @oh. Returns a pointer
  940. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  941. * error or if there does not appear to be a path from the MPU to this
  942. * IP block.
  943. */
  944. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  945. {
  946. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  947. return NULL;
  948. return oh->_mpu_port;
  949. };
  950. /**
  951. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  952. * @oh: struct omap_hwmod *
  953. *
  954. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  955. * the register target MPU address space; or returns NULL upon error.
  956. */
  957. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  958. {
  959. struct omap_hwmod_ocp_if *os;
  960. struct omap_hwmod_addr_space *mem;
  961. int found = 0, i = 0;
  962. os = _find_mpu_rt_port(oh);
  963. if (!os || !os->addr)
  964. return NULL;
  965. do {
  966. mem = &os->addr[i++];
  967. if (mem->flags & ADDR_TYPE_RT)
  968. found = 1;
  969. } while (!found && mem->pa_start != mem->pa_end);
  970. return (found) ? mem : NULL;
  971. }
  972. /**
  973. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  974. * @oh: struct omap_hwmod *
  975. *
  976. * If module is marked as SWSUP_SIDLE, force the module out of slave
  977. * idle; otherwise, configure it for smart-idle. If module is marked
  978. * as SWSUP_MSUSPEND, force the module out of master standby;
  979. * otherwise, configure it for smart-standby. No return value.
  980. */
  981. static void _enable_sysc(struct omap_hwmod *oh)
  982. {
  983. u8 idlemode, sf;
  984. u32 v;
  985. if (!oh->class->sysc)
  986. return;
  987. v = oh->_sysc_cache;
  988. sf = oh->class->sysc->sysc_flags;
  989. if (sf & SYSC_HAS_SIDLEMODE) {
  990. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  991. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  992. _set_slave_idlemode(oh, idlemode, &v);
  993. }
  994. if (sf & SYSC_HAS_MIDLEMODE) {
  995. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  996. idlemode = HWMOD_IDLEMODE_NO;
  997. } else {
  998. if (sf & SYSC_HAS_ENAWAKEUP)
  999. _enable_wakeup(oh, &v);
  1000. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1001. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1002. else
  1003. idlemode = HWMOD_IDLEMODE_SMART;
  1004. }
  1005. _set_master_standbymode(oh, idlemode, &v);
  1006. }
  1007. /*
  1008. * XXX The clock framework should handle this, by
  1009. * calling into this code. But this must wait until the
  1010. * clock structures are tagged with omap_hwmod entries
  1011. */
  1012. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1013. (sf & SYSC_HAS_CLOCKACTIVITY))
  1014. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1015. /* If slave is in SMARTIDLE, also enable wakeup */
  1016. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1017. _enable_wakeup(oh, &v);
  1018. _write_sysconfig(v, oh);
  1019. /*
  1020. * Set the autoidle bit only after setting the smartidle bit
  1021. * Setting this will not have any impact on the other modules.
  1022. */
  1023. if (sf & SYSC_HAS_AUTOIDLE) {
  1024. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1025. 0 : 1;
  1026. _set_module_autoidle(oh, idlemode, &v);
  1027. _write_sysconfig(v, oh);
  1028. }
  1029. }
  1030. /**
  1031. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1032. * @oh: struct omap_hwmod *
  1033. *
  1034. * If module is marked as SWSUP_SIDLE, force the module into slave
  1035. * idle; otherwise, configure it for smart-idle. If module is marked
  1036. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1037. * configure it for smart-standby. No return value.
  1038. */
  1039. static void _idle_sysc(struct omap_hwmod *oh)
  1040. {
  1041. u8 idlemode, sf;
  1042. u32 v;
  1043. if (!oh->class->sysc)
  1044. return;
  1045. v = oh->_sysc_cache;
  1046. sf = oh->class->sysc->sysc_flags;
  1047. if (sf & SYSC_HAS_SIDLEMODE) {
  1048. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1049. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  1050. _set_slave_idlemode(oh, idlemode, &v);
  1051. }
  1052. if (sf & SYSC_HAS_MIDLEMODE) {
  1053. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1054. idlemode = HWMOD_IDLEMODE_FORCE;
  1055. } else {
  1056. if (sf & SYSC_HAS_ENAWAKEUP)
  1057. _enable_wakeup(oh, &v);
  1058. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1059. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1060. else
  1061. idlemode = HWMOD_IDLEMODE_SMART;
  1062. }
  1063. _set_master_standbymode(oh, idlemode, &v);
  1064. }
  1065. /* If slave is in SMARTIDLE, also enable wakeup */
  1066. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1067. _enable_wakeup(oh, &v);
  1068. _write_sysconfig(v, oh);
  1069. }
  1070. /**
  1071. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1072. * @oh: struct omap_hwmod *
  1073. *
  1074. * Force the module into slave idle and master suspend. No return
  1075. * value.
  1076. */
  1077. static void _shutdown_sysc(struct omap_hwmod *oh)
  1078. {
  1079. u32 v;
  1080. u8 sf;
  1081. if (!oh->class->sysc)
  1082. return;
  1083. v = oh->_sysc_cache;
  1084. sf = oh->class->sysc->sysc_flags;
  1085. if (sf & SYSC_HAS_SIDLEMODE)
  1086. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1087. if (sf & SYSC_HAS_MIDLEMODE)
  1088. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1089. if (sf & SYSC_HAS_AUTOIDLE)
  1090. _set_module_autoidle(oh, 1, &v);
  1091. _write_sysconfig(v, oh);
  1092. }
  1093. /**
  1094. * _lookup - find an omap_hwmod by name
  1095. * @name: find an omap_hwmod by name
  1096. *
  1097. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1098. */
  1099. static struct omap_hwmod *_lookup(const char *name)
  1100. {
  1101. struct omap_hwmod *oh, *temp_oh;
  1102. oh = NULL;
  1103. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1104. if (!strcmp(name, temp_oh->name)) {
  1105. oh = temp_oh;
  1106. break;
  1107. }
  1108. }
  1109. return oh;
  1110. }
  1111. /**
  1112. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1113. * @oh: struct omap_hwmod *
  1114. *
  1115. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1116. * clockdomain pointer, and save it into the struct omap_hwmod.
  1117. * Return -EINVAL if the clkdm_name lookup failed.
  1118. */
  1119. static int _init_clkdm(struct omap_hwmod *oh)
  1120. {
  1121. if (!oh->clkdm_name)
  1122. return 0;
  1123. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1124. if (!oh->clkdm) {
  1125. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1126. oh->name, oh->clkdm_name);
  1127. return -EINVAL;
  1128. }
  1129. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1130. oh->name, oh->clkdm_name);
  1131. return 0;
  1132. }
  1133. /**
  1134. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1135. * well the clockdomain.
  1136. * @oh: struct omap_hwmod *
  1137. * @data: not used; pass NULL
  1138. *
  1139. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1140. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1141. * success, or a negative error code on failure.
  1142. */
  1143. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1144. {
  1145. int ret = 0;
  1146. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1147. return 0;
  1148. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1149. ret |= _init_main_clk(oh);
  1150. ret |= _init_interface_clks(oh);
  1151. ret |= _init_opt_clks(oh);
  1152. if (soc_ops.init_clkdm)
  1153. ret |= soc_ops.init_clkdm(oh);
  1154. if (!ret)
  1155. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1156. else
  1157. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1158. return ret;
  1159. }
  1160. /**
  1161. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1162. * @oh: struct omap_hwmod *
  1163. * @name: name of the reset line in the context of this hwmod
  1164. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1165. *
  1166. * Return the bit position of the reset line that match the
  1167. * input name. Return -ENOENT if not found.
  1168. */
  1169. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1170. struct omap_hwmod_rst_info *ohri)
  1171. {
  1172. int i;
  1173. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1174. const char *rst_line = oh->rst_lines[i].name;
  1175. if (!strcmp(rst_line, name)) {
  1176. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1177. ohri->st_shift = oh->rst_lines[i].st_shift;
  1178. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1179. oh->name, __func__, rst_line, ohri->rst_shift,
  1180. ohri->st_shift);
  1181. return 0;
  1182. }
  1183. }
  1184. return -ENOENT;
  1185. }
  1186. /**
  1187. * _assert_hardreset - assert the HW reset line of submodules
  1188. * contained in the hwmod module.
  1189. * @oh: struct omap_hwmod *
  1190. * @name: name of the reset line to lookup and assert
  1191. *
  1192. * Some IP like dsp, ipu or iva contain processor that require an HW
  1193. * reset line to be assert / deassert in order to enable fully the IP.
  1194. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1195. * asserting the hardreset line on the currently-booted SoC, or passes
  1196. * along the return value from _lookup_hardreset() or the SoC's
  1197. * assert_hardreset code.
  1198. */
  1199. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1200. {
  1201. struct omap_hwmod_rst_info ohri;
  1202. u8 ret = -EINVAL;
  1203. if (!oh)
  1204. return -EINVAL;
  1205. if (!soc_ops.assert_hardreset)
  1206. return -ENOSYS;
  1207. ret = _lookup_hardreset(oh, name, &ohri);
  1208. if (IS_ERR_VALUE(ret))
  1209. return ret;
  1210. ret = soc_ops.assert_hardreset(oh, &ohri);
  1211. return ret;
  1212. }
  1213. /**
  1214. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1215. * in the hwmod module.
  1216. * @oh: struct omap_hwmod *
  1217. * @name: name of the reset line to look up and deassert
  1218. *
  1219. * Some IP like dsp, ipu or iva contain processor that require an HW
  1220. * reset line to be assert / deassert in order to enable fully the IP.
  1221. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1222. * deasserting the hardreset line on the currently-booted SoC, or passes
  1223. * along the return value from _lookup_hardreset() or the SoC's
  1224. * deassert_hardreset code.
  1225. */
  1226. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1227. {
  1228. struct omap_hwmod_rst_info ohri;
  1229. int ret = -EINVAL;
  1230. if (!oh)
  1231. return -EINVAL;
  1232. if (!soc_ops.deassert_hardreset)
  1233. return -ENOSYS;
  1234. ret = _lookup_hardreset(oh, name, &ohri);
  1235. if (IS_ERR_VALUE(ret))
  1236. return ret;
  1237. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1238. if (ret == -EBUSY)
  1239. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1240. return ret;
  1241. }
  1242. /**
  1243. * _read_hardreset - read the HW reset line state of submodules
  1244. * contained in the hwmod module
  1245. * @oh: struct omap_hwmod *
  1246. * @name: name of the reset line to look up and read
  1247. *
  1248. * Return the state of the reset line. Returns -EINVAL if @oh is
  1249. * null, -ENOSYS if we have no way of reading the hardreset line
  1250. * status on the currently-booted SoC, or passes along the return
  1251. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1252. * code.
  1253. */
  1254. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1255. {
  1256. struct omap_hwmod_rst_info ohri;
  1257. u8 ret = -EINVAL;
  1258. if (!oh)
  1259. return -EINVAL;
  1260. if (!soc_ops.is_hardreset_asserted)
  1261. return -ENOSYS;
  1262. ret = _lookup_hardreset(oh, name, &ohri);
  1263. if (IS_ERR_VALUE(ret))
  1264. return ret;
  1265. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1266. }
  1267. /**
  1268. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1269. * @oh: struct omap_hwmod *
  1270. *
  1271. * If any hardreset line associated with @oh is asserted, then return true.
  1272. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1273. * no hardreset lines associated with @oh are asserted, then return false.
  1274. * This function is used to avoid executing some parts of the IP block
  1275. * enable/disable sequence if a hardreset line is set.
  1276. */
  1277. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1278. {
  1279. int i;
  1280. if (oh->rst_lines_cnt == 0)
  1281. return false;
  1282. for (i = 0; i < oh->rst_lines_cnt; i++)
  1283. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1284. return true;
  1285. return false;
  1286. }
  1287. /**
  1288. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1289. * @oh: struct omap_hwmod *
  1290. *
  1291. * Disable the PRCM module mode related to the hwmod @oh.
  1292. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1293. */
  1294. static int _omap4_disable_module(struct omap_hwmod *oh)
  1295. {
  1296. int v;
  1297. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1298. return -EINVAL;
  1299. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1300. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1301. oh->clkdm->cm_inst,
  1302. oh->clkdm->clkdm_offs,
  1303. oh->prcm.omap4.clkctrl_offs);
  1304. if (_are_any_hardreset_lines_asserted(oh))
  1305. return 0;
  1306. v = _omap4_wait_target_disable(oh);
  1307. if (v)
  1308. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1309. oh->name);
  1310. return 0;
  1311. }
  1312. /**
  1313. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1314. * @oh: struct omap_hwmod *
  1315. *
  1316. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1317. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1318. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1319. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1320. *
  1321. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1322. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1323. * use the SYSCONFIG softreset bit to provide the status.
  1324. *
  1325. * Note that some IP like McBSP do have reset control but don't have
  1326. * reset status.
  1327. */
  1328. static int _ocp_softreset(struct omap_hwmod *oh)
  1329. {
  1330. u32 v, softrst_mask;
  1331. int c = 0;
  1332. int ret = 0;
  1333. if (!oh->class->sysc ||
  1334. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1335. return -ENOENT;
  1336. /* clocks must be on for this operation */
  1337. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1338. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1339. "enabled state\n", oh->name);
  1340. return -EINVAL;
  1341. }
  1342. /* For some modules, all optionnal clocks need to be enabled as well */
  1343. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1344. _enable_optional_clocks(oh);
  1345. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1346. v = oh->_sysc_cache;
  1347. ret = _set_softreset(oh, &v);
  1348. if (ret)
  1349. goto dis_opt_clks;
  1350. _write_sysconfig(v, oh);
  1351. if (oh->class->sysc->srst_udelay)
  1352. udelay(oh->class->sysc->srst_udelay);
  1353. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1354. omap_test_timeout((omap_hwmod_read(oh,
  1355. oh->class->sysc->syss_offs)
  1356. & SYSS_RESETDONE_MASK),
  1357. MAX_MODULE_SOFTRESET_WAIT, c);
  1358. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1359. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1360. omap_test_timeout(!(omap_hwmod_read(oh,
  1361. oh->class->sysc->sysc_offs)
  1362. & softrst_mask),
  1363. MAX_MODULE_SOFTRESET_WAIT, c);
  1364. }
  1365. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1366. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1367. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1368. else
  1369. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1370. /*
  1371. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1372. * _wait_target_ready() or _reset()
  1373. */
  1374. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1375. dis_opt_clks:
  1376. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1377. _disable_optional_clocks(oh);
  1378. return ret;
  1379. }
  1380. /**
  1381. * _reset - reset an omap_hwmod
  1382. * @oh: struct omap_hwmod *
  1383. *
  1384. * Resets an omap_hwmod @oh. If the module has a custom reset
  1385. * function pointer defined, then call it to reset the IP block, and
  1386. * pass along its return value to the caller. Otherwise, if the IP
  1387. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1388. * associated with it, call a function to reset the IP block via that
  1389. * method, and pass along the return value to the caller. Finally, if
  1390. * the IP block has some hardreset lines associated with it, assert
  1391. * all of those, but do _not_ deassert them. (This is because driver
  1392. * authors have expressed an apparent requirement to control the
  1393. * deassertion of the hardreset lines themselves.)
  1394. *
  1395. * The default software reset mechanism for most OMAP IP blocks is
  1396. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1397. * hwmods cannot be reset via this method. Some are not targets and
  1398. * therefore have no OCP header registers to access. Others (like the
  1399. * IVA) have idiosyncratic reset sequences. So for these relatively
  1400. * rare cases, custom reset code can be supplied in the struct
  1401. * omap_hwmod_class .reset function pointer. Passes along the return
  1402. * value from either _ocp_softreset() or the custom reset function -
  1403. * these must return -EINVAL if the hwmod cannot be reset this way or
  1404. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1405. * not reset in time, or 0 upon success.
  1406. */
  1407. static int _reset(struct omap_hwmod *oh)
  1408. {
  1409. int i, r;
  1410. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1411. if (oh->class->reset) {
  1412. r = oh->class->reset(oh);
  1413. } else {
  1414. if (oh->rst_lines_cnt > 0) {
  1415. for (i = 0; i < oh->rst_lines_cnt; i++)
  1416. _assert_hardreset(oh, oh->rst_lines[i].name);
  1417. return 0;
  1418. } else {
  1419. r = _ocp_softreset(oh);
  1420. if (r == -ENOENT)
  1421. r = 0;
  1422. }
  1423. }
  1424. /*
  1425. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1426. * softreset. The _enable() function should be split to avoid
  1427. * the rewrite of the OCP_SYSCONFIG register.
  1428. */
  1429. if (oh->class->sysc) {
  1430. _update_sysc_cache(oh);
  1431. _enable_sysc(oh);
  1432. }
  1433. return r;
  1434. }
  1435. /**
  1436. * _enable - enable an omap_hwmod
  1437. * @oh: struct omap_hwmod *
  1438. *
  1439. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1440. * register target. Returns -EINVAL if the hwmod is in the wrong
  1441. * state or passes along the return value of _wait_target_ready().
  1442. */
  1443. static int _enable(struct omap_hwmod *oh)
  1444. {
  1445. int r;
  1446. int hwsup = 0;
  1447. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1448. /*
  1449. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1450. * state at init. Now that someone is really trying to enable
  1451. * them, just ensure that the hwmod mux is set.
  1452. */
  1453. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1454. /*
  1455. * If the caller has mux data populated, do the mux'ing
  1456. * which wouldn't have been done as part of the _enable()
  1457. * done during setup.
  1458. */
  1459. if (oh->mux)
  1460. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1461. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1462. return 0;
  1463. }
  1464. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1465. oh->_state != _HWMOD_STATE_IDLE &&
  1466. oh->_state != _HWMOD_STATE_DISABLED) {
  1467. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1468. oh->name);
  1469. return -EINVAL;
  1470. }
  1471. /*
  1472. * If an IP block contains HW reset lines and any of them are
  1473. * asserted, we let integration code associated with that
  1474. * block handle the enable. We've received very little
  1475. * information on what those driver authors need, and until
  1476. * detailed information is provided and the driver code is
  1477. * posted to the public lists, this is probably the best we
  1478. * can do.
  1479. */
  1480. if (_are_any_hardreset_lines_asserted(oh))
  1481. return 0;
  1482. /* Mux pins for device runtime if populated */
  1483. if (oh->mux && (!oh->mux->enabled ||
  1484. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1485. oh->mux->pads_dynamic)))
  1486. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1487. _add_initiator_dep(oh, mpu_oh);
  1488. if (oh->clkdm) {
  1489. /*
  1490. * A clockdomain must be in SW_SUP before enabling
  1491. * completely the module. The clockdomain can be set
  1492. * in HW_AUTO only when the module become ready.
  1493. */
  1494. hwsup = clkdm_in_hwsup(oh->clkdm);
  1495. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1496. if (r) {
  1497. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1498. oh->name, oh->clkdm->name, r);
  1499. return r;
  1500. }
  1501. }
  1502. _enable_clocks(oh);
  1503. if (soc_ops.enable_module)
  1504. soc_ops.enable_module(oh);
  1505. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1506. -EINVAL;
  1507. if (!r) {
  1508. /*
  1509. * Set the clockdomain to HW_AUTO only if the target is ready,
  1510. * assuming that the previous state was HW_AUTO
  1511. */
  1512. if (oh->clkdm && hwsup)
  1513. clkdm_allow_idle(oh->clkdm);
  1514. oh->_state = _HWMOD_STATE_ENABLED;
  1515. /* Access the sysconfig only if the target is ready */
  1516. if (oh->class->sysc) {
  1517. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1518. _update_sysc_cache(oh);
  1519. _enable_sysc(oh);
  1520. }
  1521. } else {
  1522. _disable_clocks(oh);
  1523. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1524. oh->name, r);
  1525. if (oh->clkdm)
  1526. clkdm_hwmod_disable(oh->clkdm, oh);
  1527. }
  1528. return r;
  1529. }
  1530. /**
  1531. * _idle - idle an omap_hwmod
  1532. * @oh: struct omap_hwmod *
  1533. *
  1534. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1535. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1536. * state or returns 0.
  1537. */
  1538. static int _idle(struct omap_hwmod *oh)
  1539. {
  1540. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1541. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1542. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1543. oh->name);
  1544. return -EINVAL;
  1545. }
  1546. if (_are_any_hardreset_lines_asserted(oh))
  1547. return 0;
  1548. if (oh->class->sysc)
  1549. _idle_sysc(oh);
  1550. _del_initiator_dep(oh, mpu_oh);
  1551. if (soc_ops.disable_module)
  1552. soc_ops.disable_module(oh);
  1553. /*
  1554. * The module must be in idle mode before disabling any parents
  1555. * clocks. Otherwise, the parent clock might be disabled before
  1556. * the module transition is done, and thus will prevent the
  1557. * transition to complete properly.
  1558. */
  1559. _disable_clocks(oh);
  1560. if (oh->clkdm)
  1561. clkdm_hwmod_disable(oh->clkdm, oh);
  1562. /* Mux pins for device idle if populated */
  1563. if (oh->mux && oh->mux->pads_dynamic)
  1564. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1565. oh->_state = _HWMOD_STATE_IDLE;
  1566. return 0;
  1567. }
  1568. /**
  1569. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1570. * @oh: struct omap_hwmod *
  1571. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1572. *
  1573. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1574. * local copy. Intended to be used by drivers that require
  1575. * direct manipulation of the AUTOIDLE bits.
  1576. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1577. * along the return value from _set_module_autoidle().
  1578. *
  1579. * Any users of this function should be scrutinized carefully.
  1580. */
  1581. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1582. {
  1583. u32 v;
  1584. int retval = 0;
  1585. unsigned long flags;
  1586. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1587. return -EINVAL;
  1588. spin_lock_irqsave(&oh->_lock, flags);
  1589. v = oh->_sysc_cache;
  1590. retval = _set_module_autoidle(oh, autoidle, &v);
  1591. if (!retval)
  1592. _write_sysconfig(v, oh);
  1593. spin_unlock_irqrestore(&oh->_lock, flags);
  1594. return retval;
  1595. }
  1596. /**
  1597. * _shutdown - shutdown an omap_hwmod
  1598. * @oh: struct omap_hwmod *
  1599. *
  1600. * Shut down an omap_hwmod @oh. This should be called when the driver
  1601. * used for the hwmod is removed or unloaded or if the driver is not
  1602. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1603. * state or returns 0.
  1604. */
  1605. static int _shutdown(struct omap_hwmod *oh)
  1606. {
  1607. int ret, i;
  1608. u8 prev_state;
  1609. if (oh->_state != _HWMOD_STATE_IDLE &&
  1610. oh->_state != _HWMOD_STATE_ENABLED) {
  1611. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1612. oh->name);
  1613. return -EINVAL;
  1614. }
  1615. if (_are_any_hardreset_lines_asserted(oh))
  1616. return 0;
  1617. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1618. if (oh->class->pre_shutdown) {
  1619. prev_state = oh->_state;
  1620. if (oh->_state == _HWMOD_STATE_IDLE)
  1621. _enable(oh);
  1622. ret = oh->class->pre_shutdown(oh);
  1623. if (ret) {
  1624. if (prev_state == _HWMOD_STATE_IDLE)
  1625. _idle(oh);
  1626. return ret;
  1627. }
  1628. }
  1629. if (oh->class->sysc) {
  1630. if (oh->_state == _HWMOD_STATE_IDLE)
  1631. _enable(oh);
  1632. _shutdown_sysc(oh);
  1633. }
  1634. /* clocks and deps are already disabled in idle */
  1635. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1636. _del_initiator_dep(oh, mpu_oh);
  1637. /* XXX what about the other system initiators here? dma, dsp */
  1638. if (soc_ops.disable_module)
  1639. soc_ops.disable_module(oh);
  1640. _disable_clocks(oh);
  1641. if (oh->clkdm)
  1642. clkdm_hwmod_disable(oh->clkdm, oh);
  1643. }
  1644. /* XXX Should this code also force-disable the optional clocks? */
  1645. for (i = 0; i < oh->rst_lines_cnt; i++)
  1646. _assert_hardreset(oh, oh->rst_lines[i].name);
  1647. /* Mux pins to safe mode or use populated off mode values */
  1648. if (oh->mux)
  1649. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1650. oh->_state = _HWMOD_STATE_DISABLED;
  1651. return 0;
  1652. }
  1653. /**
  1654. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1655. * @oh: struct omap_hwmod * to locate the virtual address
  1656. *
  1657. * Cache the virtual address used by the MPU to access this IP block's
  1658. * registers. This address is needed early so the OCP registers that
  1659. * are part of the device's address space can be ioremapped properly.
  1660. * No return value.
  1661. */
  1662. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1663. {
  1664. struct omap_hwmod_addr_space *mem;
  1665. void __iomem *va_start;
  1666. if (!oh)
  1667. return;
  1668. _save_mpu_port_index(oh);
  1669. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1670. return;
  1671. mem = _find_mpu_rt_addr_space(oh);
  1672. if (!mem) {
  1673. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1674. oh->name);
  1675. return;
  1676. }
  1677. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1678. if (!va_start) {
  1679. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1680. return;
  1681. }
  1682. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1683. oh->name, va_start);
  1684. oh->_mpu_rt_va = va_start;
  1685. }
  1686. /**
  1687. * _init - initialize internal data for the hwmod @oh
  1688. * @oh: struct omap_hwmod *
  1689. * @n: (unused)
  1690. *
  1691. * Look up the clocks and the address space used by the MPU to access
  1692. * registers belonging to the hwmod @oh. @oh must already be
  1693. * registered at this point. This is the first of two phases for
  1694. * hwmod initialization. Code called here does not touch any hardware
  1695. * registers, it simply prepares internal data structures. Returns 0
  1696. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1697. * failure.
  1698. */
  1699. static int __init _init(struct omap_hwmod *oh, void *data)
  1700. {
  1701. int r;
  1702. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1703. return 0;
  1704. _init_mpu_rt_base(oh, NULL);
  1705. r = _init_clocks(oh, NULL);
  1706. if (IS_ERR_VALUE(r)) {
  1707. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1708. return -EINVAL;
  1709. }
  1710. oh->_state = _HWMOD_STATE_INITIALIZED;
  1711. return 0;
  1712. }
  1713. /**
  1714. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1715. * @oh: struct omap_hwmod *
  1716. *
  1717. * Set up the module's interface clocks. XXX This function is still mostly
  1718. * a stub; implementing this properly requires iclk autoidle usecounting in
  1719. * the clock code. No return value.
  1720. */
  1721. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1722. {
  1723. struct omap_hwmod_ocp_if *os;
  1724. struct list_head *p;
  1725. int i = 0;
  1726. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1727. return;
  1728. p = oh->slave_ports.next;
  1729. while (i < oh->slaves_cnt) {
  1730. os = _fetch_next_ocp_if(&p, &i);
  1731. if (!os->_clk)
  1732. continue;
  1733. if (os->flags & OCPIF_SWSUP_IDLE) {
  1734. /* XXX omap_iclk_deny_idle(c); */
  1735. } else {
  1736. /* XXX omap_iclk_allow_idle(c); */
  1737. clk_enable(os->_clk);
  1738. }
  1739. }
  1740. return;
  1741. }
  1742. /**
  1743. * _setup_reset - reset an IP block during the setup process
  1744. * @oh: struct omap_hwmod *
  1745. *
  1746. * Reset the IP block corresponding to the hwmod @oh during the setup
  1747. * process. The IP block is first enabled so it can be successfully
  1748. * reset. Returns 0 upon success or a negative error code upon
  1749. * failure.
  1750. */
  1751. static int __init _setup_reset(struct omap_hwmod *oh)
  1752. {
  1753. int r;
  1754. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1755. return -EINVAL;
  1756. if (oh->rst_lines_cnt == 0) {
  1757. r = _enable(oh);
  1758. if (r) {
  1759. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1760. oh->name, oh->_state);
  1761. return -EINVAL;
  1762. }
  1763. }
  1764. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1765. r = _reset(oh);
  1766. return r;
  1767. }
  1768. /**
  1769. * _setup_postsetup - transition to the appropriate state after _setup
  1770. * @oh: struct omap_hwmod *
  1771. *
  1772. * Place an IP block represented by @oh into a "post-setup" state --
  1773. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1774. * this function is called at the end of _setup().) The postsetup
  1775. * state for an IP block can be changed by calling
  1776. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1777. * before one of the omap_hwmod_setup*() functions are called for the
  1778. * IP block.
  1779. *
  1780. * The IP block stays in this state until a PM runtime-based driver is
  1781. * loaded for that IP block. A post-setup state of IDLE is
  1782. * appropriate for almost all IP blocks with runtime PM-enabled
  1783. * drivers, since those drivers are able to enable the IP block. A
  1784. * post-setup state of ENABLED is appropriate for kernels with PM
  1785. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1786. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1787. * included, since the WDTIMER starts running on reset and will reset
  1788. * the MPU if left active.
  1789. *
  1790. * This post-setup mechanism is deprecated. Once all of the OMAP
  1791. * drivers have been converted to use PM runtime, and all of the IP
  1792. * block data and interconnect data is available to the hwmod code, it
  1793. * should be possible to replace this mechanism with a "lazy reset"
  1794. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1795. * when the driver first probes, then all remaining IP blocks without
  1796. * drivers are either shut down or enabled after the drivers have
  1797. * loaded. However, this cannot take place until the above
  1798. * preconditions have been met, since otherwise the late reset code
  1799. * has no way of knowing which IP blocks are in use by drivers, and
  1800. * which ones are unused.
  1801. *
  1802. * No return value.
  1803. */
  1804. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1805. {
  1806. u8 postsetup_state;
  1807. if (oh->rst_lines_cnt > 0)
  1808. return;
  1809. postsetup_state = oh->_postsetup_state;
  1810. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1811. postsetup_state = _HWMOD_STATE_ENABLED;
  1812. /*
  1813. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1814. * it should be set by the core code as a runtime flag during startup
  1815. */
  1816. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1817. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1818. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1819. postsetup_state = _HWMOD_STATE_ENABLED;
  1820. }
  1821. if (postsetup_state == _HWMOD_STATE_IDLE)
  1822. _idle(oh);
  1823. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1824. _shutdown(oh);
  1825. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1826. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1827. oh->name, postsetup_state);
  1828. return;
  1829. }
  1830. /**
  1831. * _setup - prepare IP block hardware for use
  1832. * @oh: struct omap_hwmod *
  1833. * @n: (unused, pass NULL)
  1834. *
  1835. * Configure the IP block represented by @oh. This may include
  1836. * enabling the IP block, resetting it, and placing it into a
  1837. * post-setup state, depending on the type of IP block and applicable
  1838. * flags. IP blocks are reset to prevent any previous configuration
  1839. * by the bootloader or previous operating system from interfering
  1840. * with power management or other parts of the system. The reset can
  1841. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1842. * two phases for hwmod initialization. Code called here generally
  1843. * affects the IP block hardware, or system integration hardware
  1844. * associated with the IP block. Returns 0.
  1845. */
  1846. static int __init _setup(struct omap_hwmod *oh, void *data)
  1847. {
  1848. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1849. return 0;
  1850. _setup_iclk_autoidle(oh);
  1851. if (!_setup_reset(oh))
  1852. _setup_postsetup(oh);
  1853. return 0;
  1854. }
  1855. /**
  1856. * _register - register a struct omap_hwmod
  1857. * @oh: struct omap_hwmod *
  1858. *
  1859. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1860. * already has been registered by the same name; -EINVAL if the
  1861. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1862. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1863. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1864. * success.
  1865. *
  1866. * XXX The data should be copied into bootmem, so the original data
  1867. * should be marked __initdata and freed after init. This would allow
  1868. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1869. * that the copy process would be relatively complex due to the large number
  1870. * of substructures.
  1871. */
  1872. static int __init _register(struct omap_hwmod *oh)
  1873. {
  1874. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1875. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1876. return -EINVAL;
  1877. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1878. if (_lookup(oh->name))
  1879. return -EEXIST;
  1880. list_add_tail(&oh->node, &omap_hwmod_list);
  1881. INIT_LIST_HEAD(&oh->master_ports);
  1882. INIT_LIST_HEAD(&oh->slave_ports);
  1883. spin_lock_init(&oh->_lock);
  1884. oh->_state = _HWMOD_STATE_REGISTERED;
  1885. /*
  1886. * XXX Rather than doing a strcmp(), this should test a flag
  1887. * set in the hwmod data, inserted by the autogenerator code.
  1888. */
  1889. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1890. mpu_oh = oh;
  1891. return 0;
  1892. }
  1893. /**
  1894. * _alloc_links - return allocated memory for hwmod links
  1895. * @ml: pointer to a struct omap_hwmod_link * for the master link
  1896. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  1897. *
  1898. * Return pointers to two struct omap_hwmod_link records, via the
  1899. * addresses pointed to by @ml and @sl. Will first attempt to return
  1900. * memory allocated as part of a large initial block, but if that has
  1901. * been exhausted, will allocate memory itself. Since ideally this
  1902. * second allocation path will never occur, the number of these
  1903. * 'supplemental' allocations will be logged when debugging is
  1904. * enabled. Returns 0.
  1905. */
  1906. static int __init _alloc_links(struct omap_hwmod_link **ml,
  1907. struct omap_hwmod_link **sl)
  1908. {
  1909. unsigned int sz;
  1910. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  1911. *ml = &linkspace[free_ls++];
  1912. *sl = &linkspace[free_ls++];
  1913. return 0;
  1914. }
  1915. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  1916. *sl = NULL;
  1917. *ml = alloc_bootmem(sz);
  1918. memset(*ml, 0, sz);
  1919. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  1920. ls_supp++;
  1921. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  1922. ls_supp * LINKS_PER_OCP_IF);
  1923. return 0;
  1924. };
  1925. /**
  1926. * _add_link - add an interconnect between two IP blocks
  1927. * @oi: pointer to a struct omap_hwmod_ocp_if record
  1928. *
  1929. * Add struct omap_hwmod_link records connecting the master IP block
  1930. * specified in @oi->master to @oi, and connecting the slave IP block
  1931. * specified in @oi->slave to @oi. This code is assumed to run before
  1932. * preemption or SMP has been enabled, thus avoiding the need for
  1933. * locking in this code. Changes to this assumption will require
  1934. * additional locking. Returns 0.
  1935. */
  1936. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  1937. {
  1938. struct omap_hwmod_link *ml, *sl;
  1939. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  1940. oi->slave->name);
  1941. _alloc_links(&ml, &sl);
  1942. ml->ocp_if = oi;
  1943. INIT_LIST_HEAD(&ml->node);
  1944. list_add(&ml->node, &oi->master->master_ports);
  1945. oi->master->masters_cnt++;
  1946. sl->ocp_if = oi;
  1947. INIT_LIST_HEAD(&sl->node);
  1948. list_add(&sl->node, &oi->slave->slave_ports);
  1949. oi->slave->slaves_cnt++;
  1950. return 0;
  1951. }
  1952. /**
  1953. * _register_link - register a struct omap_hwmod_ocp_if
  1954. * @oi: struct omap_hwmod_ocp_if *
  1955. *
  1956. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  1957. * has already been registered; -EINVAL if @oi is NULL or if the
  1958. * record pointed to by @oi is missing required fields; or 0 upon
  1959. * success.
  1960. *
  1961. * XXX The data should be copied into bootmem, so the original data
  1962. * should be marked __initdata and freed after init. This would allow
  1963. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  1964. */
  1965. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  1966. {
  1967. if (!oi || !oi->master || !oi->slave || !oi->user)
  1968. return -EINVAL;
  1969. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  1970. return -EEXIST;
  1971. pr_debug("omap_hwmod: registering link from %s to %s\n",
  1972. oi->master->name, oi->slave->name);
  1973. /*
  1974. * Register the connected hwmods, if they haven't been
  1975. * registered already
  1976. */
  1977. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  1978. _register(oi->master);
  1979. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  1980. _register(oi->slave);
  1981. _add_link(oi);
  1982. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  1983. return 0;
  1984. }
  1985. /**
  1986. * _alloc_linkspace - allocate large block of hwmod links
  1987. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  1988. *
  1989. * Allocate a large block of struct omap_hwmod_link records. This
  1990. * improves boot time significantly by avoiding the need to allocate
  1991. * individual records one by one. If the number of records to
  1992. * allocate in the block hasn't been manually specified, this function
  1993. * will count the number of struct omap_hwmod_ocp_if records in @ois
  1994. * and use that to determine the allocation size. For SoC families
  1995. * that require multiple list registrations, such as OMAP3xxx, this
  1996. * estimation process isn't optimal, so manual estimation is advised
  1997. * in those cases. Returns -EEXIST if the allocation has already occurred
  1998. * or 0 upon success.
  1999. */
  2000. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2001. {
  2002. unsigned int i = 0;
  2003. unsigned int sz;
  2004. if (linkspace) {
  2005. WARN(1, "linkspace already allocated\n");
  2006. return -EEXIST;
  2007. }
  2008. if (max_ls == 0)
  2009. while (ois[i++])
  2010. max_ls += LINKS_PER_OCP_IF;
  2011. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2012. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2013. __func__, sz, max_ls);
  2014. linkspace = alloc_bootmem(sz);
  2015. memset(linkspace, 0, sz);
  2016. return 0;
  2017. }
  2018. /* Static functions intended only for use in soc_ops field function pointers */
  2019. /**
  2020. * _omap2_wait_target_ready - wait for a module to leave slave idle
  2021. * @oh: struct omap_hwmod *
  2022. *
  2023. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2024. * does not have an IDLEST bit or if the module successfully leaves
  2025. * slave idle; otherwise, pass along the return value of the
  2026. * appropriate *_cm*_wait_module_ready() function.
  2027. */
  2028. static int _omap2_wait_target_ready(struct omap_hwmod *oh)
  2029. {
  2030. if (!oh)
  2031. return -EINVAL;
  2032. if (oh->flags & HWMOD_NO_IDLEST)
  2033. return 0;
  2034. if (!_find_mpu_rt_port(oh))
  2035. return 0;
  2036. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2037. return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2038. oh->prcm.omap2.idlest_reg_id,
  2039. oh->prcm.omap2.idlest_idle_bit);
  2040. }
  2041. /**
  2042. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2043. * @oh: struct omap_hwmod *
  2044. *
  2045. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2046. * does not have an IDLEST bit or if the module successfully leaves
  2047. * slave idle; otherwise, pass along the return value of the
  2048. * appropriate *_cm*_wait_module_ready() function.
  2049. */
  2050. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2051. {
  2052. if (!oh || !oh->clkdm)
  2053. return -EINVAL;
  2054. if (oh->flags & HWMOD_NO_IDLEST)
  2055. return 0;
  2056. if (!_find_mpu_rt_port(oh))
  2057. return 0;
  2058. /* XXX check module SIDLEMODE, hardreset status */
  2059. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2060. oh->clkdm->cm_inst,
  2061. oh->clkdm->clkdm_offs,
  2062. oh->prcm.omap4.clkctrl_offs);
  2063. }
  2064. /**
  2065. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2066. * @oh: struct omap_hwmod * to assert hardreset
  2067. * @ohri: hardreset line data
  2068. *
  2069. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2070. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2071. * use as an soc_ops function pointer. Passes along the return value
  2072. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2073. * for removal when the PRM code is moved into drivers/.
  2074. */
  2075. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2076. struct omap_hwmod_rst_info *ohri)
  2077. {
  2078. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2079. ohri->rst_shift);
  2080. }
  2081. /**
  2082. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2083. * @oh: struct omap_hwmod * to deassert hardreset
  2084. * @ohri: hardreset line data
  2085. *
  2086. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2087. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2088. * use as an soc_ops function pointer. Passes along the return value
  2089. * from omap2_prm_deassert_hardreset(). XXX This function is
  2090. * scheduled for removal when the PRM code is moved into drivers/.
  2091. */
  2092. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2093. struct omap_hwmod_rst_info *ohri)
  2094. {
  2095. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2096. ohri->rst_shift,
  2097. ohri->st_shift);
  2098. }
  2099. /**
  2100. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2101. * @oh: struct omap_hwmod * to test hardreset
  2102. * @ohri: hardreset line data
  2103. *
  2104. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2105. * from the hwmod @oh and the hardreset line data @ohri. Only
  2106. * intended for use as an soc_ops function pointer. Passes along the
  2107. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2108. * function is scheduled for removal when the PRM code is moved into
  2109. * drivers/.
  2110. */
  2111. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2112. struct omap_hwmod_rst_info *ohri)
  2113. {
  2114. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2115. ohri->st_shift);
  2116. }
  2117. /**
  2118. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2119. * @oh: struct omap_hwmod * to assert hardreset
  2120. * @ohri: hardreset line data
  2121. *
  2122. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2123. * from the hwmod @oh and the hardreset line data @ohri. Only
  2124. * intended for use as an soc_ops function pointer. Passes along the
  2125. * return value from omap4_prminst_assert_hardreset(). XXX This
  2126. * function is scheduled for removal when the PRM code is moved into
  2127. * drivers/.
  2128. */
  2129. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2130. struct omap_hwmod_rst_info *ohri)
  2131. {
  2132. if (!oh->clkdm)
  2133. return -EINVAL;
  2134. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2135. oh->clkdm->pwrdm.ptr->prcm_partition,
  2136. oh->clkdm->pwrdm.ptr->prcm_offs,
  2137. oh->prcm.omap4.rstctrl_offs);
  2138. }
  2139. /**
  2140. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2141. * @oh: struct omap_hwmod * to deassert hardreset
  2142. * @ohri: hardreset line data
  2143. *
  2144. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2145. * from the hwmod @oh and the hardreset line data @ohri. Only
  2146. * intended for use as an soc_ops function pointer. Passes along the
  2147. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2148. * function is scheduled for removal when the PRM code is moved into
  2149. * drivers/.
  2150. */
  2151. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2152. struct omap_hwmod_rst_info *ohri)
  2153. {
  2154. if (!oh->clkdm)
  2155. return -EINVAL;
  2156. if (ohri->st_shift)
  2157. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2158. oh->name, ohri->name);
  2159. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2160. oh->clkdm->pwrdm.ptr->prcm_partition,
  2161. oh->clkdm->pwrdm.ptr->prcm_offs,
  2162. oh->prcm.omap4.rstctrl_offs);
  2163. }
  2164. /**
  2165. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2166. * @oh: struct omap_hwmod * to test hardreset
  2167. * @ohri: hardreset line data
  2168. *
  2169. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2170. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2171. * Only intended for use as an soc_ops function pointer. Passes along
  2172. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2173. * This function is scheduled for removal when the PRM code is moved
  2174. * into drivers/.
  2175. */
  2176. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2177. struct omap_hwmod_rst_info *ohri)
  2178. {
  2179. if (!oh->clkdm)
  2180. return -EINVAL;
  2181. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2182. oh->clkdm->pwrdm.ptr->prcm_partition,
  2183. oh->clkdm->pwrdm.ptr->prcm_offs,
  2184. oh->prcm.omap4.rstctrl_offs);
  2185. }
  2186. /* Public functions */
  2187. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2188. {
  2189. if (oh->flags & HWMOD_16BIT_REG)
  2190. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2191. else
  2192. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2193. }
  2194. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2195. {
  2196. if (oh->flags & HWMOD_16BIT_REG)
  2197. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2198. else
  2199. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2200. }
  2201. /**
  2202. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2203. * @oh: struct omap_hwmod *
  2204. *
  2205. * This is a public function exposed to drivers. Some drivers may need to do
  2206. * some settings before and after resetting the device. Those drivers after
  2207. * doing the necessary settings could use this function to start a reset by
  2208. * setting the SYSCONFIG.SOFTRESET bit.
  2209. */
  2210. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2211. {
  2212. u32 v;
  2213. int ret;
  2214. if (!oh || !(oh->_sysc_cache))
  2215. return -EINVAL;
  2216. v = oh->_sysc_cache;
  2217. ret = _set_softreset(oh, &v);
  2218. if (ret)
  2219. goto error;
  2220. _write_sysconfig(v, oh);
  2221. error:
  2222. return ret;
  2223. }
  2224. /**
  2225. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2226. * @oh: struct omap_hwmod *
  2227. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2228. *
  2229. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2230. * local copy. Intended to be used by drivers that have some erratum
  2231. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2232. * -EINVAL if @oh is null, or passes along the return value from
  2233. * _set_slave_idlemode().
  2234. *
  2235. * XXX Does this function have any current users? If not, we should
  2236. * remove it; it is better to let the rest of the hwmod code handle this.
  2237. * Any users of this function should be scrutinized carefully.
  2238. */
  2239. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2240. {
  2241. u32 v;
  2242. int retval = 0;
  2243. if (!oh)
  2244. return -EINVAL;
  2245. v = oh->_sysc_cache;
  2246. retval = _set_slave_idlemode(oh, idlemode, &v);
  2247. if (!retval)
  2248. _write_sysconfig(v, oh);
  2249. return retval;
  2250. }
  2251. /**
  2252. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2253. * @name: name of the omap_hwmod to look up
  2254. *
  2255. * Given a @name of an omap_hwmod, return a pointer to the registered
  2256. * struct omap_hwmod *, or NULL upon error.
  2257. */
  2258. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2259. {
  2260. struct omap_hwmod *oh;
  2261. if (!name)
  2262. return NULL;
  2263. oh = _lookup(name);
  2264. return oh;
  2265. }
  2266. /**
  2267. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2268. * @fn: pointer to a callback function
  2269. * @data: void * data to pass to callback function
  2270. *
  2271. * Call @fn for each registered omap_hwmod, passing @data to each
  2272. * function. @fn must return 0 for success or any other value for
  2273. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2274. * will stop and the non-zero return value will be passed to the
  2275. * caller of omap_hwmod_for_each(). @fn is called with
  2276. * omap_hwmod_for_each() held.
  2277. */
  2278. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2279. void *data)
  2280. {
  2281. struct omap_hwmod *temp_oh;
  2282. int ret = 0;
  2283. if (!fn)
  2284. return -EINVAL;
  2285. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2286. ret = (*fn)(temp_oh, data);
  2287. if (ret)
  2288. break;
  2289. }
  2290. return ret;
  2291. }
  2292. /**
  2293. * omap_hwmod_register_links - register an array of hwmod links
  2294. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2295. *
  2296. * Intended to be called early in boot before the clock framework is
  2297. * initialized. If @ois is not null, will register all omap_hwmods
  2298. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2299. * omap_hwmod_init() hasn't been called before calling this function,
  2300. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2301. * success.
  2302. */
  2303. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2304. {
  2305. int r, i;
  2306. if (!inited)
  2307. return -EINVAL;
  2308. if (!ois)
  2309. return 0;
  2310. if (!linkspace) {
  2311. if (_alloc_linkspace(ois)) {
  2312. pr_err("omap_hwmod: could not allocate link space\n");
  2313. return -ENOMEM;
  2314. }
  2315. }
  2316. i = 0;
  2317. do {
  2318. r = _register_link(ois[i]);
  2319. WARN(r && r != -EEXIST,
  2320. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2321. ois[i]->master->name, ois[i]->slave->name, r);
  2322. } while (ois[++i]);
  2323. return 0;
  2324. }
  2325. /**
  2326. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2327. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2328. *
  2329. * If the hwmod data corresponding to the MPU subsystem IP block
  2330. * hasn't been initialized and set up yet, do so now. This must be
  2331. * done first since sleep dependencies may be added from other hwmods
  2332. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2333. * return value.
  2334. */
  2335. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2336. {
  2337. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2338. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2339. __func__, MPU_INITIATOR_NAME);
  2340. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2341. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2342. }
  2343. /**
  2344. * omap_hwmod_setup_one - set up a single hwmod
  2345. * @oh_name: const char * name of the already-registered hwmod to set up
  2346. *
  2347. * Initialize and set up a single hwmod. Intended to be used for a
  2348. * small number of early devices, such as the timer IP blocks used for
  2349. * the scheduler clock. Must be called after omap2_clk_init().
  2350. * Resolves the struct clk names to struct clk pointers for each
  2351. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2352. * -EINVAL upon error or 0 upon success.
  2353. */
  2354. int __init omap_hwmod_setup_one(const char *oh_name)
  2355. {
  2356. struct omap_hwmod *oh;
  2357. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2358. oh = _lookup(oh_name);
  2359. if (!oh) {
  2360. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2361. return -EINVAL;
  2362. }
  2363. _ensure_mpu_hwmod_is_setup(oh);
  2364. _init(oh, NULL);
  2365. _setup(oh, NULL);
  2366. return 0;
  2367. }
  2368. /**
  2369. * omap_hwmod_setup_all - set up all registered IP blocks
  2370. *
  2371. * Initialize and set up all IP blocks registered with the hwmod code.
  2372. * Must be called after omap2_clk_init(). Resolves the struct clk
  2373. * names to struct clk pointers for each registered omap_hwmod. Also
  2374. * calls _setup() on each hwmod. Returns 0 upon success.
  2375. */
  2376. static int __init omap_hwmod_setup_all(void)
  2377. {
  2378. _ensure_mpu_hwmod_is_setup(NULL);
  2379. omap_hwmod_for_each(_init, NULL);
  2380. omap_hwmod_for_each(_setup, NULL);
  2381. return 0;
  2382. }
  2383. core_initcall(omap_hwmod_setup_all);
  2384. /**
  2385. * omap_hwmod_enable - enable an omap_hwmod
  2386. * @oh: struct omap_hwmod *
  2387. *
  2388. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2389. * Returns -EINVAL on error or passes along the return value from _enable().
  2390. */
  2391. int omap_hwmod_enable(struct omap_hwmod *oh)
  2392. {
  2393. int r;
  2394. unsigned long flags;
  2395. if (!oh)
  2396. return -EINVAL;
  2397. spin_lock_irqsave(&oh->_lock, flags);
  2398. r = _enable(oh);
  2399. spin_unlock_irqrestore(&oh->_lock, flags);
  2400. return r;
  2401. }
  2402. /**
  2403. * omap_hwmod_idle - idle an omap_hwmod
  2404. * @oh: struct omap_hwmod *
  2405. *
  2406. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2407. * Returns -EINVAL on error or passes along the return value from _idle().
  2408. */
  2409. int omap_hwmod_idle(struct omap_hwmod *oh)
  2410. {
  2411. unsigned long flags;
  2412. if (!oh)
  2413. return -EINVAL;
  2414. spin_lock_irqsave(&oh->_lock, flags);
  2415. _idle(oh);
  2416. spin_unlock_irqrestore(&oh->_lock, flags);
  2417. return 0;
  2418. }
  2419. /**
  2420. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2421. * @oh: struct omap_hwmod *
  2422. *
  2423. * Shutdown an omap_hwmod @oh. Intended to be called by
  2424. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2425. * the return value from _shutdown().
  2426. */
  2427. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2428. {
  2429. unsigned long flags;
  2430. if (!oh)
  2431. return -EINVAL;
  2432. spin_lock_irqsave(&oh->_lock, flags);
  2433. _shutdown(oh);
  2434. spin_unlock_irqrestore(&oh->_lock, flags);
  2435. return 0;
  2436. }
  2437. /**
  2438. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2439. * @oh: struct omap_hwmod *oh
  2440. *
  2441. * Intended to be called by the omap_device code.
  2442. */
  2443. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2444. {
  2445. unsigned long flags;
  2446. spin_lock_irqsave(&oh->_lock, flags);
  2447. _enable_clocks(oh);
  2448. spin_unlock_irqrestore(&oh->_lock, flags);
  2449. return 0;
  2450. }
  2451. /**
  2452. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2453. * @oh: struct omap_hwmod *oh
  2454. *
  2455. * Intended to be called by the omap_device code.
  2456. */
  2457. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2458. {
  2459. unsigned long flags;
  2460. spin_lock_irqsave(&oh->_lock, flags);
  2461. _disable_clocks(oh);
  2462. spin_unlock_irqrestore(&oh->_lock, flags);
  2463. return 0;
  2464. }
  2465. /**
  2466. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2467. * @oh: struct omap_hwmod *oh
  2468. *
  2469. * Intended to be called by drivers and core code when all posted
  2470. * writes to a device must complete before continuing further
  2471. * execution (for example, after clearing some device IRQSTATUS
  2472. * register bits)
  2473. *
  2474. * XXX what about targets with multiple OCP threads?
  2475. */
  2476. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2477. {
  2478. BUG_ON(!oh);
  2479. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2480. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2481. oh->name);
  2482. return;
  2483. }
  2484. /*
  2485. * Forces posted writes to complete on the OCP thread handling
  2486. * register writes
  2487. */
  2488. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2489. }
  2490. /**
  2491. * omap_hwmod_reset - reset the hwmod
  2492. * @oh: struct omap_hwmod *
  2493. *
  2494. * Under some conditions, a driver may wish to reset the entire device.
  2495. * Called from omap_device code. Returns -EINVAL on error or passes along
  2496. * the return value from _reset().
  2497. */
  2498. int omap_hwmod_reset(struct omap_hwmod *oh)
  2499. {
  2500. int r;
  2501. unsigned long flags;
  2502. if (!oh)
  2503. return -EINVAL;
  2504. spin_lock_irqsave(&oh->_lock, flags);
  2505. r = _reset(oh);
  2506. spin_unlock_irqrestore(&oh->_lock, flags);
  2507. return r;
  2508. }
  2509. /*
  2510. * IP block data retrieval functions
  2511. */
  2512. /**
  2513. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2514. * @oh: struct omap_hwmod *
  2515. * @res: pointer to the first element of an array of struct resource to fill
  2516. *
  2517. * Count the number of struct resource array elements necessary to
  2518. * contain omap_hwmod @oh resources. Intended to be called by code
  2519. * that registers omap_devices. Intended to be used to determine the
  2520. * size of a dynamically-allocated struct resource array, before
  2521. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2522. * resource array elements needed.
  2523. *
  2524. * XXX This code is not optimized. It could attempt to merge adjacent
  2525. * resource IDs.
  2526. *
  2527. */
  2528. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2529. {
  2530. struct omap_hwmod_ocp_if *os;
  2531. struct list_head *p;
  2532. int ret;
  2533. int i = 0;
  2534. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2535. p = oh->slave_ports.next;
  2536. while (i < oh->slaves_cnt) {
  2537. os = _fetch_next_ocp_if(&p, &i);
  2538. ret += _count_ocp_if_addr_spaces(os);
  2539. }
  2540. return ret;
  2541. }
  2542. /**
  2543. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2544. * @oh: struct omap_hwmod *
  2545. * @res: pointer to the first element of an array of struct resource to fill
  2546. *
  2547. * Fill the struct resource array @res with resource data from the
  2548. * omap_hwmod @oh. Intended to be called by code that registers
  2549. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2550. * number of array elements filled.
  2551. */
  2552. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2553. {
  2554. struct omap_hwmod_ocp_if *os;
  2555. struct list_head *p;
  2556. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2557. int r = 0;
  2558. /* For each IRQ, DMA, memory area, fill in array.*/
  2559. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2560. for (i = 0; i < mpu_irqs_cnt; i++) {
  2561. (res + r)->name = (oh->mpu_irqs + i)->name;
  2562. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2563. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2564. (res + r)->flags = IORESOURCE_IRQ;
  2565. r++;
  2566. }
  2567. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2568. for (i = 0; i < sdma_reqs_cnt; i++) {
  2569. (res + r)->name = (oh->sdma_reqs + i)->name;
  2570. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2571. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2572. (res + r)->flags = IORESOURCE_DMA;
  2573. r++;
  2574. }
  2575. p = oh->slave_ports.next;
  2576. i = 0;
  2577. while (i < oh->slaves_cnt) {
  2578. os = _fetch_next_ocp_if(&p, &i);
  2579. addr_cnt = _count_ocp_if_addr_spaces(os);
  2580. for (j = 0; j < addr_cnt; j++) {
  2581. (res + r)->name = (os->addr + j)->name;
  2582. (res + r)->start = (os->addr + j)->pa_start;
  2583. (res + r)->end = (os->addr + j)->pa_end;
  2584. (res + r)->flags = IORESOURCE_MEM;
  2585. r++;
  2586. }
  2587. }
  2588. return r;
  2589. }
  2590. /**
  2591. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2592. * @oh: struct omap_hwmod * to operate on
  2593. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2594. * @name: pointer to the name of the data to fetch (optional)
  2595. * @rsrc: pointer to a struct resource, allocated by the caller
  2596. *
  2597. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2598. * data for the IP block pointed to by @oh. The data will be filled
  2599. * into a struct resource record pointed to by @rsrc. The struct
  2600. * resource must be allocated by the caller. When @name is non-null,
  2601. * the data associated with the matching entry in the IRQ/SDMA/address
  2602. * space hwmod data arrays will be returned. If @name is null, the
  2603. * first array entry will be returned. Data order is not meaningful
  2604. * in hwmod data, so callers are strongly encouraged to use a non-null
  2605. * @name whenever possible to avoid unpredictable effects if hwmod
  2606. * data is later added that causes data ordering to change. This
  2607. * function is only intended for use by OMAP core code. Device
  2608. * drivers should not call this function - the appropriate bus-related
  2609. * data accessor functions should be used instead. Returns 0 upon
  2610. * success or a negative error code upon error.
  2611. */
  2612. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2613. const char *name, struct resource *rsrc)
  2614. {
  2615. int r;
  2616. unsigned int irq, dma;
  2617. u32 pa_start, pa_end;
  2618. if (!oh || !rsrc)
  2619. return -EINVAL;
  2620. if (type == IORESOURCE_IRQ) {
  2621. r = _get_mpu_irq_by_name(oh, name, &irq);
  2622. if (r)
  2623. return r;
  2624. rsrc->start = irq;
  2625. rsrc->end = irq;
  2626. } else if (type == IORESOURCE_DMA) {
  2627. r = _get_sdma_req_by_name(oh, name, &dma);
  2628. if (r)
  2629. return r;
  2630. rsrc->start = dma;
  2631. rsrc->end = dma;
  2632. } else if (type == IORESOURCE_MEM) {
  2633. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2634. if (r)
  2635. return r;
  2636. rsrc->start = pa_start;
  2637. rsrc->end = pa_end;
  2638. } else {
  2639. return -EINVAL;
  2640. }
  2641. rsrc->flags = type;
  2642. rsrc->name = name;
  2643. return 0;
  2644. }
  2645. /**
  2646. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2647. * @oh: struct omap_hwmod *
  2648. *
  2649. * Return the powerdomain pointer associated with the OMAP module
  2650. * @oh's main clock. If @oh does not have a main clk, return the
  2651. * powerdomain associated with the interface clock associated with the
  2652. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2653. * instead?) Returns NULL on error, or a struct powerdomain * on
  2654. * success.
  2655. */
  2656. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2657. {
  2658. struct clk *c;
  2659. struct omap_hwmod_ocp_if *oi;
  2660. if (!oh)
  2661. return NULL;
  2662. if (oh->_clk) {
  2663. c = oh->_clk;
  2664. } else {
  2665. oi = _find_mpu_rt_port(oh);
  2666. if (!oi)
  2667. return NULL;
  2668. c = oi->_clk;
  2669. }
  2670. if (!c->clkdm)
  2671. return NULL;
  2672. return c->clkdm->pwrdm.ptr;
  2673. }
  2674. /**
  2675. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2676. * @oh: struct omap_hwmod *
  2677. *
  2678. * Returns the virtual address corresponding to the beginning of the
  2679. * module's register target, in the address range that is intended to
  2680. * be used by the MPU. Returns the virtual address upon success or NULL
  2681. * upon error.
  2682. */
  2683. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2684. {
  2685. if (!oh)
  2686. return NULL;
  2687. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2688. return NULL;
  2689. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2690. return NULL;
  2691. return oh->_mpu_rt_va;
  2692. }
  2693. /**
  2694. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2695. * @oh: struct omap_hwmod *
  2696. * @init_oh: struct omap_hwmod * (initiator)
  2697. *
  2698. * Add a sleep dependency between the initiator @init_oh and @oh.
  2699. * Intended to be called by DSP/Bridge code via platform_data for the
  2700. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2701. * code needs to add/del initiator dependencies dynamically
  2702. * before/after accessing a device. Returns the return value from
  2703. * _add_initiator_dep().
  2704. *
  2705. * XXX Keep a usecount in the clockdomain code
  2706. */
  2707. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2708. struct omap_hwmod *init_oh)
  2709. {
  2710. return _add_initiator_dep(oh, init_oh);
  2711. }
  2712. /*
  2713. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2714. * for context save/restore operations?
  2715. */
  2716. /**
  2717. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2718. * @oh: struct omap_hwmod *
  2719. * @init_oh: struct omap_hwmod * (initiator)
  2720. *
  2721. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2722. * Intended to be called by DSP/Bridge code via platform_data for the
  2723. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2724. * code needs to add/del initiator dependencies dynamically
  2725. * before/after accessing a device. Returns the return value from
  2726. * _del_initiator_dep().
  2727. *
  2728. * XXX Keep a usecount in the clockdomain code
  2729. */
  2730. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2731. struct omap_hwmod *init_oh)
  2732. {
  2733. return _del_initiator_dep(oh, init_oh);
  2734. }
  2735. /**
  2736. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2737. * @oh: struct omap_hwmod *
  2738. *
  2739. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2740. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2741. * this IP block if it has dynamic mux entries. Eventually this
  2742. * should set PRCM wakeup registers to cause the PRCM to receive
  2743. * wakeup events from the module. Does not set any wakeup routing
  2744. * registers beyond this point - if the module is to wake up any other
  2745. * module or subsystem, that must be set separately. Called by
  2746. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2747. */
  2748. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2749. {
  2750. unsigned long flags;
  2751. u32 v;
  2752. spin_lock_irqsave(&oh->_lock, flags);
  2753. if (oh->class->sysc &&
  2754. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2755. v = oh->_sysc_cache;
  2756. _enable_wakeup(oh, &v);
  2757. _write_sysconfig(v, oh);
  2758. }
  2759. _set_idle_ioring_wakeup(oh, true);
  2760. spin_unlock_irqrestore(&oh->_lock, flags);
  2761. return 0;
  2762. }
  2763. /**
  2764. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2765. * @oh: struct omap_hwmod *
  2766. *
  2767. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2768. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2769. * events for this IP block if it has dynamic mux entries. Eventually
  2770. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2771. * wakeup events from the module. Does not set any wakeup routing
  2772. * registers beyond this point - if the module is to wake up any other
  2773. * module or subsystem, that must be set separately. Called by
  2774. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2775. */
  2776. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2777. {
  2778. unsigned long flags;
  2779. u32 v;
  2780. spin_lock_irqsave(&oh->_lock, flags);
  2781. if (oh->class->sysc &&
  2782. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2783. v = oh->_sysc_cache;
  2784. _disable_wakeup(oh, &v);
  2785. _write_sysconfig(v, oh);
  2786. }
  2787. _set_idle_ioring_wakeup(oh, false);
  2788. spin_unlock_irqrestore(&oh->_lock, flags);
  2789. return 0;
  2790. }
  2791. /**
  2792. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2793. * contained in the hwmod module.
  2794. * @oh: struct omap_hwmod *
  2795. * @name: name of the reset line to lookup and assert
  2796. *
  2797. * Some IP like dsp, ipu or iva contain processor that require
  2798. * an HW reset line to be assert / deassert in order to enable fully
  2799. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2800. * yet supported on this OMAP; otherwise, passes along the return value
  2801. * from _assert_hardreset().
  2802. */
  2803. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2804. {
  2805. int ret;
  2806. unsigned long flags;
  2807. if (!oh)
  2808. return -EINVAL;
  2809. spin_lock_irqsave(&oh->_lock, flags);
  2810. ret = _assert_hardreset(oh, name);
  2811. spin_unlock_irqrestore(&oh->_lock, flags);
  2812. return ret;
  2813. }
  2814. /**
  2815. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2816. * contained in the hwmod module.
  2817. * @oh: struct omap_hwmod *
  2818. * @name: name of the reset line to look up and deassert
  2819. *
  2820. * Some IP like dsp, ipu or iva contain processor that require
  2821. * an HW reset line to be assert / deassert in order to enable fully
  2822. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2823. * yet supported on this OMAP; otherwise, passes along the return value
  2824. * from _deassert_hardreset().
  2825. */
  2826. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2827. {
  2828. int ret;
  2829. unsigned long flags;
  2830. if (!oh)
  2831. return -EINVAL;
  2832. spin_lock_irqsave(&oh->_lock, flags);
  2833. ret = _deassert_hardreset(oh, name);
  2834. spin_unlock_irqrestore(&oh->_lock, flags);
  2835. return ret;
  2836. }
  2837. /**
  2838. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2839. * contained in the hwmod module
  2840. * @oh: struct omap_hwmod *
  2841. * @name: name of the reset line to look up and read
  2842. *
  2843. * Return the current state of the hwmod @oh's reset line named @name:
  2844. * returns -EINVAL upon parameter error or if this operation
  2845. * is unsupported on the current OMAP; otherwise, passes along the return
  2846. * value from _read_hardreset().
  2847. */
  2848. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2849. {
  2850. int ret;
  2851. unsigned long flags;
  2852. if (!oh)
  2853. return -EINVAL;
  2854. spin_lock_irqsave(&oh->_lock, flags);
  2855. ret = _read_hardreset(oh, name);
  2856. spin_unlock_irqrestore(&oh->_lock, flags);
  2857. return ret;
  2858. }
  2859. /**
  2860. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2861. * @classname: struct omap_hwmod_class name to search for
  2862. * @fn: callback function pointer to call for each hwmod in class @classname
  2863. * @user: arbitrary context data to pass to the callback function
  2864. *
  2865. * For each omap_hwmod of class @classname, call @fn.
  2866. * If the callback function returns something other than
  2867. * zero, the iterator is terminated, and the callback function's return
  2868. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2869. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2870. */
  2871. int omap_hwmod_for_each_by_class(const char *classname,
  2872. int (*fn)(struct omap_hwmod *oh,
  2873. void *user),
  2874. void *user)
  2875. {
  2876. struct omap_hwmod *temp_oh;
  2877. int ret = 0;
  2878. if (!classname || !fn)
  2879. return -EINVAL;
  2880. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2881. __func__, classname);
  2882. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2883. if (!strcmp(temp_oh->class->name, classname)) {
  2884. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2885. __func__, temp_oh->name);
  2886. ret = (*fn)(temp_oh, user);
  2887. if (ret)
  2888. break;
  2889. }
  2890. }
  2891. if (ret)
  2892. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2893. __func__, ret);
  2894. return ret;
  2895. }
  2896. /**
  2897. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2898. * @oh: struct omap_hwmod *
  2899. * @state: state that _setup() should leave the hwmod in
  2900. *
  2901. * Sets the hwmod state that @oh will enter at the end of _setup()
  2902. * (called by omap_hwmod_setup_*()). See also the documentation
  2903. * for _setup_postsetup(), above. Returns 0 upon success or
  2904. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2905. * in the wrong state.
  2906. */
  2907. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2908. {
  2909. int ret;
  2910. unsigned long flags;
  2911. if (!oh)
  2912. return -EINVAL;
  2913. if (state != _HWMOD_STATE_DISABLED &&
  2914. state != _HWMOD_STATE_ENABLED &&
  2915. state != _HWMOD_STATE_IDLE)
  2916. return -EINVAL;
  2917. spin_lock_irqsave(&oh->_lock, flags);
  2918. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2919. ret = -EINVAL;
  2920. goto ohsps_unlock;
  2921. }
  2922. oh->_postsetup_state = state;
  2923. ret = 0;
  2924. ohsps_unlock:
  2925. spin_unlock_irqrestore(&oh->_lock, flags);
  2926. return ret;
  2927. }
  2928. /**
  2929. * omap_hwmod_get_context_loss_count - get lost context count
  2930. * @oh: struct omap_hwmod *
  2931. *
  2932. * Query the powerdomain of of @oh to get the context loss
  2933. * count for this device.
  2934. *
  2935. * Returns the context loss count of the powerdomain assocated with @oh
  2936. * upon success, or zero if no powerdomain exists for @oh.
  2937. */
  2938. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2939. {
  2940. struct powerdomain *pwrdm;
  2941. int ret = 0;
  2942. pwrdm = omap_hwmod_get_pwrdm(oh);
  2943. if (pwrdm)
  2944. ret = pwrdm_get_context_loss_count(pwrdm);
  2945. return ret;
  2946. }
  2947. /**
  2948. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2949. * @oh: struct omap_hwmod *
  2950. *
  2951. * Prevent the hwmod @oh from being reset during the setup process.
  2952. * Intended for use by board-*.c files on boards with devices that
  2953. * cannot tolerate being reset. Must be called before the hwmod has
  2954. * been set up. Returns 0 upon success or negative error code upon
  2955. * failure.
  2956. */
  2957. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2958. {
  2959. if (!oh)
  2960. return -EINVAL;
  2961. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2962. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2963. oh->name);
  2964. return -EINVAL;
  2965. }
  2966. oh->flags |= HWMOD_INIT_NO_RESET;
  2967. return 0;
  2968. }
  2969. /**
  2970. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2971. * @oh: struct omap_hwmod * containing hwmod mux entries
  2972. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2973. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2974. *
  2975. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2976. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2977. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2978. * this function is not called for a given pad_idx, then the ISR
  2979. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2980. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2981. * the _dynamic or wakeup_ entry: if there are other entries not
  2982. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2983. * entries are NOT COUNTED in the dynamic pad index. This function
  2984. * must be called separately for each pad that requires its interrupt
  2985. * to be re-routed this way. Returns -EINVAL if there is an argument
  2986. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2987. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2988. *
  2989. * XXX This function interface is fragile. Rather than using array
  2990. * indexes, which are subject to unpredictable change, it should be
  2991. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2992. * pad records.
  2993. */
  2994. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2995. {
  2996. int nr_irqs;
  2997. might_sleep();
  2998. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2999. pad_idx >= oh->mux->nr_pads_dynamic)
  3000. return -EINVAL;
  3001. /* Check the number of available mpu_irqs */
  3002. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3003. ;
  3004. if (irq_idx >= nr_irqs)
  3005. return -EINVAL;
  3006. if (!oh->mux->irqs) {
  3007. /* XXX What frees this? */
  3008. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3009. GFP_KERNEL);
  3010. if (!oh->mux->irqs)
  3011. return -ENOMEM;
  3012. }
  3013. oh->mux->irqs[pad_idx] = irq_idx;
  3014. return 0;
  3015. }
  3016. /**
  3017. * omap_hwmod_init - initialize the hwmod code
  3018. *
  3019. * Sets up some function pointers needed by the hwmod code to operate on the
  3020. * currently-booted SoC. Intended to be called once during kernel init
  3021. * before any hwmods are registered. No return value.
  3022. */
  3023. void __init omap_hwmod_init(void)
  3024. {
  3025. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  3026. soc_ops.wait_target_ready = _omap2_wait_target_ready;
  3027. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3028. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3029. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3030. } else if (cpu_is_omap44xx()) {
  3031. soc_ops.enable_module = _omap4_enable_module;
  3032. soc_ops.disable_module = _omap4_disable_module;
  3033. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3034. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3035. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3036. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3037. soc_ops.init_clkdm = _init_clkdm;
  3038. } else {
  3039. WARN(1, "omap_hwmod: unknown SoC type\n");
  3040. }
  3041. inited = true;
  3042. }