qlogicpti.c 40 KB

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  1. /* qlogicpti.c: Performance Technologies QlogicISP sbus card driver.
  2. *
  3. * Copyright (C) 1996, 2006 David S. Miller (davem@davemloft.net)
  4. *
  5. * A lot of this driver was directly stolen from Erik H. Moe's PCI
  6. * Qlogic ISP driver. Mucho kudos to him for this code.
  7. *
  8. * An even bigger kudos to John Grana at Performance Technologies
  9. * for providing me with the hardware to write this driver, you rule
  10. * John you really do.
  11. *
  12. * May, 2, 1997: Added support for QLGC,isp --jj
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/delay.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/slab.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/stat.h>
  22. #include <linux/init.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/module.h>
  26. #include <linux/jiffies.h>
  27. #include <asm/byteorder.h>
  28. #include "qlogicpti.h"
  29. #include <asm/sbus.h>
  30. #include <asm/dma.h>
  31. #include <asm/system.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/oplib.h>
  35. #include <asm/io.h>
  36. #include <asm/irq.h>
  37. #include <scsi/scsi.h>
  38. #include <scsi/scsi_cmnd.h>
  39. #include <scsi/scsi_device.h>
  40. #include <scsi/scsi_eh.h>
  41. #include <scsi/scsi_tcq.h>
  42. #include <scsi/scsi_host.h>
  43. #define MAX_TARGETS 16
  44. #define MAX_LUNS 8 /* 32 for 1.31 F/W */
  45. #define DEFAULT_LOOP_COUNT 10000
  46. #include "qlogicpti_asm.c"
  47. static struct qlogicpti *qptichain = NULL;
  48. static DEFINE_SPINLOCK(qptichain_lock);
  49. #define PACKB(a, b) (((a)<<4)|(b))
  50. static const u_char mbox_param[] = {
  51. PACKB(1, 1), /* MBOX_NO_OP */
  52. PACKB(5, 5), /* MBOX_LOAD_RAM */
  53. PACKB(2, 0), /* MBOX_EXEC_FIRMWARE */
  54. PACKB(5, 5), /* MBOX_DUMP_RAM */
  55. PACKB(3, 3), /* MBOX_WRITE_RAM_WORD */
  56. PACKB(2, 3), /* MBOX_READ_RAM_WORD */
  57. PACKB(6, 6), /* MBOX_MAILBOX_REG_TEST */
  58. PACKB(2, 3), /* MBOX_VERIFY_CHECKSUM */
  59. PACKB(1, 3), /* MBOX_ABOUT_FIRMWARE */
  60. PACKB(0, 0), /* 0x0009 */
  61. PACKB(0, 0), /* 0x000a */
  62. PACKB(0, 0), /* 0x000b */
  63. PACKB(0, 0), /* 0x000c */
  64. PACKB(0, 0), /* 0x000d */
  65. PACKB(1, 2), /* MBOX_CHECK_FIRMWARE */
  66. PACKB(0, 0), /* 0x000f */
  67. PACKB(5, 5), /* MBOX_INIT_REQ_QUEUE */
  68. PACKB(6, 6), /* MBOX_INIT_RES_QUEUE */
  69. PACKB(4, 4), /* MBOX_EXECUTE_IOCB */
  70. PACKB(2, 2), /* MBOX_WAKE_UP */
  71. PACKB(1, 6), /* MBOX_STOP_FIRMWARE */
  72. PACKB(4, 4), /* MBOX_ABORT */
  73. PACKB(2, 2), /* MBOX_ABORT_DEVICE */
  74. PACKB(3, 3), /* MBOX_ABORT_TARGET */
  75. PACKB(2, 2), /* MBOX_BUS_RESET */
  76. PACKB(2, 3), /* MBOX_STOP_QUEUE */
  77. PACKB(2, 3), /* MBOX_START_QUEUE */
  78. PACKB(2, 3), /* MBOX_SINGLE_STEP_QUEUE */
  79. PACKB(2, 3), /* MBOX_ABORT_QUEUE */
  80. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_STATUS */
  81. PACKB(0, 0), /* 0x001e */
  82. PACKB(1, 3), /* MBOX_GET_FIRMWARE_STATUS */
  83. PACKB(1, 2), /* MBOX_GET_INIT_SCSI_ID */
  84. PACKB(1, 2), /* MBOX_GET_SELECT_TIMEOUT */
  85. PACKB(1, 3), /* MBOX_GET_RETRY_COUNT */
  86. PACKB(1, 2), /* MBOX_GET_TAG_AGE_LIMIT */
  87. PACKB(1, 2), /* MBOX_GET_CLOCK_RATE */
  88. PACKB(1, 2), /* MBOX_GET_ACT_NEG_STATE */
  89. PACKB(1, 2), /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
  90. PACKB(1, 3), /* MBOX_GET_SBUS_PARAMS */
  91. PACKB(2, 4), /* MBOX_GET_TARGET_PARAMS */
  92. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_PARAMS */
  93. PACKB(0, 0), /* 0x002a */
  94. PACKB(0, 0), /* 0x002b */
  95. PACKB(0, 0), /* 0x002c */
  96. PACKB(0, 0), /* 0x002d */
  97. PACKB(0, 0), /* 0x002e */
  98. PACKB(0, 0), /* 0x002f */
  99. PACKB(2, 2), /* MBOX_SET_INIT_SCSI_ID */
  100. PACKB(2, 2), /* MBOX_SET_SELECT_TIMEOUT */
  101. PACKB(3, 3), /* MBOX_SET_RETRY_COUNT */
  102. PACKB(2, 2), /* MBOX_SET_TAG_AGE_LIMIT */
  103. PACKB(2, 2), /* MBOX_SET_CLOCK_RATE */
  104. PACKB(2, 2), /* MBOX_SET_ACTIVE_NEG_STATE */
  105. PACKB(2, 2), /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
  106. PACKB(3, 3), /* MBOX_SET_SBUS_CONTROL_PARAMS */
  107. PACKB(4, 4), /* MBOX_SET_TARGET_PARAMS */
  108. PACKB(4, 4), /* MBOX_SET_DEV_QUEUE_PARAMS */
  109. PACKB(0, 0), /* 0x003a */
  110. PACKB(0, 0), /* 0x003b */
  111. PACKB(0, 0), /* 0x003c */
  112. PACKB(0, 0), /* 0x003d */
  113. PACKB(0, 0), /* 0x003e */
  114. PACKB(0, 0), /* 0x003f */
  115. PACKB(0, 0), /* 0x0040 */
  116. PACKB(0, 0), /* 0x0041 */
  117. PACKB(0, 0) /* 0x0042 */
  118. };
  119. #define MAX_MBOX_COMMAND ARRAY_SIZE(mbox_param)
  120. /* queue length's _must_ be power of two: */
  121. #define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
  122. #define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
  123. QLOGICPTI_REQ_QUEUE_LEN)
  124. #define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
  125. static inline void qlogicpti_enable_irqs(struct qlogicpti *qpti)
  126. {
  127. sbus_writew(SBUS_CTRL_ERIRQ | SBUS_CTRL_GENAB,
  128. qpti->qregs + SBUS_CTRL);
  129. }
  130. static inline void qlogicpti_disable_irqs(struct qlogicpti *qpti)
  131. {
  132. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  133. }
  134. static inline void set_sbus_cfg1(struct qlogicpti *qpti)
  135. {
  136. u16 val;
  137. u8 bursts = qpti->bursts;
  138. #if 0 /* It appears that at least PTI cards do not support
  139. * 64-byte bursts and that setting the B64 bit actually
  140. * is a nop and the chip ends up using the smallest burst
  141. * size. -DaveM
  142. */
  143. if (sbus_can_burst64(qpti->sdev) && (bursts & DMA_BURST64)) {
  144. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B64);
  145. } else
  146. #endif
  147. if (bursts & DMA_BURST32) {
  148. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B32);
  149. } else if (bursts & DMA_BURST16) {
  150. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B16);
  151. } else if (bursts & DMA_BURST8) {
  152. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B8);
  153. } else {
  154. val = 0; /* No sbus bursts for you... */
  155. }
  156. sbus_writew(val, qpti->qregs + SBUS_CFG1);
  157. }
  158. static int qlogicpti_mbox_command(struct qlogicpti *qpti, u_short param[], int force)
  159. {
  160. int loop_count;
  161. u16 tmp;
  162. if (mbox_param[param[0]] == 0)
  163. return 1;
  164. /* Set SBUS semaphore. */
  165. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  166. tmp |= SBUS_SEMAPHORE_LCK;
  167. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  168. /* Wait for host IRQ bit to clear. */
  169. loop_count = DEFAULT_LOOP_COUNT;
  170. while (--loop_count && (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_HIRQ)) {
  171. barrier();
  172. cpu_relax();
  173. }
  174. if (!loop_count)
  175. printk(KERN_EMERG "qlogicpti%d: mbox_command loop timeout #1\n",
  176. qpti->qpti_id);
  177. /* Write mailbox command registers. */
  178. switch (mbox_param[param[0]] >> 4) {
  179. case 6: sbus_writew(param[5], qpti->qregs + MBOX5);
  180. case 5: sbus_writew(param[4], qpti->qregs + MBOX4);
  181. case 4: sbus_writew(param[3], qpti->qregs + MBOX3);
  182. case 3: sbus_writew(param[2], qpti->qregs + MBOX2);
  183. case 2: sbus_writew(param[1], qpti->qregs + MBOX1);
  184. case 1: sbus_writew(param[0], qpti->qregs + MBOX0);
  185. }
  186. /* Clear RISC interrupt. */
  187. tmp = sbus_readw(qpti->qregs + HCCTRL);
  188. tmp |= HCCTRL_CRIRQ;
  189. sbus_writew(tmp, qpti->qregs + HCCTRL);
  190. /* Clear SBUS semaphore. */
  191. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  192. /* Set HOST interrupt. */
  193. tmp = sbus_readw(qpti->qregs + HCCTRL);
  194. tmp |= HCCTRL_SHIRQ;
  195. sbus_writew(tmp, qpti->qregs + HCCTRL);
  196. /* Wait for HOST interrupt clears. */
  197. loop_count = DEFAULT_LOOP_COUNT;
  198. while (--loop_count &&
  199. (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_CRIRQ))
  200. udelay(20);
  201. if (!loop_count)
  202. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #2\n",
  203. qpti->qpti_id, param[0]);
  204. /* Wait for SBUS semaphore to get set. */
  205. loop_count = DEFAULT_LOOP_COUNT;
  206. while (--loop_count &&
  207. !(sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK)) {
  208. udelay(20);
  209. /* Workaround for some buggy chips. */
  210. if (sbus_readw(qpti->qregs + MBOX0) & 0x4000)
  211. break;
  212. }
  213. if (!loop_count)
  214. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #3\n",
  215. qpti->qpti_id, param[0]);
  216. /* Wait for MBOX busy condition to go away. */
  217. loop_count = DEFAULT_LOOP_COUNT;
  218. while (--loop_count && (sbus_readw(qpti->qregs + MBOX0) == 0x04))
  219. udelay(20);
  220. if (!loop_count)
  221. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #4\n",
  222. qpti->qpti_id, param[0]);
  223. /* Read back output parameters. */
  224. switch (mbox_param[param[0]] & 0xf) {
  225. case 6: param[5] = sbus_readw(qpti->qregs + MBOX5);
  226. case 5: param[4] = sbus_readw(qpti->qregs + MBOX4);
  227. case 4: param[3] = sbus_readw(qpti->qregs + MBOX3);
  228. case 3: param[2] = sbus_readw(qpti->qregs + MBOX2);
  229. case 2: param[1] = sbus_readw(qpti->qregs + MBOX1);
  230. case 1: param[0] = sbus_readw(qpti->qregs + MBOX0);
  231. }
  232. /* Clear RISC interrupt. */
  233. tmp = sbus_readw(qpti->qregs + HCCTRL);
  234. tmp |= HCCTRL_CRIRQ;
  235. sbus_writew(tmp, qpti->qregs + HCCTRL);
  236. /* Release SBUS semaphore. */
  237. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  238. tmp &= ~(SBUS_SEMAPHORE_LCK);
  239. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  240. /* We're done. */
  241. return 0;
  242. }
  243. static inline void qlogicpti_set_hostdev_defaults(struct qlogicpti *qpti)
  244. {
  245. int i;
  246. qpti->host_param.initiator_scsi_id = qpti->scsi_id;
  247. qpti->host_param.bus_reset_delay = 3;
  248. qpti->host_param.retry_count = 0;
  249. qpti->host_param.retry_delay = 5;
  250. qpti->host_param.async_data_setup_time = 3;
  251. qpti->host_param.req_ack_active_negation = 1;
  252. qpti->host_param.data_line_active_negation = 1;
  253. qpti->host_param.data_dma_burst_enable = 1;
  254. qpti->host_param.command_dma_burst_enable = 1;
  255. qpti->host_param.tag_aging = 8;
  256. qpti->host_param.selection_timeout = 250;
  257. qpti->host_param.max_queue_depth = 256;
  258. for(i = 0; i < MAX_TARGETS; i++) {
  259. /*
  260. * disconnect, parity, arq, reneg on reset, and, oddly enough
  261. * tags...the midlayer's notion of tagged support has to match
  262. * our device settings, and since we base whether we enable a
  263. * tag on a per-cmnd basis upon what the midlayer sez, we
  264. * actually enable the capability here.
  265. */
  266. qpti->dev_param[i].device_flags = 0xcd;
  267. qpti->dev_param[i].execution_throttle = 16;
  268. if (qpti->ultra) {
  269. qpti->dev_param[i].synchronous_period = 12;
  270. qpti->dev_param[i].synchronous_offset = 8;
  271. } else {
  272. qpti->dev_param[i].synchronous_period = 25;
  273. qpti->dev_param[i].synchronous_offset = 12;
  274. }
  275. qpti->dev_param[i].device_enable = 1;
  276. }
  277. }
  278. static int qlogicpti_reset_hardware(struct Scsi_Host *host)
  279. {
  280. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  281. u_short param[6];
  282. unsigned short risc_code_addr;
  283. int loop_count, i;
  284. unsigned long flags;
  285. risc_code_addr = 0x1000; /* all load addresses are at 0x1000 */
  286. spin_lock_irqsave(host->host_lock, flags);
  287. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  288. /* Only reset the scsi bus if it is not free. */
  289. if (sbus_readw(qpti->qregs + CPU_PCTRL) & CPU_PCTRL_BSY) {
  290. sbus_writew(CPU_ORIDE_RMOD, qpti->qregs + CPU_ORIDE);
  291. sbus_writew(CPU_CMD_BRESET, qpti->qregs + CPU_CMD);
  292. udelay(400);
  293. }
  294. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  295. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  296. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  297. loop_count = DEFAULT_LOOP_COUNT;
  298. while (--loop_count && ((sbus_readw(qpti->qregs + MBOX0) & 0xff) == 0x04))
  299. udelay(20);
  300. if (!loop_count)
  301. printk(KERN_EMERG "qlogicpti%d: reset_hardware loop timeout\n",
  302. qpti->qpti_id);
  303. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  304. set_sbus_cfg1(qpti);
  305. qlogicpti_enable_irqs(qpti);
  306. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  307. qpti->ultra = 1;
  308. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  309. qpti->qregs + RISC_MTREG);
  310. } else {
  311. qpti->ultra = 0;
  312. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  313. qpti->qregs + RISC_MTREG);
  314. }
  315. /* reset adapter and per-device default values. */
  316. /* do it after finding out whether we're ultra mode capable */
  317. qlogicpti_set_hostdev_defaults(qpti);
  318. /* Release the RISC processor. */
  319. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  320. /* Get RISC to start executing the firmware code. */
  321. param[0] = MBOX_EXEC_FIRMWARE;
  322. param[1] = risc_code_addr;
  323. if (qlogicpti_mbox_command(qpti, param, 1)) {
  324. printk(KERN_EMERG "qlogicpti%d: Cannot execute ISP firmware.\n",
  325. qpti->qpti_id);
  326. spin_unlock_irqrestore(host->host_lock, flags);
  327. return 1;
  328. }
  329. /* Set initiator scsi ID. */
  330. param[0] = MBOX_SET_INIT_SCSI_ID;
  331. param[1] = qpti->host_param.initiator_scsi_id;
  332. if (qlogicpti_mbox_command(qpti, param, 1) ||
  333. (param[0] != MBOX_COMMAND_COMPLETE)) {
  334. printk(KERN_EMERG "qlogicpti%d: Cannot set initiator SCSI ID.\n",
  335. qpti->qpti_id);
  336. spin_unlock_irqrestore(host->host_lock, flags);
  337. return 1;
  338. }
  339. /* Initialize state of the queues, both hw and sw. */
  340. qpti->req_in_ptr = qpti->res_out_ptr = 0;
  341. param[0] = MBOX_INIT_RES_QUEUE;
  342. param[1] = RES_QUEUE_LEN + 1;
  343. param[2] = (u_short) (qpti->res_dvma >> 16);
  344. param[3] = (u_short) (qpti->res_dvma & 0xffff);
  345. param[4] = param[5] = 0;
  346. if (qlogicpti_mbox_command(qpti, param, 1)) {
  347. printk(KERN_EMERG "qlogicpti%d: Cannot init response queue.\n",
  348. qpti->qpti_id);
  349. spin_unlock_irqrestore(host->host_lock, flags);
  350. return 1;
  351. }
  352. param[0] = MBOX_INIT_REQ_QUEUE;
  353. param[1] = QLOGICPTI_REQ_QUEUE_LEN + 1;
  354. param[2] = (u_short) (qpti->req_dvma >> 16);
  355. param[3] = (u_short) (qpti->req_dvma & 0xffff);
  356. param[4] = param[5] = 0;
  357. if (qlogicpti_mbox_command(qpti, param, 1)) {
  358. printk(KERN_EMERG "qlogicpti%d: Cannot init request queue.\n",
  359. qpti->qpti_id);
  360. spin_unlock_irqrestore(host->host_lock, flags);
  361. return 1;
  362. }
  363. param[0] = MBOX_SET_RETRY_COUNT;
  364. param[1] = qpti->host_param.retry_count;
  365. param[2] = qpti->host_param.retry_delay;
  366. qlogicpti_mbox_command(qpti, param, 0);
  367. param[0] = MBOX_SET_TAG_AGE_LIMIT;
  368. param[1] = qpti->host_param.tag_aging;
  369. qlogicpti_mbox_command(qpti, param, 0);
  370. for (i = 0; i < MAX_TARGETS; i++) {
  371. param[0] = MBOX_GET_DEV_QUEUE_PARAMS;
  372. param[1] = (i << 8);
  373. qlogicpti_mbox_command(qpti, param, 0);
  374. }
  375. param[0] = MBOX_GET_FIRMWARE_STATUS;
  376. qlogicpti_mbox_command(qpti, param, 0);
  377. param[0] = MBOX_SET_SELECT_TIMEOUT;
  378. param[1] = qpti->host_param.selection_timeout;
  379. qlogicpti_mbox_command(qpti, param, 0);
  380. for (i = 0; i < MAX_TARGETS; i++) {
  381. param[0] = MBOX_SET_TARGET_PARAMS;
  382. param[1] = (i << 8);
  383. param[2] = (qpti->dev_param[i].device_flags << 8);
  384. /*
  385. * Since we're now loading 1.31 f/w, force narrow/async.
  386. */
  387. param[2] |= 0xc0;
  388. param[3] = 0; /* no offset, we do not have sync mode yet */
  389. qlogicpti_mbox_command(qpti, param, 0);
  390. }
  391. /*
  392. * Always (sigh) do an initial bus reset (kicks f/w).
  393. */
  394. param[0] = MBOX_BUS_RESET;
  395. param[1] = qpti->host_param.bus_reset_delay;
  396. qlogicpti_mbox_command(qpti, param, 0);
  397. qpti->send_marker = 1;
  398. spin_unlock_irqrestore(host->host_lock, flags);
  399. return 0;
  400. }
  401. #define PTI_RESET_LIMIT 400
  402. static int __devinit qlogicpti_load_firmware(struct qlogicpti *qpti)
  403. {
  404. struct Scsi_Host *host = qpti->qhost;
  405. unsigned short csum = 0;
  406. unsigned short param[6];
  407. unsigned short *risc_code, risc_code_addr, risc_code_length;
  408. unsigned long flags;
  409. int i, timeout;
  410. risc_code = &sbus_risc_code01[0];
  411. risc_code_addr = 0x1000; /* all f/w modules load at 0x1000 */
  412. risc_code_length = sbus_risc_code_length01;
  413. spin_lock_irqsave(host->host_lock, flags);
  414. /* Verify the checksum twice, one before loading it, and once
  415. * afterwards via the mailbox commands.
  416. */
  417. for (i = 0; i < risc_code_length; i++)
  418. csum += risc_code[i];
  419. if (csum) {
  420. spin_unlock_irqrestore(host->host_lock, flags);
  421. printk(KERN_EMERG "qlogicpti%d: Aieee, firmware checksum failed!",
  422. qpti->qpti_id);
  423. return 1;
  424. }
  425. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  426. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  427. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  428. timeout = PTI_RESET_LIMIT;
  429. while (--timeout && (sbus_readw(qpti->qregs + SBUS_CTRL) & SBUS_CTRL_RESET))
  430. udelay(20);
  431. if (!timeout) {
  432. spin_unlock_irqrestore(host->host_lock, flags);
  433. printk(KERN_EMERG "qlogicpti%d: Cannot reset the ISP.", qpti->qpti_id);
  434. return 1;
  435. }
  436. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  437. mdelay(1);
  438. sbus_writew((SBUS_CTRL_GENAB | SBUS_CTRL_ERIRQ), qpti->qregs + SBUS_CTRL);
  439. set_sbus_cfg1(qpti);
  440. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  441. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  442. qpti->ultra = 1;
  443. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  444. qpti->qregs + RISC_MTREG);
  445. } else {
  446. qpti->ultra = 0;
  447. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  448. qpti->qregs + RISC_MTREG);
  449. }
  450. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  451. /* Pin lines are only stable while RISC is paused. */
  452. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  453. if (sbus_readw(qpti->qregs + CPU_PDIFF) & CPU_PDIFF_MODE)
  454. qpti->differential = 1;
  455. else
  456. qpti->differential = 0;
  457. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  458. /* This shouldn't be necessary- we've reset things so we should be
  459. running from the ROM now.. */
  460. param[0] = MBOX_STOP_FIRMWARE;
  461. param[1] = param[2] = param[3] = param[4] = param[5] = 0;
  462. if (qlogicpti_mbox_command(qpti, param, 1)) {
  463. printk(KERN_EMERG "qlogicpti%d: Cannot stop firmware for reload.\n",
  464. qpti->qpti_id);
  465. spin_unlock_irqrestore(host->host_lock, flags);
  466. return 1;
  467. }
  468. /* Load it up.. */
  469. for (i = 0; i < risc_code_length; i++) {
  470. param[0] = MBOX_WRITE_RAM_WORD;
  471. param[1] = risc_code_addr + i;
  472. param[2] = risc_code[i];
  473. if (qlogicpti_mbox_command(qpti, param, 1) ||
  474. param[0] != MBOX_COMMAND_COMPLETE) {
  475. printk("qlogicpti%d: Firmware dload failed, I'm bolixed!\n",
  476. qpti->qpti_id);
  477. spin_unlock_irqrestore(host->host_lock, flags);
  478. return 1;
  479. }
  480. }
  481. /* Reset the ISP again. */
  482. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  483. mdelay(1);
  484. qlogicpti_enable_irqs(qpti);
  485. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  486. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  487. /* Ask ISP to verify the checksum of the new code. */
  488. param[0] = MBOX_VERIFY_CHECKSUM;
  489. param[1] = risc_code_addr;
  490. if (qlogicpti_mbox_command(qpti, param, 1) ||
  491. (param[0] != MBOX_COMMAND_COMPLETE)) {
  492. printk(KERN_EMERG "qlogicpti%d: New firmware csum failure!\n",
  493. qpti->qpti_id);
  494. spin_unlock_irqrestore(host->host_lock, flags);
  495. return 1;
  496. }
  497. /* Start using newly downloaded firmware. */
  498. param[0] = MBOX_EXEC_FIRMWARE;
  499. param[1] = risc_code_addr;
  500. qlogicpti_mbox_command(qpti, param, 1);
  501. param[0] = MBOX_ABOUT_FIRMWARE;
  502. if (qlogicpti_mbox_command(qpti, param, 1) ||
  503. (param[0] != MBOX_COMMAND_COMPLETE)) {
  504. printk(KERN_EMERG "qlogicpti%d: AboutFirmware cmd fails.\n",
  505. qpti->qpti_id);
  506. spin_unlock_irqrestore(host->host_lock, flags);
  507. return 1;
  508. }
  509. /* Snag the major and minor revisions from the result. */
  510. qpti->fware_majrev = param[1];
  511. qpti->fware_minrev = param[2];
  512. qpti->fware_micrev = param[3];
  513. /* Set the clock rate */
  514. param[0] = MBOX_SET_CLOCK_RATE;
  515. param[1] = qpti->clock;
  516. if (qlogicpti_mbox_command(qpti, param, 1) ||
  517. (param[0] != MBOX_COMMAND_COMPLETE)) {
  518. printk(KERN_EMERG "qlogicpti%d: could not set clock rate.\n",
  519. qpti->qpti_id);
  520. spin_unlock_irqrestore(host->host_lock, flags);
  521. return 1;
  522. }
  523. if (qpti->is_pti != 0) {
  524. /* Load scsi initiator ID and interrupt level into sbus static ram. */
  525. param[0] = MBOX_WRITE_RAM_WORD;
  526. param[1] = 0xff80;
  527. param[2] = (unsigned short) qpti->scsi_id;
  528. qlogicpti_mbox_command(qpti, param, 1);
  529. param[0] = MBOX_WRITE_RAM_WORD;
  530. param[1] = 0xff00;
  531. param[2] = (unsigned short) 3;
  532. qlogicpti_mbox_command(qpti, param, 1);
  533. }
  534. spin_unlock_irqrestore(host->host_lock, flags);
  535. return 0;
  536. }
  537. static int qlogicpti_verify_tmon(struct qlogicpti *qpti)
  538. {
  539. int curstat = sbus_readb(qpti->sreg);
  540. curstat &= 0xf0;
  541. if (!(curstat & SREG_FUSE) && (qpti->swsreg & SREG_FUSE))
  542. printk("qlogicpti%d: Fuse returned to normal state.\n", qpti->qpti_id);
  543. if (!(curstat & SREG_TPOWER) && (qpti->swsreg & SREG_TPOWER))
  544. printk("qlogicpti%d: termpwr back to normal state.\n", qpti->qpti_id);
  545. if (curstat != qpti->swsreg) {
  546. int error = 0;
  547. if (curstat & SREG_FUSE) {
  548. error++;
  549. printk("qlogicpti%d: Fuse is open!\n", qpti->qpti_id);
  550. }
  551. if (curstat & SREG_TPOWER) {
  552. error++;
  553. printk("qlogicpti%d: termpwr failure\n", qpti->qpti_id);
  554. }
  555. if (qpti->differential &&
  556. (curstat & SREG_DSENSE) != SREG_DSENSE) {
  557. error++;
  558. printk("qlogicpti%d: You have a single ended device on a "
  559. "differential bus! Please fix!\n", qpti->qpti_id);
  560. }
  561. qpti->swsreg = curstat;
  562. return error;
  563. }
  564. return 0;
  565. }
  566. static irqreturn_t qpti_intr(int irq, void *dev_id);
  567. static void __init qpti_chain_add(struct qlogicpti *qpti)
  568. {
  569. spin_lock_irq(&qptichain_lock);
  570. if (qptichain != NULL) {
  571. struct qlogicpti *qlink = qptichain;
  572. while(qlink->next)
  573. qlink = qlink->next;
  574. qlink->next = qpti;
  575. } else {
  576. qptichain = qpti;
  577. }
  578. qpti->next = NULL;
  579. spin_unlock_irq(&qptichain_lock);
  580. }
  581. static void __init qpti_chain_del(struct qlogicpti *qpti)
  582. {
  583. spin_lock_irq(&qptichain_lock);
  584. if (qptichain == qpti) {
  585. qptichain = qpti->next;
  586. } else {
  587. struct qlogicpti *qlink = qptichain;
  588. while(qlink->next != qpti)
  589. qlink = qlink->next;
  590. qlink->next = qpti->next;
  591. }
  592. qpti->next = NULL;
  593. spin_unlock_irq(&qptichain_lock);
  594. }
  595. static int __init qpti_map_regs(struct qlogicpti *qpti)
  596. {
  597. struct sbus_dev *sdev = qpti->sdev;
  598. qpti->qregs = sbus_ioremap(&sdev->resource[0], 0,
  599. sdev->reg_addrs[0].reg_size,
  600. "PTI Qlogic/ISP");
  601. if (!qpti->qregs) {
  602. printk("PTI: Qlogic/ISP registers are unmappable\n");
  603. return -1;
  604. }
  605. if (qpti->is_pti) {
  606. qpti->sreg = sbus_ioremap(&sdev->resource[0], (16 * 4096),
  607. sizeof(unsigned char),
  608. "PTI Qlogic/ISP statreg");
  609. if (!qpti->sreg) {
  610. printk("PTI: Qlogic/ISP status register is unmappable\n");
  611. return -1;
  612. }
  613. }
  614. return 0;
  615. }
  616. static int __init qpti_register_irq(struct qlogicpti *qpti)
  617. {
  618. struct sbus_dev *sdev = qpti->sdev;
  619. qpti->qhost->irq = qpti->irq = sdev->irqs[0];
  620. /* We used to try various overly-clever things to
  621. * reduce the interrupt processing overhead on
  622. * sun4c/sun4m when multiple PTI's shared the
  623. * same IRQ. It was too complex and messy to
  624. * sanely maintain.
  625. */
  626. if (request_irq(qpti->irq, qpti_intr,
  627. IRQF_SHARED, "Qlogic/PTI", qpti))
  628. goto fail;
  629. printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq);
  630. return 0;
  631. fail:
  632. printk("qlogicpti%d: Cannot acquire irq line\n", qpti->qpti_id);
  633. return -1;
  634. }
  635. static void __init qpti_get_scsi_id(struct qlogicpti *qpti)
  636. {
  637. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  638. "initiator-id",
  639. -1);
  640. if (qpti->scsi_id == -1)
  641. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  642. "scsi-initiator-id",
  643. -1);
  644. if (qpti->scsi_id == -1)
  645. qpti->scsi_id =
  646. prom_getintdefault(qpti->sdev->bus->prom_node,
  647. "scsi-initiator-id", 7);
  648. qpti->qhost->this_id = qpti->scsi_id;
  649. qpti->qhost->max_sectors = 64;
  650. printk("SCSI ID %d ", qpti->scsi_id);
  651. }
  652. static void qpti_get_bursts(struct qlogicpti *qpti)
  653. {
  654. struct sbus_dev *sdev = qpti->sdev;
  655. u8 bursts, bmask;
  656. bursts = prom_getintdefault(qpti->prom_node, "burst-sizes", 0xff);
  657. bmask = prom_getintdefault(sdev->bus->prom_node,
  658. "burst-sizes", 0xff);
  659. if (bmask != 0xff)
  660. bursts &= bmask;
  661. if (bursts == 0xff ||
  662. (bursts & DMA_BURST16) == 0 ||
  663. (bursts & DMA_BURST32) == 0)
  664. bursts = (DMA_BURST32 - 1);
  665. qpti->bursts = bursts;
  666. }
  667. static void qpti_get_clock(struct qlogicpti *qpti)
  668. {
  669. unsigned int cfreq;
  670. /* Check for what the clock input to this card is.
  671. * Default to 40Mhz.
  672. */
  673. cfreq = prom_getintdefault(qpti->prom_node,"clock-frequency",40000000);
  674. qpti->clock = (cfreq + 500000)/1000000;
  675. if (qpti->clock == 0) /* bullshit */
  676. qpti->clock = 40;
  677. }
  678. /* The request and response queues must each be aligned
  679. * on a page boundary.
  680. */
  681. static int __init qpti_map_queues(struct qlogicpti *qpti)
  682. {
  683. struct sbus_dev *sdev = qpti->sdev;
  684. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  685. qpti->res_cpu = sbus_alloc_consistent(sdev,
  686. QSIZE(RES_QUEUE_LEN),
  687. &qpti->res_dvma);
  688. if (qpti->res_cpu == NULL ||
  689. qpti->res_dvma == 0) {
  690. printk("QPTI: Cannot map response queue.\n");
  691. return -1;
  692. }
  693. qpti->req_cpu = sbus_alloc_consistent(sdev,
  694. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  695. &qpti->req_dvma);
  696. if (qpti->req_cpu == NULL ||
  697. qpti->req_dvma == 0) {
  698. sbus_free_consistent(sdev, QSIZE(RES_QUEUE_LEN),
  699. qpti->res_cpu, qpti->res_dvma);
  700. printk("QPTI: Cannot map request queue.\n");
  701. return -1;
  702. }
  703. memset(qpti->res_cpu, 0, QSIZE(RES_QUEUE_LEN));
  704. memset(qpti->req_cpu, 0, QSIZE(QLOGICPTI_REQ_QUEUE_LEN));
  705. return 0;
  706. }
  707. const char *qlogicpti_info(struct Scsi_Host *host)
  708. {
  709. static char buf[80];
  710. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  711. sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %d regs at %p",
  712. qpti->qhost->irq, qpti->qregs);
  713. return buf;
  714. }
  715. /* I am a certified frobtronicist. */
  716. static inline void marker_frob(struct Command_Entry *cmd)
  717. {
  718. struct Marker_Entry *marker = (struct Marker_Entry *) cmd;
  719. memset(marker, 0, sizeof(struct Marker_Entry));
  720. marker->hdr.entry_cnt = 1;
  721. marker->hdr.entry_type = ENTRY_MARKER;
  722. marker->modifier = SYNC_ALL;
  723. marker->rsvd = 0;
  724. }
  725. static inline void cmd_frob(struct Command_Entry *cmd, struct scsi_cmnd *Cmnd,
  726. struct qlogicpti *qpti)
  727. {
  728. memset(cmd, 0, sizeof(struct Command_Entry));
  729. cmd->hdr.entry_cnt = 1;
  730. cmd->hdr.entry_type = ENTRY_COMMAND;
  731. cmd->target_id = Cmnd->device->id;
  732. cmd->target_lun = Cmnd->device->lun;
  733. cmd->cdb_length = Cmnd->cmd_len;
  734. cmd->control_flags = 0;
  735. if (Cmnd->device->tagged_supported) {
  736. if (qpti->cmd_count[Cmnd->device->id] == 0)
  737. qpti->tag_ages[Cmnd->device->id] = jiffies;
  738. if (time_after(jiffies, qpti->tag_ages[Cmnd->device->id] + (5*HZ))) {
  739. cmd->control_flags = CFLAG_ORDERED_TAG;
  740. qpti->tag_ages[Cmnd->device->id] = jiffies;
  741. } else
  742. cmd->control_flags = CFLAG_SIMPLE_TAG;
  743. }
  744. if ((Cmnd->cmnd[0] == WRITE_6) ||
  745. (Cmnd->cmnd[0] == WRITE_10) ||
  746. (Cmnd->cmnd[0] == WRITE_12))
  747. cmd->control_flags |= CFLAG_WRITE;
  748. else
  749. cmd->control_flags |= CFLAG_READ;
  750. cmd->time_out = 30;
  751. memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
  752. }
  753. /* Do it to it baby. */
  754. static inline int load_cmd(struct scsi_cmnd *Cmnd, struct Command_Entry *cmd,
  755. struct qlogicpti *qpti, u_int in_ptr, u_int out_ptr)
  756. {
  757. struct dataseg *ds;
  758. struct scatterlist *sg, *s;
  759. int i, n;
  760. if (Cmnd->use_sg) {
  761. int sg_count;
  762. sg = (struct scatterlist *) Cmnd->request_buffer;
  763. sg_count = sbus_map_sg(qpti->sdev, sg, Cmnd->use_sg, Cmnd->sc_data_direction);
  764. ds = cmd->dataseg;
  765. cmd->segment_cnt = sg_count;
  766. /* Fill in first four sg entries: */
  767. n = sg_count;
  768. if (n > 4)
  769. n = 4;
  770. for_each_sg(sg, s, n, i) {
  771. ds[i].d_base = sg_dma_address(s);
  772. ds[i].d_count = sg_dma_len(s);
  773. }
  774. sg_count -= 4;
  775. sg = s;
  776. while (sg_count > 0) {
  777. struct Continuation_Entry *cont;
  778. ++cmd->hdr.entry_cnt;
  779. cont = (struct Continuation_Entry *) &qpti->req_cpu[in_ptr];
  780. in_ptr = NEXT_REQ_PTR(in_ptr);
  781. if (in_ptr == out_ptr)
  782. return -1;
  783. cont->hdr.entry_type = ENTRY_CONTINUATION;
  784. cont->hdr.entry_cnt = 0;
  785. cont->hdr.sys_def_1 = 0;
  786. cont->hdr.flags = 0;
  787. cont->reserved = 0;
  788. ds = cont->dataseg;
  789. n = sg_count;
  790. if (n > 7)
  791. n = 7;
  792. for_each_sg(sg, s, n, i) {
  793. ds[i].d_base = sg_dma_address(s);
  794. ds[i].d_count = sg_dma_len(s);
  795. }
  796. sg_count -= n;
  797. }
  798. } else if (Cmnd->request_bufflen) {
  799. Cmnd->SCp.ptr = (char *)(unsigned long)
  800. sbus_map_single(qpti->sdev,
  801. Cmnd->request_buffer,
  802. Cmnd->request_bufflen,
  803. Cmnd->sc_data_direction);
  804. cmd->dataseg[0].d_base = (u32) ((unsigned long)Cmnd->SCp.ptr);
  805. cmd->dataseg[0].d_count = Cmnd->request_bufflen;
  806. cmd->segment_cnt = 1;
  807. } else {
  808. cmd->dataseg[0].d_base = 0;
  809. cmd->dataseg[0].d_count = 0;
  810. cmd->segment_cnt = 1; /* Shouldn't this be 0? */
  811. }
  812. /* Committed, record Scsi_Cmd so we can find it later. */
  813. cmd->handle = in_ptr;
  814. qpti->cmd_slots[in_ptr] = Cmnd;
  815. qpti->cmd_count[Cmnd->device->id]++;
  816. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  817. qpti->req_in_ptr = in_ptr;
  818. return in_ptr;
  819. }
  820. static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int out_ptr)
  821. {
  822. /* Temporary workaround until bug is found and fixed (one bug has been found
  823. already, but fixing it makes things even worse) -jj */
  824. int num_free = QLOGICPTI_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr) - 64;
  825. host->can_queue = host->host_busy + num_free;
  826. host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
  827. }
  828. static int qlogicpti_slave_configure(struct scsi_device *sdev)
  829. {
  830. struct qlogicpti *qpti = shost_priv(sdev->host);
  831. int tgt = sdev->id;
  832. u_short param[6];
  833. /* tags handled in midlayer */
  834. /* enable sync mode? */
  835. if (sdev->sdtr) {
  836. qpti->dev_param[tgt].device_flags |= 0x10;
  837. } else {
  838. qpti->dev_param[tgt].synchronous_offset = 0;
  839. qpti->dev_param[tgt].synchronous_period = 0;
  840. }
  841. /* are we wide capable? */
  842. if (sdev->wdtr)
  843. qpti->dev_param[tgt].device_flags |= 0x20;
  844. param[0] = MBOX_SET_TARGET_PARAMS;
  845. param[1] = (tgt << 8);
  846. param[2] = (qpti->dev_param[tgt].device_flags << 8);
  847. if (qpti->dev_param[tgt].device_flags & 0x10) {
  848. param[3] = (qpti->dev_param[tgt].synchronous_offset << 8) |
  849. qpti->dev_param[tgt].synchronous_period;
  850. } else {
  851. param[3] = 0;
  852. }
  853. qlogicpti_mbox_command(qpti, param, 0);
  854. return 0;
  855. }
  856. /*
  857. * The middle SCSI layer ensures that queuecommand never gets invoked
  858. * concurrently with itself or the interrupt handler (though the
  859. * interrupt handler may call this routine as part of
  860. * request-completion handling).
  861. *
  862. * "This code must fly." -davem
  863. */
  864. static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *))
  865. {
  866. struct Scsi_Host *host = Cmnd->device->host;
  867. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  868. struct Command_Entry *cmd;
  869. u_int out_ptr;
  870. int in_ptr;
  871. Cmnd->scsi_done = done;
  872. in_ptr = qpti->req_in_ptr;
  873. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  874. out_ptr = sbus_readw(qpti->qregs + MBOX4);
  875. in_ptr = NEXT_REQ_PTR(in_ptr);
  876. if (in_ptr == out_ptr)
  877. goto toss_command;
  878. if (qpti->send_marker) {
  879. marker_frob(cmd);
  880. qpti->send_marker = 0;
  881. if (NEXT_REQ_PTR(in_ptr) == out_ptr) {
  882. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  883. qpti->req_in_ptr = in_ptr;
  884. goto toss_command;
  885. }
  886. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  887. in_ptr = NEXT_REQ_PTR(in_ptr);
  888. }
  889. cmd_frob(cmd, Cmnd, qpti);
  890. if ((in_ptr = load_cmd(Cmnd, cmd, qpti, in_ptr, out_ptr)) == -1)
  891. goto toss_command;
  892. update_can_queue(host, in_ptr, out_ptr);
  893. return 0;
  894. toss_command:
  895. printk(KERN_EMERG "qlogicpti%d: request queue overflow\n",
  896. qpti->qpti_id);
  897. /* Unfortunately, unless you use the new EH code, which
  898. * we don't, the midlayer will ignore the return value,
  899. * which is insane. We pick up the pieces like this.
  900. */
  901. Cmnd->result = DID_BUS_BUSY;
  902. done(Cmnd);
  903. return 1;
  904. }
  905. static int qlogicpti_return_status(struct Status_Entry *sts, int id)
  906. {
  907. int host_status = DID_ERROR;
  908. switch (sts->completion_status) {
  909. case CS_COMPLETE:
  910. host_status = DID_OK;
  911. break;
  912. case CS_INCOMPLETE:
  913. if (!(sts->state_flags & SF_GOT_BUS))
  914. host_status = DID_NO_CONNECT;
  915. else if (!(sts->state_flags & SF_GOT_TARGET))
  916. host_status = DID_BAD_TARGET;
  917. else if (!(sts->state_flags & SF_SENT_CDB))
  918. host_status = DID_ERROR;
  919. else if (!(sts->state_flags & SF_TRANSFERRED_DATA))
  920. host_status = DID_ERROR;
  921. else if (!(sts->state_flags & SF_GOT_STATUS))
  922. host_status = DID_ERROR;
  923. else if (!(sts->state_flags & SF_GOT_SENSE))
  924. host_status = DID_ERROR;
  925. break;
  926. case CS_DMA_ERROR:
  927. case CS_TRANSPORT_ERROR:
  928. host_status = DID_ERROR;
  929. break;
  930. case CS_RESET_OCCURRED:
  931. case CS_BUS_RESET:
  932. host_status = DID_RESET;
  933. break;
  934. case CS_ABORTED:
  935. host_status = DID_ABORT;
  936. break;
  937. case CS_TIMEOUT:
  938. host_status = DID_TIME_OUT;
  939. break;
  940. case CS_DATA_OVERRUN:
  941. case CS_COMMAND_OVERRUN:
  942. case CS_STATUS_OVERRUN:
  943. case CS_BAD_MESSAGE:
  944. case CS_NO_MESSAGE_OUT:
  945. case CS_EXT_ID_FAILED:
  946. case CS_IDE_MSG_FAILED:
  947. case CS_ABORT_MSG_FAILED:
  948. case CS_NOP_MSG_FAILED:
  949. case CS_PARITY_ERROR_MSG_FAILED:
  950. case CS_DEVICE_RESET_MSG_FAILED:
  951. case CS_ID_MSG_FAILED:
  952. case CS_UNEXP_BUS_FREE:
  953. host_status = DID_ERROR;
  954. break;
  955. case CS_DATA_UNDERRUN:
  956. host_status = DID_OK;
  957. break;
  958. default:
  959. printk(KERN_EMERG "qlogicpti%d: unknown completion status 0x%04x\n",
  960. id, sts->completion_status);
  961. host_status = DID_ERROR;
  962. break;
  963. }
  964. return (sts->scsi_status & STATUS_MASK) | (host_status << 16);
  965. }
  966. static struct scsi_cmnd *qlogicpti_intr_handler(struct qlogicpti *qpti)
  967. {
  968. struct scsi_cmnd *Cmnd, *done_queue = NULL;
  969. struct Status_Entry *sts;
  970. u_int in_ptr, out_ptr;
  971. if (!(sbus_readw(qpti->qregs + SBUS_STAT) & SBUS_STAT_RINT))
  972. return NULL;
  973. in_ptr = sbus_readw(qpti->qregs + MBOX5);
  974. sbus_writew(HCCTRL_CRIRQ, qpti->qregs + HCCTRL);
  975. if (sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK) {
  976. switch (sbus_readw(qpti->qregs + MBOX0)) {
  977. case ASYNC_SCSI_BUS_RESET:
  978. case EXECUTION_TIMEOUT_RESET:
  979. qpti->send_marker = 1;
  980. break;
  981. case INVALID_COMMAND:
  982. case HOST_INTERFACE_ERROR:
  983. case COMMAND_ERROR:
  984. case COMMAND_PARAM_ERROR:
  985. break;
  986. };
  987. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  988. }
  989. /* This looks like a network driver! */
  990. out_ptr = qpti->res_out_ptr;
  991. while (out_ptr != in_ptr) {
  992. u_int cmd_slot;
  993. sts = (struct Status_Entry *) &qpti->res_cpu[out_ptr];
  994. out_ptr = NEXT_RES_PTR(out_ptr);
  995. /* We store an index in the handle, not the pointer in
  996. * some form. This avoids problems due to the fact
  997. * that the handle provided is only 32-bits. -DaveM
  998. */
  999. cmd_slot = sts->handle;
  1000. Cmnd = qpti->cmd_slots[cmd_slot];
  1001. qpti->cmd_slots[cmd_slot] = NULL;
  1002. if (sts->completion_status == CS_RESET_OCCURRED ||
  1003. sts->completion_status == CS_ABORTED ||
  1004. (sts->status_flags & STF_BUS_RESET))
  1005. qpti->send_marker = 1;
  1006. if (sts->state_flags & SF_GOT_SENSE)
  1007. memcpy(Cmnd->sense_buffer, sts->req_sense_data,
  1008. sizeof(Cmnd->sense_buffer));
  1009. if (sts->hdr.entry_type == ENTRY_STATUS)
  1010. Cmnd->result =
  1011. qlogicpti_return_status(sts, qpti->qpti_id);
  1012. else
  1013. Cmnd->result = DID_ERROR << 16;
  1014. if (Cmnd->use_sg) {
  1015. sbus_unmap_sg(qpti->sdev,
  1016. (struct scatterlist *)Cmnd->request_buffer,
  1017. Cmnd->use_sg,
  1018. Cmnd->sc_data_direction);
  1019. } else if (Cmnd->request_bufflen) {
  1020. sbus_unmap_single(qpti->sdev,
  1021. (__u32)((unsigned long)Cmnd->SCp.ptr),
  1022. Cmnd->request_bufflen,
  1023. Cmnd->sc_data_direction);
  1024. }
  1025. qpti->cmd_count[Cmnd->device->id]--;
  1026. sbus_writew(out_ptr, qpti->qregs + MBOX5);
  1027. Cmnd->host_scribble = (unsigned char *) done_queue;
  1028. done_queue = Cmnd;
  1029. }
  1030. qpti->res_out_ptr = out_ptr;
  1031. return done_queue;
  1032. }
  1033. static irqreturn_t qpti_intr(int irq, void *dev_id)
  1034. {
  1035. struct qlogicpti *qpti = dev_id;
  1036. unsigned long flags;
  1037. struct scsi_cmnd *dq;
  1038. spin_lock_irqsave(qpti->qhost->host_lock, flags);
  1039. dq = qlogicpti_intr_handler(qpti);
  1040. if (dq != NULL) {
  1041. do {
  1042. struct scsi_cmnd *next;
  1043. next = (struct scsi_cmnd *) dq->host_scribble;
  1044. dq->scsi_done(dq);
  1045. dq = next;
  1046. } while (dq != NULL);
  1047. }
  1048. spin_unlock_irqrestore(qpti->qhost->host_lock, flags);
  1049. return IRQ_HANDLED;
  1050. }
  1051. static int qlogicpti_abort(struct scsi_cmnd *Cmnd)
  1052. {
  1053. u_short param[6];
  1054. struct Scsi_Host *host = Cmnd->device->host;
  1055. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1056. int return_status = SUCCESS;
  1057. u32 cmd_cookie;
  1058. int i;
  1059. printk(KERN_WARNING "qlogicpti%d: Aborting cmd for tgt[%d] lun[%d]\n",
  1060. qpti->qpti_id, (int)Cmnd->device->id, (int)Cmnd->device->lun);
  1061. qlogicpti_disable_irqs(qpti);
  1062. /* Find the 32-bit cookie we gave to the firmware for
  1063. * this command.
  1064. */
  1065. for (i = 0; i < QLOGICPTI_REQ_QUEUE_LEN + 1; i++)
  1066. if (qpti->cmd_slots[i] == Cmnd)
  1067. break;
  1068. cmd_cookie = i;
  1069. param[0] = MBOX_ABORT;
  1070. param[1] = (((u_short) Cmnd->device->id) << 8) | Cmnd->device->lun;
  1071. param[2] = cmd_cookie >> 16;
  1072. param[3] = cmd_cookie & 0xffff;
  1073. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1074. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1075. printk(KERN_EMERG "qlogicpti%d: scsi abort failure: %x\n",
  1076. qpti->qpti_id, param[0]);
  1077. return_status = FAILED;
  1078. }
  1079. qlogicpti_enable_irqs(qpti);
  1080. return return_status;
  1081. }
  1082. static int qlogicpti_reset(struct scsi_cmnd *Cmnd)
  1083. {
  1084. u_short param[6];
  1085. struct Scsi_Host *host = Cmnd->device->host;
  1086. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1087. int return_status = SUCCESS;
  1088. printk(KERN_WARNING "qlogicpti%d: Resetting SCSI bus!\n",
  1089. qpti->qpti_id);
  1090. qlogicpti_disable_irqs(qpti);
  1091. param[0] = MBOX_BUS_RESET;
  1092. param[1] = qpti->host_param.bus_reset_delay;
  1093. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1094. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1095. printk(KERN_EMERG "qlogicisp%d: scsi bus reset failure: %x\n",
  1096. qpti->qpti_id, param[0]);
  1097. return_status = FAILED;
  1098. }
  1099. qlogicpti_enable_irqs(qpti);
  1100. return return_status;
  1101. }
  1102. static struct scsi_host_template qpti_template = {
  1103. .module = THIS_MODULE,
  1104. .name = "qlogicpti",
  1105. .info = qlogicpti_info,
  1106. .queuecommand = qlogicpti_queuecommand,
  1107. .slave_configure = qlogicpti_slave_configure,
  1108. .eh_abort_handler = qlogicpti_abort,
  1109. .eh_bus_reset_handler = qlogicpti_reset,
  1110. .can_queue = QLOGICPTI_REQ_QUEUE_LEN,
  1111. .this_id = 7,
  1112. .sg_tablesize = QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN),
  1113. .cmd_per_lun = 1,
  1114. .use_clustering = ENABLE_CLUSTERING,
  1115. };
  1116. static int __devinit qpti_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1117. {
  1118. static int nqptis;
  1119. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1120. struct device_node *dp = dev->node;
  1121. struct scsi_host_template *tpnt = match->data;
  1122. struct Scsi_Host *host;
  1123. struct qlogicpti *qpti;
  1124. const char *fcode;
  1125. /* Sometimes Antares cards come up not completely
  1126. * setup, and we get a report of a zero IRQ.
  1127. */
  1128. if (sdev->irqs[0] == 0)
  1129. return -ENODEV;
  1130. host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti));
  1131. if (!host)
  1132. return -ENOMEM;
  1133. qpti = (struct qlogicpti *) host->hostdata;
  1134. host->max_id = MAX_TARGETS;
  1135. qpti->qhost = host;
  1136. qpti->sdev = sdev;
  1137. qpti->qpti_id = nqptis;
  1138. qpti->prom_node = sdev->prom_node;
  1139. strcpy(qpti->prom_name, sdev->ofdev.node->name);
  1140. qpti->is_pti = strcmp(qpti->prom_name, "QLGC,isp");
  1141. if (qpti_map_regs(qpti) < 0)
  1142. goto fail_unlink;
  1143. if (qpti_register_irq(qpti) < 0)
  1144. goto fail_unmap_regs;
  1145. qpti_get_scsi_id(qpti);
  1146. qpti_get_bursts(qpti);
  1147. qpti_get_clock(qpti);
  1148. /* Clear out scsi_cmnd array. */
  1149. memset(qpti->cmd_slots, 0, sizeof(qpti->cmd_slots));
  1150. if (qpti_map_queues(qpti) < 0)
  1151. goto fail_free_irq;
  1152. /* Load the firmware. */
  1153. if (qlogicpti_load_firmware(qpti))
  1154. goto fail_unmap_queues;
  1155. if (qpti->is_pti) {
  1156. /* Check the PTI status reg. */
  1157. if (qlogicpti_verify_tmon(qpti))
  1158. goto fail_unmap_queues;
  1159. }
  1160. /* Reset the ISP and init res/req queues. */
  1161. if (qlogicpti_reset_hardware(host))
  1162. goto fail_unmap_queues;
  1163. printk("(Firmware v%d.%d.%d)", qpti->fware_majrev,
  1164. qpti->fware_minrev, qpti->fware_micrev);
  1165. fcode = of_get_property(dp, "isp-fcode", NULL);
  1166. if (fcode && fcode[0])
  1167. printk("(FCode %s)", fcode);
  1168. if (of_find_property(dp, "differential", NULL) != NULL)
  1169. qpti->differential = 1;
  1170. printk("\nqlogicpti%d: [%s Wide, using %s interface]\n",
  1171. qpti->qpti_id,
  1172. (qpti->ultra ? "Ultra" : "Fast"),
  1173. (qpti->differential ? "differential" : "single ended"));
  1174. if (scsi_add_host(host, &dev->dev)) {
  1175. printk("qlogicpti%d: Failed scsi_add_host\n", qpti->qpti_id);
  1176. goto fail_unmap_queues;
  1177. }
  1178. dev_set_drvdata(&sdev->ofdev.dev, qpti);
  1179. qpti_chain_add(qpti);
  1180. scsi_scan_host(host);
  1181. nqptis++;
  1182. return 0;
  1183. fail_unmap_queues:
  1184. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  1185. sbus_free_consistent(qpti->sdev,
  1186. QSIZE(RES_QUEUE_LEN),
  1187. qpti->res_cpu, qpti->res_dvma);
  1188. sbus_free_consistent(qpti->sdev,
  1189. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  1190. qpti->req_cpu, qpti->req_dvma);
  1191. #undef QSIZE
  1192. fail_unmap_regs:
  1193. sbus_iounmap(qpti->qregs,
  1194. qpti->sdev->reg_addrs[0].reg_size);
  1195. if (qpti->is_pti)
  1196. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  1197. fail_free_irq:
  1198. free_irq(qpti->irq, qpti);
  1199. fail_unlink:
  1200. scsi_host_put(host);
  1201. return -ENODEV;
  1202. }
  1203. static int __devexit qpti_sbus_remove(struct of_device *dev)
  1204. {
  1205. struct qlogicpti *qpti = dev_get_drvdata(&dev->dev);
  1206. qpti_chain_del(qpti);
  1207. scsi_remove_host(qpti->qhost);
  1208. /* Shut up the card. */
  1209. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  1210. /* Free IRQ handler and unmap Qlogic,ISP and PTI status regs. */
  1211. free_irq(qpti->irq, qpti);
  1212. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  1213. sbus_free_consistent(qpti->sdev,
  1214. QSIZE(RES_QUEUE_LEN),
  1215. qpti->res_cpu, qpti->res_dvma);
  1216. sbus_free_consistent(qpti->sdev,
  1217. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  1218. qpti->req_cpu, qpti->req_dvma);
  1219. #undef QSIZE
  1220. sbus_iounmap(qpti->qregs, qpti->sdev->reg_addrs[0].reg_size);
  1221. if (qpti->is_pti)
  1222. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  1223. scsi_host_put(qpti->qhost);
  1224. return 0;
  1225. }
  1226. static struct of_device_id qpti_match[] = {
  1227. {
  1228. .name = "ptisp",
  1229. .data = &qpti_template,
  1230. },
  1231. {
  1232. .name = "PTI,ptisp",
  1233. .data = &qpti_template,
  1234. },
  1235. {
  1236. .name = "QLGC,isp",
  1237. .data = &qpti_template,
  1238. },
  1239. {
  1240. .name = "SUNW,isp",
  1241. .data = &qpti_template,
  1242. },
  1243. {},
  1244. };
  1245. MODULE_DEVICE_TABLE(of, qpti_match);
  1246. static struct of_platform_driver qpti_sbus_driver = {
  1247. .name = "qpti",
  1248. .match_table = qpti_match,
  1249. .probe = qpti_sbus_probe,
  1250. .remove = __devexit_p(qpti_sbus_remove),
  1251. };
  1252. static int __init qpti_init(void)
  1253. {
  1254. return of_register_driver(&qpti_sbus_driver, &sbus_bus_type);
  1255. }
  1256. static void __exit qpti_exit(void)
  1257. {
  1258. of_unregister_driver(&qpti_sbus_driver);
  1259. }
  1260. MODULE_DESCRIPTION("QlogicISP SBUS driver");
  1261. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  1262. MODULE_LICENSE("GPL");
  1263. MODULE_VERSION("2.0");
  1264. module_init(qpti_init);
  1265. module_exit(qpti_exit);