nmi.c 12 KB

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  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/sysdev.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/percpu.h>
  22. #include <linux/kprobes.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/smp.h>
  27. #include <asm/proto.h>
  28. #include <asm/timer.h>
  29. #include <asm/mce.h>
  30. #include <mach_traps.h>
  31. int unknown_nmi_panic;
  32. int nmi_watchdog_enabled;
  33. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  34. /* nmi_active:
  35. * >0: the lapic NMI watchdog is active, but can be disabled
  36. * <0: the lapic NMI watchdog has not been set up, and cannot
  37. * be enabled
  38. * 0: the lapic NMI watchdog is disabled, but can be enabled
  39. */
  40. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  41. EXPORT_SYMBOL(nmi_active);
  42. unsigned int nmi_watchdog = NMI_DEFAULT;
  43. EXPORT_SYMBOL(nmi_watchdog);
  44. static int panic_on_timeout;
  45. static unsigned int nmi_hz = HZ;
  46. static DEFINE_PER_CPU(short, wd_enabled);
  47. static int endflag __initdata;
  48. static inline unsigned int get_nmi_count(int cpu)
  49. {
  50. #ifdef CONFIG_X86_64
  51. return cpu_pda(cpu)->__nmi_count;
  52. #else
  53. return nmi_count(cpu);
  54. #endif
  55. }
  56. static inline int mce_in_progress(void)
  57. {
  58. #if defined(CONFIX_X86_64) && defined(CONFIG_X86_MCE)
  59. return atomic_read(&mce_entry) > 0;
  60. #endif
  61. return 0;
  62. }
  63. /*
  64. * Take the local apic timer and PIT/HPET into account. We don't
  65. * know which one is active, when we have highres/dyntick on
  66. */
  67. static inline unsigned int get_timer_irqs(int cpu)
  68. {
  69. #ifdef CONFIG_X86_64
  70. return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  71. #else
  72. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  73. per_cpu(irq_stat, cpu).irq0_irqs;
  74. #endif
  75. }
  76. #ifdef CONFIG_X86_64
  77. /* Run after command line and cpu_init init, but before all other checks */
  78. void nmi_watchdog_default(void)
  79. {
  80. if (nmi_watchdog != NMI_DEFAULT)
  81. return;
  82. nmi_watchdog = NMI_NONE;
  83. }
  84. #endif
  85. #ifdef CONFIG_SMP
  86. /*
  87. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  88. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  89. * CPUs during the test make them busy.
  90. */
  91. static __init void nmi_cpu_busy(void *data)
  92. {
  93. local_irq_enable_in_hardirq();
  94. /*
  95. * Intentionally don't use cpu_relax here. This is
  96. * to make sure that the performance counter really ticks,
  97. * even if there is a simulator or similar that catches the
  98. * pause instruction. On a real HT machine this is fine because
  99. * all other CPUs are busy with "useless" delay loops and don't
  100. * care if they get somewhat less cycles.
  101. */
  102. while (endflag == 0)
  103. mb();
  104. }
  105. #endif
  106. int __init check_nmi_watchdog(void)
  107. {
  108. unsigned int *prev_nmi_count;
  109. int cpu;
  110. if (nmi_watchdog == NMI_NONE || nmi_watchdog == NMI_DISABLED)
  111. return 0;
  112. if (!atomic_read(&nmi_active))
  113. return 0;
  114. prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
  115. if (!prev_nmi_count)
  116. goto error;
  117. printk(KERN_INFO "Testing NMI watchdog ... ");
  118. #ifdef CONFIG_SMP
  119. if (nmi_watchdog == NMI_LOCAL_APIC)
  120. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
  121. #endif
  122. for_each_possible_cpu(cpu)
  123. prev_nmi_count[cpu] = get_nmi_count(cpu);
  124. local_irq_enable();
  125. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  126. for_each_online_cpu(cpu) {
  127. if (!per_cpu(wd_enabled, cpu))
  128. continue;
  129. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) {
  130. printk(KERN_WARNING "WARNING: CPU#%d: NMI "
  131. "appears to be stuck (%d->%d)!\n",
  132. cpu,
  133. prev_nmi_count[cpu],
  134. get_nmi_count(cpu));
  135. per_cpu(wd_enabled, cpu) = 0;
  136. atomic_dec(&nmi_active);
  137. }
  138. }
  139. endflag = 1;
  140. if (!atomic_read(&nmi_active)) {
  141. kfree(prev_nmi_count);
  142. atomic_set(&nmi_active, -1);
  143. goto error;
  144. }
  145. printk("OK.\n");
  146. /*
  147. * now that we know it works we can reduce NMI frequency to
  148. * something more reasonable; makes a difference in some configs
  149. */
  150. if (nmi_watchdog == NMI_LOCAL_APIC)
  151. nmi_hz = lapic_adjust_nmi_hz(1);
  152. kfree(prev_nmi_count);
  153. return 0;
  154. error:
  155. #ifdef CONFIG_X86_32
  156. timer_ack = !cpu_has_tsc;
  157. #endif
  158. return -1;
  159. }
  160. static int __init setup_nmi_watchdog(char *str)
  161. {
  162. int nmi;
  163. if (!strncmp(str, "panic", 5)) {
  164. panic_on_timeout = 1;
  165. str = strchr(str, ',');
  166. if (!str)
  167. return 1;
  168. ++str;
  169. }
  170. get_option(&str, &nmi);
  171. if (nmi >= NMI_INVALID || nmi < NMI_NONE)
  172. return 0;
  173. nmi_watchdog = nmi;
  174. return 1;
  175. }
  176. __setup("nmi_watchdog=", setup_nmi_watchdog);
  177. /*
  178. * Suspend/resume support
  179. */
  180. #ifdef CONFIG_PM
  181. static int nmi_pm_active; /* nmi_active before suspend */
  182. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  183. {
  184. /* only CPU0 goes here, other CPUs should be offline */
  185. nmi_pm_active = atomic_read(&nmi_active);
  186. stop_apic_nmi_watchdog(NULL);
  187. BUG_ON(atomic_read(&nmi_active) != 0);
  188. return 0;
  189. }
  190. static int lapic_nmi_resume(struct sys_device *dev)
  191. {
  192. /* only CPU0 goes here, other CPUs should be offline */
  193. if (nmi_pm_active > 0) {
  194. setup_apic_nmi_watchdog(NULL);
  195. touch_nmi_watchdog();
  196. }
  197. return 0;
  198. }
  199. static struct sysdev_class nmi_sysclass = {
  200. .name = "lapic_nmi",
  201. .resume = lapic_nmi_resume,
  202. .suspend = lapic_nmi_suspend,
  203. };
  204. static struct sys_device device_lapic_nmi = {
  205. .id = 0,
  206. .cls = &nmi_sysclass,
  207. };
  208. static int __init init_lapic_nmi_sysfs(void)
  209. {
  210. int error;
  211. /*
  212. * should really be a BUG_ON but b/c this is an
  213. * init call, it just doesn't work. -dcz
  214. */
  215. if (nmi_watchdog != NMI_LOCAL_APIC)
  216. return 0;
  217. if (atomic_read(&nmi_active) < 0)
  218. return 0;
  219. error = sysdev_class_register(&nmi_sysclass);
  220. if (!error)
  221. error = sysdev_register(&device_lapic_nmi);
  222. return error;
  223. }
  224. /* must come after the local APIC's device_initcall() */
  225. late_initcall(init_lapic_nmi_sysfs);
  226. #endif /* CONFIG_PM */
  227. static void __acpi_nmi_enable(void *__unused)
  228. {
  229. apic_write_around(APIC_LVT0, APIC_DM_NMI);
  230. }
  231. /*
  232. * Enable timer based NMIs on all CPUs:
  233. */
  234. void acpi_nmi_enable(void)
  235. {
  236. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  237. on_each_cpu(__acpi_nmi_enable, NULL, 0, 1);
  238. }
  239. static void __acpi_nmi_disable(void *__unused)
  240. {
  241. apic_write_around(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  242. }
  243. /*
  244. * Disable timer based NMIs on all CPUs:
  245. */
  246. void acpi_nmi_disable(void)
  247. {
  248. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  249. on_each_cpu(__acpi_nmi_disable, NULL, 0, 1);
  250. }
  251. void setup_apic_nmi_watchdog(void *unused)
  252. {
  253. if (__get_cpu_var(wd_enabled))
  254. return;
  255. /* cheap hack to support suspend/resume */
  256. /* if cpu0 is not active neither should the other cpus */
  257. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  258. return;
  259. switch (nmi_watchdog) {
  260. case NMI_LOCAL_APIC:
  261. /* enable it before to avoid race with handler */
  262. __get_cpu_var(wd_enabled) = 1;
  263. if (lapic_watchdog_init(nmi_hz) < 0) {
  264. __get_cpu_var(wd_enabled) = 0;
  265. return;
  266. }
  267. /* FALL THROUGH */
  268. case NMI_IO_APIC:
  269. __get_cpu_var(wd_enabled) = 1;
  270. atomic_inc(&nmi_active);
  271. }
  272. }
  273. void stop_apic_nmi_watchdog(void *unused)
  274. {
  275. /* only support LOCAL and IO APICs for now */
  276. if (nmi_watchdog != NMI_LOCAL_APIC &&
  277. nmi_watchdog != NMI_IO_APIC)
  278. return;
  279. if (__get_cpu_var(wd_enabled) == 0)
  280. return;
  281. if (nmi_watchdog == NMI_LOCAL_APIC)
  282. lapic_watchdog_stop();
  283. __get_cpu_var(wd_enabled) = 0;
  284. atomic_dec(&nmi_active);
  285. }
  286. /*
  287. * the best way to detect whether a CPU has a 'hard lockup' problem
  288. * is to check it's local APIC timer IRQ counts. If they are not
  289. * changing then that CPU has some problem.
  290. *
  291. * as these watchdog NMI IRQs are generated on every CPU, we only
  292. * have to check the current processor.
  293. *
  294. * since NMIs don't listen to _any_ locks, we have to be extremely
  295. * careful not to rely on unsafe variables. The printk might lock
  296. * up though, so we have to break up any console locks first ...
  297. * [when there will be more tty-related locks, break them up here too!]
  298. */
  299. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  300. static DEFINE_PER_CPU(local_t, alert_counter);
  301. static DEFINE_PER_CPU(int, nmi_touch);
  302. void touch_nmi_watchdog(void)
  303. {
  304. if (nmi_watchdog > 0) {
  305. unsigned cpu;
  306. /*
  307. * Tell other CPUs to reset their alert counters. We cannot
  308. * do it ourselves because the alert count increase is not
  309. * atomic.
  310. */
  311. for_each_present_cpu(cpu) {
  312. if (per_cpu(nmi_touch, cpu) != 1)
  313. per_cpu(nmi_touch, cpu) = 1;
  314. }
  315. }
  316. /*
  317. * Tickle the softlockup detector too:
  318. */
  319. touch_softlockup_watchdog();
  320. }
  321. EXPORT_SYMBOL(touch_nmi_watchdog);
  322. notrace __kprobes int
  323. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  324. {
  325. /*
  326. * Since current_thread_info()-> is always on the stack, and we
  327. * always switch the stack NMI-atomically, it's safe to use
  328. * smp_processor_id().
  329. */
  330. unsigned int sum;
  331. int touched = 0;
  332. int cpu = smp_processor_id();
  333. int rc = 0;
  334. /* check for other users first */
  335. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  336. == NOTIFY_STOP) {
  337. rc = 1;
  338. touched = 1;
  339. }
  340. sum = get_timer_irqs(cpu);
  341. if (__get_cpu_var(nmi_touch)) {
  342. __get_cpu_var(nmi_touch) = 0;
  343. touched = 1;
  344. }
  345. if (cpu_isset(cpu, backtrace_mask)) {
  346. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  347. spin_lock(&lock);
  348. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  349. dump_stack();
  350. spin_unlock(&lock);
  351. cpu_clear(cpu, backtrace_mask);
  352. }
  353. /* Could check oops_in_progress here too, but it's safer not to */
  354. if (mce_in_progress())
  355. touched = 1;
  356. /* if the none of the timers isn't firing, this cpu isn't doing much */
  357. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  358. /*
  359. * Ayiee, looks like this CPU is stuck ...
  360. * wait a few IRQs (5 seconds) before doing the oops ...
  361. */
  362. local_inc(&__get_cpu_var(alert_counter));
  363. if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
  364. /*
  365. * die_nmi will return ONLY if NOTIFY_STOP happens..
  366. */
  367. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  368. regs, panic_on_timeout);
  369. } else {
  370. __get_cpu_var(last_irq_sum) = sum;
  371. local_set(&__get_cpu_var(alert_counter), 0);
  372. }
  373. /* see if the nmi watchdog went off */
  374. if (!__get_cpu_var(wd_enabled))
  375. return rc;
  376. switch (nmi_watchdog) {
  377. case NMI_LOCAL_APIC:
  378. rc |= lapic_wd_event(nmi_hz);
  379. break;
  380. case NMI_IO_APIC:
  381. /*
  382. * don't know how to accurately check for this.
  383. * just assume it was a watchdog timer interrupt
  384. * This matches the old behaviour.
  385. */
  386. rc = 1;
  387. break;
  388. }
  389. return rc;
  390. }
  391. #ifdef CONFIG_SYSCTL
  392. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  393. {
  394. unsigned char reason = get_nmi_reason();
  395. char buf[64];
  396. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  397. die_nmi(buf, regs, 1); /* Always panic here */
  398. return 0;
  399. }
  400. /*
  401. * proc handler for /proc/sys/kernel/nmi
  402. */
  403. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  404. void __user *buffer, size_t *length, loff_t *ppos)
  405. {
  406. int old_state;
  407. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  408. old_state = nmi_watchdog_enabled;
  409. proc_dointvec(table, write, file, buffer, length, ppos);
  410. if (!!old_state == !!nmi_watchdog_enabled)
  411. return 0;
  412. if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) {
  413. printk(KERN_WARNING
  414. "NMI watchdog is permanently disabled\n");
  415. return -EIO;
  416. }
  417. /* if nmi_watchdog is not set yet, then set it */
  418. nmi_watchdog_default();
  419. #ifdef CONFIG_X86_32
  420. if (nmi_watchdog == NMI_NONE) {
  421. if (lapic_watchdog_ok())
  422. nmi_watchdog = NMI_LOCAL_APIC;
  423. else
  424. nmi_watchdog = NMI_IO_APIC;
  425. }
  426. #endif
  427. if (nmi_watchdog == NMI_LOCAL_APIC) {
  428. if (nmi_watchdog_enabled)
  429. enable_lapic_nmi_watchdog();
  430. else
  431. disable_lapic_nmi_watchdog();
  432. } else {
  433. printk(KERN_WARNING
  434. "NMI watchdog doesn't know what hardware to touch\n");
  435. return -EIO;
  436. }
  437. return 0;
  438. }
  439. #endif /* CONFIG_SYSCTL */
  440. int do_nmi_callback(struct pt_regs *regs, int cpu)
  441. {
  442. #ifdef CONFIG_SYSCTL
  443. if (unknown_nmi_panic)
  444. return unknown_nmi_panic_callback(regs, cpu);
  445. #endif
  446. return 0;
  447. }
  448. void __trigger_all_cpu_backtrace(void)
  449. {
  450. int i;
  451. backtrace_mask = cpu_online_map;
  452. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  453. for (i = 0; i < 10 * 1000; i++) {
  454. if (cpus_empty(backtrace_mask))
  455. break;
  456. mdelay(1);
  457. }
  458. }