pwm-atmel-tcb.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445
  1. /*
  2. * Copyright (C) Overkiz SAS 2012
  3. *
  4. * Author: Boris BREZILLON <b.brezillon@overkiz.com>
  5. * License terms: GNU General Public License (GPL) version 2
  6. */
  7. #include <linux/module.h>
  8. #include <linux/init.h>
  9. #include <linux/clocksource.h>
  10. #include <linux/clockchips.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/clk.h>
  14. #include <linux/err.h>
  15. #include <linux/ioport.h>
  16. #include <linux/io.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/atmel_tc.h>
  19. #include <linux/pwm.h>
  20. #include <linux/of_device.h>
  21. #include <linux/slab.h>
  22. #define NPWM 6
  23. #define ATMEL_TC_ACMR_MASK (ATMEL_TC_ACPA | ATMEL_TC_ACPC | \
  24. ATMEL_TC_AEEVT | ATMEL_TC_ASWTRG)
  25. #define ATMEL_TC_BCMR_MASK (ATMEL_TC_BCPB | ATMEL_TC_BCPC | \
  26. ATMEL_TC_BEEVT | ATMEL_TC_BSWTRG)
  27. struct atmel_tcb_pwm_device {
  28. enum pwm_polarity polarity; /* PWM polarity */
  29. unsigned div; /* PWM clock divider */
  30. unsigned duty; /* PWM duty expressed in clk cycles */
  31. unsigned period; /* PWM period expressed in clk cycles */
  32. };
  33. struct atmel_tcb_pwm_chip {
  34. struct pwm_chip chip;
  35. spinlock_t lock;
  36. struct atmel_tc *tc;
  37. struct atmel_tcb_pwm_device *pwms[NPWM];
  38. };
  39. static inline struct atmel_tcb_pwm_chip *to_tcb_chip(struct pwm_chip *chip)
  40. {
  41. return container_of(chip, struct atmel_tcb_pwm_chip, chip);
  42. }
  43. static int atmel_tcb_pwm_set_polarity(struct pwm_chip *chip,
  44. struct pwm_device *pwm,
  45. enum pwm_polarity polarity)
  46. {
  47. struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
  48. tcbpwm->polarity = polarity;
  49. return 0;
  50. }
  51. static int atmel_tcb_pwm_request(struct pwm_chip *chip,
  52. struct pwm_device *pwm)
  53. {
  54. struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  55. struct atmel_tcb_pwm_device *tcbpwm;
  56. struct atmel_tc *tc = tcbpwmc->tc;
  57. void __iomem *regs = tc->regs;
  58. unsigned group = pwm->hwpwm / 2;
  59. unsigned index = pwm->hwpwm % 2;
  60. unsigned cmr;
  61. int ret;
  62. tcbpwm = devm_kzalloc(chip->dev, sizeof(*tcbpwm), GFP_KERNEL);
  63. if (!tcbpwm)
  64. return -ENOMEM;
  65. ret = clk_enable(tc->clk[group]);
  66. if (ret) {
  67. devm_kfree(chip->dev, tcbpwm);
  68. return ret;
  69. }
  70. pwm_set_chip_data(pwm, tcbpwm);
  71. tcbpwm->polarity = PWM_POLARITY_NORMAL;
  72. tcbpwm->duty = 0;
  73. tcbpwm->period = 0;
  74. tcbpwm->div = 0;
  75. spin_lock(&tcbpwmc->lock);
  76. cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
  77. /*
  78. * Get init config from Timer Counter registers if
  79. * Timer Counter is already configured as a PWM generator.
  80. */
  81. if (cmr & ATMEL_TC_WAVE) {
  82. if (index == 0)
  83. tcbpwm->duty =
  84. __raw_readl(regs + ATMEL_TC_REG(group, RA));
  85. else
  86. tcbpwm->duty =
  87. __raw_readl(regs + ATMEL_TC_REG(group, RB));
  88. tcbpwm->div = cmr & ATMEL_TC_TCCLKS;
  89. tcbpwm->period = __raw_readl(regs + ATMEL_TC_REG(group, RC));
  90. cmr &= (ATMEL_TC_TCCLKS | ATMEL_TC_ACMR_MASK |
  91. ATMEL_TC_BCMR_MASK);
  92. } else
  93. cmr = 0;
  94. cmr |= ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO | ATMEL_TC_EEVT_XC0;
  95. __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
  96. spin_unlock(&tcbpwmc->lock);
  97. tcbpwmc->pwms[pwm->hwpwm] = tcbpwm;
  98. return 0;
  99. }
  100. static void atmel_tcb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
  101. {
  102. struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  103. struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
  104. struct atmel_tc *tc = tcbpwmc->tc;
  105. clk_disable(tc->clk[pwm->hwpwm / 2]);
  106. tcbpwmc->pwms[pwm->hwpwm] = NULL;
  107. devm_kfree(chip->dev, tcbpwm);
  108. }
  109. static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  110. {
  111. struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  112. struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
  113. struct atmel_tc *tc = tcbpwmc->tc;
  114. void __iomem *regs = tc->regs;
  115. unsigned group = pwm->hwpwm / 2;
  116. unsigned index = pwm->hwpwm % 2;
  117. unsigned cmr;
  118. enum pwm_polarity polarity = tcbpwm->polarity;
  119. /*
  120. * If duty is 0 the timer will be stopped and we have to
  121. * configure the output correctly on software trigger:
  122. * - set output to high if PWM_POLARITY_INVERSED
  123. * - set output to low if PWM_POLARITY_NORMAL
  124. *
  125. * This is why we're reverting polarity in this case.
  126. */
  127. if (tcbpwm->duty == 0)
  128. polarity = !polarity;
  129. spin_lock(&tcbpwmc->lock);
  130. cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
  131. /* flush old setting and set the new one */
  132. if (index == 0) {
  133. cmr &= ~ATMEL_TC_ACMR_MASK;
  134. if (polarity == PWM_POLARITY_INVERSED)
  135. cmr |= ATMEL_TC_ASWTRG_CLEAR;
  136. else
  137. cmr |= ATMEL_TC_ASWTRG_SET;
  138. } else {
  139. cmr &= ~ATMEL_TC_BCMR_MASK;
  140. if (polarity == PWM_POLARITY_INVERSED)
  141. cmr |= ATMEL_TC_BSWTRG_CLEAR;
  142. else
  143. cmr |= ATMEL_TC_BSWTRG_SET;
  144. }
  145. __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
  146. /*
  147. * Use software trigger to apply the new setting.
  148. * If both PWM devices in this group are disabled we stop the clock.
  149. */
  150. if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC)))
  151. __raw_writel(ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS,
  152. regs + ATMEL_TC_REG(group, CCR));
  153. else
  154. __raw_writel(ATMEL_TC_SWTRG, regs +
  155. ATMEL_TC_REG(group, CCR));
  156. spin_unlock(&tcbpwmc->lock);
  157. }
  158. static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  159. {
  160. struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  161. struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
  162. struct atmel_tc *tc = tcbpwmc->tc;
  163. void __iomem *regs = tc->regs;
  164. unsigned group = pwm->hwpwm / 2;
  165. unsigned index = pwm->hwpwm % 2;
  166. u32 cmr;
  167. enum pwm_polarity polarity = tcbpwm->polarity;
  168. /*
  169. * If duty is 0 the timer will be stopped and we have to
  170. * configure the output correctly on software trigger:
  171. * - set output to high if PWM_POLARITY_INVERSED
  172. * - set output to low if PWM_POLARITY_NORMAL
  173. *
  174. * This is why we're reverting polarity in this case.
  175. */
  176. if (tcbpwm->duty == 0)
  177. polarity = !polarity;
  178. spin_lock(&tcbpwmc->lock);
  179. cmr = __raw_readl(regs + ATMEL_TC_REG(group, CMR));
  180. /* flush old setting and set the new one */
  181. cmr &= ~ATMEL_TC_TCCLKS;
  182. if (index == 0) {
  183. cmr &= ~ATMEL_TC_ACMR_MASK;
  184. /* Set CMR flags according to given polarity */
  185. if (polarity == PWM_POLARITY_INVERSED)
  186. cmr |= ATMEL_TC_ASWTRG_CLEAR;
  187. else
  188. cmr |= ATMEL_TC_ASWTRG_SET;
  189. } else {
  190. cmr &= ~ATMEL_TC_BCMR_MASK;
  191. if (polarity == PWM_POLARITY_INVERSED)
  192. cmr |= ATMEL_TC_BSWTRG_CLEAR;
  193. else
  194. cmr |= ATMEL_TC_BSWTRG_SET;
  195. }
  196. /*
  197. * If duty is 0 or equal to period there's no need to register
  198. * a specific action on RA/RB and RC compare.
  199. * The output will be configured on software trigger and keep
  200. * this config till next config call.
  201. */
  202. if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) {
  203. if (index == 0) {
  204. if (polarity == PWM_POLARITY_INVERSED)
  205. cmr |= ATMEL_TC_ACPA_SET | ATMEL_TC_ACPC_CLEAR;
  206. else
  207. cmr |= ATMEL_TC_ACPA_CLEAR | ATMEL_TC_ACPC_SET;
  208. } else {
  209. if (polarity == PWM_POLARITY_INVERSED)
  210. cmr |= ATMEL_TC_BCPB_SET | ATMEL_TC_BCPC_CLEAR;
  211. else
  212. cmr |= ATMEL_TC_BCPB_CLEAR | ATMEL_TC_BCPC_SET;
  213. }
  214. }
  215. __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR));
  216. if (index == 0)
  217. __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA));
  218. else
  219. __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RB));
  220. __raw_writel(tcbpwm->period, regs + ATMEL_TC_REG(group, RC));
  221. /* Use software trigger to apply the new setting */
  222. __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
  223. regs + ATMEL_TC_REG(group, CCR));
  224. spin_unlock(&tcbpwmc->lock);
  225. return 0;
  226. }
  227. static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  228. int duty_ns, int period_ns)
  229. {
  230. struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  231. struct atmel_tcb_pwm_device *tcbpwm = pwm_get_chip_data(pwm);
  232. unsigned group = pwm->hwpwm / 2;
  233. unsigned index = pwm->hwpwm % 2;
  234. struct atmel_tcb_pwm_device *atcbpwm = NULL;
  235. struct atmel_tc *tc = tcbpwmc->tc;
  236. int i;
  237. int slowclk = 0;
  238. unsigned period;
  239. unsigned duty;
  240. unsigned rate = clk_get_rate(tc->clk[group]);
  241. unsigned long long min;
  242. unsigned long long max;
  243. /*
  244. * Find best clk divisor:
  245. * the smallest divisor which can fulfill the period_ns requirements.
  246. */
  247. for (i = 0; i < 5; ++i) {
  248. if (atmel_tc_divisors[i] == 0) {
  249. slowclk = i;
  250. continue;
  251. }
  252. min = div_u64((u64)NSEC_PER_SEC * atmel_tc_divisors[i], rate);
  253. max = min << tc->tcb_config->counter_width;
  254. if (max >= period_ns)
  255. break;
  256. }
  257. /*
  258. * If none of the divisor are small enough to represent period_ns
  259. * take slow clock (32KHz).
  260. */
  261. if (i == 5) {
  262. i = slowclk;
  263. rate = 32768;
  264. min = div_u64(NSEC_PER_SEC, rate);
  265. max = min << 16;
  266. /* If period is too big return ERANGE error */
  267. if (max < period_ns)
  268. return -ERANGE;
  269. }
  270. duty = div_u64(duty_ns, min);
  271. period = div_u64(period_ns, min);
  272. if (index == 0)
  273. atcbpwm = tcbpwmc->pwms[pwm->hwpwm + 1];
  274. else
  275. atcbpwm = tcbpwmc->pwms[pwm->hwpwm - 1];
  276. /*
  277. * PWM devices provided by TCB driver are grouped by 2:
  278. * - group 0: PWM 0 & 1
  279. * - group 1: PWM 2 & 3
  280. * - group 2: PWM 4 & 5
  281. *
  282. * PWM devices in a given group must be configured with the
  283. * same period_ns.
  284. *
  285. * We're checking the period value of the second PWM device
  286. * in this group before applying the new config.
  287. */
  288. if ((atcbpwm && atcbpwm->duty > 0 &&
  289. atcbpwm->duty != atcbpwm->period) &&
  290. (atcbpwm->div != i || atcbpwm->period != period)) {
  291. dev_err(chip->dev,
  292. "failed to configure period_ns: PWM group already configured with a different value\n");
  293. return -EINVAL;
  294. }
  295. tcbpwm->period = period;
  296. tcbpwm->div = i;
  297. tcbpwm->duty = duty;
  298. /* If the PWM is enabled, call enable to apply the new conf */
  299. if (test_bit(PWMF_ENABLED, &pwm->flags))
  300. atmel_tcb_pwm_enable(chip, pwm);
  301. return 0;
  302. }
  303. static const struct pwm_ops atmel_tcb_pwm_ops = {
  304. .request = atmel_tcb_pwm_request,
  305. .free = atmel_tcb_pwm_free,
  306. .config = atmel_tcb_pwm_config,
  307. .set_polarity = atmel_tcb_pwm_set_polarity,
  308. .enable = atmel_tcb_pwm_enable,
  309. .disable = atmel_tcb_pwm_disable,
  310. };
  311. static int atmel_tcb_pwm_probe(struct platform_device *pdev)
  312. {
  313. struct atmel_tcb_pwm_chip *tcbpwm;
  314. struct device_node *np = pdev->dev.of_node;
  315. struct atmel_tc *tc;
  316. int err;
  317. int tcblock;
  318. err = of_property_read_u32(np, "tc-block", &tcblock);
  319. if (err < 0) {
  320. dev_err(&pdev->dev,
  321. "failed to get Timer Counter Block number from device tree (error: %d)\n",
  322. err);
  323. return err;
  324. }
  325. tc = atmel_tc_alloc(tcblock, "tcb-pwm");
  326. if (tc == NULL) {
  327. dev_err(&pdev->dev, "failed to allocate Timer Counter Block\n");
  328. return -ENOMEM;
  329. }
  330. tcbpwm = devm_kzalloc(&pdev->dev, sizeof(*tcbpwm), GFP_KERNEL);
  331. if (tcbpwm == NULL) {
  332. atmel_tc_free(tc);
  333. dev_err(&pdev->dev, "failed to allocate memory\n");
  334. return -ENOMEM;
  335. }
  336. tcbpwm->chip.dev = &pdev->dev;
  337. tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
  338. tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
  339. tcbpwm->chip.of_pwm_n_cells = 3;
  340. tcbpwm->chip.base = -1;
  341. tcbpwm->chip.npwm = NPWM;
  342. tcbpwm->tc = tc;
  343. spin_lock_init(&tcbpwm->lock);
  344. err = pwmchip_add(&tcbpwm->chip);
  345. if (err < 0) {
  346. atmel_tc_free(tc);
  347. return err;
  348. }
  349. platform_set_drvdata(pdev, tcbpwm);
  350. return 0;
  351. }
  352. static int atmel_tcb_pwm_remove(struct platform_device *pdev)
  353. {
  354. struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
  355. int err;
  356. err = pwmchip_remove(&tcbpwm->chip);
  357. if (err < 0)
  358. return err;
  359. atmel_tc_free(tcbpwm->tc);
  360. return 0;
  361. }
  362. static const struct of_device_id atmel_tcb_pwm_dt_ids[] = {
  363. { .compatible = "atmel,tcb-pwm", },
  364. { /* sentinel */ }
  365. };
  366. MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);
  367. static struct platform_driver atmel_tcb_pwm_driver = {
  368. .driver = {
  369. .name = "atmel-tcb-pwm",
  370. .of_match_table = atmel_tcb_pwm_dt_ids,
  371. },
  372. .probe = atmel_tcb_pwm_probe,
  373. .remove = atmel_tcb_pwm_remove,
  374. };
  375. module_platform_driver(atmel_tcb_pwm_driver);
  376. MODULE_AUTHOR("Boris BREZILLON <b.brezillon@overkiz.com>");
  377. MODULE_DESCRIPTION("Atmel Timer Counter Pulse Width Modulation Driver");
  378. MODULE_LICENSE("GPL v2");