Kconfig 10 KB

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  1. #
  2. # Processor families
  3. #
  4. config CPU_SH2
  5. bool
  6. config CPU_SH2A
  7. bool
  8. select CPU_SH2
  9. config CPU_SH3
  10. bool
  11. select CPU_HAS_INTEVT
  12. select CPU_HAS_SR_RB
  13. config CPU_SH4
  14. bool
  15. select CPU_HAS_INTEVT
  16. select CPU_HAS_SR_RB
  17. select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
  18. config CPU_SH4A
  19. bool
  20. select CPU_SH4
  21. config CPU_SH4AL_DSP
  22. bool
  23. select CPU_SH4A
  24. select CPU_HAS_DSP
  25. config CPU_SUBTYPE_ST40
  26. bool
  27. select CPU_SH4
  28. config CPU_SHX2
  29. bool
  30. config CPU_SHX3
  31. bool
  32. choice
  33. prompt "Processor sub-type selection"
  34. #
  35. # Processor subtypes
  36. #
  37. # SH-2 Processor Support
  38. config CPU_SUBTYPE_SH7619
  39. bool "Support SH7619 processor"
  40. select CPU_SH2
  41. select CPU_HAS_IPR_IRQ
  42. # SH-2A Processor Support
  43. config CPU_SUBTYPE_SH7206
  44. bool "Support SH7206 processor"
  45. select CPU_SH2A
  46. select CPU_HAS_IPR_IRQ
  47. # SH-3 Processor Support
  48. config CPU_SUBTYPE_SH7705
  49. bool "Support SH7705 processor"
  50. select CPU_SH3
  51. select CPU_HAS_INTC_IRQ
  52. config CPU_SUBTYPE_SH7706
  53. bool "Support SH7706 processor"
  54. select CPU_SH3
  55. select CPU_HAS_INTC_IRQ
  56. help
  57. Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
  58. config CPU_SUBTYPE_SH7707
  59. bool "Support SH7707 processor"
  60. select CPU_SH3
  61. select CPU_HAS_INTC_IRQ
  62. help
  63. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
  64. config CPU_SUBTYPE_SH7708
  65. bool "Support SH7708 processor"
  66. select CPU_SH3
  67. select CPU_HAS_INTC_IRQ
  68. help
  69. Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
  70. if you have a 100 Mhz SH-3 HD6417708R CPU.
  71. config CPU_SUBTYPE_SH7709
  72. bool "Support SH7709 processor"
  73. select CPU_SH3
  74. select CPU_HAS_INTC_IRQ
  75. help
  76. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
  77. config CPU_SUBTYPE_SH7710
  78. bool "Support SH7710 processor"
  79. select CPU_SH3
  80. select CPU_HAS_INTC_IRQ
  81. select CPU_HAS_DSP
  82. help
  83. Select SH7710 if you have a SH3-DSP SH7710 CPU.
  84. config CPU_SUBTYPE_SH7712
  85. bool "Support SH7712 processor"
  86. select CPU_SH3
  87. select CPU_HAS_INTC_IRQ
  88. select CPU_HAS_DSP
  89. help
  90. Select SH7712 if you have a SH3-DSP SH7712 CPU.
  91. config CPU_SUBTYPE_SH7720
  92. bool "Support SH7720 processor"
  93. select CPU_SH3
  94. select CPU_HAS_INTC_IRQ
  95. select CPU_HAS_DSP
  96. help
  97. Select SH7720 if you have a SH3-DSP SH7720 CPU.
  98. # SH-4 Processor Support
  99. config CPU_SUBTYPE_SH7750
  100. bool "Support SH7750 processor"
  101. select CPU_SH4
  102. select CPU_HAS_INTC_IRQ
  103. help
  104. Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
  105. config CPU_SUBTYPE_SH7091
  106. bool "Support SH7091 processor"
  107. select CPU_SH4
  108. select CPU_HAS_INTC_IRQ
  109. help
  110. Select SH7091 if you have an SH-4 based Sega device (such as
  111. the Dreamcast, Naomi, and Naomi 2).
  112. config CPU_SUBTYPE_SH7750R
  113. bool "Support SH7750R processor"
  114. select CPU_SH4
  115. select CPU_HAS_INTC_IRQ
  116. config CPU_SUBTYPE_SH7750S
  117. bool "Support SH7750S processor"
  118. select CPU_SH4
  119. select CPU_HAS_INTC_IRQ
  120. config CPU_SUBTYPE_SH7751
  121. bool "Support SH7751 processor"
  122. select CPU_SH4
  123. select CPU_HAS_INTC_IRQ
  124. help
  125. Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
  126. or if you have a HD6417751R CPU.
  127. config CPU_SUBTYPE_SH7751R
  128. bool "Support SH7751R processor"
  129. select CPU_SH4
  130. select CPU_HAS_INTC_IRQ
  131. config CPU_SUBTYPE_SH7760
  132. bool "Support SH7760 processor"
  133. select CPU_SH4
  134. select CPU_HAS_INTC_IRQ
  135. config CPU_SUBTYPE_SH4_202
  136. bool "Support SH4-202 processor"
  137. select CPU_SH4
  138. # ST40 Processor Support
  139. config CPU_SUBTYPE_ST40STB1
  140. bool "Support ST40STB1/ST40RA processors"
  141. select CPU_SUBTYPE_ST40
  142. help
  143. Select ST40STB1 if you have a ST40RA CPU.
  144. This was previously called the ST40STB1, hence the option name.
  145. config CPU_SUBTYPE_ST40GX1
  146. bool "Support ST40GX1 processor"
  147. select CPU_SUBTYPE_ST40
  148. help
  149. Select ST40GX1 if you have a ST40GX1 CPU.
  150. # SH-4A Processor Support
  151. config CPU_SUBTYPE_SH7770
  152. bool "Support SH7770 processor"
  153. select CPU_SH4A
  154. config CPU_SUBTYPE_SH7780
  155. bool "Support SH7780 processor"
  156. select CPU_SH4A
  157. select CPU_HAS_INTC_IRQ
  158. config CPU_SUBTYPE_SH7785
  159. bool "Support SH7785 processor"
  160. select CPU_SH4A
  161. select CPU_SHX2
  162. select CPU_HAS_INTC_IRQ
  163. config CPU_SUBTYPE_SHX3
  164. bool "Support SH-X3 processor"
  165. select CPU_SH4A
  166. select CPU_SHX3
  167. select CPU_HAS_INTC_IRQ
  168. select ARCH_SPARSEMEM_ENABLE
  169. select SYS_SUPPORTS_NUMA
  170. # SH4AL-DSP Processor Support
  171. config CPU_SUBTYPE_SH7343
  172. bool "Support SH7343 processor"
  173. select CPU_SH4AL_DSP
  174. config CPU_SUBTYPE_SH7722
  175. bool "Support SH7722 processor"
  176. select CPU_SH4AL_DSP
  177. select CPU_SHX2
  178. select CPU_HAS_INTC_IRQ
  179. select ARCH_SPARSEMEM_ENABLE
  180. select SYS_SUPPORTS_NUMA
  181. endchoice
  182. menu "Memory management options"
  183. config QUICKLIST
  184. def_bool y
  185. config MMU
  186. bool "Support for memory management hardware"
  187. depends on !CPU_SH2
  188. default y
  189. help
  190. Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
  191. boot on these systems, this option must not be set.
  192. On other systems (such as the SH-3 and 4) where an MMU exists,
  193. turning this off will boot the kernel on these machines with the
  194. MMU implicitly switched off.
  195. config PAGE_OFFSET
  196. hex
  197. default "0x80000000" if MMU
  198. default "0x00000000"
  199. config MEMORY_START
  200. hex "Physical memory start address"
  201. default "0x08000000"
  202. ---help---
  203. Computers built with Hitachi SuperH processors always
  204. map the ROM starting at address zero. But the processor
  205. does not specify the range that RAM takes.
  206. The physical memory (RAM) start address will be automatically
  207. set to 08000000. Other platforms, such as the Solution Engine
  208. boards typically map RAM at 0C000000.
  209. Tweak this only when porting to a new machine which does not
  210. already have a defconfig. Changing it from the known correct
  211. value on any of the known systems will only lead to disaster.
  212. config MEMORY_SIZE
  213. hex "Physical memory size"
  214. default "0x00400000"
  215. help
  216. This sets the default memory size assumed by your SH kernel. It can
  217. be overridden as normal by the 'mem=' argument on the kernel command
  218. line. If unsure, consult your board specifications or just leave it
  219. as 0x00400000 which was the default value before this became
  220. configurable.
  221. config 32BIT
  222. bool "Support 32-bit physical addressing through PMB"
  223. depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
  224. default y
  225. help
  226. If you say Y here, physical addressing will be extended to
  227. 32-bits through the SH-4A PMB. If this is not set, legacy
  228. 29-bit physical addressing will be used.
  229. config X2TLB
  230. bool "Enable extended TLB mode"
  231. depends on CPU_SHX2 && MMU && EXPERIMENTAL
  232. help
  233. Selecting this option will enable the extended mode of the SH-X2
  234. TLB. For legacy SH-X behaviour and interoperability, say N. For
  235. all of the fun new features and a willingless to submit bug reports,
  236. say Y.
  237. config VSYSCALL
  238. bool "Support vsyscall page"
  239. depends on MMU
  240. default y
  241. help
  242. This will enable support for the kernel mapping a vDSO page
  243. in process space, and subsequently handing down the entry point
  244. to the libc through the ELF auxiliary vector.
  245. From the kernel side this is used for the signal trampoline.
  246. For systems with an MMU that can afford to give up a page,
  247. (the default value) say Y.
  248. config NUMA
  249. bool "Non Uniform Memory Access (NUMA) Support"
  250. depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
  251. default n
  252. help
  253. Some SH systems have many various memories scattered around
  254. the address space, each with varying latencies. This enables
  255. support for these blocks by binding them to nodes and allowing
  256. memory policies to be used for prioritizing and controlling
  257. allocation behaviour.
  258. config NODES_SHIFT
  259. int
  260. default "3" if CPU_SUBTYPE_SHX3
  261. default "1"
  262. depends on NEED_MULTIPLE_NODES
  263. config ARCH_FLATMEM_ENABLE
  264. def_bool y
  265. depends on !NUMA
  266. config ARCH_SPARSEMEM_ENABLE
  267. def_bool y
  268. select SPARSEMEM_STATIC
  269. config ARCH_SPARSEMEM_DEFAULT
  270. def_bool y
  271. config MAX_ACTIVE_REGIONS
  272. int
  273. default "6" if (CPU_SUBTYPE_SHX3 && SPARSEMEM)
  274. default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM)
  275. default "1"
  276. config ARCH_POPULATES_NODE_MAP
  277. def_bool y
  278. config ARCH_SELECT_MEMORY_MODEL
  279. def_bool y
  280. config ARCH_ENABLE_MEMORY_HOTPLUG
  281. def_bool y
  282. depends on SPARSEMEM
  283. config ARCH_MEMORY_PROBE
  284. def_bool y
  285. depends on MEMORY_HOTPLUG
  286. choice
  287. prompt "Kernel page size"
  288. default PAGE_SIZE_4KB
  289. config PAGE_SIZE_4KB
  290. bool "4kB"
  291. help
  292. This is the default page size used by all SuperH CPUs.
  293. config PAGE_SIZE_8KB
  294. bool "8kB"
  295. depends on EXPERIMENTAL && X2TLB
  296. help
  297. This enables 8kB pages as supported by SH-X2 and later MMUs.
  298. config PAGE_SIZE_64KB
  299. bool "64kB"
  300. depends on EXPERIMENTAL && CPU_SH4
  301. help
  302. This enables support for 64kB pages, possible on all SH-4
  303. CPUs and later. Highly experimental, not recommended.
  304. endchoice
  305. choice
  306. prompt "HugeTLB page size"
  307. depends on HUGETLB_PAGE && CPU_SH4 && MMU
  308. default HUGETLB_PAGE_SIZE_64K
  309. config HUGETLB_PAGE_SIZE_64K
  310. bool "64kB"
  311. config HUGETLB_PAGE_SIZE_256K
  312. bool "256kB"
  313. depends on X2TLB
  314. config HUGETLB_PAGE_SIZE_1MB
  315. bool "1MB"
  316. config HUGETLB_PAGE_SIZE_4MB
  317. bool "4MB"
  318. depends on X2TLB
  319. config HUGETLB_PAGE_SIZE_64MB
  320. bool "64MB"
  321. depends on X2TLB
  322. endchoice
  323. source "mm/Kconfig"
  324. endmenu
  325. menu "Cache configuration"
  326. config SH7705_CACHE_32KB
  327. bool "Enable 32KB cache size for SH7705"
  328. depends on CPU_SUBTYPE_SH7705
  329. default y
  330. config SH_DIRECT_MAPPED
  331. bool "Use direct-mapped caching"
  332. default n
  333. help
  334. Selecting this option will configure the caches to be direct-mapped,
  335. even if the cache supports a 2 or 4-way mode. This is useful primarily
  336. for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
  337. SH4-202, SH4-501, etc.)
  338. Turn this option off for platforms that do not have a direct-mapped
  339. cache, and you have no need to run the caches in such a configuration.
  340. choice
  341. prompt "Cache mode"
  342. default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4
  343. default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
  344. config CACHE_WRITEBACK
  345. bool "Write-back"
  346. depends on CPU_SH2A || CPU_SH3 || CPU_SH4
  347. config CACHE_WRITETHROUGH
  348. bool "Write-through"
  349. help
  350. Selecting this option will configure the caches in write-through
  351. mode, as opposed to the default write-back configuration.
  352. Since there's sill some aliasing issues on SH-4, this option will
  353. unfortunately still require the majority of flushing functions to
  354. be implemented to deal with aliasing.
  355. If unsure, say N.
  356. config CACHE_OFF
  357. bool "Off"
  358. endchoice
  359. endmenu