fc2580.c 12 KB

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  1. /*
  2. * FCI FC2580 silicon tuner driver
  3. *
  4. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "fc2580_priv.h"
  21. /* Max transfer size done by I2C transfer functions */
  22. #define MAX_XFER_SIZE 64
  23. /*
  24. * TODO:
  25. * I2C write and read works only for one single register. Multiple registers
  26. * could not be accessed using normal register address auto-increment.
  27. * There could be (very likely) register to change that behavior....
  28. *
  29. * Due to that limitation functions:
  30. * fc2580_wr_regs()
  31. * fc2580_rd_regs()
  32. * could not be used for accessing more than one register at once.
  33. *
  34. * TODO:
  35. * Currently it blind writes bunch of static registers from the
  36. * fc2580_freq_regs_lut[] when fc2580_set_params() is called. Add some
  37. * logic to reduce unneeded register writes.
  38. */
  39. /* write multiple registers */
  40. static int fc2580_wr_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
  41. {
  42. int ret;
  43. u8 buf[MAX_XFER_SIZE];
  44. struct i2c_msg msg[1] = {
  45. {
  46. .addr = priv->cfg->i2c_addr,
  47. .flags = 0,
  48. .len = 1 + len,
  49. .buf = buf,
  50. }
  51. };
  52. if (1 + len > sizeof(buf)) {
  53. dev_warn(&priv->i2c->dev,
  54. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  55. KBUILD_MODNAME, reg, len);
  56. return -EINVAL;
  57. }
  58. buf[0] = reg;
  59. memcpy(&buf[1], val, len);
  60. ret = i2c_transfer(priv->i2c, msg, 1);
  61. if (ret == 1) {
  62. ret = 0;
  63. } else {
  64. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  65. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  66. ret = -EREMOTEIO;
  67. }
  68. return ret;
  69. }
  70. /* read multiple registers */
  71. static int fc2580_rd_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
  72. {
  73. int ret;
  74. u8 buf[MAX_XFER_SIZE];
  75. struct i2c_msg msg[2] = {
  76. {
  77. .addr = priv->cfg->i2c_addr,
  78. .flags = 0,
  79. .len = 1,
  80. .buf = &reg,
  81. }, {
  82. .addr = priv->cfg->i2c_addr,
  83. .flags = I2C_M_RD,
  84. .len = len,
  85. .buf = buf,
  86. }
  87. };
  88. if (len > sizeof(buf)) {
  89. dev_warn(&priv->i2c->dev,
  90. "%s: i2c rd reg=%04x: len=%d is too big!\n",
  91. KBUILD_MODNAME, reg, len);
  92. return -EINVAL;
  93. }
  94. ret = i2c_transfer(priv->i2c, msg, 2);
  95. if (ret == 2) {
  96. memcpy(val, buf, len);
  97. ret = 0;
  98. } else {
  99. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  100. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  101. ret = -EREMOTEIO;
  102. }
  103. return ret;
  104. }
  105. /* write single register */
  106. static int fc2580_wr_reg(struct fc2580_priv *priv, u8 reg, u8 val)
  107. {
  108. return fc2580_wr_regs(priv, reg, &val, 1);
  109. }
  110. /* read single register */
  111. static int fc2580_rd_reg(struct fc2580_priv *priv, u8 reg, u8 *val)
  112. {
  113. return fc2580_rd_regs(priv, reg, val, 1);
  114. }
  115. /* write single register conditionally only when value differs from 0xff
  116. * XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
  117. * values. Do not use for the other purposes. */
  118. static int fc2580_wr_reg_ff(struct fc2580_priv *priv, u8 reg, u8 val)
  119. {
  120. if (val == 0xff)
  121. return 0;
  122. else
  123. return fc2580_wr_regs(priv, reg, &val, 1);
  124. }
  125. static int fc2580_set_params(struct dvb_frontend *fe)
  126. {
  127. struct fc2580_priv *priv = fe->tuner_priv;
  128. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  129. int ret = 0, i;
  130. unsigned int r_val, n_val, k_val, k_val_reg, f_ref;
  131. u8 tmp_val, r18_val;
  132. u64 f_vco;
  133. /*
  134. * Fractional-N synthesizer/PLL.
  135. * Most likely all those PLL calculations are not correct. I am not
  136. * sure, but it looks like it is divider based Fractional-N synthesizer.
  137. * There is divider for reference clock too?
  138. * Anyhow, synthesizer calculation results seems to be quite correct.
  139. */
  140. dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \
  141. "bandwidth_hz=%d\n", __func__,
  142. c->delivery_system, c->frequency, c->bandwidth_hz);
  143. if (fe->ops.i2c_gate_ctrl)
  144. fe->ops.i2c_gate_ctrl(fe, 1);
  145. /* PLL */
  146. for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
  147. if (c->frequency <= fc2580_pll_lut[i].freq)
  148. break;
  149. }
  150. if (i == ARRAY_SIZE(fc2580_pll_lut))
  151. goto err;
  152. f_vco = c->frequency;
  153. f_vco *= fc2580_pll_lut[i].div;
  154. if (f_vco >= 2600000000UL)
  155. tmp_val = 0x0e | fc2580_pll_lut[i].band;
  156. else
  157. tmp_val = 0x06 | fc2580_pll_lut[i].band;
  158. ret = fc2580_wr_reg(priv, 0x02, tmp_val);
  159. if (ret < 0)
  160. goto err;
  161. if (f_vco >= 2UL * 76 * priv->cfg->clock) {
  162. r_val = 1;
  163. r18_val = 0x00;
  164. } else if (f_vco >= 1UL * 76 * priv->cfg->clock) {
  165. r_val = 2;
  166. r18_val = 0x10;
  167. } else {
  168. r_val = 4;
  169. r18_val = 0x20;
  170. }
  171. f_ref = 2UL * priv->cfg->clock / r_val;
  172. n_val = div_u64_rem(f_vco, f_ref, &k_val);
  173. k_val_reg = 1UL * k_val * (1 << 20) / f_ref;
  174. ret = fc2580_wr_reg(priv, 0x18, r18_val | ((k_val_reg >> 16) & 0xff));
  175. if (ret < 0)
  176. goto err;
  177. ret = fc2580_wr_reg(priv, 0x1a, (k_val_reg >> 8) & 0xff);
  178. if (ret < 0)
  179. goto err;
  180. ret = fc2580_wr_reg(priv, 0x1b, (k_val_reg >> 0) & 0xff);
  181. if (ret < 0)
  182. goto err;
  183. ret = fc2580_wr_reg(priv, 0x1c, n_val);
  184. if (ret < 0)
  185. goto err;
  186. if (priv->cfg->clock >= 28000000) {
  187. ret = fc2580_wr_reg(priv, 0x4b, 0x22);
  188. if (ret < 0)
  189. goto err;
  190. }
  191. if (fc2580_pll_lut[i].band == 0x00) {
  192. if (c->frequency <= 794000000)
  193. tmp_val = 0x9f;
  194. else
  195. tmp_val = 0x8f;
  196. ret = fc2580_wr_reg(priv, 0x2d, tmp_val);
  197. if (ret < 0)
  198. goto err;
  199. }
  200. /* registers */
  201. for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
  202. if (c->frequency <= fc2580_freq_regs_lut[i].freq)
  203. break;
  204. }
  205. if (i == ARRAY_SIZE(fc2580_freq_regs_lut))
  206. goto err;
  207. ret = fc2580_wr_reg_ff(priv, 0x25, fc2580_freq_regs_lut[i].r25_val);
  208. if (ret < 0)
  209. goto err;
  210. ret = fc2580_wr_reg_ff(priv, 0x27, fc2580_freq_regs_lut[i].r27_val);
  211. if (ret < 0)
  212. goto err;
  213. ret = fc2580_wr_reg_ff(priv, 0x28, fc2580_freq_regs_lut[i].r28_val);
  214. if (ret < 0)
  215. goto err;
  216. ret = fc2580_wr_reg_ff(priv, 0x29, fc2580_freq_regs_lut[i].r29_val);
  217. if (ret < 0)
  218. goto err;
  219. ret = fc2580_wr_reg_ff(priv, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
  220. if (ret < 0)
  221. goto err;
  222. ret = fc2580_wr_reg_ff(priv, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
  223. if (ret < 0)
  224. goto err;
  225. ret = fc2580_wr_reg_ff(priv, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
  226. if (ret < 0)
  227. goto err;
  228. ret = fc2580_wr_reg_ff(priv, 0x30, fc2580_freq_regs_lut[i].r30_val);
  229. if (ret < 0)
  230. goto err;
  231. ret = fc2580_wr_reg_ff(priv, 0x44, fc2580_freq_regs_lut[i].r44_val);
  232. if (ret < 0)
  233. goto err;
  234. ret = fc2580_wr_reg_ff(priv, 0x50, fc2580_freq_regs_lut[i].r50_val);
  235. if (ret < 0)
  236. goto err;
  237. ret = fc2580_wr_reg_ff(priv, 0x53, fc2580_freq_regs_lut[i].r53_val);
  238. if (ret < 0)
  239. goto err;
  240. ret = fc2580_wr_reg_ff(priv, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
  241. if (ret < 0)
  242. goto err;
  243. ret = fc2580_wr_reg_ff(priv, 0x61, fc2580_freq_regs_lut[i].r61_val);
  244. if (ret < 0)
  245. goto err;
  246. ret = fc2580_wr_reg_ff(priv, 0x62, fc2580_freq_regs_lut[i].r62_val);
  247. if (ret < 0)
  248. goto err;
  249. ret = fc2580_wr_reg_ff(priv, 0x63, fc2580_freq_regs_lut[i].r63_val);
  250. if (ret < 0)
  251. goto err;
  252. ret = fc2580_wr_reg_ff(priv, 0x67, fc2580_freq_regs_lut[i].r67_val);
  253. if (ret < 0)
  254. goto err;
  255. ret = fc2580_wr_reg_ff(priv, 0x68, fc2580_freq_regs_lut[i].r68_val);
  256. if (ret < 0)
  257. goto err;
  258. ret = fc2580_wr_reg_ff(priv, 0x69, fc2580_freq_regs_lut[i].r69_val);
  259. if (ret < 0)
  260. goto err;
  261. ret = fc2580_wr_reg_ff(priv, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
  262. if (ret < 0)
  263. goto err;
  264. ret = fc2580_wr_reg_ff(priv, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
  265. if (ret < 0)
  266. goto err;
  267. ret = fc2580_wr_reg_ff(priv, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
  268. if (ret < 0)
  269. goto err;
  270. ret = fc2580_wr_reg_ff(priv, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
  271. if (ret < 0)
  272. goto err;
  273. ret = fc2580_wr_reg_ff(priv, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
  274. if (ret < 0)
  275. goto err;
  276. ret = fc2580_wr_reg_ff(priv, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
  277. if (ret < 0)
  278. goto err;
  279. /* IF filters */
  280. for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
  281. if (c->bandwidth_hz <= fc2580_if_filter_lut[i].freq)
  282. break;
  283. }
  284. if (i == ARRAY_SIZE(fc2580_if_filter_lut))
  285. goto err;
  286. ret = fc2580_wr_reg(priv, 0x36, fc2580_if_filter_lut[i].r36_val);
  287. if (ret < 0)
  288. goto err;
  289. ret = fc2580_wr_reg(priv, 0x37, 1UL * priv->cfg->clock * \
  290. fc2580_if_filter_lut[i].mul / 1000000000);
  291. if (ret < 0)
  292. goto err;
  293. ret = fc2580_wr_reg(priv, 0x39, fc2580_if_filter_lut[i].r39_val);
  294. if (ret < 0)
  295. goto err;
  296. /* calibration? */
  297. ret = fc2580_wr_reg(priv, 0x2e, 0x09);
  298. if (ret < 0)
  299. goto err;
  300. for (i = 0; i < 5; i++) {
  301. ret = fc2580_rd_reg(priv, 0x2f, &tmp_val);
  302. if (ret < 0)
  303. goto err;
  304. /* done when [7:6] are set */
  305. if ((tmp_val & 0xc0) == 0xc0)
  306. break;
  307. ret = fc2580_wr_reg(priv, 0x2e, 0x01);
  308. if (ret < 0)
  309. goto err;
  310. ret = fc2580_wr_reg(priv, 0x2e, 0x09);
  311. if (ret < 0)
  312. goto err;
  313. usleep_range(5000, 25000);
  314. }
  315. dev_dbg(&priv->i2c->dev, "%s: loop=%i\n", __func__, i);
  316. ret = fc2580_wr_reg(priv, 0x2e, 0x01);
  317. if (ret < 0)
  318. goto err;
  319. if (fe->ops.i2c_gate_ctrl)
  320. fe->ops.i2c_gate_ctrl(fe, 0);
  321. return 0;
  322. err:
  323. if (fe->ops.i2c_gate_ctrl)
  324. fe->ops.i2c_gate_ctrl(fe, 0);
  325. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  326. return ret;
  327. }
  328. static int fc2580_init(struct dvb_frontend *fe)
  329. {
  330. struct fc2580_priv *priv = fe->tuner_priv;
  331. int ret, i;
  332. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  333. if (fe->ops.i2c_gate_ctrl)
  334. fe->ops.i2c_gate_ctrl(fe, 1);
  335. for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
  336. ret = fc2580_wr_reg(priv, fc2580_init_reg_vals[i].reg,
  337. fc2580_init_reg_vals[i].val);
  338. if (ret < 0)
  339. goto err;
  340. }
  341. if (fe->ops.i2c_gate_ctrl)
  342. fe->ops.i2c_gate_ctrl(fe, 0);
  343. return 0;
  344. err:
  345. if (fe->ops.i2c_gate_ctrl)
  346. fe->ops.i2c_gate_ctrl(fe, 0);
  347. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  348. return ret;
  349. }
  350. static int fc2580_sleep(struct dvb_frontend *fe)
  351. {
  352. struct fc2580_priv *priv = fe->tuner_priv;
  353. int ret;
  354. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  355. if (fe->ops.i2c_gate_ctrl)
  356. fe->ops.i2c_gate_ctrl(fe, 1);
  357. ret = fc2580_wr_reg(priv, 0x02, 0x0a);
  358. if (ret < 0)
  359. goto err;
  360. if (fe->ops.i2c_gate_ctrl)
  361. fe->ops.i2c_gate_ctrl(fe, 0);
  362. return 0;
  363. err:
  364. if (fe->ops.i2c_gate_ctrl)
  365. fe->ops.i2c_gate_ctrl(fe, 0);
  366. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  367. return ret;
  368. }
  369. static int fc2580_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  370. {
  371. struct fc2580_priv *priv = fe->tuner_priv;
  372. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  373. *frequency = 0; /* Zero-IF */
  374. return 0;
  375. }
  376. static int fc2580_release(struct dvb_frontend *fe)
  377. {
  378. struct fc2580_priv *priv = fe->tuner_priv;
  379. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  380. kfree(fe->tuner_priv);
  381. return 0;
  382. }
  383. static const struct dvb_tuner_ops fc2580_tuner_ops = {
  384. .info = {
  385. .name = "FCI FC2580",
  386. .frequency_min = 174000000,
  387. .frequency_max = 862000000,
  388. },
  389. .release = fc2580_release,
  390. .init = fc2580_init,
  391. .sleep = fc2580_sleep,
  392. .set_params = fc2580_set_params,
  393. .get_if_frequency = fc2580_get_if_frequency,
  394. };
  395. struct dvb_frontend *fc2580_attach(struct dvb_frontend *fe,
  396. struct i2c_adapter *i2c, const struct fc2580_config *cfg)
  397. {
  398. struct fc2580_priv *priv;
  399. int ret;
  400. u8 chip_id;
  401. if (fe->ops.i2c_gate_ctrl)
  402. fe->ops.i2c_gate_ctrl(fe, 1);
  403. priv = kzalloc(sizeof(struct fc2580_priv), GFP_KERNEL);
  404. if (!priv) {
  405. ret = -ENOMEM;
  406. dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
  407. goto err;
  408. }
  409. priv->cfg = cfg;
  410. priv->i2c = i2c;
  411. /* check if the tuner is there */
  412. ret = fc2580_rd_reg(priv, 0x01, &chip_id);
  413. if (ret < 0)
  414. goto err;
  415. dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
  416. switch (chip_id) {
  417. case 0x56:
  418. case 0x5a:
  419. break;
  420. default:
  421. goto err;
  422. }
  423. dev_info(&priv->i2c->dev,
  424. "%s: FCI FC2580 successfully identified\n",
  425. KBUILD_MODNAME);
  426. fe->tuner_priv = priv;
  427. memcpy(&fe->ops.tuner_ops, &fc2580_tuner_ops,
  428. sizeof(struct dvb_tuner_ops));
  429. if (fe->ops.i2c_gate_ctrl)
  430. fe->ops.i2c_gate_ctrl(fe, 0);
  431. return fe;
  432. err:
  433. if (fe->ops.i2c_gate_ctrl)
  434. fe->ops.i2c_gate_ctrl(fe, 0);
  435. dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
  436. kfree(priv);
  437. return NULL;
  438. }
  439. EXPORT_SYMBOL(fc2580_attach);
  440. MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
  441. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  442. MODULE_LICENSE("GPL");