soc-cache.c 35 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  20. unsigned int reg)
  21. {
  22. int ret;
  23. unsigned int val;
  24. if (reg >= codec->driver->reg_cache_size ||
  25. snd_soc_codec_volatile_register(codec, reg)) {
  26. if (codec->cache_only)
  27. return -1;
  28. BUG_ON(!codec->hw_read);
  29. return codec->hw_read(codec, reg);
  30. }
  31. ret = snd_soc_cache_read(codec, reg, &val);
  32. if (ret < 0)
  33. return -1;
  34. return val;
  35. }
  36. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  37. unsigned int value)
  38. {
  39. u8 data[2];
  40. int ret;
  41. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  42. data[1] = value & 0x00ff;
  43. if (!snd_soc_codec_volatile_register(codec, reg) &&
  44. reg < codec->driver->reg_cache_size) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, 2);
  54. if (ret == 2)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. #if defined(CONFIG_SPI_MASTER)
  62. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  63. int len)
  64. {
  65. struct spi_device *spi = control_data;
  66. struct spi_transfer t;
  67. struct spi_message m;
  68. u8 msg[2];
  69. if (len <= 0)
  70. return 0;
  71. msg[0] = data[1];
  72. msg[1] = data[0];
  73. spi_message_init(&m);
  74. memset(&t, 0, sizeof t);
  75. t.tx_buf = &msg[0];
  76. t.len = len;
  77. spi_message_add_tail(&t, &m);
  78. spi_sync(spi, &m);
  79. return len;
  80. }
  81. #else
  82. #define snd_soc_4_12_spi_write NULL
  83. #endif
  84. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  85. unsigned int reg)
  86. {
  87. int ret;
  88. unsigned int val;
  89. if (reg >= codec->driver->reg_cache_size ||
  90. snd_soc_codec_volatile_register(codec, reg)) {
  91. if (codec->cache_only)
  92. return -1;
  93. BUG_ON(!codec->hw_read);
  94. return codec->hw_read(codec, reg);
  95. }
  96. ret = snd_soc_cache_read(codec, reg, &val);
  97. if (ret < 0)
  98. return -1;
  99. return val;
  100. }
  101. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  102. unsigned int value)
  103. {
  104. u8 data[2];
  105. int ret;
  106. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  107. data[1] = value & 0x00ff;
  108. if (!snd_soc_codec_volatile_register(codec, reg) &&
  109. reg < codec->driver->reg_cache_size) {
  110. ret = snd_soc_cache_write(codec, reg, value);
  111. if (ret < 0)
  112. return -1;
  113. }
  114. if (codec->cache_only) {
  115. codec->cache_sync = 1;
  116. return 0;
  117. }
  118. ret = codec->hw_write(codec->control_data, data, 2);
  119. if (ret == 2)
  120. return 0;
  121. if (ret < 0)
  122. return ret;
  123. else
  124. return -EIO;
  125. }
  126. #if defined(CONFIG_SPI_MASTER)
  127. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  128. int len)
  129. {
  130. struct spi_device *spi = control_data;
  131. struct spi_transfer t;
  132. struct spi_message m;
  133. u8 msg[2];
  134. if (len <= 0)
  135. return 0;
  136. msg[0] = data[0];
  137. msg[1] = data[1];
  138. spi_message_init(&m);
  139. memset(&t, 0, sizeof t);
  140. t.tx_buf = &msg[0];
  141. t.len = len;
  142. spi_message_add_tail(&t, &m);
  143. spi_sync(spi, &m);
  144. return len;
  145. }
  146. #else
  147. #define snd_soc_7_9_spi_write NULL
  148. #endif
  149. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  150. unsigned int value)
  151. {
  152. u8 data[2];
  153. int ret;
  154. reg &= 0xff;
  155. data[0] = reg;
  156. data[1] = value & 0xff;
  157. if (!snd_soc_codec_volatile_register(codec, reg) &&
  158. reg < codec->driver->reg_cache_size) {
  159. ret = snd_soc_cache_write(codec, reg, value);
  160. if (ret < 0)
  161. return -1;
  162. }
  163. if (codec->cache_only) {
  164. codec->cache_sync = 1;
  165. return 0;
  166. }
  167. if (codec->hw_write(codec->control_data, data, 2) == 2)
  168. return 0;
  169. else
  170. return -EIO;
  171. }
  172. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  173. unsigned int reg)
  174. {
  175. int ret;
  176. unsigned int val;
  177. reg &= 0xff;
  178. if (reg >= codec->driver->reg_cache_size ||
  179. snd_soc_codec_volatile_register(codec, reg)) {
  180. if (codec->cache_only)
  181. return -1;
  182. BUG_ON(!codec->hw_read);
  183. return codec->hw_read(codec, reg);
  184. }
  185. ret = snd_soc_cache_read(codec, reg, &val);
  186. if (ret < 0)
  187. return -1;
  188. return val;
  189. }
  190. #if defined(CONFIG_SPI_MASTER)
  191. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  192. int len)
  193. {
  194. struct spi_device *spi = control_data;
  195. struct spi_transfer t;
  196. struct spi_message m;
  197. u8 msg[2];
  198. if (len <= 0)
  199. return 0;
  200. msg[0] = data[0];
  201. msg[1] = data[1];
  202. spi_message_init(&m);
  203. memset(&t, 0, sizeof t);
  204. t.tx_buf = &msg[0];
  205. t.len = len;
  206. spi_message_add_tail(&t, &m);
  207. spi_sync(spi, &m);
  208. return len;
  209. }
  210. #else
  211. #define snd_soc_8_8_spi_write NULL
  212. #endif
  213. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  214. unsigned int value)
  215. {
  216. u8 data[3];
  217. int ret;
  218. data[0] = reg;
  219. data[1] = (value >> 8) & 0xff;
  220. data[2] = value & 0xff;
  221. if (!snd_soc_codec_volatile_register(codec, reg) &&
  222. reg < codec->driver->reg_cache_size) {
  223. ret = snd_soc_cache_write(codec, reg, value);
  224. if (ret < 0)
  225. return -1;
  226. }
  227. if (codec->cache_only) {
  228. codec->cache_sync = 1;
  229. return 0;
  230. }
  231. if (codec->hw_write(codec->control_data, data, 3) == 3)
  232. return 0;
  233. else
  234. return -EIO;
  235. }
  236. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  237. unsigned int reg)
  238. {
  239. int ret;
  240. unsigned int val;
  241. if (reg >= codec->driver->reg_cache_size ||
  242. snd_soc_codec_volatile_register(codec, reg)) {
  243. if (codec->cache_only)
  244. return -1;
  245. BUG_ON(!codec->hw_read);
  246. return codec->hw_read(codec, reg);
  247. }
  248. ret = snd_soc_cache_read(codec, reg, &val);
  249. if (ret < 0)
  250. return -1;
  251. return val;
  252. }
  253. #if defined(CONFIG_SPI_MASTER)
  254. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  255. int len)
  256. {
  257. struct spi_device *spi = control_data;
  258. struct spi_transfer t;
  259. struct spi_message m;
  260. u8 msg[3];
  261. if (len <= 0)
  262. return 0;
  263. msg[0] = data[0];
  264. msg[1] = data[1];
  265. msg[2] = data[2];
  266. spi_message_init(&m);
  267. memset(&t, 0, sizeof t);
  268. t.tx_buf = &msg[0];
  269. t.len = len;
  270. spi_message_add_tail(&t, &m);
  271. spi_sync(spi, &m);
  272. return len;
  273. }
  274. #else
  275. #define snd_soc_8_16_spi_write NULL
  276. #endif
  277. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  278. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  279. unsigned int r)
  280. {
  281. struct i2c_msg xfer[2];
  282. u8 reg = r;
  283. u8 data;
  284. int ret;
  285. struct i2c_client *client = codec->control_data;
  286. /* Write register */
  287. xfer[0].addr = client->addr;
  288. xfer[0].flags = 0;
  289. xfer[0].len = 1;
  290. xfer[0].buf = &reg;
  291. /* Read data */
  292. xfer[1].addr = client->addr;
  293. xfer[1].flags = I2C_M_RD;
  294. xfer[1].len = 1;
  295. xfer[1].buf = &data;
  296. ret = i2c_transfer(client->adapter, xfer, 2);
  297. if (ret != 2) {
  298. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  299. return 0;
  300. }
  301. return data;
  302. }
  303. #else
  304. #define snd_soc_8_8_read_i2c NULL
  305. #endif
  306. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  307. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  308. unsigned int r)
  309. {
  310. struct i2c_msg xfer[2];
  311. u8 reg = r;
  312. u16 data;
  313. int ret;
  314. struct i2c_client *client = codec->control_data;
  315. /* Write register */
  316. xfer[0].addr = client->addr;
  317. xfer[0].flags = 0;
  318. xfer[0].len = 1;
  319. xfer[0].buf = &reg;
  320. /* Read data */
  321. xfer[1].addr = client->addr;
  322. xfer[1].flags = I2C_M_RD;
  323. xfer[1].len = 2;
  324. xfer[1].buf = (u8 *)&data;
  325. ret = i2c_transfer(client->adapter, xfer, 2);
  326. if (ret != 2) {
  327. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  328. return 0;
  329. }
  330. return (data >> 8) | ((data & 0xff) << 8);
  331. }
  332. #else
  333. #define snd_soc_8_16_read_i2c NULL
  334. #endif
  335. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  336. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  337. unsigned int r)
  338. {
  339. struct i2c_msg xfer[2];
  340. u16 reg = r;
  341. u8 data;
  342. int ret;
  343. struct i2c_client *client = codec->control_data;
  344. /* Write register */
  345. xfer[0].addr = client->addr;
  346. xfer[0].flags = 0;
  347. xfer[0].len = 2;
  348. xfer[0].buf = (u8 *)&reg;
  349. /* Read data */
  350. xfer[1].addr = client->addr;
  351. xfer[1].flags = I2C_M_RD;
  352. xfer[1].len = 1;
  353. xfer[1].buf = &data;
  354. ret = i2c_transfer(client->adapter, xfer, 2);
  355. if (ret != 2) {
  356. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  357. return 0;
  358. }
  359. return data;
  360. }
  361. #else
  362. #define snd_soc_16_8_read_i2c NULL
  363. #endif
  364. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  365. unsigned int reg)
  366. {
  367. int ret;
  368. unsigned int val;
  369. reg &= 0xff;
  370. if (reg >= codec->driver->reg_cache_size ||
  371. snd_soc_codec_volatile_register(codec, reg)) {
  372. if (codec->cache_only)
  373. return -1;
  374. BUG_ON(!codec->hw_read);
  375. return codec->hw_read(codec, reg);
  376. }
  377. ret = snd_soc_cache_read(codec, reg, &val);
  378. if (ret < 0)
  379. return -1;
  380. return val;
  381. }
  382. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  383. unsigned int value)
  384. {
  385. u8 data[3];
  386. int ret;
  387. data[0] = (reg >> 8) & 0xff;
  388. data[1] = reg & 0xff;
  389. data[2] = value;
  390. reg &= 0xff;
  391. if (!snd_soc_codec_volatile_register(codec, reg) &&
  392. reg < codec->driver->reg_cache_size) {
  393. ret = snd_soc_cache_write(codec, reg, value);
  394. if (ret < 0)
  395. return -1;
  396. }
  397. if (codec->cache_only) {
  398. codec->cache_sync = 1;
  399. return 0;
  400. }
  401. ret = codec->hw_write(codec->control_data, data, 3);
  402. if (ret == 3)
  403. return 0;
  404. if (ret < 0)
  405. return ret;
  406. else
  407. return -EIO;
  408. }
  409. #if defined(CONFIG_SPI_MASTER)
  410. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  411. int len)
  412. {
  413. struct spi_device *spi = control_data;
  414. struct spi_transfer t;
  415. struct spi_message m;
  416. u8 msg[3];
  417. if (len <= 0)
  418. return 0;
  419. msg[0] = data[0];
  420. msg[1] = data[1];
  421. msg[2] = data[2];
  422. spi_message_init(&m);
  423. memset(&t, 0, sizeof t);
  424. t.tx_buf = &msg[0];
  425. t.len = len;
  426. spi_message_add_tail(&t, &m);
  427. spi_sync(spi, &m);
  428. return len;
  429. }
  430. #else
  431. #define snd_soc_16_8_spi_write NULL
  432. #endif
  433. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  434. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  435. unsigned int r)
  436. {
  437. struct i2c_msg xfer[2];
  438. u16 reg = cpu_to_be16(r);
  439. u16 data;
  440. int ret;
  441. struct i2c_client *client = codec->control_data;
  442. /* Write register */
  443. xfer[0].addr = client->addr;
  444. xfer[0].flags = 0;
  445. xfer[0].len = 2;
  446. xfer[0].buf = (u8 *)&reg;
  447. /* Read data */
  448. xfer[1].addr = client->addr;
  449. xfer[1].flags = I2C_M_RD;
  450. xfer[1].len = 2;
  451. xfer[1].buf = (u8 *)&data;
  452. ret = i2c_transfer(client->adapter, xfer, 2);
  453. if (ret != 2) {
  454. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  455. return 0;
  456. }
  457. return be16_to_cpu(data);
  458. }
  459. #else
  460. #define snd_soc_16_16_read_i2c NULL
  461. #endif
  462. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  463. unsigned int reg)
  464. {
  465. int ret;
  466. unsigned int val;
  467. if (reg >= codec->driver->reg_cache_size ||
  468. snd_soc_codec_volatile_register(codec, reg)) {
  469. if (codec->cache_only)
  470. return -1;
  471. BUG_ON(!codec->hw_read);
  472. return codec->hw_read(codec, reg);
  473. }
  474. ret = snd_soc_cache_read(codec, reg, &val);
  475. if (ret < 0)
  476. return -1;
  477. return val;
  478. }
  479. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  480. unsigned int value)
  481. {
  482. u8 data[4];
  483. int ret;
  484. data[0] = (reg >> 8) & 0xff;
  485. data[1] = reg & 0xff;
  486. data[2] = (value >> 8) & 0xff;
  487. data[3] = value & 0xff;
  488. if (!snd_soc_codec_volatile_register(codec, reg) &&
  489. reg < codec->driver->reg_cache_size) {
  490. ret = snd_soc_cache_write(codec, reg, value);
  491. if (ret < 0)
  492. return -1;
  493. }
  494. if (codec->cache_only) {
  495. codec->cache_sync = 1;
  496. return 0;
  497. }
  498. ret = codec->hw_write(codec->control_data, data, 4);
  499. if (ret == 4)
  500. return 0;
  501. if (ret < 0)
  502. return ret;
  503. else
  504. return -EIO;
  505. }
  506. #if defined(CONFIG_SPI_MASTER)
  507. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  508. int len)
  509. {
  510. struct spi_device *spi = control_data;
  511. struct spi_transfer t;
  512. struct spi_message m;
  513. u8 msg[4];
  514. if (len <= 0)
  515. return 0;
  516. msg[0] = data[0];
  517. msg[1] = data[1];
  518. msg[2] = data[2];
  519. msg[3] = data[3];
  520. spi_message_init(&m);
  521. memset(&t, 0, sizeof t);
  522. t.tx_buf = &msg[0];
  523. t.len = len;
  524. spi_message_add_tail(&t, &m);
  525. spi_sync(spi, &m);
  526. return len;
  527. }
  528. #else
  529. #define snd_soc_16_16_spi_write NULL
  530. #endif
  531. static struct {
  532. int addr_bits;
  533. int data_bits;
  534. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  535. int (*spi_write)(void *, const char *, int);
  536. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  537. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  538. } io_types[] = {
  539. {
  540. .addr_bits = 4, .data_bits = 12,
  541. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  542. .spi_write = snd_soc_4_12_spi_write,
  543. },
  544. {
  545. .addr_bits = 7, .data_bits = 9,
  546. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  547. .spi_write = snd_soc_7_9_spi_write,
  548. },
  549. {
  550. .addr_bits = 8, .data_bits = 8,
  551. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  552. .i2c_read = snd_soc_8_8_read_i2c,
  553. .spi_write = snd_soc_8_8_spi_write,
  554. },
  555. {
  556. .addr_bits = 8, .data_bits = 16,
  557. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  558. .i2c_read = snd_soc_8_16_read_i2c,
  559. .spi_write = snd_soc_8_16_spi_write,
  560. },
  561. {
  562. .addr_bits = 16, .data_bits = 8,
  563. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  564. .i2c_read = snd_soc_16_8_read_i2c,
  565. .spi_write = snd_soc_16_8_spi_write,
  566. },
  567. {
  568. .addr_bits = 16, .data_bits = 16,
  569. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  570. .i2c_read = snd_soc_16_16_read_i2c,
  571. .spi_write = snd_soc_16_16_spi_write,
  572. },
  573. };
  574. /**
  575. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  576. *
  577. * @codec: CODEC to configure.
  578. * @type: Type of cache.
  579. * @addr_bits: Number of bits of register address data.
  580. * @data_bits: Number of bits of data per register.
  581. * @control: Control bus used.
  582. *
  583. * Register formats are frequently shared between many I2C and SPI
  584. * devices. In order to promote code reuse the ASoC core provides
  585. * some standard implementations of CODEC read and write operations
  586. * which can be set up using this function.
  587. *
  588. * The caller is responsible for allocating and initialising the
  589. * actual cache.
  590. *
  591. * Note that at present this code cannot be used by CODECs with
  592. * volatile registers.
  593. */
  594. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  595. int addr_bits, int data_bits,
  596. enum snd_soc_control_type control)
  597. {
  598. int i;
  599. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  600. if (io_types[i].addr_bits == addr_bits &&
  601. io_types[i].data_bits == data_bits)
  602. break;
  603. if (i == ARRAY_SIZE(io_types)) {
  604. printk(KERN_ERR
  605. "No I/O functions for %d bit address %d bit data\n",
  606. addr_bits, data_bits);
  607. return -EINVAL;
  608. }
  609. codec->write = io_types[i].write;
  610. codec->read = io_types[i].read;
  611. switch (control) {
  612. case SND_SOC_CUSTOM:
  613. break;
  614. case SND_SOC_I2C:
  615. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  616. codec->hw_write = (hw_write_t)i2c_master_send;
  617. #endif
  618. if (io_types[i].i2c_read)
  619. codec->hw_read = io_types[i].i2c_read;
  620. codec->control_data = container_of(codec->dev,
  621. struct i2c_client,
  622. dev);
  623. break;
  624. case SND_SOC_SPI:
  625. if (io_types[i].spi_write)
  626. codec->hw_write = io_types[i].spi_write;
  627. codec->control_data = container_of(codec->dev,
  628. struct spi_device,
  629. dev);
  630. break;
  631. }
  632. return 0;
  633. }
  634. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  635. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  636. unsigned int val, unsigned int word_size)
  637. {
  638. switch (word_size) {
  639. case 1: {
  640. u8 *cache = base;
  641. if (cache[idx] == val)
  642. return true;
  643. cache[idx] = val;
  644. break;
  645. }
  646. case 2: {
  647. u16 *cache = base;
  648. if (cache[idx] == val)
  649. return true;
  650. cache[idx] = val;
  651. break;
  652. }
  653. default:
  654. BUG();
  655. }
  656. return false;
  657. }
  658. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  659. unsigned int word_size)
  660. {
  661. switch (word_size) {
  662. case 1: {
  663. const u8 *cache = base;
  664. return cache[idx];
  665. }
  666. case 2: {
  667. const u16 *cache = base;
  668. return cache[idx];
  669. }
  670. default:
  671. BUG();
  672. }
  673. /* unreachable */
  674. return -1;
  675. }
  676. struct snd_soc_rbtree_node {
  677. struct rb_node node;
  678. unsigned int reg;
  679. unsigned int value;
  680. unsigned int defval;
  681. } __attribute__ ((packed));
  682. struct snd_soc_rbtree_ctx {
  683. struct rb_root root;
  684. };
  685. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  686. struct rb_root *root, unsigned int reg)
  687. {
  688. struct rb_node *node;
  689. struct snd_soc_rbtree_node *rbnode;
  690. node = root->rb_node;
  691. while (node) {
  692. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  693. if (rbnode->reg < reg)
  694. node = node->rb_left;
  695. else if (rbnode->reg > reg)
  696. node = node->rb_right;
  697. else
  698. return rbnode;
  699. }
  700. return NULL;
  701. }
  702. static int snd_soc_rbtree_insert(struct rb_root *root,
  703. struct snd_soc_rbtree_node *rbnode)
  704. {
  705. struct rb_node **new, *parent;
  706. struct snd_soc_rbtree_node *rbnode_tmp;
  707. parent = NULL;
  708. new = &root->rb_node;
  709. while (*new) {
  710. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  711. node);
  712. parent = *new;
  713. if (rbnode_tmp->reg < rbnode->reg)
  714. new = &((*new)->rb_left);
  715. else if (rbnode_tmp->reg > rbnode->reg)
  716. new = &((*new)->rb_right);
  717. else
  718. return 0;
  719. }
  720. /* insert the node into the rbtree */
  721. rb_link_node(&rbnode->node, parent, new);
  722. rb_insert_color(&rbnode->node, root);
  723. return 1;
  724. }
  725. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  726. {
  727. struct snd_soc_rbtree_ctx *rbtree_ctx;
  728. struct rb_node *node;
  729. struct snd_soc_rbtree_node *rbnode;
  730. unsigned int val;
  731. int ret;
  732. rbtree_ctx = codec->reg_cache;
  733. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  734. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  735. if (rbnode->value == rbnode->defval)
  736. continue;
  737. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  738. if (ret)
  739. return ret;
  740. ret = snd_soc_write(codec, rbnode->reg, val);
  741. if (ret)
  742. return ret;
  743. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  744. rbnode->reg, val);
  745. }
  746. return 0;
  747. }
  748. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  749. unsigned int reg, unsigned int value)
  750. {
  751. struct snd_soc_rbtree_ctx *rbtree_ctx;
  752. struct snd_soc_rbtree_node *rbnode;
  753. rbtree_ctx = codec->reg_cache;
  754. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  755. if (rbnode) {
  756. if (rbnode->value == value)
  757. return 0;
  758. rbnode->value = value;
  759. } else {
  760. /* bail out early, no need to create the rbnode yet */
  761. if (!value)
  762. return 0;
  763. /*
  764. * for uninitialized registers whose value is changed
  765. * from the default zero, create an rbnode and insert
  766. * it into the tree.
  767. */
  768. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  769. if (!rbnode)
  770. return -ENOMEM;
  771. rbnode->reg = reg;
  772. rbnode->value = value;
  773. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  774. }
  775. return 0;
  776. }
  777. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  778. unsigned int reg, unsigned int *value)
  779. {
  780. struct snd_soc_rbtree_ctx *rbtree_ctx;
  781. struct snd_soc_rbtree_node *rbnode;
  782. rbtree_ctx = codec->reg_cache;
  783. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  784. if (rbnode) {
  785. *value = rbnode->value;
  786. } else {
  787. /* uninitialized registers default to 0 */
  788. *value = 0;
  789. }
  790. return 0;
  791. }
  792. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  793. {
  794. struct rb_node *next;
  795. struct snd_soc_rbtree_ctx *rbtree_ctx;
  796. struct snd_soc_rbtree_node *rbtree_node;
  797. /* if we've already been called then just return */
  798. rbtree_ctx = codec->reg_cache;
  799. if (!rbtree_ctx)
  800. return 0;
  801. /* free up the rbtree */
  802. next = rb_first(&rbtree_ctx->root);
  803. while (next) {
  804. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  805. next = rb_next(&rbtree_node->node);
  806. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  807. kfree(rbtree_node);
  808. }
  809. /* release the resources */
  810. kfree(codec->reg_cache);
  811. codec->reg_cache = NULL;
  812. return 0;
  813. }
  814. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  815. {
  816. struct snd_soc_rbtree_node *rbtree_node;
  817. struct snd_soc_rbtree_ctx *rbtree_ctx;
  818. unsigned int val;
  819. unsigned int word_size;
  820. int i;
  821. int ret;
  822. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  823. if (!codec->reg_cache)
  824. return -ENOMEM;
  825. rbtree_ctx = codec->reg_cache;
  826. rbtree_ctx->root = RB_ROOT;
  827. if (!codec->reg_def_copy)
  828. return 0;
  829. /*
  830. * populate the rbtree with the initialized registers. All other
  831. * registers will be inserted when they are first modified.
  832. */
  833. word_size = codec->driver->reg_word_size;
  834. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  835. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  836. if (!val)
  837. continue;
  838. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  839. if (!rbtree_node) {
  840. ret = -ENOMEM;
  841. snd_soc_cache_exit(codec);
  842. break;
  843. }
  844. rbtree_node->reg = i;
  845. rbtree_node->value = val;
  846. rbtree_node->defval = val;
  847. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  848. }
  849. return 0;
  850. }
  851. #ifdef CONFIG_SND_SOC_CACHE_LZO
  852. struct snd_soc_lzo_ctx {
  853. void *wmem;
  854. void *dst;
  855. const void *src;
  856. size_t src_len;
  857. size_t dst_len;
  858. size_t decompressed_size;
  859. unsigned long *sync_bmp;
  860. int sync_bmp_nbits;
  861. };
  862. #define LZO_BLOCK_NUM 8
  863. static int snd_soc_lzo_block_count(void)
  864. {
  865. return LZO_BLOCK_NUM;
  866. }
  867. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  868. {
  869. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  870. if (!lzo_ctx->wmem)
  871. return -ENOMEM;
  872. return 0;
  873. }
  874. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  875. {
  876. size_t compress_size;
  877. int ret;
  878. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  879. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  880. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  881. return -EINVAL;
  882. lzo_ctx->dst_len = compress_size;
  883. return 0;
  884. }
  885. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  886. {
  887. size_t dst_len;
  888. int ret;
  889. dst_len = lzo_ctx->dst_len;
  890. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  891. lzo_ctx->dst, &dst_len);
  892. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  893. return -EINVAL;
  894. return 0;
  895. }
  896. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  897. struct snd_soc_lzo_ctx *lzo_ctx)
  898. {
  899. int ret;
  900. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  901. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  902. if (!lzo_ctx->dst) {
  903. lzo_ctx->dst_len = 0;
  904. return -ENOMEM;
  905. }
  906. ret = snd_soc_lzo_compress(lzo_ctx);
  907. if (ret < 0)
  908. return ret;
  909. return 0;
  910. }
  911. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  912. struct snd_soc_lzo_ctx *lzo_ctx)
  913. {
  914. int ret;
  915. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  916. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  917. if (!lzo_ctx->dst) {
  918. lzo_ctx->dst_len = 0;
  919. return -ENOMEM;
  920. }
  921. ret = snd_soc_lzo_decompress(lzo_ctx);
  922. if (ret < 0)
  923. return ret;
  924. return 0;
  925. }
  926. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  927. unsigned int reg)
  928. {
  929. const struct snd_soc_codec_driver *codec_drv;
  930. codec_drv = codec->driver;
  931. return (reg * codec_drv->reg_word_size) /
  932. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  933. }
  934. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  935. unsigned int reg)
  936. {
  937. const struct snd_soc_codec_driver *codec_drv;
  938. codec_drv = codec->driver;
  939. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  940. codec_drv->reg_word_size);
  941. }
  942. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  943. {
  944. const struct snd_soc_codec_driver *codec_drv;
  945. codec_drv = codec->driver;
  946. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  947. }
  948. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  949. {
  950. struct snd_soc_lzo_ctx **lzo_blocks;
  951. unsigned int val;
  952. int i;
  953. int ret;
  954. lzo_blocks = codec->reg_cache;
  955. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  956. ret = snd_soc_cache_read(codec, i, &val);
  957. if (ret)
  958. return ret;
  959. ret = snd_soc_write(codec, i, val);
  960. if (ret)
  961. return ret;
  962. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  963. i, val);
  964. }
  965. return 0;
  966. }
  967. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  968. unsigned int reg, unsigned int value)
  969. {
  970. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  971. int ret, blkindex, blkpos;
  972. size_t blksize, tmp_dst_len;
  973. void *tmp_dst;
  974. /* index of the compressed lzo block */
  975. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  976. /* register index within the decompressed block */
  977. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  978. /* size of the compressed block */
  979. blksize = snd_soc_lzo_get_blksize(codec);
  980. lzo_blocks = codec->reg_cache;
  981. lzo_block = lzo_blocks[blkindex];
  982. /* save the pointer and length of the compressed block */
  983. tmp_dst = lzo_block->dst;
  984. tmp_dst_len = lzo_block->dst_len;
  985. /* prepare the source to be the compressed block */
  986. lzo_block->src = lzo_block->dst;
  987. lzo_block->src_len = lzo_block->dst_len;
  988. /* decompress the block */
  989. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  990. if (ret < 0) {
  991. kfree(lzo_block->dst);
  992. goto out;
  993. }
  994. /* write the new value to the cache */
  995. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  996. codec->driver->reg_word_size)) {
  997. kfree(lzo_block->dst);
  998. goto out;
  999. }
  1000. /* prepare the source to be the decompressed block */
  1001. lzo_block->src = lzo_block->dst;
  1002. lzo_block->src_len = lzo_block->dst_len;
  1003. /* compress the block */
  1004. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  1005. if (ret < 0) {
  1006. kfree(lzo_block->dst);
  1007. kfree(lzo_block->src);
  1008. goto out;
  1009. }
  1010. /* set the bit so we know we have to sync this register */
  1011. set_bit(reg, lzo_block->sync_bmp);
  1012. kfree(tmp_dst);
  1013. kfree(lzo_block->src);
  1014. return 0;
  1015. out:
  1016. lzo_block->dst = tmp_dst;
  1017. lzo_block->dst_len = tmp_dst_len;
  1018. return ret;
  1019. }
  1020. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  1021. unsigned int reg, unsigned int *value)
  1022. {
  1023. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  1024. int ret, blkindex, blkpos;
  1025. size_t blksize, tmp_dst_len;
  1026. void *tmp_dst;
  1027. *value = 0;
  1028. /* index of the compressed lzo block */
  1029. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  1030. /* register index within the decompressed block */
  1031. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  1032. /* size of the compressed block */
  1033. blksize = snd_soc_lzo_get_blksize(codec);
  1034. lzo_blocks = codec->reg_cache;
  1035. lzo_block = lzo_blocks[blkindex];
  1036. /* save the pointer and length of the compressed block */
  1037. tmp_dst = lzo_block->dst;
  1038. tmp_dst_len = lzo_block->dst_len;
  1039. /* prepare the source to be the compressed block */
  1040. lzo_block->src = lzo_block->dst;
  1041. lzo_block->src_len = lzo_block->dst_len;
  1042. /* decompress the block */
  1043. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  1044. if (ret >= 0)
  1045. /* fetch the value from the cache */
  1046. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  1047. codec->driver->reg_word_size);
  1048. kfree(lzo_block->dst);
  1049. /* restore the pointer and length of the compressed block */
  1050. lzo_block->dst = tmp_dst;
  1051. lzo_block->dst_len = tmp_dst_len;
  1052. return 0;
  1053. }
  1054. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  1055. {
  1056. struct snd_soc_lzo_ctx **lzo_blocks;
  1057. int i, blkcount;
  1058. lzo_blocks = codec->reg_cache;
  1059. if (!lzo_blocks)
  1060. return 0;
  1061. blkcount = snd_soc_lzo_block_count();
  1062. /*
  1063. * the pointer to the bitmap used for syncing the cache
  1064. * is shared amongst all lzo_blocks. Ensure it is freed
  1065. * only once.
  1066. */
  1067. if (lzo_blocks[0])
  1068. kfree(lzo_blocks[0]->sync_bmp);
  1069. for (i = 0; i < blkcount; ++i) {
  1070. if (lzo_blocks[i]) {
  1071. kfree(lzo_blocks[i]->wmem);
  1072. kfree(lzo_blocks[i]->dst);
  1073. }
  1074. /* each lzo_block is a pointer returned by kmalloc or NULL */
  1075. kfree(lzo_blocks[i]);
  1076. }
  1077. kfree(lzo_blocks);
  1078. codec->reg_cache = NULL;
  1079. return 0;
  1080. }
  1081. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  1082. {
  1083. struct snd_soc_lzo_ctx **lzo_blocks;
  1084. size_t bmp_size;
  1085. const struct snd_soc_codec_driver *codec_drv;
  1086. int ret, tofree, i, blksize, blkcount;
  1087. const char *p, *end;
  1088. unsigned long *sync_bmp;
  1089. ret = 0;
  1090. codec_drv = codec->driver;
  1091. /*
  1092. * If we have not been given a default register cache
  1093. * then allocate a dummy zero-ed out region, compress it
  1094. * and remember to free it afterwards.
  1095. */
  1096. tofree = 0;
  1097. if (!codec->reg_def_copy)
  1098. tofree = 1;
  1099. if (!codec->reg_def_copy) {
  1100. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  1101. if (!codec->reg_def_copy)
  1102. return -ENOMEM;
  1103. }
  1104. blkcount = snd_soc_lzo_block_count();
  1105. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  1106. GFP_KERNEL);
  1107. if (!codec->reg_cache) {
  1108. ret = -ENOMEM;
  1109. goto err_tofree;
  1110. }
  1111. lzo_blocks = codec->reg_cache;
  1112. /*
  1113. * allocate a bitmap to be used when syncing the cache with
  1114. * the hardware. Each time a register is modified, the corresponding
  1115. * bit is set in the bitmap, so we know that we have to sync
  1116. * that register.
  1117. */
  1118. bmp_size = codec_drv->reg_cache_size;
  1119. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  1120. GFP_KERNEL);
  1121. if (!sync_bmp) {
  1122. ret = -ENOMEM;
  1123. goto err;
  1124. }
  1125. bitmap_zero(sync_bmp, bmp_size);
  1126. /* allocate the lzo blocks and initialize them */
  1127. for (i = 0; i < blkcount; ++i) {
  1128. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  1129. GFP_KERNEL);
  1130. if (!lzo_blocks[i]) {
  1131. kfree(sync_bmp);
  1132. ret = -ENOMEM;
  1133. goto err;
  1134. }
  1135. lzo_blocks[i]->sync_bmp = sync_bmp;
  1136. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  1137. /* alloc the working space for the compressed block */
  1138. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  1139. if (ret < 0)
  1140. goto err;
  1141. }
  1142. blksize = snd_soc_lzo_get_blksize(codec);
  1143. p = codec->reg_def_copy;
  1144. end = codec->reg_def_copy + codec->reg_size;
  1145. /* compress the register map and fill the lzo blocks */
  1146. for (i = 0; i < blkcount; ++i, p += blksize) {
  1147. lzo_blocks[i]->src = p;
  1148. if (p + blksize > end)
  1149. lzo_blocks[i]->src_len = end - p;
  1150. else
  1151. lzo_blocks[i]->src_len = blksize;
  1152. ret = snd_soc_lzo_compress_cache_block(codec,
  1153. lzo_blocks[i]);
  1154. if (ret < 0)
  1155. goto err;
  1156. lzo_blocks[i]->decompressed_size =
  1157. lzo_blocks[i]->src_len;
  1158. }
  1159. if (tofree) {
  1160. kfree(codec->reg_def_copy);
  1161. codec->reg_def_copy = NULL;
  1162. }
  1163. return 0;
  1164. err:
  1165. snd_soc_cache_exit(codec);
  1166. err_tofree:
  1167. if (tofree) {
  1168. kfree(codec->reg_def_copy);
  1169. codec->reg_def_copy = NULL;
  1170. }
  1171. return ret;
  1172. }
  1173. #endif
  1174. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1175. {
  1176. int i;
  1177. int ret;
  1178. const struct snd_soc_codec_driver *codec_drv;
  1179. unsigned int val;
  1180. codec_drv = codec->driver;
  1181. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1182. ret = snd_soc_cache_read(codec, i, &val);
  1183. if (ret)
  1184. return ret;
  1185. if (codec->reg_def_copy)
  1186. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1187. i, codec_drv->reg_word_size) == val)
  1188. continue;
  1189. ret = snd_soc_write(codec, i, val);
  1190. if (ret)
  1191. return ret;
  1192. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1193. i, val);
  1194. }
  1195. return 0;
  1196. }
  1197. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1198. unsigned int reg, unsigned int value)
  1199. {
  1200. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1201. codec->driver->reg_word_size);
  1202. return 0;
  1203. }
  1204. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1205. unsigned int reg, unsigned int *value)
  1206. {
  1207. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1208. codec->driver->reg_word_size);
  1209. return 0;
  1210. }
  1211. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1212. {
  1213. if (!codec->reg_cache)
  1214. return 0;
  1215. kfree(codec->reg_cache);
  1216. codec->reg_cache = NULL;
  1217. return 0;
  1218. }
  1219. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1220. {
  1221. const struct snd_soc_codec_driver *codec_drv;
  1222. codec_drv = codec->driver;
  1223. if (codec->reg_def_copy)
  1224. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1225. codec->reg_size, GFP_KERNEL);
  1226. else
  1227. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1228. if (!codec->reg_cache)
  1229. return -ENOMEM;
  1230. return 0;
  1231. }
  1232. /* an array of all supported compression types */
  1233. static const struct snd_soc_cache_ops cache_types[] = {
  1234. /* Flat *must* be the first entry for fallback */
  1235. {
  1236. .id = SND_SOC_FLAT_COMPRESSION,
  1237. .name = "flat",
  1238. .init = snd_soc_flat_cache_init,
  1239. .exit = snd_soc_flat_cache_exit,
  1240. .read = snd_soc_flat_cache_read,
  1241. .write = snd_soc_flat_cache_write,
  1242. .sync = snd_soc_flat_cache_sync
  1243. },
  1244. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1245. {
  1246. .id = SND_SOC_LZO_COMPRESSION,
  1247. .name = "LZO",
  1248. .init = snd_soc_lzo_cache_init,
  1249. .exit = snd_soc_lzo_cache_exit,
  1250. .read = snd_soc_lzo_cache_read,
  1251. .write = snd_soc_lzo_cache_write,
  1252. .sync = snd_soc_lzo_cache_sync
  1253. },
  1254. #endif
  1255. {
  1256. .id = SND_SOC_RBTREE_COMPRESSION,
  1257. .name = "rbtree",
  1258. .init = snd_soc_rbtree_cache_init,
  1259. .exit = snd_soc_rbtree_cache_exit,
  1260. .read = snd_soc_rbtree_cache_read,
  1261. .write = snd_soc_rbtree_cache_write,
  1262. .sync = snd_soc_rbtree_cache_sync
  1263. }
  1264. };
  1265. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1266. {
  1267. int i;
  1268. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1269. if (cache_types[i].id == codec->compress_type)
  1270. break;
  1271. /* Fall back to flat compression */
  1272. if (i == ARRAY_SIZE(cache_types)) {
  1273. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1274. codec->compress_type);
  1275. i = 0;
  1276. }
  1277. mutex_init(&codec->cache_rw_mutex);
  1278. codec->cache_ops = &cache_types[i];
  1279. if (codec->cache_ops->init) {
  1280. if (codec->cache_ops->name)
  1281. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1282. codec->cache_ops->name, codec->name);
  1283. return codec->cache_ops->init(codec);
  1284. }
  1285. return -EINVAL;
  1286. }
  1287. /*
  1288. * NOTE: keep in mind that this function might be called
  1289. * multiple times.
  1290. */
  1291. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1292. {
  1293. if (codec->cache_ops && codec->cache_ops->exit) {
  1294. if (codec->cache_ops->name)
  1295. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1296. codec->cache_ops->name, codec->name);
  1297. return codec->cache_ops->exit(codec);
  1298. }
  1299. return -EINVAL;
  1300. }
  1301. /**
  1302. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1303. *
  1304. * @codec: CODEC to configure.
  1305. * @reg: The register index.
  1306. * @value: The value to be returned.
  1307. */
  1308. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1309. unsigned int reg, unsigned int *value)
  1310. {
  1311. int ret;
  1312. mutex_lock(&codec->cache_rw_mutex);
  1313. if (value && codec->cache_ops && codec->cache_ops->read) {
  1314. ret = codec->cache_ops->read(codec, reg, value);
  1315. mutex_unlock(&codec->cache_rw_mutex);
  1316. return ret;
  1317. }
  1318. mutex_unlock(&codec->cache_rw_mutex);
  1319. return -EINVAL;
  1320. }
  1321. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1322. /**
  1323. * snd_soc_cache_write: Set the value of a given register in the cache.
  1324. *
  1325. * @codec: CODEC to configure.
  1326. * @reg: The register index.
  1327. * @value: The new register value.
  1328. */
  1329. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1330. unsigned int reg, unsigned int value)
  1331. {
  1332. int ret;
  1333. mutex_lock(&codec->cache_rw_mutex);
  1334. if (codec->cache_ops && codec->cache_ops->write) {
  1335. ret = codec->cache_ops->write(codec, reg, value);
  1336. mutex_unlock(&codec->cache_rw_mutex);
  1337. return ret;
  1338. }
  1339. mutex_unlock(&codec->cache_rw_mutex);
  1340. return -EINVAL;
  1341. }
  1342. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1343. /**
  1344. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1345. *
  1346. * @codec: CODEC to configure.
  1347. *
  1348. * Any registers that should not be synced should be marked as
  1349. * volatile. In general drivers can choose not to use the provided
  1350. * syncing functionality if they so require.
  1351. */
  1352. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1353. {
  1354. int ret;
  1355. if (!codec->cache_sync) {
  1356. return 0;
  1357. }
  1358. if (codec->cache_ops && codec->cache_ops->sync) {
  1359. if (codec->cache_ops->name)
  1360. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1361. codec->cache_ops->name, codec->name);
  1362. ret = codec->cache_ops->sync(codec);
  1363. if (!ret)
  1364. codec->cache_sync = 0;
  1365. return ret;
  1366. }
  1367. return -EINVAL;
  1368. }
  1369. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);