qla_os.c 100 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. /*
  24. * SRB allocation cache
  25. */
  26. static struct kmem_cache *srb_cachep;
  27. /*
  28. * CT6 CTX allocation cache
  29. */
  30. static struct kmem_cache *ctx_cachep;
  31. int ql2xlogintimeout = 20;
  32. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  33. MODULE_PARM_DESC(ql2xlogintimeout,
  34. "Login timeout value in seconds.");
  35. int qlport_down_retry;
  36. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  37. MODULE_PARM_DESC(qlport_down_retry,
  38. "Maximum number of command retries to a port that returns "
  39. "a PORT-DOWN status.");
  40. int ql2xplogiabsentdevice;
  41. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  42. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  43. "Option to enable PLOGI to devices that are not present after "
  44. "a Fabric scan. This is needed for several broken switches. "
  45. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  46. int ql2xloginretrycount = 0;
  47. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  48. MODULE_PARM_DESC(ql2xloginretrycount,
  49. "Specify an alternate value for the NVRAM login retry count.");
  50. int ql2xallocfwdump = 1;
  51. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  52. MODULE_PARM_DESC(ql2xallocfwdump,
  53. "Option to enable allocation of memory for a firmware dump "
  54. "during HBA initialization. Memory allocation requirements "
  55. "vary by ISP type. Default is 1 - allocate memory.");
  56. int ql2xextended_error_logging;
  57. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  58. MODULE_PARM_DESC(ql2xextended_error_logging,
  59. "Option to enable extended error logging, "
  60. "Default is 0 - no logging. 1 - log errors.");
  61. int ql2xshiftctondsd = 6;
  62. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  63. MODULE_PARM_DESC(ql2xshiftctondsd,
  64. "Set to control shifting of command type processing "
  65. "based on total number of SG elements.");
  66. static void qla2x00_free_device(scsi_qla_host_t *);
  67. int ql2xfdmienable=1;
  68. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  69. MODULE_PARM_DESC(ql2xfdmienable,
  70. "Enables FDMI registrations. "
  71. "0 - no FDMI. Default is 1 - perform FDMI.");
  72. #define MAX_Q_DEPTH 32
  73. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  74. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  75. MODULE_PARM_DESC(ql2xmaxqdepth,
  76. "Maximum queue depth to report for target devices.");
  77. int ql2xiidmaenable=1;
  78. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  79. MODULE_PARM_DESC(ql2xiidmaenable,
  80. "Enables iIDMA settings "
  81. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  82. int ql2xmaxqueues = 1;
  83. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  84. MODULE_PARM_DESC(ql2xmaxqueues,
  85. "Enables MQ settings "
  86. "Default is 1 for single queue. Set it to number \
  87. of queues in MQ mode.");
  88. int ql2xmultique_tag;
  89. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  90. MODULE_PARM_DESC(ql2xmultique_tag,
  91. "Enables CPU affinity settings for the driver "
  92. "Default is 0 for no affinity of request and response IO. "
  93. "Set it to 1 to turn on the cpu affinity.");
  94. int ql2xfwloadbin;
  95. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  96. MODULE_PARM_DESC(ql2xfwloadbin,
  97. "Option to specify location from which to load ISP firmware:\n"
  98. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  99. " interface.\n"
  100. " 1 -- load firmware from flash.\n"
  101. " 0 -- use default semantics.\n");
  102. int ql2xetsenable;
  103. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  104. MODULE_PARM_DESC(ql2xetsenable,
  105. "Enables firmware ETS burst."
  106. "Default is 0 - skip ETS enablement.");
  107. int ql2xdbwr;
  108. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  109. MODULE_PARM_DESC(ql2xdbwr,
  110. "Option to specify scheme for request queue posting\n"
  111. " 0 -- Regular doorbell.\n"
  112. " 1 -- CAMRAM doorbell (faster).\n");
  113. int ql2xdontresethba;
  114. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  115. MODULE_PARM_DESC(ql2xdontresethba,
  116. "Option to specify reset behaviour\n"
  117. " 0 (Default) -- Reset on failure.\n"
  118. " 1 -- Do not reset on failure.\n");
  119. /*
  120. * SCSI host template entry points
  121. */
  122. static int qla2xxx_slave_configure(struct scsi_device * device);
  123. static int qla2xxx_slave_alloc(struct scsi_device *);
  124. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  125. static void qla2xxx_scan_start(struct Scsi_Host *);
  126. static void qla2xxx_slave_destroy(struct scsi_device *);
  127. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  128. void (*fn)(struct scsi_cmnd *));
  129. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  130. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  131. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  132. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  133. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  134. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  135. static int qla2x00_change_queue_type(struct scsi_device *, int);
  136. struct scsi_host_template qla2xxx_driver_template = {
  137. .module = THIS_MODULE,
  138. .name = QLA2XXX_DRIVER_NAME,
  139. .queuecommand = qla2xxx_queuecommand,
  140. .eh_abort_handler = qla2xxx_eh_abort,
  141. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  142. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  143. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  144. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  145. .slave_configure = qla2xxx_slave_configure,
  146. .slave_alloc = qla2xxx_slave_alloc,
  147. .slave_destroy = qla2xxx_slave_destroy,
  148. .scan_finished = qla2xxx_scan_finished,
  149. .scan_start = qla2xxx_scan_start,
  150. .change_queue_depth = qla2x00_change_queue_depth,
  151. .change_queue_type = qla2x00_change_queue_type,
  152. .this_id = -1,
  153. .cmd_per_lun = 3,
  154. .use_clustering = ENABLE_CLUSTERING,
  155. .sg_tablesize = SG_ALL,
  156. .max_sectors = 0xFFFF,
  157. .shost_attrs = qla2x00_host_attrs,
  158. };
  159. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  160. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  161. /* TODO Convert to inlines
  162. *
  163. * Timer routines
  164. */
  165. __inline__ void
  166. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  167. {
  168. init_timer(&vha->timer);
  169. vha->timer.expires = jiffies + interval * HZ;
  170. vha->timer.data = (unsigned long)vha;
  171. vha->timer.function = (void (*)(unsigned long))func;
  172. add_timer(&vha->timer);
  173. vha->timer_active = 1;
  174. }
  175. static inline void
  176. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  177. {
  178. /* Currently used for 82XX only. */
  179. if (vha->device_flags & DFLG_DEV_FAILED)
  180. return;
  181. mod_timer(&vha->timer, jiffies + interval * HZ);
  182. }
  183. static __inline__ void
  184. qla2x00_stop_timer(scsi_qla_host_t *vha)
  185. {
  186. del_timer_sync(&vha->timer);
  187. vha->timer_active = 0;
  188. }
  189. static int qla2x00_do_dpc(void *data);
  190. static void qla2x00_rst_aen(scsi_qla_host_t *);
  191. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  192. struct req_que **, struct rsp_que **);
  193. static void qla2x00_mem_free(struct qla_hw_data *);
  194. static void qla2x00_sp_free_dma(srb_t *);
  195. /* -------------------------------------------------------------------------- */
  196. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  197. {
  198. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  199. GFP_KERNEL);
  200. if (!ha->req_q_map) {
  201. qla_printk(KERN_WARNING, ha,
  202. "Unable to allocate memory for request queue ptrs\n");
  203. goto fail_req_map;
  204. }
  205. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  206. GFP_KERNEL);
  207. if (!ha->rsp_q_map) {
  208. qla_printk(KERN_WARNING, ha,
  209. "Unable to allocate memory for response queue ptrs\n");
  210. goto fail_rsp_map;
  211. }
  212. set_bit(0, ha->rsp_qid_map);
  213. set_bit(0, ha->req_qid_map);
  214. return 1;
  215. fail_rsp_map:
  216. kfree(ha->req_q_map);
  217. ha->req_q_map = NULL;
  218. fail_req_map:
  219. return -ENOMEM;
  220. }
  221. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  222. {
  223. if (req && req->ring)
  224. dma_free_coherent(&ha->pdev->dev,
  225. (req->length + 1) * sizeof(request_t),
  226. req->ring, req->dma);
  227. kfree(req);
  228. req = NULL;
  229. }
  230. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  231. {
  232. if (rsp && rsp->ring)
  233. dma_free_coherent(&ha->pdev->dev,
  234. (rsp->length + 1) * sizeof(response_t),
  235. rsp->ring, rsp->dma);
  236. kfree(rsp);
  237. rsp = NULL;
  238. }
  239. static void qla2x00_free_queues(struct qla_hw_data *ha)
  240. {
  241. struct req_que *req;
  242. struct rsp_que *rsp;
  243. int cnt;
  244. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  245. req = ha->req_q_map[cnt];
  246. qla2x00_free_req_que(ha, req);
  247. }
  248. kfree(ha->req_q_map);
  249. ha->req_q_map = NULL;
  250. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  251. rsp = ha->rsp_q_map[cnt];
  252. qla2x00_free_rsp_que(ha, rsp);
  253. }
  254. kfree(ha->rsp_q_map);
  255. ha->rsp_q_map = NULL;
  256. }
  257. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  258. {
  259. uint16_t options = 0;
  260. int ques, req, ret;
  261. struct qla_hw_data *ha = vha->hw;
  262. if (!(ha->fw_attributes & BIT_6)) {
  263. qla_printk(KERN_INFO, ha,
  264. "Firmware is not multi-queue capable\n");
  265. goto fail;
  266. }
  267. if (ql2xmultique_tag) {
  268. /* create a request queue for IO */
  269. options |= BIT_7;
  270. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  271. QLA_DEFAULT_QUE_QOS);
  272. if (!req) {
  273. qla_printk(KERN_WARNING, ha,
  274. "Can't create request queue\n");
  275. goto fail;
  276. }
  277. ha->wq = create_workqueue("qla2xxx_wq");
  278. vha->req = ha->req_q_map[req];
  279. options |= BIT_1;
  280. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  281. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  282. if (!ret) {
  283. qla_printk(KERN_WARNING, ha,
  284. "Response Queue create failed\n");
  285. goto fail2;
  286. }
  287. }
  288. ha->flags.cpu_affinity_enabled = 1;
  289. DEBUG2(qla_printk(KERN_INFO, ha,
  290. "CPU affinity mode enabled, no. of response"
  291. " queues:%d, no. of request queues:%d\n",
  292. ha->max_rsp_queues, ha->max_req_queues));
  293. }
  294. return 0;
  295. fail2:
  296. qla25xx_delete_queues(vha);
  297. destroy_workqueue(ha->wq);
  298. ha->wq = NULL;
  299. fail:
  300. ha->mqenable = 0;
  301. kfree(ha->req_q_map);
  302. kfree(ha->rsp_q_map);
  303. ha->max_req_queues = ha->max_rsp_queues = 1;
  304. return 1;
  305. }
  306. static char *
  307. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  308. {
  309. struct qla_hw_data *ha = vha->hw;
  310. static char *pci_bus_modes[] = {
  311. "33", "66", "100", "133",
  312. };
  313. uint16_t pci_bus;
  314. strcpy(str, "PCI");
  315. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  316. if (pci_bus) {
  317. strcat(str, "-X (");
  318. strcat(str, pci_bus_modes[pci_bus]);
  319. } else {
  320. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  321. strcat(str, " (");
  322. strcat(str, pci_bus_modes[pci_bus]);
  323. }
  324. strcat(str, " MHz)");
  325. return (str);
  326. }
  327. static char *
  328. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  329. {
  330. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  331. struct qla_hw_data *ha = vha->hw;
  332. uint32_t pci_bus;
  333. int pcie_reg;
  334. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  335. if (pcie_reg) {
  336. char lwstr[6];
  337. uint16_t pcie_lstat, lspeed, lwidth;
  338. pcie_reg += 0x12;
  339. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  340. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  341. lwidth = (pcie_lstat &
  342. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  343. strcpy(str, "PCIe (");
  344. if (lspeed == 1)
  345. strcat(str, "2.5GT/s ");
  346. else if (lspeed == 2)
  347. strcat(str, "5.0GT/s ");
  348. else
  349. strcat(str, "<unknown> ");
  350. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  351. strcat(str, lwstr);
  352. return str;
  353. }
  354. strcpy(str, "PCI");
  355. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  356. if (pci_bus == 0 || pci_bus == 8) {
  357. strcat(str, " (");
  358. strcat(str, pci_bus_modes[pci_bus >> 3]);
  359. } else {
  360. strcat(str, "-X ");
  361. if (pci_bus & BIT_2)
  362. strcat(str, "Mode 2");
  363. else
  364. strcat(str, "Mode 1");
  365. strcat(str, " (");
  366. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  367. }
  368. strcat(str, " MHz)");
  369. return str;
  370. }
  371. static char *
  372. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  373. {
  374. char un_str[10];
  375. struct qla_hw_data *ha = vha->hw;
  376. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  377. ha->fw_minor_version,
  378. ha->fw_subminor_version);
  379. if (ha->fw_attributes & BIT_9) {
  380. strcat(str, "FLX");
  381. return (str);
  382. }
  383. switch (ha->fw_attributes & 0xFF) {
  384. case 0x7:
  385. strcat(str, "EF");
  386. break;
  387. case 0x17:
  388. strcat(str, "TP");
  389. break;
  390. case 0x37:
  391. strcat(str, "IP");
  392. break;
  393. case 0x77:
  394. strcat(str, "VI");
  395. break;
  396. default:
  397. sprintf(un_str, "(%x)", ha->fw_attributes);
  398. strcat(str, un_str);
  399. break;
  400. }
  401. if (ha->fw_attributes & 0x100)
  402. strcat(str, "X");
  403. return (str);
  404. }
  405. static char *
  406. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  407. {
  408. struct qla_hw_data *ha = vha->hw;
  409. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  410. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  411. return str;
  412. }
  413. static inline srb_t *
  414. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  415. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  416. {
  417. srb_t *sp;
  418. struct qla_hw_data *ha = vha->hw;
  419. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  420. if (!sp)
  421. return sp;
  422. sp->fcport = fcport;
  423. sp->cmd = cmd;
  424. sp->flags = 0;
  425. CMD_SP(cmd) = (void *)sp;
  426. cmd->scsi_done = done;
  427. sp->ctx = NULL;
  428. return sp;
  429. }
  430. static int
  431. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  432. {
  433. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  434. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  435. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  436. struct qla_hw_data *ha = vha->hw;
  437. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  438. srb_t *sp;
  439. int rval;
  440. if (ha->flags.eeh_busy) {
  441. if (ha->flags.pci_channel_io_perm_failure)
  442. cmd->result = DID_NO_CONNECT << 16;
  443. else
  444. cmd->result = DID_REQUEUE << 16;
  445. goto qc24_fail_command;
  446. }
  447. rval = fc_remote_port_chkready(rport);
  448. if (rval) {
  449. cmd->result = rval;
  450. goto qc24_fail_command;
  451. }
  452. /* Close window on fcport/rport state-transitioning. */
  453. if (fcport->drport)
  454. goto qc24_target_busy;
  455. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  456. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  457. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  458. cmd->result = DID_NO_CONNECT << 16;
  459. goto qc24_fail_command;
  460. }
  461. goto qc24_target_busy;
  462. }
  463. spin_unlock_irq(vha->host->host_lock);
  464. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  465. if (!sp)
  466. goto qc24_host_busy_lock;
  467. rval = ha->isp_ops->start_scsi(sp);
  468. if (rval != QLA_SUCCESS)
  469. goto qc24_host_busy_free_sp;
  470. spin_lock_irq(vha->host->host_lock);
  471. return 0;
  472. qc24_host_busy_free_sp:
  473. qla2x00_sp_free_dma(sp);
  474. mempool_free(sp, ha->srb_mempool);
  475. qc24_host_busy_lock:
  476. spin_lock_irq(vha->host->host_lock);
  477. return SCSI_MLQUEUE_HOST_BUSY;
  478. qc24_target_busy:
  479. return SCSI_MLQUEUE_TARGET_BUSY;
  480. qc24_fail_command:
  481. done(cmd);
  482. return 0;
  483. }
  484. /*
  485. * qla2x00_eh_wait_on_command
  486. * Waits for the command to be returned by the Firmware for some
  487. * max time.
  488. *
  489. * Input:
  490. * cmd = Scsi Command to wait on.
  491. *
  492. * Return:
  493. * Not Found : 0
  494. * Found : 1
  495. */
  496. static int
  497. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  498. {
  499. #define ABORT_POLLING_PERIOD 1000
  500. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  501. unsigned long wait_iter = ABORT_WAIT_ITER;
  502. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  503. struct qla_hw_data *ha = vha->hw;
  504. int ret = QLA_SUCCESS;
  505. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  506. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  507. return ret;
  508. }
  509. while (CMD_SP(cmd) && wait_iter--) {
  510. msleep(ABORT_POLLING_PERIOD);
  511. }
  512. if (CMD_SP(cmd))
  513. ret = QLA_FUNCTION_FAILED;
  514. return ret;
  515. }
  516. /*
  517. * qla2x00_wait_for_hba_online
  518. * Wait till the HBA is online after going through
  519. * <= MAX_RETRIES_OF_ISP_ABORT or
  520. * finally HBA is disabled ie marked offline
  521. *
  522. * Input:
  523. * ha - pointer to host adapter structure
  524. *
  525. * Note:
  526. * Does context switching-Release SPIN_LOCK
  527. * (if any) before calling this routine.
  528. *
  529. * Return:
  530. * Success (Adapter is online) : 0
  531. * Failed (Adapter is offline/disabled) : 1
  532. */
  533. int
  534. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  535. {
  536. int return_status;
  537. unsigned long wait_online;
  538. struct qla_hw_data *ha = vha->hw;
  539. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  540. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  541. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  542. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  543. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  544. ha->dpc_active) && time_before(jiffies, wait_online)) {
  545. msleep(1000);
  546. }
  547. if (base_vha->flags.online)
  548. return_status = QLA_SUCCESS;
  549. else
  550. return_status = QLA_FUNCTION_FAILED;
  551. return (return_status);
  552. }
  553. int
  554. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  555. {
  556. int return_status;
  557. unsigned long wait_reset;
  558. struct qla_hw_data *ha = vha->hw;
  559. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  560. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  561. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  562. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  563. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  564. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  565. msleep(1000);
  566. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  567. ha->flags.chip_reset_done)
  568. break;
  569. }
  570. if (ha->flags.chip_reset_done)
  571. return_status = QLA_SUCCESS;
  572. else
  573. return_status = QLA_FUNCTION_FAILED;
  574. return return_status;
  575. }
  576. /*
  577. * qla2x00_wait_for_loop_ready
  578. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  579. * to be in LOOP_READY state.
  580. * Input:
  581. * ha - pointer to host adapter structure
  582. *
  583. * Note:
  584. * Does context switching-Release SPIN_LOCK
  585. * (if any) before calling this routine.
  586. *
  587. *
  588. * Return:
  589. * Success (LOOP_READY) : 0
  590. * Failed (LOOP_NOT_READY) : 1
  591. */
  592. static inline int
  593. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  594. {
  595. int return_status = QLA_SUCCESS;
  596. unsigned long loop_timeout ;
  597. struct qla_hw_data *ha = vha->hw;
  598. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  599. /* wait for 5 min at the max for loop to be ready */
  600. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  601. while ((!atomic_read(&base_vha->loop_down_timer) &&
  602. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  603. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  604. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  605. return_status = QLA_FUNCTION_FAILED;
  606. break;
  607. }
  608. msleep(1000);
  609. if (time_after_eq(jiffies, loop_timeout)) {
  610. return_status = QLA_FUNCTION_FAILED;
  611. break;
  612. }
  613. }
  614. return (return_status);
  615. }
  616. /**************************************************************************
  617. * qla2xxx_eh_abort
  618. *
  619. * Description:
  620. * The abort function will abort the specified command.
  621. *
  622. * Input:
  623. * cmd = Linux SCSI command packet to be aborted.
  624. *
  625. * Returns:
  626. * Either SUCCESS or FAILED.
  627. *
  628. * Note:
  629. * Only return FAILED if command not returned by firmware.
  630. **************************************************************************/
  631. static int
  632. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  633. {
  634. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  635. srb_t *sp;
  636. int ret, i;
  637. unsigned int id, lun;
  638. unsigned long serial;
  639. unsigned long flags;
  640. int wait = 0;
  641. struct qla_hw_data *ha = vha->hw;
  642. struct req_que *req = vha->req;
  643. srb_t *spt;
  644. fc_block_scsi_eh(cmd);
  645. if (!CMD_SP(cmd))
  646. return SUCCESS;
  647. ret = SUCCESS;
  648. id = cmd->device->id;
  649. lun = cmd->device->lun;
  650. serial = cmd->serial_number;
  651. spt = (srb_t *) CMD_SP(cmd);
  652. if (!spt)
  653. return SUCCESS;
  654. /* Check active list for command command. */
  655. spin_lock_irqsave(&ha->hardware_lock, flags);
  656. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  657. sp = req->outstanding_cmds[i];
  658. if (sp == NULL)
  659. continue;
  660. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID))
  661. continue;
  662. if (sp->cmd != cmd)
  663. continue;
  664. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  665. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  666. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  667. if (ha->isp_ops->abort_command(sp)) {
  668. DEBUG2(printk("%s(%ld): abort_command "
  669. "mbx failed.\n", __func__, vha->host_no));
  670. ret = FAILED;
  671. } else {
  672. DEBUG3(printk("%s(%ld): abort_command "
  673. "mbx success.\n", __func__, vha->host_no));
  674. wait = 1;
  675. }
  676. spin_lock_irqsave(&ha->hardware_lock, flags);
  677. break;
  678. }
  679. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  680. /* Wait for the command to be returned. */
  681. if (wait) {
  682. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  683. qla_printk(KERN_ERR, ha,
  684. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  685. "%x.\n", vha->host_no, id, lun, serial, ret);
  686. ret = FAILED;
  687. }
  688. }
  689. qla_printk(KERN_INFO, ha,
  690. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  691. vha->host_no, id, lun, wait, serial, ret);
  692. return ret;
  693. }
  694. enum nexus_wait_type {
  695. WAIT_HOST = 0,
  696. WAIT_TARGET,
  697. WAIT_LUN,
  698. };
  699. static int
  700. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  701. unsigned int l, srb_t *sp, enum nexus_wait_type type)
  702. {
  703. int cnt, match, status;
  704. unsigned long flags;
  705. struct qla_hw_data *ha = vha->hw;
  706. struct req_que *req;
  707. status = QLA_SUCCESS;
  708. if (!sp)
  709. return status;
  710. spin_lock_irqsave(&ha->hardware_lock, flags);
  711. req = vha->req;
  712. for (cnt = 1; status == QLA_SUCCESS &&
  713. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  714. sp = req->outstanding_cmds[cnt];
  715. if (!sp)
  716. continue;
  717. if (sp->ctx)
  718. continue;
  719. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  720. continue;
  721. match = 0;
  722. switch (type) {
  723. case WAIT_HOST:
  724. match = 1;
  725. break;
  726. case WAIT_TARGET:
  727. match = sp->cmd->device->id == t;
  728. break;
  729. case WAIT_LUN:
  730. match = (sp->cmd->device->id == t &&
  731. sp->cmd->device->lun == l);
  732. break;
  733. }
  734. if (!match)
  735. continue;
  736. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  737. status = qla2x00_eh_wait_on_command(sp->cmd);
  738. spin_lock_irqsave(&ha->hardware_lock, flags);
  739. }
  740. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  741. return status;
  742. }
  743. void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
  744. {
  745. int cnt;
  746. srb_t *sp;
  747. struct req_que *req = vha->req;
  748. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  749. "Waiting for pending commands\n"));
  750. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  751. sp = req->outstanding_cmds[cnt];
  752. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  753. sp, WAIT_HOST) == QLA_SUCCESS) {
  754. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  755. "Done wait for pending commands\n"));
  756. }
  757. }
  758. }
  759. static char *reset_errors[] = {
  760. "HBA not online",
  761. "HBA not ready",
  762. "Task management failed",
  763. "Waiting for command completions",
  764. };
  765. static int
  766. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  767. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  768. {
  769. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  770. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  771. int err;
  772. fc_block_scsi_eh(cmd);
  773. if (!fcport)
  774. return FAILED;
  775. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  776. vha->host_no, cmd->device->id, cmd->device->lun, name);
  777. err = 0;
  778. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  779. goto eh_reset_failed;
  780. err = 1;
  781. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  782. goto eh_reset_failed;
  783. err = 2;
  784. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  785. != QLA_SUCCESS)
  786. goto eh_reset_failed;
  787. err = 3;
  788. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  789. cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
  790. goto eh_reset_failed;
  791. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  792. vha->host_no, cmd->device->id, cmd->device->lun, name);
  793. return SUCCESS;
  794. eh_reset_failed:
  795. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  796. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  797. reset_errors[err]);
  798. return FAILED;
  799. }
  800. static int
  801. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  802. {
  803. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  804. struct qla_hw_data *ha = vha->hw;
  805. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  806. ha->isp_ops->lun_reset);
  807. }
  808. static int
  809. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  810. {
  811. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  812. struct qla_hw_data *ha = vha->hw;
  813. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  814. ha->isp_ops->target_reset);
  815. }
  816. /**************************************************************************
  817. * qla2xxx_eh_bus_reset
  818. *
  819. * Description:
  820. * The bus reset function will reset the bus and abort any executing
  821. * commands.
  822. *
  823. * Input:
  824. * cmd = Linux SCSI command packet of the command that cause the
  825. * bus reset.
  826. *
  827. * Returns:
  828. * SUCCESS/FAILURE (defined as macro in scsi.h).
  829. *
  830. **************************************************************************/
  831. static int
  832. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  833. {
  834. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  835. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  836. int ret = FAILED;
  837. unsigned int id, lun;
  838. unsigned long serial;
  839. srb_t *sp = (srb_t *) CMD_SP(cmd);
  840. fc_block_scsi_eh(cmd);
  841. id = cmd->device->id;
  842. lun = cmd->device->lun;
  843. serial = cmd->serial_number;
  844. if (!fcport)
  845. return ret;
  846. qla_printk(KERN_INFO, vha->hw,
  847. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  848. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  849. DEBUG2(printk("%s failed:board disabled\n",__func__));
  850. goto eh_bus_reset_done;
  851. }
  852. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  853. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  854. ret = SUCCESS;
  855. }
  856. if (ret == FAILED)
  857. goto eh_bus_reset_done;
  858. /* Flush outstanding commands. */
  859. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
  860. QLA_SUCCESS)
  861. ret = FAILED;
  862. eh_bus_reset_done:
  863. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  864. (ret == FAILED) ? "failed" : "succeded");
  865. return ret;
  866. }
  867. /**************************************************************************
  868. * qla2xxx_eh_host_reset
  869. *
  870. * Description:
  871. * The reset function will reset the Adapter.
  872. *
  873. * Input:
  874. * cmd = Linux SCSI command packet of the command that cause the
  875. * adapter reset.
  876. *
  877. * Returns:
  878. * Either SUCCESS or FAILED.
  879. *
  880. * Note:
  881. **************************************************************************/
  882. static int
  883. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  884. {
  885. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  886. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  887. struct qla_hw_data *ha = vha->hw;
  888. int ret = FAILED;
  889. unsigned int id, lun;
  890. unsigned long serial;
  891. srb_t *sp = (srb_t *) CMD_SP(cmd);
  892. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  893. fc_block_scsi_eh(cmd);
  894. id = cmd->device->id;
  895. lun = cmd->device->lun;
  896. serial = cmd->serial_number;
  897. if (!fcport)
  898. return ret;
  899. qla_printk(KERN_INFO, ha,
  900. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  901. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  902. goto eh_host_reset_lock;
  903. /*
  904. * Fixme-may be dpc thread is active and processing
  905. * loop_resync,so wait a while for it to
  906. * be completed and then issue big hammer.Otherwise
  907. * it may cause I/O failure as big hammer marks the
  908. * devices as lost kicking of the port_down_timer
  909. * while dpc is stuck for the mailbox to complete.
  910. */
  911. qla2x00_wait_for_loop_ready(vha);
  912. if (vha != base_vha) {
  913. if (qla2x00_vp_abort_isp(vha))
  914. goto eh_host_reset_lock;
  915. } else {
  916. if (IS_QLA82XX(vha->hw)) {
  917. if (!qla82xx_fcoe_ctx_reset(vha)) {
  918. /* Ctx reset success */
  919. ret = SUCCESS;
  920. goto eh_host_reset_lock;
  921. }
  922. /* fall thru if ctx reset failed */
  923. }
  924. if (ha->wq)
  925. flush_workqueue(ha->wq);
  926. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  927. if (ha->isp_ops->abort_isp(base_vha)) {
  928. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  929. /* failed. schedule dpc to try */
  930. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  931. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  932. goto eh_host_reset_lock;
  933. }
  934. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  935. }
  936. /* Waiting for command to be returned to OS.*/
  937. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
  938. QLA_SUCCESS)
  939. ret = SUCCESS;
  940. eh_host_reset_lock:
  941. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  942. (ret == FAILED) ? "failed" : "succeded");
  943. return ret;
  944. }
  945. /*
  946. * qla2x00_loop_reset
  947. * Issue loop reset.
  948. *
  949. * Input:
  950. * ha = adapter block pointer.
  951. *
  952. * Returns:
  953. * 0 = success
  954. */
  955. int
  956. qla2x00_loop_reset(scsi_qla_host_t *vha)
  957. {
  958. int ret;
  959. struct fc_port *fcport;
  960. struct qla_hw_data *ha = vha->hw;
  961. if (ha->flags.enable_target_reset) {
  962. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  963. if (fcport->port_type != FCT_TARGET)
  964. continue;
  965. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  966. if (ret != QLA_SUCCESS) {
  967. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  968. "target_reset=%d d_id=%x.\n", __func__,
  969. vha->host_no, ret, fcport->d_id.b24));
  970. }
  971. }
  972. }
  973. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  974. ret = qla2x00_full_login_lip(vha);
  975. if (ret != QLA_SUCCESS) {
  976. DEBUG2_3(printk("%s(%ld): failed: "
  977. "full_login_lip=%d.\n", __func__, vha->host_no,
  978. ret));
  979. }
  980. atomic_set(&vha->loop_state, LOOP_DOWN);
  981. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  982. qla2x00_mark_all_devices_lost(vha, 0);
  983. qla2x00_wait_for_loop_ready(vha);
  984. }
  985. if (ha->flags.enable_lip_reset) {
  986. ret = qla2x00_lip_reset(vha);
  987. if (ret != QLA_SUCCESS) {
  988. DEBUG2_3(printk("%s(%ld): failed: "
  989. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  990. } else
  991. qla2x00_wait_for_loop_ready(vha);
  992. }
  993. /* Issue marker command only when we are going to start the I/O */
  994. vha->marker_needed = 1;
  995. return QLA_SUCCESS;
  996. }
  997. void
  998. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  999. {
  1000. int que, cnt;
  1001. unsigned long flags;
  1002. srb_t *sp;
  1003. struct srb_ctx *ctx;
  1004. struct qla_hw_data *ha = vha->hw;
  1005. struct req_que *req;
  1006. spin_lock_irqsave(&ha->hardware_lock, flags);
  1007. for (que = 0; que < ha->max_req_queues; que++) {
  1008. req = ha->req_q_map[que];
  1009. if (!req)
  1010. continue;
  1011. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1012. sp = req->outstanding_cmds[cnt];
  1013. if (sp) {
  1014. req->outstanding_cmds[cnt] = NULL;
  1015. if (!sp->ctx ||
  1016. (sp->flags & SRB_FCP_CMND_DMA_VALID)) {
  1017. sp->cmd->result = res;
  1018. qla2x00_sp_compl(ha, sp);
  1019. } else {
  1020. ctx = sp->ctx;
  1021. if (ctx->type == SRB_LOGIN_CMD ||
  1022. ctx->type == SRB_LOGOUT_CMD) {
  1023. del_timer_sync(&ctx->timer);
  1024. ctx->free(sp);
  1025. } else {
  1026. struct srb_bsg *sp_bsg =
  1027. (struct srb_bsg *)sp->ctx;
  1028. struct fc_bsg_job *bsg_job =
  1029. sp_bsg->bsg_job;
  1030. if (bsg_job->request->msgcode
  1031. == FC_BSG_HST_CT)
  1032. kfree(sp->fcport);
  1033. bsg_job->req->errors = 0;
  1034. bsg_job->reply->result = res;
  1035. bsg_job->job_done(
  1036. sp_bsg->bsg_job);
  1037. kfree(sp->ctx);
  1038. mempool_free(sp,
  1039. ha->srb_mempool);
  1040. }
  1041. }
  1042. }
  1043. }
  1044. }
  1045. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1046. }
  1047. static int
  1048. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1049. {
  1050. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1051. if (!rport || fc_remote_port_chkready(rport))
  1052. return -ENXIO;
  1053. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1054. return 0;
  1055. }
  1056. static int
  1057. qla2xxx_slave_configure(struct scsi_device *sdev)
  1058. {
  1059. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1060. struct qla_hw_data *ha = vha->hw;
  1061. struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
  1062. struct req_que *req = vha->req;
  1063. if (sdev->tagged_supported)
  1064. scsi_activate_tcq(sdev, req->max_q_depth);
  1065. else
  1066. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1067. rport->dev_loss_tmo = ha->port_down_retry_count;
  1068. return 0;
  1069. }
  1070. static void
  1071. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1072. {
  1073. sdev->hostdata = NULL;
  1074. }
  1075. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1076. {
  1077. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1078. if (!scsi_track_queue_full(sdev, qdepth))
  1079. return;
  1080. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1081. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1082. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1083. sdev->queue_depth));
  1084. }
  1085. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1086. {
  1087. fc_port_t *fcport = sdev->hostdata;
  1088. struct scsi_qla_host *vha = fcport->vha;
  1089. struct qla_hw_data *ha = vha->hw;
  1090. struct req_que *req = NULL;
  1091. req = vha->req;
  1092. if (!req)
  1093. return;
  1094. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1095. return;
  1096. if (sdev->ordered_tags)
  1097. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1098. else
  1099. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1100. DEBUG2(qla_printk(KERN_INFO, ha,
  1101. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1102. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1103. sdev->queue_depth));
  1104. }
  1105. static int
  1106. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1107. {
  1108. switch (reason) {
  1109. case SCSI_QDEPTH_DEFAULT:
  1110. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1111. break;
  1112. case SCSI_QDEPTH_QFULL:
  1113. qla2x00_handle_queue_full(sdev, qdepth);
  1114. break;
  1115. case SCSI_QDEPTH_RAMP_UP:
  1116. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1117. break;
  1118. default:
  1119. return -EOPNOTSUPP;
  1120. }
  1121. return sdev->queue_depth;
  1122. }
  1123. static int
  1124. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1125. {
  1126. if (sdev->tagged_supported) {
  1127. scsi_set_tag_type(sdev, tag_type);
  1128. if (tag_type)
  1129. scsi_activate_tcq(sdev, sdev->queue_depth);
  1130. else
  1131. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1132. } else
  1133. tag_type = 0;
  1134. return tag_type;
  1135. }
  1136. /**
  1137. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1138. * @ha: HA context
  1139. *
  1140. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1141. * supported addressing method.
  1142. */
  1143. static void
  1144. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1145. {
  1146. /* Assume a 32bit DMA mask. */
  1147. ha->flags.enable_64bit_addressing = 0;
  1148. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1149. /* Any upper-dword bits set? */
  1150. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1151. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1152. /* Ok, a 64bit DMA mask is applicable. */
  1153. ha->flags.enable_64bit_addressing = 1;
  1154. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1155. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1156. return;
  1157. }
  1158. }
  1159. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1160. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1161. }
  1162. static void
  1163. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1164. {
  1165. unsigned long flags = 0;
  1166. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1167. spin_lock_irqsave(&ha->hardware_lock, flags);
  1168. ha->interrupts_on = 1;
  1169. /* enable risc and host interrupts */
  1170. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1171. RD_REG_WORD(&reg->ictrl);
  1172. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1173. }
  1174. static void
  1175. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1176. {
  1177. unsigned long flags = 0;
  1178. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1179. spin_lock_irqsave(&ha->hardware_lock, flags);
  1180. ha->interrupts_on = 0;
  1181. /* disable risc and host interrupts */
  1182. WRT_REG_WORD(&reg->ictrl, 0);
  1183. RD_REG_WORD(&reg->ictrl);
  1184. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1185. }
  1186. static void
  1187. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1188. {
  1189. unsigned long flags = 0;
  1190. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1191. spin_lock_irqsave(&ha->hardware_lock, flags);
  1192. ha->interrupts_on = 1;
  1193. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1194. RD_REG_DWORD(&reg->ictrl);
  1195. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1196. }
  1197. static void
  1198. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1199. {
  1200. unsigned long flags = 0;
  1201. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1202. if (IS_NOPOLLING_TYPE(ha))
  1203. return;
  1204. spin_lock_irqsave(&ha->hardware_lock, flags);
  1205. ha->interrupts_on = 0;
  1206. WRT_REG_DWORD(&reg->ictrl, 0);
  1207. RD_REG_DWORD(&reg->ictrl);
  1208. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1209. }
  1210. static struct isp_operations qla2100_isp_ops = {
  1211. .pci_config = qla2100_pci_config,
  1212. .reset_chip = qla2x00_reset_chip,
  1213. .chip_diag = qla2x00_chip_diag,
  1214. .config_rings = qla2x00_config_rings,
  1215. .reset_adapter = qla2x00_reset_adapter,
  1216. .nvram_config = qla2x00_nvram_config,
  1217. .update_fw_options = qla2x00_update_fw_options,
  1218. .load_risc = qla2x00_load_risc,
  1219. .pci_info_str = qla2x00_pci_info_str,
  1220. .fw_version_str = qla2x00_fw_version_str,
  1221. .intr_handler = qla2100_intr_handler,
  1222. .enable_intrs = qla2x00_enable_intrs,
  1223. .disable_intrs = qla2x00_disable_intrs,
  1224. .abort_command = qla2x00_abort_command,
  1225. .target_reset = qla2x00_abort_target,
  1226. .lun_reset = qla2x00_lun_reset,
  1227. .fabric_login = qla2x00_login_fabric,
  1228. .fabric_logout = qla2x00_fabric_logout,
  1229. .calc_req_entries = qla2x00_calc_iocbs_32,
  1230. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1231. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1232. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1233. .read_nvram = qla2x00_read_nvram_data,
  1234. .write_nvram = qla2x00_write_nvram_data,
  1235. .fw_dump = qla2100_fw_dump,
  1236. .beacon_on = NULL,
  1237. .beacon_off = NULL,
  1238. .beacon_blink = NULL,
  1239. .read_optrom = qla2x00_read_optrom_data,
  1240. .write_optrom = qla2x00_write_optrom_data,
  1241. .get_flash_version = qla2x00_get_flash_version,
  1242. .start_scsi = qla2x00_start_scsi,
  1243. .abort_isp = qla2x00_abort_isp,
  1244. };
  1245. static struct isp_operations qla2300_isp_ops = {
  1246. .pci_config = qla2300_pci_config,
  1247. .reset_chip = qla2x00_reset_chip,
  1248. .chip_diag = qla2x00_chip_diag,
  1249. .config_rings = qla2x00_config_rings,
  1250. .reset_adapter = qla2x00_reset_adapter,
  1251. .nvram_config = qla2x00_nvram_config,
  1252. .update_fw_options = qla2x00_update_fw_options,
  1253. .load_risc = qla2x00_load_risc,
  1254. .pci_info_str = qla2x00_pci_info_str,
  1255. .fw_version_str = qla2x00_fw_version_str,
  1256. .intr_handler = qla2300_intr_handler,
  1257. .enable_intrs = qla2x00_enable_intrs,
  1258. .disable_intrs = qla2x00_disable_intrs,
  1259. .abort_command = qla2x00_abort_command,
  1260. .target_reset = qla2x00_abort_target,
  1261. .lun_reset = qla2x00_lun_reset,
  1262. .fabric_login = qla2x00_login_fabric,
  1263. .fabric_logout = qla2x00_fabric_logout,
  1264. .calc_req_entries = qla2x00_calc_iocbs_32,
  1265. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1266. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1267. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1268. .read_nvram = qla2x00_read_nvram_data,
  1269. .write_nvram = qla2x00_write_nvram_data,
  1270. .fw_dump = qla2300_fw_dump,
  1271. .beacon_on = qla2x00_beacon_on,
  1272. .beacon_off = qla2x00_beacon_off,
  1273. .beacon_blink = qla2x00_beacon_blink,
  1274. .read_optrom = qla2x00_read_optrom_data,
  1275. .write_optrom = qla2x00_write_optrom_data,
  1276. .get_flash_version = qla2x00_get_flash_version,
  1277. .start_scsi = qla2x00_start_scsi,
  1278. .abort_isp = qla2x00_abort_isp,
  1279. };
  1280. static struct isp_operations qla24xx_isp_ops = {
  1281. .pci_config = qla24xx_pci_config,
  1282. .reset_chip = qla24xx_reset_chip,
  1283. .chip_diag = qla24xx_chip_diag,
  1284. .config_rings = qla24xx_config_rings,
  1285. .reset_adapter = qla24xx_reset_adapter,
  1286. .nvram_config = qla24xx_nvram_config,
  1287. .update_fw_options = qla24xx_update_fw_options,
  1288. .load_risc = qla24xx_load_risc,
  1289. .pci_info_str = qla24xx_pci_info_str,
  1290. .fw_version_str = qla24xx_fw_version_str,
  1291. .intr_handler = qla24xx_intr_handler,
  1292. .enable_intrs = qla24xx_enable_intrs,
  1293. .disable_intrs = qla24xx_disable_intrs,
  1294. .abort_command = qla24xx_abort_command,
  1295. .target_reset = qla24xx_abort_target,
  1296. .lun_reset = qla24xx_lun_reset,
  1297. .fabric_login = qla24xx_login_fabric,
  1298. .fabric_logout = qla24xx_fabric_logout,
  1299. .calc_req_entries = NULL,
  1300. .build_iocbs = NULL,
  1301. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1302. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1303. .read_nvram = qla24xx_read_nvram_data,
  1304. .write_nvram = qla24xx_write_nvram_data,
  1305. .fw_dump = qla24xx_fw_dump,
  1306. .beacon_on = qla24xx_beacon_on,
  1307. .beacon_off = qla24xx_beacon_off,
  1308. .beacon_blink = qla24xx_beacon_blink,
  1309. .read_optrom = qla24xx_read_optrom_data,
  1310. .write_optrom = qla24xx_write_optrom_data,
  1311. .get_flash_version = qla24xx_get_flash_version,
  1312. .start_scsi = qla24xx_start_scsi,
  1313. .abort_isp = qla2x00_abort_isp,
  1314. };
  1315. static struct isp_operations qla25xx_isp_ops = {
  1316. .pci_config = qla25xx_pci_config,
  1317. .reset_chip = qla24xx_reset_chip,
  1318. .chip_diag = qla24xx_chip_diag,
  1319. .config_rings = qla24xx_config_rings,
  1320. .reset_adapter = qla24xx_reset_adapter,
  1321. .nvram_config = qla24xx_nvram_config,
  1322. .update_fw_options = qla24xx_update_fw_options,
  1323. .load_risc = qla24xx_load_risc,
  1324. .pci_info_str = qla24xx_pci_info_str,
  1325. .fw_version_str = qla24xx_fw_version_str,
  1326. .intr_handler = qla24xx_intr_handler,
  1327. .enable_intrs = qla24xx_enable_intrs,
  1328. .disable_intrs = qla24xx_disable_intrs,
  1329. .abort_command = qla24xx_abort_command,
  1330. .target_reset = qla24xx_abort_target,
  1331. .lun_reset = qla24xx_lun_reset,
  1332. .fabric_login = qla24xx_login_fabric,
  1333. .fabric_logout = qla24xx_fabric_logout,
  1334. .calc_req_entries = NULL,
  1335. .build_iocbs = NULL,
  1336. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1337. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1338. .read_nvram = qla25xx_read_nvram_data,
  1339. .write_nvram = qla25xx_write_nvram_data,
  1340. .fw_dump = qla25xx_fw_dump,
  1341. .beacon_on = qla24xx_beacon_on,
  1342. .beacon_off = qla24xx_beacon_off,
  1343. .beacon_blink = qla24xx_beacon_blink,
  1344. .read_optrom = qla25xx_read_optrom_data,
  1345. .write_optrom = qla24xx_write_optrom_data,
  1346. .get_flash_version = qla24xx_get_flash_version,
  1347. .start_scsi = qla24xx_start_scsi,
  1348. .abort_isp = qla2x00_abort_isp,
  1349. };
  1350. static struct isp_operations qla81xx_isp_ops = {
  1351. .pci_config = qla25xx_pci_config,
  1352. .reset_chip = qla24xx_reset_chip,
  1353. .chip_diag = qla24xx_chip_diag,
  1354. .config_rings = qla24xx_config_rings,
  1355. .reset_adapter = qla24xx_reset_adapter,
  1356. .nvram_config = qla81xx_nvram_config,
  1357. .update_fw_options = qla81xx_update_fw_options,
  1358. .load_risc = qla81xx_load_risc,
  1359. .pci_info_str = qla24xx_pci_info_str,
  1360. .fw_version_str = qla24xx_fw_version_str,
  1361. .intr_handler = qla24xx_intr_handler,
  1362. .enable_intrs = qla24xx_enable_intrs,
  1363. .disable_intrs = qla24xx_disable_intrs,
  1364. .abort_command = qla24xx_abort_command,
  1365. .target_reset = qla24xx_abort_target,
  1366. .lun_reset = qla24xx_lun_reset,
  1367. .fabric_login = qla24xx_login_fabric,
  1368. .fabric_logout = qla24xx_fabric_logout,
  1369. .calc_req_entries = NULL,
  1370. .build_iocbs = NULL,
  1371. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1372. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1373. .read_nvram = NULL,
  1374. .write_nvram = NULL,
  1375. .fw_dump = qla81xx_fw_dump,
  1376. .beacon_on = qla24xx_beacon_on,
  1377. .beacon_off = qla24xx_beacon_off,
  1378. .beacon_blink = qla24xx_beacon_blink,
  1379. .read_optrom = qla25xx_read_optrom_data,
  1380. .write_optrom = qla24xx_write_optrom_data,
  1381. .get_flash_version = qla24xx_get_flash_version,
  1382. .start_scsi = qla24xx_start_scsi,
  1383. .abort_isp = qla2x00_abort_isp,
  1384. };
  1385. static struct isp_operations qla82xx_isp_ops = {
  1386. .pci_config = qla82xx_pci_config,
  1387. .reset_chip = qla82xx_reset_chip,
  1388. .chip_diag = qla24xx_chip_diag,
  1389. .config_rings = qla82xx_config_rings,
  1390. .reset_adapter = qla24xx_reset_adapter,
  1391. .nvram_config = qla81xx_nvram_config,
  1392. .update_fw_options = qla24xx_update_fw_options,
  1393. .load_risc = qla82xx_load_risc,
  1394. .pci_info_str = qla82xx_pci_info_str,
  1395. .fw_version_str = qla24xx_fw_version_str,
  1396. .intr_handler = qla82xx_intr_handler,
  1397. .enable_intrs = qla82xx_enable_intrs,
  1398. .disable_intrs = qla82xx_disable_intrs,
  1399. .abort_command = qla24xx_abort_command,
  1400. .target_reset = qla24xx_abort_target,
  1401. .lun_reset = qla24xx_lun_reset,
  1402. .fabric_login = qla24xx_login_fabric,
  1403. .fabric_logout = qla24xx_fabric_logout,
  1404. .calc_req_entries = NULL,
  1405. .build_iocbs = NULL,
  1406. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1407. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1408. .read_nvram = qla24xx_read_nvram_data,
  1409. .write_nvram = qla24xx_write_nvram_data,
  1410. .fw_dump = qla24xx_fw_dump,
  1411. .beacon_on = qla24xx_beacon_on,
  1412. .beacon_off = qla24xx_beacon_off,
  1413. .beacon_blink = qla24xx_beacon_blink,
  1414. .read_optrom = qla82xx_read_optrom_data,
  1415. .write_optrom = qla82xx_write_optrom_data,
  1416. .get_flash_version = qla24xx_get_flash_version,
  1417. .start_scsi = qla82xx_start_scsi,
  1418. .abort_isp = qla82xx_abort_isp,
  1419. };
  1420. static inline void
  1421. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1422. {
  1423. ha->device_type = DT_EXTENDED_IDS;
  1424. switch (ha->pdev->device) {
  1425. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1426. ha->device_type |= DT_ISP2100;
  1427. ha->device_type &= ~DT_EXTENDED_IDS;
  1428. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1429. break;
  1430. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1431. ha->device_type |= DT_ISP2200;
  1432. ha->device_type &= ~DT_EXTENDED_IDS;
  1433. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1434. break;
  1435. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1436. ha->device_type |= DT_ISP2300;
  1437. ha->device_type |= DT_ZIO_SUPPORTED;
  1438. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1439. break;
  1440. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1441. ha->device_type |= DT_ISP2312;
  1442. ha->device_type |= DT_ZIO_SUPPORTED;
  1443. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1444. break;
  1445. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1446. ha->device_type |= DT_ISP2322;
  1447. ha->device_type |= DT_ZIO_SUPPORTED;
  1448. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1449. ha->pdev->subsystem_device == 0x0170)
  1450. ha->device_type |= DT_OEM_001;
  1451. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1452. break;
  1453. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1454. ha->device_type |= DT_ISP6312;
  1455. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1456. break;
  1457. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1458. ha->device_type |= DT_ISP6322;
  1459. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1460. break;
  1461. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1462. ha->device_type |= DT_ISP2422;
  1463. ha->device_type |= DT_ZIO_SUPPORTED;
  1464. ha->device_type |= DT_FWI2;
  1465. ha->device_type |= DT_IIDMA;
  1466. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1467. break;
  1468. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1469. ha->device_type |= DT_ISP2432;
  1470. ha->device_type |= DT_ZIO_SUPPORTED;
  1471. ha->device_type |= DT_FWI2;
  1472. ha->device_type |= DT_IIDMA;
  1473. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1474. break;
  1475. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1476. ha->device_type |= DT_ISP8432;
  1477. ha->device_type |= DT_ZIO_SUPPORTED;
  1478. ha->device_type |= DT_FWI2;
  1479. ha->device_type |= DT_IIDMA;
  1480. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1481. break;
  1482. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1483. ha->device_type |= DT_ISP5422;
  1484. ha->device_type |= DT_FWI2;
  1485. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1486. break;
  1487. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1488. ha->device_type |= DT_ISP5432;
  1489. ha->device_type |= DT_FWI2;
  1490. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1491. break;
  1492. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1493. ha->device_type |= DT_ISP2532;
  1494. ha->device_type |= DT_ZIO_SUPPORTED;
  1495. ha->device_type |= DT_FWI2;
  1496. ha->device_type |= DT_IIDMA;
  1497. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1498. break;
  1499. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1500. ha->device_type |= DT_ISP8001;
  1501. ha->device_type |= DT_ZIO_SUPPORTED;
  1502. ha->device_type |= DT_FWI2;
  1503. ha->device_type |= DT_IIDMA;
  1504. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1505. break;
  1506. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1507. ha->device_type |= DT_ISP8021;
  1508. ha->device_type |= DT_ZIO_SUPPORTED;
  1509. ha->device_type |= DT_FWI2;
  1510. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1511. /* Initialize 82XX ISP flags */
  1512. qla82xx_init_flags(ha);
  1513. break;
  1514. }
  1515. if (IS_QLA82XX(ha))
  1516. ha->port_no = !(ha->portnum & 1);
  1517. else
  1518. /* Get adapter physical port no from interrupt pin register. */
  1519. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1520. if (ha->port_no & 1)
  1521. ha->flags.port0 = 1;
  1522. else
  1523. ha->flags.port0 = 0;
  1524. }
  1525. static int
  1526. qla2x00_iospace_config(struct qla_hw_data *ha)
  1527. {
  1528. resource_size_t pio;
  1529. uint16_t msix;
  1530. int cpus;
  1531. if (IS_QLA82XX(ha))
  1532. return qla82xx_iospace_config(ha);
  1533. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1534. QLA2XXX_DRIVER_NAME)) {
  1535. qla_printk(KERN_WARNING, ha,
  1536. "Failed to reserve PIO/MMIO regions (%s)\n",
  1537. pci_name(ha->pdev));
  1538. goto iospace_error_exit;
  1539. }
  1540. if (!(ha->bars & 1))
  1541. goto skip_pio;
  1542. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1543. pio = pci_resource_start(ha->pdev, 0);
  1544. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1545. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1546. qla_printk(KERN_WARNING, ha,
  1547. "Invalid PCI I/O region size (%s)...\n",
  1548. pci_name(ha->pdev));
  1549. pio = 0;
  1550. }
  1551. } else {
  1552. qla_printk(KERN_WARNING, ha,
  1553. "region #0 not a PIO resource (%s)...\n",
  1554. pci_name(ha->pdev));
  1555. pio = 0;
  1556. }
  1557. ha->pio_address = pio;
  1558. skip_pio:
  1559. /* Use MMIO operations for all accesses. */
  1560. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1561. qla_printk(KERN_ERR, ha,
  1562. "region #1 not an MMIO resource (%s), aborting\n",
  1563. pci_name(ha->pdev));
  1564. goto iospace_error_exit;
  1565. }
  1566. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1567. qla_printk(KERN_ERR, ha,
  1568. "Invalid PCI mem region size (%s), aborting\n",
  1569. pci_name(ha->pdev));
  1570. goto iospace_error_exit;
  1571. }
  1572. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1573. if (!ha->iobase) {
  1574. qla_printk(KERN_ERR, ha,
  1575. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1576. goto iospace_error_exit;
  1577. }
  1578. /* Determine queue resources */
  1579. ha->max_req_queues = ha->max_rsp_queues = 1;
  1580. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1581. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1582. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1583. goto mqiobase_exit;
  1584. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1585. pci_resource_len(ha->pdev, 3));
  1586. if (ha->mqiobase) {
  1587. /* Read MSIX vector size of the board */
  1588. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1589. ha->msix_count = msix;
  1590. /* Max queues are bounded by available msix vectors */
  1591. /* queue 0 uses two msix vectors */
  1592. if (ql2xmultique_tag) {
  1593. cpus = num_online_cpus();
  1594. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1595. (cpus + 1) : (ha->msix_count - 1);
  1596. ha->max_req_queues = 2;
  1597. } else if (ql2xmaxqueues > 1) {
  1598. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1599. QLA_MQ_SIZE : ql2xmaxqueues;
  1600. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1601. " of request queues:%d\n", ha->max_req_queues));
  1602. }
  1603. qla_printk(KERN_INFO, ha,
  1604. "MSI-X vector count: %d\n", msix);
  1605. } else
  1606. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1607. mqiobase_exit:
  1608. ha->msix_count = ha->max_rsp_queues + 1;
  1609. return (0);
  1610. iospace_error_exit:
  1611. return (-ENOMEM);
  1612. }
  1613. static void
  1614. qla2xxx_scan_start(struct Scsi_Host *shost)
  1615. {
  1616. scsi_qla_host_t *vha = shost_priv(shost);
  1617. if (vha->hw->flags.running_gold_fw)
  1618. return;
  1619. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1620. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1621. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1622. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1623. }
  1624. static int
  1625. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1626. {
  1627. scsi_qla_host_t *vha = shost_priv(shost);
  1628. if (!vha->host)
  1629. return 1;
  1630. if (time > vha->hw->loop_reset_delay * HZ)
  1631. return 1;
  1632. return atomic_read(&vha->loop_state) == LOOP_READY;
  1633. }
  1634. /*
  1635. * PCI driver interface
  1636. */
  1637. static int __devinit
  1638. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1639. {
  1640. int ret = -ENODEV;
  1641. struct Scsi_Host *host;
  1642. scsi_qla_host_t *base_vha = NULL;
  1643. struct qla_hw_data *ha;
  1644. char pci_info[30];
  1645. char fw_str[30];
  1646. struct scsi_host_template *sht;
  1647. int bars, max_id, mem_only = 0;
  1648. uint16_t req_length = 0, rsp_length = 0;
  1649. struct req_que *req = NULL;
  1650. struct rsp_que *rsp = NULL;
  1651. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1652. sht = &qla2xxx_driver_template;
  1653. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1654. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1655. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1656. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1657. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1658. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1659. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1660. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1661. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1662. mem_only = 1;
  1663. }
  1664. if (mem_only) {
  1665. if (pci_enable_device_mem(pdev))
  1666. goto probe_out;
  1667. } else {
  1668. if (pci_enable_device(pdev))
  1669. goto probe_out;
  1670. }
  1671. /* This may fail but that's ok */
  1672. pci_enable_pcie_error_reporting(pdev);
  1673. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1674. if (!ha) {
  1675. DEBUG(printk("Unable to allocate memory for ha\n"));
  1676. goto probe_out;
  1677. }
  1678. ha->pdev = pdev;
  1679. /* Clear our data area */
  1680. ha->bars = bars;
  1681. ha->mem_only = mem_only;
  1682. spin_lock_init(&ha->hardware_lock);
  1683. /* Set ISP-type information. */
  1684. qla2x00_set_isp_flags(ha);
  1685. /* Set EEH reset type to fundamental if required by hba */
  1686. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1687. pdev->needs_freset = 1;
  1688. }
  1689. /* Configure PCI I/O space */
  1690. ret = qla2x00_iospace_config(ha);
  1691. if (ret)
  1692. goto probe_hw_failed;
  1693. qla_printk(KERN_INFO, ha,
  1694. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1695. ha->iobase);
  1696. ha->prev_topology = 0;
  1697. ha->init_cb_size = sizeof(init_cb_t);
  1698. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1699. ha->optrom_size = OPTROM_SIZE_2300;
  1700. /* Assign ISP specific operations. */
  1701. max_id = MAX_TARGETS_2200;
  1702. if (IS_QLA2100(ha)) {
  1703. max_id = MAX_TARGETS_2100;
  1704. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1705. req_length = REQUEST_ENTRY_CNT_2100;
  1706. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1707. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1708. ha->gid_list_info_size = 4;
  1709. ha->flash_conf_off = ~0;
  1710. ha->flash_data_off = ~0;
  1711. ha->nvram_conf_off = ~0;
  1712. ha->nvram_data_off = ~0;
  1713. ha->isp_ops = &qla2100_isp_ops;
  1714. } else if (IS_QLA2200(ha)) {
  1715. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1716. req_length = REQUEST_ENTRY_CNT_2200;
  1717. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1718. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1719. ha->gid_list_info_size = 4;
  1720. ha->flash_conf_off = ~0;
  1721. ha->flash_data_off = ~0;
  1722. ha->nvram_conf_off = ~0;
  1723. ha->nvram_data_off = ~0;
  1724. ha->isp_ops = &qla2100_isp_ops;
  1725. } else if (IS_QLA23XX(ha)) {
  1726. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1727. req_length = REQUEST_ENTRY_CNT_2200;
  1728. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1729. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1730. ha->gid_list_info_size = 6;
  1731. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1732. ha->optrom_size = OPTROM_SIZE_2322;
  1733. ha->flash_conf_off = ~0;
  1734. ha->flash_data_off = ~0;
  1735. ha->nvram_conf_off = ~0;
  1736. ha->nvram_data_off = ~0;
  1737. ha->isp_ops = &qla2300_isp_ops;
  1738. } else if (IS_QLA24XX_TYPE(ha)) {
  1739. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1740. req_length = REQUEST_ENTRY_CNT_24XX;
  1741. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1742. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1743. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1744. ha->gid_list_info_size = 8;
  1745. ha->optrom_size = OPTROM_SIZE_24XX;
  1746. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1747. ha->isp_ops = &qla24xx_isp_ops;
  1748. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1749. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1750. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1751. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1752. } else if (IS_QLA25XX(ha)) {
  1753. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1754. req_length = REQUEST_ENTRY_CNT_24XX;
  1755. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1756. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1757. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1758. ha->gid_list_info_size = 8;
  1759. ha->optrom_size = OPTROM_SIZE_25XX;
  1760. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1761. ha->isp_ops = &qla25xx_isp_ops;
  1762. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1763. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1764. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1765. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1766. } else if (IS_QLA81XX(ha)) {
  1767. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1768. req_length = REQUEST_ENTRY_CNT_24XX;
  1769. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1770. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1771. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1772. ha->gid_list_info_size = 8;
  1773. ha->optrom_size = OPTROM_SIZE_81XX;
  1774. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1775. ha->isp_ops = &qla81xx_isp_ops;
  1776. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1777. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1778. ha->nvram_conf_off = ~0;
  1779. ha->nvram_data_off = ~0;
  1780. } else if (IS_QLA82XX(ha)) {
  1781. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1782. req_length = REQUEST_ENTRY_CNT_82XX;
  1783. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1784. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1785. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1786. ha->gid_list_info_size = 8;
  1787. ha->optrom_size = OPTROM_SIZE_82XX;
  1788. ha->isp_ops = &qla82xx_isp_ops;
  1789. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1790. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1791. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1792. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1793. }
  1794. mutex_init(&ha->vport_lock);
  1795. init_completion(&ha->mbx_cmd_comp);
  1796. complete(&ha->mbx_cmd_comp);
  1797. init_completion(&ha->mbx_intr_comp);
  1798. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1799. qla2x00_config_dma_addressing(ha);
  1800. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1801. if (!ret) {
  1802. qla_printk(KERN_WARNING, ha,
  1803. "[ERROR] Failed to allocate memory for adapter\n");
  1804. goto probe_hw_failed;
  1805. }
  1806. req->max_q_depth = MAX_Q_DEPTH;
  1807. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1808. req->max_q_depth = ql2xmaxqdepth;
  1809. base_vha = qla2x00_create_host(sht, ha);
  1810. if (!base_vha) {
  1811. qla_printk(KERN_WARNING, ha,
  1812. "[ERROR] Failed to allocate memory for scsi_host\n");
  1813. ret = -ENOMEM;
  1814. qla2x00_mem_free(ha);
  1815. qla2x00_free_req_que(ha, req);
  1816. qla2x00_free_rsp_que(ha, rsp);
  1817. goto probe_hw_failed;
  1818. }
  1819. pci_set_drvdata(pdev, base_vha);
  1820. host = base_vha->host;
  1821. base_vha->req = req;
  1822. host->can_queue = req->length + 128;
  1823. if (IS_QLA2XXX_MIDTYPE(ha))
  1824. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1825. else
  1826. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1827. base_vha->vp_idx;
  1828. if (IS_QLA2100(ha))
  1829. host->sg_tablesize = 32;
  1830. host->max_id = max_id;
  1831. host->this_id = 255;
  1832. host->cmd_per_lun = 3;
  1833. host->unique_id = host->host_no;
  1834. host->max_cmd_len = MAX_CMDSZ;
  1835. host->max_channel = MAX_BUSES - 1;
  1836. host->max_lun = MAX_LUNS;
  1837. host->transportt = qla2xxx_transport_template;
  1838. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1839. /* Set up the irqs */
  1840. ret = qla2x00_request_irqs(ha, rsp);
  1841. if (ret)
  1842. goto probe_init_failed;
  1843. pci_save_state(pdev);
  1844. /* Alloc arrays of request and response ring ptrs */
  1845. que_init:
  1846. if (!qla2x00_alloc_queues(ha)) {
  1847. qla_printk(KERN_WARNING, ha,
  1848. "[ERROR] Failed to allocate memory for queue"
  1849. " pointers\n");
  1850. goto probe_init_failed;
  1851. }
  1852. ha->rsp_q_map[0] = rsp;
  1853. ha->req_q_map[0] = req;
  1854. rsp->req = req;
  1855. req->rsp = rsp;
  1856. set_bit(0, ha->req_qid_map);
  1857. set_bit(0, ha->rsp_qid_map);
  1858. /* FWI2-capable only. */
  1859. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1860. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1861. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1862. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1863. if (ha->mqenable) {
  1864. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1865. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1866. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1867. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1868. }
  1869. if (IS_QLA82XX(ha)) {
  1870. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1871. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1872. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1873. }
  1874. if (qla2x00_initialize_adapter(base_vha)) {
  1875. qla_printk(KERN_WARNING, ha,
  1876. "Failed to initialize adapter\n");
  1877. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1878. "Adapter flags %x.\n",
  1879. base_vha->host_no, base_vha->device_flags));
  1880. if (IS_QLA82XX(ha)) {
  1881. qla82xx_idc_lock(ha);
  1882. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1883. QLA82XX_DEV_FAILED);
  1884. qla82xx_idc_unlock(ha);
  1885. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1886. }
  1887. ret = -ENODEV;
  1888. goto probe_failed;
  1889. }
  1890. if (ha->mqenable) {
  1891. if (qla25xx_setup_mode(base_vha)) {
  1892. qla_printk(KERN_WARNING, ha,
  1893. "Can't create queues, falling back to single"
  1894. " queue mode\n");
  1895. goto que_init;
  1896. }
  1897. }
  1898. if (ha->flags.running_gold_fw)
  1899. goto skip_dpc;
  1900. /*
  1901. * Startup the kernel thread for this host adapter
  1902. */
  1903. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1904. "%s_dpc", base_vha->host_str);
  1905. if (IS_ERR(ha->dpc_thread)) {
  1906. qla_printk(KERN_WARNING, ha,
  1907. "Unable to start DPC thread!\n");
  1908. ret = PTR_ERR(ha->dpc_thread);
  1909. goto probe_failed;
  1910. }
  1911. skip_dpc:
  1912. list_add_tail(&base_vha->list, &ha->vp_list);
  1913. base_vha->host->irq = ha->pdev->irq;
  1914. /* Initialized the timer */
  1915. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1916. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1917. base_vha->host_no, ha));
  1918. ha->isp_ops->enable_intrs(ha);
  1919. ret = scsi_add_host(host, &pdev->dev);
  1920. if (ret)
  1921. goto probe_failed;
  1922. base_vha->flags.init_done = 1;
  1923. base_vha->flags.online = 1;
  1924. scsi_scan_host(host);
  1925. qla2x00_alloc_sysfs_attr(base_vha);
  1926. qla2x00_init_host_attr(base_vha);
  1927. qla2x00_dfs_setup(base_vha);
  1928. qla_printk(KERN_INFO, ha, "\n"
  1929. " QLogic Fibre Channel HBA Driver: %s\n"
  1930. " QLogic %s - %s\n"
  1931. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  1932. qla2x00_version_str, ha->model_number,
  1933. ha->model_desc ? ha->model_desc : "", pdev->device,
  1934. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  1935. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  1936. ha->isp_ops->fw_version_str(base_vha, fw_str));
  1937. return 0;
  1938. probe_init_failed:
  1939. qla2x00_free_req_que(ha, req);
  1940. qla2x00_free_rsp_que(ha, rsp);
  1941. ha->max_req_queues = ha->max_rsp_queues = 0;
  1942. probe_failed:
  1943. if (base_vha->timer_active)
  1944. qla2x00_stop_timer(base_vha);
  1945. base_vha->flags.online = 0;
  1946. if (ha->dpc_thread) {
  1947. struct task_struct *t = ha->dpc_thread;
  1948. ha->dpc_thread = NULL;
  1949. kthread_stop(t);
  1950. }
  1951. qla2x00_free_device(base_vha);
  1952. scsi_host_put(base_vha->host);
  1953. probe_hw_failed:
  1954. if (IS_QLA82XX(ha)) {
  1955. qla82xx_idc_lock(ha);
  1956. qla82xx_clear_drv_active(ha);
  1957. qla82xx_idc_unlock(ha);
  1958. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  1959. if (!ql2xdbwr)
  1960. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  1961. } else {
  1962. if (ha->iobase)
  1963. iounmap(ha->iobase);
  1964. }
  1965. pci_release_selected_regions(ha->pdev, ha->bars);
  1966. kfree(ha);
  1967. ha = NULL;
  1968. probe_out:
  1969. pci_disable_device(pdev);
  1970. return ret;
  1971. }
  1972. static void
  1973. qla2x00_remove_one(struct pci_dev *pdev)
  1974. {
  1975. scsi_qla_host_t *base_vha, *vha, *temp;
  1976. struct qla_hw_data *ha;
  1977. base_vha = pci_get_drvdata(pdev);
  1978. ha = base_vha->hw;
  1979. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  1980. if (vha && vha->fc_vport)
  1981. fc_vport_terminate(vha->fc_vport);
  1982. }
  1983. set_bit(UNLOADING, &base_vha->dpc_flags);
  1984. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  1985. qla2x00_dfs_remove(base_vha);
  1986. qla84xx_put_chip(base_vha);
  1987. /* Disable timer */
  1988. if (base_vha->timer_active)
  1989. qla2x00_stop_timer(base_vha);
  1990. base_vha->flags.online = 0;
  1991. /* Flush the work queue and remove it */
  1992. if (ha->wq) {
  1993. flush_workqueue(ha->wq);
  1994. destroy_workqueue(ha->wq);
  1995. ha->wq = NULL;
  1996. }
  1997. /* Kill the kernel thread for this host */
  1998. if (ha->dpc_thread) {
  1999. struct task_struct *t = ha->dpc_thread;
  2000. /*
  2001. * qla2xxx_wake_dpc checks for ->dpc_thread
  2002. * so we need to zero it out.
  2003. */
  2004. ha->dpc_thread = NULL;
  2005. kthread_stop(t);
  2006. }
  2007. qla2x00_free_sysfs_attr(base_vha);
  2008. fc_remove_host(base_vha->host);
  2009. scsi_remove_host(base_vha->host);
  2010. qla2x00_free_device(base_vha);
  2011. scsi_host_put(base_vha->host);
  2012. if (IS_QLA82XX(ha)) {
  2013. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2014. if (!ql2xdbwr)
  2015. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2016. } else {
  2017. if (ha->iobase)
  2018. iounmap(ha->iobase);
  2019. if (ha->mqiobase)
  2020. iounmap(ha->mqiobase);
  2021. }
  2022. pci_release_selected_regions(ha->pdev, ha->bars);
  2023. kfree(ha);
  2024. ha = NULL;
  2025. pci_disable_pcie_error_reporting(pdev);
  2026. pci_disable_device(pdev);
  2027. pci_set_drvdata(pdev, NULL);
  2028. }
  2029. static void
  2030. qla2x00_free_device(scsi_qla_host_t *vha)
  2031. {
  2032. struct qla_hw_data *ha = vha->hw;
  2033. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2034. /* Disable timer */
  2035. if (vha->timer_active)
  2036. qla2x00_stop_timer(vha);
  2037. /* Kill the kernel thread for this host */
  2038. if (ha->dpc_thread) {
  2039. struct task_struct *t = ha->dpc_thread;
  2040. /*
  2041. * qla2xxx_wake_dpc checks for ->dpc_thread
  2042. * so we need to zero it out.
  2043. */
  2044. ha->dpc_thread = NULL;
  2045. kthread_stop(t);
  2046. }
  2047. qla25xx_delete_queues(vha);
  2048. if (ha->flags.fce_enabled)
  2049. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2050. if (ha->eft)
  2051. qla2x00_disable_eft_trace(vha);
  2052. /* Stop currently executing firmware. */
  2053. qla2x00_try_to_stop_firmware(vha);
  2054. vha->flags.online = 0;
  2055. /* turn-off interrupts on the card */
  2056. if (ha->interrupts_on) {
  2057. vha->flags.init_done = 0;
  2058. ha->isp_ops->disable_intrs(ha);
  2059. }
  2060. qla2x00_free_irqs(vha);
  2061. qla2x00_mem_free(ha);
  2062. qla2x00_free_queues(ha);
  2063. }
  2064. static inline void
  2065. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2066. int defer)
  2067. {
  2068. struct fc_rport *rport;
  2069. scsi_qla_host_t *base_vha;
  2070. if (!fcport->rport)
  2071. return;
  2072. rport = fcport->rport;
  2073. if (defer) {
  2074. base_vha = pci_get_drvdata(vha->hw->pdev);
  2075. spin_lock_irq(vha->host->host_lock);
  2076. fcport->drport = rport;
  2077. spin_unlock_irq(vha->host->host_lock);
  2078. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2079. qla2xxx_wake_dpc(base_vha);
  2080. } else
  2081. fc_remote_port_delete(rport);
  2082. }
  2083. /*
  2084. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2085. *
  2086. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2087. *
  2088. * Return: None.
  2089. *
  2090. * Context:
  2091. */
  2092. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2093. int do_login, int defer)
  2094. {
  2095. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2096. vha->vp_idx == fcport->vp_idx) {
  2097. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2098. qla2x00_schedule_rport_del(vha, fcport, defer);
  2099. }
  2100. /*
  2101. * We may need to retry the login, so don't change the state of the
  2102. * port but do the retries.
  2103. */
  2104. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2105. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2106. if (!do_login)
  2107. return;
  2108. if (fcport->login_retry == 0) {
  2109. fcport->login_retry = vha->hw->login_retry_count;
  2110. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2111. DEBUG(printk("scsi(%ld): Port login retry: "
  2112. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2113. "id = 0x%04x retry cnt=%d\n",
  2114. vha->host_no,
  2115. fcport->port_name[0],
  2116. fcport->port_name[1],
  2117. fcport->port_name[2],
  2118. fcport->port_name[3],
  2119. fcport->port_name[4],
  2120. fcport->port_name[5],
  2121. fcport->port_name[6],
  2122. fcport->port_name[7],
  2123. fcport->loop_id,
  2124. fcport->login_retry));
  2125. }
  2126. }
  2127. /*
  2128. * qla2x00_mark_all_devices_lost
  2129. * Updates fcport state when device goes offline.
  2130. *
  2131. * Input:
  2132. * ha = adapter block pointer.
  2133. * fcport = port structure pointer.
  2134. *
  2135. * Return:
  2136. * None.
  2137. *
  2138. * Context:
  2139. */
  2140. void
  2141. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2142. {
  2143. fc_port_t *fcport;
  2144. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2145. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2146. continue;
  2147. /*
  2148. * No point in marking the device as lost, if the device is
  2149. * already DEAD.
  2150. */
  2151. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2152. continue;
  2153. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2154. if (defer)
  2155. qla2x00_schedule_rport_del(vha, fcport, defer);
  2156. else if (vha->vp_idx == fcport->vp_idx)
  2157. qla2x00_schedule_rport_del(vha, fcport, defer);
  2158. }
  2159. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2160. }
  2161. }
  2162. /*
  2163. * qla2x00_mem_alloc
  2164. * Allocates adapter memory.
  2165. *
  2166. * Returns:
  2167. * 0 = success.
  2168. * !0 = failure.
  2169. */
  2170. static int
  2171. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2172. struct req_que **req, struct rsp_que **rsp)
  2173. {
  2174. char name[16];
  2175. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2176. &ha->init_cb_dma, GFP_KERNEL);
  2177. if (!ha->init_cb)
  2178. goto fail;
  2179. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2180. &ha->gid_list_dma, GFP_KERNEL);
  2181. if (!ha->gid_list)
  2182. goto fail_free_init_cb;
  2183. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2184. if (!ha->srb_mempool)
  2185. goto fail_free_gid_list;
  2186. if (IS_QLA82XX(ha)) {
  2187. /* Allocate cache for CT6 Ctx. */
  2188. if (!ctx_cachep) {
  2189. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2190. sizeof(struct ct6_dsd), 0,
  2191. SLAB_HWCACHE_ALIGN, NULL);
  2192. if (!ctx_cachep)
  2193. goto fail_free_gid_list;
  2194. }
  2195. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2196. ctx_cachep);
  2197. if (!ha->ctx_mempool)
  2198. goto fail_free_srb_mempool;
  2199. }
  2200. /* Get memory for cached NVRAM */
  2201. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2202. if (!ha->nvram)
  2203. goto fail_free_ctx_mempool;
  2204. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2205. ha->pdev->device);
  2206. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2207. DMA_POOL_SIZE, 8, 0);
  2208. if (!ha->s_dma_pool)
  2209. goto fail_free_nvram;
  2210. if (IS_QLA82XX(ha)) {
  2211. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2212. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2213. if (!ha->dl_dma_pool) {
  2214. qla_printk(KERN_WARNING, ha,
  2215. "Memory Allocation failed - dl_dma_pool\n");
  2216. goto fail_s_dma_pool;
  2217. }
  2218. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2219. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2220. if (!ha->fcp_cmnd_dma_pool) {
  2221. qla_printk(KERN_WARNING, ha,
  2222. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2223. goto fail_dl_dma_pool;
  2224. }
  2225. }
  2226. /* Allocate memory for SNS commands */
  2227. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2228. /* Get consistent memory allocated for SNS commands */
  2229. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2230. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2231. if (!ha->sns_cmd)
  2232. goto fail_dma_pool;
  2233. } else {
  2234. /* Get consistent memory allocated for MS IOCB */
  2235. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2236. &ha->ms_iocb_dma);
  2237. if (!ha->ms_iocb)
  2238. goto fail_dma_pool;
  2239. /* Get consistent memory allocated for CT SNS commands */
  2240. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2241. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2242. if (!ha->ct_sns)
  2243. goto fail_free_ms_iocb;
  2244. }
  2245. /* Allocate memory for request ring */
  2246. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2247. if (!*req) {
  2248. DEBUG(printk("Unable to allocate memory for req\n"));
  2249. goto fail_req;
  2250. }
  2251. (*req)->length = req_len;
  2252. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2253. ((*req)->length + 1) * sizeof(request_t),
  2254. &(*req)->dma, GFP_KERNEL);
  2255. if (!(*req)->ring) {
  2256. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2257. goto fail_req_ring;
  2258. }
  2259. /* Allocate memory for response ring */
  2260. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2261. if (!*rsp) {
  2262. qla_printk(KERN_WARNING, ha,
  2263. "Unable to allocate memory for rsp\n");
  2264. goto fail_rsp;
  2265. }
  2266. (*rsp)->hw = ha;
  2267. (*rsp)->length = rsp_len;
  2268. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2269. ((*rsp)->length + 1) * sizeof(response_t),
  2270. &(*rsp)->dma, GFP_KERNEL);
  2271. if (!(*rsp)->ring) {
  2272. qla_printk(KERN_WARNING, ha,
  2273. "Unable to allocate memory for rsp_ring\n");
  2274. goto fail_rsp_ring;
  2275. }
  2276. (*req)->rsp = *rsp;
  2277. (*rsp)->req = *req;
  2278. /* Allocate memory for NVRAM data for vports */
  2279. if (ha->nvram_npiv_size) {
  2280. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2281. ha->nvram_npiv_size, GFP_KERNEL);
  2282. if (!ha->npiv_info) {
  2283. qla_printk(KERN_WARNING, ha,
  2284. "Unable to allocate memory for npiv info\n");
  2285. goto fail_npiv_info;
  2286. }
  2287. } else
  2288. ha->npiv_info = NULL;
  2289. /* Get consistent memory allocated for EX-INIT-CB. */
  2290. if (IS_QLA8XXX_TYPE(ha)) {
  2291. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2292. &ha->ex_init_cb_dma);
  2293. if (!ha->ex_init_cb)
  2294. goto fail_ex_init_cb;
  2295. }
  2296. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2297. INIT_LIST_HEAD(&ha->vp_list);
  2298. return 1;
  2299. fail_ex_init_cb:
  2300. kfree(ha->npiv_info);
  2301. fail_npiv_info:
  2302. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2303. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2304. (*rsp)->ring = NULL;
  2305. (*rsp)->dma = 0;
  2306. fail_rsp_ring:
  2307. kfree(*rsp);
  2308. fail_rsp:
  2309. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2310. sizeof(request_t), (*req)->ring, (*req)->dma);
  2311. (*req)->ring = NULL;
  2312. (*req)->dma = 0;
  2313. fail_req_ring:
  2314. kfree(*req);
  2315. fail_req:
  2316. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2317. ha->ct_sns, ha->ct_sns_dma);
  2318. ha->ct_sns = NULL;
  2319. ha->ct_sns_dma = 0;
  2320. fail_free_ms_iocb:
  2321. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2322. ha->ms_iocb = NULL;
  2323. ha->ms_iocb_dma = 0;
  2324. fail_dma_pool:
  2325. if (IS_QLA82XX(ha)) {
  2326. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2327. ha->fcp_cmnd_dma_pool = NULL;
  2328. }
  2329. fail_dl_dma_pool:
  2330. if (IS_QLA82XX(ha)) {
  2331. dma_pool_destroy(ha->dl_dma_pool);
  2332. ha->dl_dma_pool = NULL;
  2333. }
  2334. fail_s_dma_pool:
  2335. dma_pool_destroy(ha->s_dma_pool);
  2336. ha->s_dma_pool = NULL;
  2337. fail_free_nvram:
  2338. kfree(ha->nvram);
  2339. ha->nvram = NULL;
  2340. fail_free_ctx_mempool:
  2341. mempool_destroy(ha->ctx_mempool);
  2342. ha->ctx_mempool = NULL;
  2343. fail_free_srb_mempool:
  2344. mempool_destroy(ha->srb_mempool);
  2345. ha->srb_mempool = NULL;
  2346. fail_free_gid_list:
  2347. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2348. ha->gid_list_dma);
  2349. ha->gid_list = NULL;
  2350. ha->gid_list_dma = 0;
  2351. fail_free_init_cb:
  2352. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2353. ha->init_cb_dma);
  2354. ha->init_cb = NULL;
  2355. ha->init_cb_dma = 0;
  2356. fail:
  2357. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2358. return -ENOMEM;
  2359. }
  2360. /*
  2361. * qla2x00_mem_free
  2362. * Frees all adapter allocated memory.
  2363. *
  2364. * Input:
  2365. * ha = adapter block pointer.
  2366. */
  2367. static void
  2368. qla2x00_mem_free(struct qla_hw_data *ha)
  2369. {
  2370. if (ha->srb_mempool)
  2371. mempool_destroy(ha->srb_mempool);
  2372. if (ha->fce)
  2373. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2374. ha->fce_dma);
  2375. if (ha->fw_dump) {
  2376. if (ha->eft)
  2377. dma_free_coherent(&ha->pdev->dev,
  2378. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2379. vfree(ha->fw_dump);
  2380. }
  2381. if (ha->dcbx_tlv)
  2382. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2383. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2384. if (ha->xgmac_data)
  2385. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2386. ha->xgmac_data, ha->xgmac_data_dma);
  2387. if (ha->sns_cmd)
  2388. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2389. ha->sns_cmd, ha->sns_cmd_dma);
  2390. if (ha->ct_sns)
  2391. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2392. ha->ct_sns, ha->ct_sns_dma);
  2393. if (ha->sfp_data)
  2394. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2395. if (ha->edc_data)
  2396. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2397. if (ha->ms_iocb)
  2398. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2399. if (ha->ex_init_cb)
  2400. dma_pool_free(ha->s_dma_pool,
  2401. ha->ex_init_cb, ha->ex_init_cb_dma);
  2402. if (ha->s_dma_pool)
  2403. dma_pool_destroy(ha->s_dma_pool);
  2404. if (ha->gid_list)
  2405. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2406. ha->gid_list_dma);
  2407. if (IS_QLA82XX(ha)) {
  2408. if (!list_empty(&ha->gbl_dsd_list)) {
  2409. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2410. /* clean up allocated prev pool */
  2411. list_for_each_entry_safe(dsd_ptr,
  2412. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2413. dma_pool_free(ha->dl_dma_pool,
  2414. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2415. list_del(&dsd_ptr->list);
  2416. kfree(dsd_ptr);
  2417. }
  2418. }
  2419. }
  2420. if (ha->dl_dma_pool)
  2421. dma_pool_destroy(ha->dl_dma_pool);
  2422. if (ha->fcp_cmnd_dma_pool)
  2423. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2424. if (ha->ctx_mempool)
  2425. mempool_destroy(ha->ctx_mempool);
  2426. if (ha->init_cb)
  2427. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2428. ha->init_cb, ha->init_cb_dma);
  2429. vfree(ha->optrom_buffer);
  2430. kfree(ha->nvram);
  2431. kfree(ha->npiv_info);
  2432. ha->srb_mempool = NULL;
  2433. ha->ctx_mempool = NULL;
  2434. ha->eft = NULL;
  2435. ha->eft_dma = 0;
  2436. ha->sns_cmd = NULL;
  2437. ha->sns_cmd_dma = 0;
  2438. ha->ct_sns = NULL;
  2439. ha->ct_sns_dma = 0;
  2440. ha->ms_iocb = NULL;
  2441. ha->ms_iocb_dma = 0;
  2442. ha->init_cb = NULL;
  2443. ha->init_cb_dma = 0;
  2444. ha->ex_init_cb = NULL;
  2445. ha->ex_init_cb_dma = 0;
  2446. ha->s_dma_pool = NULL;
  2447. ha->dl_dma_pool = NULL;
  2448. ha->fcp_cmnd_dma_pool = NULL;
  2449. ha->gid_list = NULL;
  2450. ha->gid_list_dma = 0;
  2451. ha->fw_dump = NULL;
  2452. ha->fw_dumped = 0;
  2453. ha->fw_dump_reading = 0;
  2454. }
  2455. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2456. struct qla_hw_data *ha)
  2457. {
  2458. struct Scsi_Host *host;
  2459. struct scsi_qla_host *vha = NULL;
  2460. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2461. if (host == NULL) {
  2462. printk(KERN_WARNING
  2463. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2464. goto fail;
  2465. }
  2466. /* Clear our data area */
  2467. vha = shost_priv(host);
  2468. memset(vha, 0, sizeof(scsi_qla_host_t));
  2469. vha->host = host;
  2470. vha->host_no = host->host_no;
  2471. vha->hw = ha;
  2472. INIT_LIST_HEAD(&vha->vp_fcports);
  2473. INIT_LIST_HEAD(&vha->work_list);
  2474. INIT_LIST_HEAD(&vha->list);
  2475. spin_lock_init(&vha->work_lock);
  2476. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2477. return vha;
  2478. fail:
  2479. return vha;
  2480. }
  2481. static struct qla_work_evt *
  2482. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2483. {
  2484. struct qla_work_evt *e;
  2485. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2486. if (!e)
  2487. return NULL;
  2488. INIT_LIST_HEAD(&e->list);
  2489. e->type = type;
  2490. e->flags = QLA_EVT_FLAG_FREE;
  2491. return e;
  2492. }
  2493. static int
  2494. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2495. {
  2496. unsigned long flags;
  2497. spin_lock_irqsave(&vha->work_lock, flags);
  2498. list_add_tail(&e->list, &vha->work_list);
  2499. spin_unlock_irqrestore(&vha->work_lock, flags);
  2500. qla2xxx_wake_dpc(vha);
  2501. return QLA_SUCCESS;
  2502. }
  2503. int
  2504. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2505. u32 data)
  2506. {
  2507. struct qla_work_evt *e;
  2508. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2509. if (!e)
  2510. return QLA_FUNCTION_FAILED;
  2511. e->u.aen.code = code;
  2512. e->u.aen.data = data;
  2513. return qla2x00_post_work(vha, e);
  2514. }
  2515. int
  2516. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2517. {
  2518. struct qla_work_evt *e;
  2519. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2520. if (!e)
  2521. return QLA_FUNCTION_FAILED;
  2522. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2523. return qla2x00_post_work(vha, e);
  2524. }
  2525. #define qla2x00_post_async_work(name, type) \
  2526. int qla2x00_post_async_##name##_work( \
  2527. struct scsi_qla_host *vha, \
  2528. fc_port_t *fcport, uint16_t *data) \
  2529. { \
  2530. struct qla_work_evt *e; \
  2531. \
  2532. e = qla2x00_alloc_work(vha, type); \
  2533. if (!e) \
  2534. return QLA_FUNCTION_FAILED; \
  2535. \
  2536. e->u.logio.fcport = fcport; \
  2537. if (data) { \
  2538. e->u.logio.data[0] = data[0]; \
  2539. e->u.logio.data[1] = data[1]; \
  2540. } \
  2541. return qla2x00_post_work(vha, e); \
  2542. }
  2543. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2544. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2545. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2546. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2547. int
  2548. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2549. {
  2550. struct qla_work_evt *e;
  2551. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2552. if (!e)
  2553. return QLA_FUNCTION_FAILED;
  2554. e->u.uevent.code = code;
  2555. return qla2x00_post_work(vha, e);
  2556. }
  2557. static void
  2558. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2559. {
  2560. char event_string[40];
  2561. char *envp[] = { event_string, NULL };
  2562. switch (code) {
  2563. case QLA_UEVENT_CODE_FW_DUMP:
  2564. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2565. vha->host_no);
  2566. break;
  2567. default:
  2568. /* do nothing */
  2569. break;
  2570. }
  2571. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2572. }
  2573. void
  2574. qla2x00_do_work(struct scsi_qla_host *vha)
  2575. {
  2576. struct qla_work_evt *e, *tmp;
  2577. unsigned long flags;
  2578. LIST_HEAD(work);
  2579. spin_lock_irqsave(&vha->work_lock, flags);
  2580. list_splice_init(&vha->work_list, &work);
  2581. spin_unlock_irqrestore(&vha->work_lock, flags);
  2582. list_for_each_entry_safe(e, tmp, &work, list) {
  2583. list_del_init(&e->list);
  2584. switch (e->type) {
  2585. case QLA_EVT_AEN:
  2586. fc_host_post_event(vha->host, fc_get_event_number(),
  2587. e->u.aen.code, e->u.aen.data);
  2588. break;
  2589. case QLA_EVT_IDC_ACK:
  2590. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2591. break;
  2592. case QLA_EVT_ASYNC_LOGIN:
  2593. qla2x00_async_login(vha, e->u.logio.fcport,
  2594. e->u.logio.data);
  2595. break;
  2596. case QLA_EVT_ASYNC_LOGIN_DONE:
  2597. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2598. e->u.logio.data);
  2599. break;
  2600. case QLA_EVT_ASYNC_LOGOUT:
  2601. qla2x00_async_logout(vha, e->u.logio.fcport);
  2602. break;
  2603. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2604. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2605. e->u.logio.data);
  2606. break;
  2607. case QLA_EVT_UEVENT:
  2608. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2609. break;
  2610. }
  2611. if (e->flags & QLA_EVT_FLAG_FREE)
  2612. kfree(e);
  2613. }
  2614. }
  2615. /* Relogins all the fcports of a vport
  2616. * Context: dpc thread
  2617. */
  2618. void qla2x00_relogin(struct scsi_qla_host *vha)
  2619. {
  2620. fc_port_t *fcport;
  2621. int status;
  2622. uint16_t next_loopid = 0;
  2623. struct qla_hw_data *ha = vha->hw;
  2624. uint16_t data[2];
  2625. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2626. /*
  2627. * If the port is not ONLINE then try to login
  2628. * to it if we haven't run out of retries.
  2629. */
  2630. if (atomic_read(&fcport->state) !=
  2631. FCS_ONLINE && fcport->login_retry) {
  2632. fcport->login_retry--;
  2633. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2634. if (fcport->flags & FCF_FCP2_DEVICE)
  2635. ha->isp_ops->fabric_logout(vha,
  2636. fcport->loop_id,
  2637. fcport->d_id.b.domain,
  2638. fcport->d_id.b.area,
  2639. fcport->d_id.b.al_pa);
  2640. if (IS_ALOGIO_CAPABLE(ha)) {
  2641. data[0] = 0;
  2642. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2643. status = qla2x00_post_async_login_work(
  2644. vha, fcport, data);
  2645. if (status == QLA_SUCCESS)
  2646. continue;
  2647. /* Attempt a retry. */
  2648. status = 1;
  2649. } else
  2650. status = qla2x00_fabric_login(vha,
  2651. fcport, &next_loopid);
  2652. } else
  2653. status = qla2x00_local_device_login(vha,
  2654. fcport);
  2655. if (status == QLA_SUCCESS) {
  2656. fcport->old_loop_id = fcport->loop_id;
  2657. DEBUG(printk("scsi(%ld): port login OK: logged "
  2658. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2659. qla2x00_update_fcport(vha, fcport);
  2660. } else if (status == 1) {
  2661. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2662. /* retry the login again */
  2663. DEBUG(printk("scsi(%ld): Retrying"
  2664. " %d login again loop_id 0x%x\n",
  2665. vha->host_no, fcport->login_retry,
  2666. fcport->loop_id));
  2667. } else {
  2668. fcport->login_retry = 0;
  2669. }
  2670. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2671. fcport->loop_id = FC_NO_LOOP_ID;
  2672. }
  2673. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2674. break;
  2675. }
  2676. }
  2677. /**************************************************************************
  2678. * qla2x00_do_dpc
  2679. * This kernel thread is a task that is schedule by the interrupt handler
  2680. * to perform the background processing for interrupts.
  2681. *
  2682. * Notes:
  2683. * This task always run in the context of a kernel thread. It
  2684. * is kick-off by the driver's detect code and starts up
  2685. * up one per adapter. It immediately goes to sleep and waits for
  2686. * some fibre event. When either the interrupt handler or
  2687. * the timer routine detects a event it will one of the task
  2688. * bits then wake us up.
  2689. **************************************************************************/
  2690. static int
  2691. qla2x00_do_dpc(void *data)
  2692. {
  2693. int rval;
  2694. scsi_qla_host_t *base_vha;
  2695. struct qla_hw_data *ha;
  2696. ha = (struct qla_hw_data *)data;
  2697. base_vha = pci_get_drvdata(ha->pdev);
  2698. set_user_nice(current, -20);
  2699. while (!kthread_should_stop()) {
  2700. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2701. set_current_state(TASK_INTERRUPTIBLE);
  2702. schedule();
  2703. __set_current_state(TASK_RUNNING);
  2704. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2705. /* Initialization not yet finished. Don't do anything yet. */
  2706. if (!base_vha->flags.init_done)
  2707. continue;
  2708. if (ha->flags.eeh_busy) {
  2709. DEBUG17(qla_printk(KERN_WARNING, ha,
  2710. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2711. base_vha->dpc_flags));
  2712. continue;
  2713. }
  2714. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2715. ha->dpc_active = 1;
  2716. if (ha->flags.mbox_busy) {
  2717. ha->dpc_active = 0;
  2718. continue;
  2719. }
  2720. qla2x00_do_work(base_vha);
  2721. if (IS_QLA82XX(ha)) {
  2722. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2723. &base_vha->dpc_flags)) {
  2724. qla82xx_idc_lock(ha);
  2725. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2726. QLA82XX_DEV_FAILED);
  2727. qla82xx_idc_unlock(ha);
  2728. qla_printk(KERN_INFO, ha,
  2729. "HW State: FAILED\n");
  2730. qla82xx_device_state_handler(base_vha);
  2731. continue;
  2732. }
  2733. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2734. &base_vha->dpc_flags)) {
  2735. DEBUG(printk(KERN_INFO
  2736. "scsi(%ld): dpc: sched "
  2737. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2738. base_vha->host_no, ha));
  2739. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2740. &base_vha->dpc_flags))) {
  2741. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2742. /* FCoE-ctx reset failed.
  2743. * Escalate to chip-reset
  2744. */
  2745. set_bit(ISP_ABORT_NEEDED,
  2746. &base_vha->dpc_flags);
  2747. }
  2748. clear_bit(ABORT_ISP_ACTIVE,
  2749. &base_vha->dpc_flags);
  2750. }
  2751. DEBUG(printk("scsi(%ld): dpc:"
  2752. " qla82xx_fcoe_ctx_reset end\n",
  2753. base_vha->host_no));
  2754. }
  2755. }
  2756. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2757. &base_vha->dpc_flags)) {
  2758. DEBUG(printk("scsi(%ld): dpc: sched "
  2759. "qla2x00_abort_isp ha = %p\n",
  2760. base_vha->host_no, ha));
  2761. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2762. &base_vha->dpc_flags))) {
  2763. if (ha->isp_ops->abort_isp(base_vha)) {
  2764. /* failed. retry later */
  2765. set_bit(ISP_ABORT_NEEDED,
  2766. &base_vha->dpc_flags);
  2767. }
  2768. clear_bit(ABORT_ISP_ACTIVE,
  2769. &base_vha->dpc_flags);
  2770. }
  2771. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2772. base_vha->host_no));
  2773. }
  2774. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2775. qla2x00_update_fcports(base_vha);
  2776. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2777. }
  2778. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2779. &base_vha->dpc_flags) &&
  2780. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2781. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2782. base_vha->host_no));
  2783. qla2x00_rst_aen(base_vha);
  2784. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2785. }
  2786. /* Retry each device up to login retry count */
  2787. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2788. &base_vha->dpc_flags)) &&
  2789. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2790. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2791. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2792. base_vha->host_no));
  2793. qla2x00_relogin(base_vha);
  2794. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2795. base_vha->host_no));
  2796. }
  2797. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2798. &base_vha->dpc_flags)) {
  2799. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2800. base_vha->host_no));
  2801. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2802. &base_vha->dpc_flags))) {
  2803. rval = qla2x00_loop_resync(base_vha);
  2804. clear_bit(LOOP_RESYNC_ACTIVE,
  2805. &base_vha->dpc_flags);
  2806. }
  2807. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2808. base_vha->host_no));
  2809. }
  2810. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2811. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2812. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2813. qla2xxx_flash_npiv_conf(base_vha);
  2814. }
  2815. if (!ha->interrupts_on)
  2816. ha->isp_ops->enable_intrs(ha);
  2817. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2818. &base_vha->dpc_flags))
  2819. ha->isp_ops->beacon_blink(base_vha);
  2820. qla2x00_do_dpc_all_vps(base_vha);
  2821. ha->dpc_active = 0;
  2822. } /* End of while(1) */
  2823. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2824. /*
  2825. * Make sure that nobody tries to wake us up again.
  2826. */
  2827. ha->dpc_active = 0;
  2828. /* Cleanup any residual CTX SRBs. */
  2829. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2830. return 0;
  2831. }
  2832. void
  2833. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2834. {
  2835. struct qla_hw_data *ha = vha->hw;
  2836. struct task_struct *t = ha->dpc_thread;
  2837. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2838. wake_up_process(t);
  2839. }
  2840. /*
  2841. * qla2x00_rst_aen
  2842. * Processes asynchronous reset.
  2843. *
  2844. * Input:
  2845. * ha = adapter block pointer.
  2846. */
  2847. static void
  2848. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2849. {
  2850. if (vha->flags.online && !vha->flags.reset_active &&
  2851. !atomic_read(&vha->loop_down_timer) &&
  2852. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2853. do {
  2854. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2855. /*
  2856. * Issue marker command only when we are going to start
  2857. * the I/O.
  2858. */
  2859. vha->marker_needed = 1;
  2860. } while (!atomic_read(&vha->loop_down_timer) &&
  2861. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2862. }
  2863. }
  2864. static void
  2865. qla2x00_sp_free_dma(srb_t *sp)
  2866. {
  2867. struct scsi_cmnd *cmd = sp->cmd;
  2868. if (sp->flags & SRB_DMA_VALID) {
  2869. scsi_dma_unmap(cmd);
  2870. sp->flags &= ~SRB_DMA_VALID;
  2871. }
  2872. CMD_SP(cmd) = NULL;
  2873. }
  2874. void
  2875. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  2876. {
  2877. struct scsi_cmnd *cmd = sp->cmd;
  2878. qla2x00_sp_free_dma(sp);
  2879. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  2880. struct ct6_dsd *ctx = sp->ctx;
  2881. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  2882. ctx->fcp_cmnd_dma);
  2883. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  2884. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  2885. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  2886. mempool_free(sp->ctx, ha->ctx_mempool);
  2887. sp->ctx = NULL;
  2888. }
  2889. mempool_free(sp, ha->srb_mempool);
  2890. cmd->scsi_done(cmd);
  2891. }
  2892. /**************************************************************************
  2893. * qla2x00_timer
  2894. *
  2895. * Description:
  2896. * One second timer
  2897. *
  2898. * Context: Interrupt
  2899. ***************************************************************************/
  2900. void
  2901. qla2x00_timer(scsi_qla_host_t *vha)
  2902. {
  2903. unsigned long cpu_flags = 0;
  2904. fc_port_t *fcport;
  2905. int start_dpc = 0;
  2906. int index;
  2907. srb_t *sp;
  2908. int t;
  2909. uint16_t w;
  2910. struct qla_hw_data *ha = vha->hw;
  2911. struct req_que *req;
  2912. if (IS_QLA82XX(ha))
  2913. qla82xx_watchdog(vha);
  2914. /* Hardware read to raise pending EEH errors during mailbox waits. */
  2915. if (!pci_channel_offline(ha->pdev))
  2916. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  2917. /*
  2918. * Ports - Port down timer.
  2919. *
  2920. * Whenever, a port is in the LOST state we start decrementing its port
  2921. * down timer every second until it reaches zero. Once it reaches zero
  2922. * the port it marked DEAD.
  2923. */
  2924. t = 0;
  2925. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2926. if (fcport->port_type != FCT_TARGET)
  2927. continue;
  2928. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2929. if (atomic_read(&fcport->port_down_timer) == 0)
  2930. continue;
  2931. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  2932. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  2933. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  2934. "%d remaining\n",
  2935. vha->host_no,
  2936. t, atomic_read(&fcport->port_down_timer)));
  2937. }
  2938. t++;
  2939. } /* End of for fcport */
  2940. /* Loop down handler. */
  2941. if (atomic_read(&vha->loop_down_timer) > 0 &&
  2942. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  2943. && vha->flags.online) {
  2944. if (atomic_read(&vha->loop_down_timer) ==
  2945. vha->loop_down_abort_time) {
  2946. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  2947. "queues before time expire\n",
  2948. vha->host_no));
  2949. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  2950. atomic_set(&vha->loop_state, LOOP_DEAD);
  2951. /*
  2952. * Schedule an ISP abort to return any FCP2-device
  2953. * commands.
  2954. */
  2955. /* NPIV - scan physical port only */
  2956. if (!vha->vp_idx) {
  2957. spin_lock_irqsave(&ha->hardware_lock,
  2958. cpu_flags);
  2959. req = ha->req_q_map[0];
  2960. for (index = 1;
  2961. index < MAX_OUTSTANDING_COMMANDS;
  2962. index++) {
  2963. fc_port_t *sfcp;
  2964. sp = req->outstanding_cmds[index];
  2965. if (!sp)
  2966. continue;
  2967. if (sp->ctx)
  2968. continue;
  2969. sfcp = sp->fcport;
  2970. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  2971. continue;
  2972. set_bit(ISP_ABORT_NEEDED,
  2973. &vha->dpc_flags);
  2974. break;
  2975. }
  2976. spin_unlock_irqrestore(&ha->hardware_lock,
  2977. cpu_flags);
  2978. }
  2979. start_dpc++;
  2980. }
  2981. /* if the loop has been down for 4 minutes, reinit adapter */
  2982. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  2983. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  2984. DEBUG(printk("scsi(%ld): Loop down - "
  2985. "aborting ISP.\n",
  2986. vha->host_no));
  2987. qla_printk(KERN_WARNING, ha,
  2988. "Loop down - aborting ISP.\n");
  2989. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2990. }
  2991. }
  2992. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  2993. vha->host_no,
  2994. atomic_read(&vha->loop_down_timer)));
  2995. }
  2996. /* Check if beacon LED needs to be blinked */
  2997. if (ha->beacon_blink_led == 1) {
  2998. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  2999. start_dpc++;
  3000. }
  3001. /* Process any deferred work. */
  3002. if (!list_empty(&vha->work_list))
  3003. start_dpc++;
  3004. /* Schedule the DPC routine if needed */
  3005. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3006. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3007. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3008. start_dpc ||
  3009. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3010. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3011. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3012. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3013. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3014. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3015. qla2xxx_wake_dpc(vha);
  3016. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3017. }
  3018. /* Firmware interface routines. */
  3019. #define FW_BLOBS 8
  3020. #define FW_ISP21XX 0
  3021. #define FW_ISP22XX 1
  3022. #define FW_ISP2300 2
  3023. #define FW_ISP2322 3
  3024. #define FW_ISP24XX 4
  3025. #define FW_ISP25XX 5
  3026. #define FW_ISP81XX 6
  3027. #define FW_ISP82XX 7
  3028. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3029. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3030. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3031. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3032. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3033. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3034. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3035. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3036. static DEFINE_MUTEX(qla_fw_lock);
  3037. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3038. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3039. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3040. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3041. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3042. { .name = FW_FILE_ISP24XX, },
  3043. { .name = FW_FILE_ISP25XX, },
  3044. { .name = FW_FILE_ISP81XX, },
  3045. { .name = FW_FILE_ISP82XX, },
  3046. };
  3047. struct fw_blob *
  3048. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3049. {
  3050. struct qla_hw_data *ha = vha->hw;
  3051. struct fw_blob *blob;
  3052. blob = NULL;
  3053. if (IS_QLA2100(ha)) {
  3054. blob = &qla_fw_blobs[FW_ISP21XX];
  3055. } else if (IS_QLA2200(ha)) {
  3056. blob = &qla_fw_blobs[FW_ISP22XX];
  3057. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3058. blob = &qla_fw_blobs[FW_ISP2300];
  3059. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3060. blob = &qla_fw_blobs[FW_ISP2322];
  3061. } else if (IS_QLA24XX_TYPE(ha)) {
  3062. blob = &qla_fw_blobs[FW_ISP24XX];
  3063. } else if (IS_QLA25XX(ha)) {
  3064. blob = &qla_fw_blobs[FW_ISP25XX];
  3065. } else if (IS_QLA81XX(ha)) {
  3066. blob = &qla_fw_blobs[FW_ISP81XX];
  3067. } else if (IS_QLA82XX(ha)) {
  3068. blob = &qla_fw_blobs[FW_ISP82XX];
  3069. }
  3070. mutex_lock(&qla_fw_lock);
  3071. if (blob->fw)
  3072. goto out;
  3073. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3074. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3075. "(%s).\n", vha->host_no, blob->name));
  3076. blob->fw = NULL;
  3077. blob = NULL;
  3078. goto out;
  3079. }
  3080. out:
  3081. mutex_unlock(&qla_fw_lock);
  3082. return blob;
  3083. }
  3084. static void
  3085. qla2x00_release_firmware(void)
  3086. {
  3087. int idx;
  3088. mutex_lock(&qla_fw_lock);
  3089. for (idx = 0; idx < FW_BLOBS; idx++)
  3090. if (qla_fw_blobs[idx].fw)
  3091. release_firmware(qla_fw_blobs[idx].fw);
  3092. mutex_unlock(&qla_fw_lock);
  3093. }
  3094. static pci_ers_result_t
  3095. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3096. {
  3097. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3098. struct qla_hw_data *ha = vha->hw;
  3099. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3100. state));
  3101. switch (state) {
  3102. case pci_channel_io_normal:
  3103. ha->flags.eeh_busy = 0;
  3104. return PCI_ERS_RESULT_CAN_RECOVER;
  3105. case pci_channel_io_frozen:
  3106. ha->flags.eeh_busy = 1;
  3107. qla2x00_free_irqs(vha);
  3108. pci_disable_device(pdev);
  3109. return PCI_ERS_RESULT_NEED_RESET;
  3110. case pci_channel_io_perm_failure:
  3111. ha->flags.pci_channel_io_perm_failure = 1;
  3112. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3113. return PCI_ERS_RESULT_DISCONNECT;
  3114. }
  3115. return PCI_ERS_RESULT_NEED_RESET;
  3116. }
  3117. static pci_ers_result_t
  3118. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3119. {
  3120. int risc_paused = 0;
  3121. uint32_t stat;
  3122. unsigned long flags;
  3123. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3124. struct qla_hw_data *ha = base_vha->hw;
  3125. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3126. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3127. spin_lock_irqsave(&ha->hardware_lock, flags);
  3128. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3129. stat = RD_REG_DWORD(&reg->hccr);
  3130. if (stat & HCCR_RISC_PAUSE)
  3131. risc_paused = 1;
  3132. } else if (IS_QLA23XX(ha)) {
  3133. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3134. if (stat & HSR_RISC_PAUSED)
  3135. risc_paused = 1;
  3136. } else if (IS_FWI2_CAPABLE(ha)) {
  3137. stat = RD_REG_DWORD(&reg24->host_status);
  3138. if (stat & HSRX_RISC_PAUSED)
  3139. risc_paused = 1;
  3140. }
  3141. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3142. if (risc_paused) {
  3143. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3144. "Dumping firmware!\n");
  3145. ha->isp_ops->fw_dump(base_vha, 0);
  3146. return PCI_ERS_RESULT_NEED_RESET;
  3147. } else
  3148. return PCI_ERS_RESULT_RECOVERED;
  3149. }
  3150. static pci_ers_result_t
  3151. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3152. {
  3153. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3154. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3155. struct qla_hw_data *ha = base_vha->hw;
  3156. struct rsp_que *rsp;
  3157. int rc, retries = 10;
  3158. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3159. /* Workaround: qla2xxx driver which access hardware earlier
  3160. * needs error state to be pci_channel_io_online.
  3161. * Otherwise mailbox command timesout.
  3162. */
  3163. pdev->error_state = pci_channel_io_normal;
  3164. pci_restore_state(pdev);
  3165. /* pci_restore_state() clears the saved_state flag of the device
  3166. * save restored state which resets saved_state flag
  3167. */
  3168. pci_save_state(pdev);
  3169. if (ha->mem_only)
  3170. rc = pci_enable_device_mem(pdev);
  3171. else
  3172. rc = pci_enable_device(pdev);
  3173. if (rc) {
  3174. qla_printk(KERN_WARNING, ha,
  3175. "Can't re-enable PCI device after reset.\n");
  3176. return ret;
  3177. }
  3178. rsp = ha->rsp_q_map[0];
  3179. if (qla2x00_request_irqs(ha, rsp))
  3180. return ret;
  3181. if (ha->isp_ops->pci_config(base_vha))
  3182. return ret;
  3183. while (ha->flags.mbox_busy && retries--)
  3184. msleep(1000);
  3185. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3186. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3187. ret = PCI_ERS_RESULT_RECOVERED;
  3188. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3189. DEBUG17(qla_printk(KERN_WARNING, ha,
  3190. "slot_reset-return:ret=%x\n", ret));
  3191. return ret;
  3192. }
  3193. static void
  3194. qla2xxx_pci_resume(struct pci_dev *pdev)
  3195. {
  3196. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3197. struct qla_hw_data *ha = base_vha->hw;
  3198. int ret;
  3199. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3200. ret = qla2x00_wait_for_hba_online(base_vha);
  3201. if (ret != QLA_SUCCESS) {
  3202. qla_printk(KERN_ERR, ha,
  3203. "the device failed to resume I/O "
  3204. "from slot/link_reset");
  3205. }
  3206. pci_cleanup_aer_uncorrect_error_status(pdev);
  3207. ha->flags.eeh_busy = 0;
  3208. }
  3209. static struct pci_error_handlers qla2xxx_err_handler = {
  3210. .error_detected = qla2xxx_pci_error_detected,
  3211. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3212. .slot_reset = qla2xxx_pci_slot_reset,
  3213. .resume = qla2xxx_pci_resume,
  3214. };
  3215. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3216. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3217. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3218. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3219. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3220. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3221. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3222. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3223. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3224. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3225. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3226. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3227. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3228. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3229. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3230. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3231. { 0 },
  3232. };
  3233. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3234. static struct pci_driver qla2xxx_pci_driver = {
  3235. .name = QLA2XXX_DRIVER_NAME,
  3236. .driver = {
  3237. .owner = THIS_MODULE,
  3238. },
  3239. .id_table = qla2xxx_pci_tbl,
  3240. .probe = qla2x00_probe_one,
  3241. .remove = qla2x00_remove_one,
  3242. .err_handler = &qla2xxx_err_handler,
  3243. };
  3244. /**
  3245. * qla2x00_module_init - Module initialization.
  3246. **/
  3247. static int __init
  3248. qla2x00_module_init(void)
  3249. {
  3250. int ret = 0;
  3251. /* Allocate cache for SRBs. */
  3252. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3253. SLAB_HWCACHE_ALIGN, NULL);
  3254. if (srb_cachep == NULL) {
  3255. printk(KERN_ERR
  3256. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3257. return -ENOMEM;
  3258. }
  3259. /* Derive version string. */
  3260. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3261. if (ql2xextended_error_logging)
  3262. strcat(qla2x00_version_str, "-debug");
  3263. qla2xxx_transport_template =
  3264. fc_attach_transport(&qla2xxx_transport_functions);
  3265. if (!qla2xxx_transport_template) {
  3266. kmem_cache_destroy(srb_cachep);
  3267. return -ENODEV;
  3268. }
  3269. qla2xxx_transport_vport_template =
  3270. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3271. if (!qla2xxx_transport_vport_template) {
  3272. kmem_cache_destroy(srb_cachep);
  3273. fc_release_transport(qla2xxx_transport_template);
  3274. return -ENODEV;
  3275. }
  3276. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3277. qla2x00_version_str);
  3278. ret = pci_register_driver(&qla2xxx_pci_driver);
  3279. if (ret) {
  3280. kmem_cache_destroy(srb_cachep);
  3281. fc_release_transport(qla2xxx_transport_template);
  3282. fc_release_transport(qla2xxx_transport_vport_template);
  3283. }
  3284. return ret;
  3285. }
  3286. /**
  3287. * qla2x00_module_exit - Module cleanup.
  3288. **/
  3289. static void __exit
  3290. qla2x00_module_exit(void)
  3291. {
  3292. pci_unregister_driver(&qla2xxx_pci_driver);
  3293. qla2x00_release_firmware();
  3294. kmem_cache_destroy(srb_cachep);
  3295. if (ctx_cachep)
  3296. kmem_cache_destroy(ctx_cachep);
  3297. fc_release_transport(qla2xxx_transport_template);
  3298. fc_release_transport(qla2xxx_transport_vport_template);
  3299. }
  3300. module_init(qla2x00_module_init);
  3301. module_exit(qla2x00_module_exit);
  3302. MODULE_AUTHOR("QLogic Corporation");
  3303. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3304. MODULE_LICENSE("GPL");
  3305. MODULE_VERSION(QLA2XXX_VERSION);
  3306. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3307. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3308. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3309. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3310. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3311. MODULE_FIRMWARE(FW_FILE_ISP25XX);