fimc-mdevice.c 35 KB

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  1. /*
  2. * S5P/EXYNOS4 SoC series camera host interface media device driver
  3. *
  4. * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published
  9. * by the Free Software Foundation, either version 2 of the License,
  10. * or (at your option) any later version.
  11. */
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/i2c.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/of_device.h>
  22. #include <linux/of_i2c.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/types.h>
  26. #include <linux/slab.h>
  27. #include <media/v4l2-ctrls.h>
  28. #include <media/v4l2-of.h>
  29. #include <media/media-device.h>
  30. #include <media/s5p_fimc.h>
  31. #include "fimc-core.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-mdevice.h"
  34. #include "mipi-csis.h"
  35. static int __fimc_md_set_camclk(struct fimc_md *fmd,
  36. struct fimc_sensor_info *s_info,
  37. bool on);
  38. /**
  39. * fimc_pipeline_prepare - update pipeline information with subdevice pointers
  40. * @me: media entity terminating the pipeline
  41. *
  42. * Caller holds the graph mutex.
  43. */
  44. static void fimc_pipeline_prepare(struct fimc_pipeline *p,
  45. struct media_entity *me)
  46. {
  47. struct v4l2_subdev *sd;
  48. int i;
  49. for (i = 0; i < IDX_MAX; i++)
  50. p->subdevs[i] = NULL;
  51. while (1) {
  52. struct media_pad *pad = NULL;
  53. /* Find remote source pad */
  54. for (i = 0; i < me->num_pads; i++) {
  55. struct media_pad *spad = &me->pads[i];
  56. if (!(spad->flags & MEDIA_PAD_FL_SINK))
  57. continue;
  58. pad = media_entity_remote_source(spad);
  59. if (pad)
  60. break;
  61. }
  62. if (pad == NULL ||
  63. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  64. break;
  65. sd = media_entity_to_v4l2_subdev(pad->entity);
  66. switch (sd->grp_id) {
  67. case GRP_ID_FIMC_IS_SENSOR:
  68. case GRP_ID_SENSOR:
  69. p->subdevs[IDX_SENSOR] = sd;
  70. break;
  71. case GRP_ID_CSIS:
  72. p->subdevs[IDX_CSIS] = sd;
  73. break;
  74. case GRP_ID_FLITE:
  75. p->subdevs[IDX_FLITE] = sd;
  76. break;
  77. case GRP_ID_FIMC:
  78. /* No need to control FIMC subdev through subdev ops */
  79. break;
  80. default:
  81. pr_warn("%s: Unknown subdev grp_id: %#x\n",
  82. __func__, sd->grp_id);
  83. }
  84. me = &sd->entity;
  85. if (me->num_pads == 1)
  86. break;
  87. }
  88. }
  89. /**
  90. * __subdev_set_power - change power state of a single subdev
  91. * @sd: subdevice to change power state for
  92. * @on: 1 to enable power or 0 to disable
  93. *
  94. * Return result of s_power subdev operation or -ENXIO if sd argument
  95. * is NULL. Return 0 if the subdevice does not implement s_power.
  96. */
  97. static int __subdev_set_power(struct v4l2_subdev *sd, int on)
  98. {
  99. int *use_count;
  100. int ret;
  101. if (sd == NULL)
  102. return -ENXIO;
  103. use_count = &sd->entity.use_count;
  104. if (on && (*use_count)++ > 0)
  105. return 0;
  106. else if (!on && (*use_count == 0 || --(*use_count) > 0))
  107. return 0;
  108. ret = v4l2_subdev_call(sd, core, s_power, on);
  109. return ret != -ENOIOCTLCMD ? ret : 0;
  110. }
  111. /**
  112. * fimc_pipeline_s_power - change power state of all pipeline subdevs
  113. * @fimc: fimc device terminating the pipeline
  114. * @state: true to power on, false to power off
  115. *
  116. * Needs to be called with the graph mutex held.
  117. */
  118. static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool state)
  119. {
  120. unsigned int i;
  121. int ret;
  122. if (p->subdevs[IDX_SENSOR] == NULL)
  123. return -ENXIO;
  124. for (i = 0; i < IDX_MAX; i++) {
  125. unsigned int idx = state ? (IDX_MAX - 1) - i : i;
  126. ret = __subdev_set_power(p->subdevs[idx], state);
  127. if (ret < 0 && ret != -ENXIO)
  128. return ret;
  129. }
  130. return 0;
  131. }
  132. /**
  133. * __fimc_pipeline_open - update the pipeline information, enable power
  134. * of all pipeline subdevs and the sensor clock
  135. * @me: media entity to start graph walk with
  136. * @prepare: true to walk the current pipeline and acquire all subdevs
  137. *
  138. * Called with the graph mutex held.
  139. */
  140. static int __fimc_pipeline_open(struct fimc_pipeline *p,
  141. struct media_entity *me, bool prepare)
  142. {
  143. struct fimc_md *fmd = entity_to_fimc_mdev(me);
  144. struct v4l2_subdev *sd;
  145. int ret;
  146. if (WARN_ON(p == NULL || me == NULL))
  147. return -EINVAL;
  148. if (prepare)
  149. fimc_pipeline_prepare(p, me);
  150. sd = p->subdevs[IDX_SENSOR];
  151. if (sd == NULL)
  152. return -EINVAL;
  153. /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
  154. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
  155. ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
  156. if (ret < 0)
  157. return ret;
  158. }
  159. ret = fimc_md_set_camclk(sd, true);
  160. if (ret < 0)
  161. goto err_wbclk;
  162. ret = fimc_pipeline_s_power(p, 1);
  163. if (!ret)
  164. return 0;
  165. fimc_md_set_camclk(sd, false);
  166. err_wbclk:
  167. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
  168. clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
  169. return ret;
  170. }
  171. /**
  172. * __fimc_pipeline_close - disable the sensor clock and pipeline power
  173. * @fimc: fimc device terminating the pipeline
  174. *
  175. * Disable power of all subdevs and turn the external sensor clock off.
  176. */
  177. static int __fimc_pipeline_close(struct fimc_pipeline *p)
  178. {
  179. struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
  180. struct fimc_md *fmd;
  181. int ret = 0;
  182. if (WARN_ON(sd == NULL))
  183. return -EINVAL;
  184. if (p->subdevs[IDX_SENSOR]) {
  185. ret = fimc_pipeline_s_power(p, 0);
  186. fimc_md_set_camclk(sd, false);
  187. }
  188. fmd = entity_to_fimc_mdev(&sd->entity);
  189. /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
  190. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
  191. clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
  192. return ret == -ENXIO ? 0 : ret;
  193. }
  194. /**
  195. * __fimc_pipeline_s_stream - invoke s_stream on pipeline subdevs
  196. * @pipeline: video pipeline structure
  197. * @on: passed as the s_stream call argument
  198. */
  199. static int __fimc_pipeline_s_stream(struct fimc_pipeline *p, bool on)
  200. {
  201. int i, ret;
  202. if (p->subdevs[IDX_SENSOR] == NULL)
  203. return -ENODEV;
  204. for (i = 0; i < IDX_MAX; i++) {
  205. unsigned int idx = on ? (IDX_MAX - 1) - i : i;
  206. ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
  207. if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
  208. return ret;
  209. }
  210. return 0;
  211. }
  212. /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
  213. static const struct fimc_pipeline_ops fimc_pipeline_ops = {
  214. .open = __fimc_pipeline_open,
  215. .close = __fimc_pipeline_close,
  216. .set_stream = __fimc_pipeline_s_stream,
  217. };
  218. /*
  219. * Sensor subdevice helper functions
  220. */
  221. static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
  222. struct fimc_sensor_info *s_info)
  223. {
  224. struct i2c_adapter *adapter;
  225. struct v4l2_subdev *sd = NULL;
  226. if (!s_info || !fmd)
  227. return NULL;
  228. /*
  229. * If FIMC bus type is not Writeback FIFO assume it is same
  230. * as sensor_bus_type.
  231. */
  232. s_info->pdata.fimc_bus_type = s_info->pdata.sensor_bus_type;
  233. adapter = i2c_get_adapter(s_info->pdata.i2c_bus_num);
  234. if (!adapter) {
  235. v4l2_warn(&fmd->v4l2_dev,
  236. "Failed to get I2C adapter %d, deferring probe\n",
  237. s_info->pdata.i2c_bus_num);
  238. return ERR_PTR(-EPROBE_DEFER);
  239. }
  240. sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
  241. s_info->pdata.board_info, NULL);
  242. if (IS_ERR_OR_NULL(sd)) {
  243. i2c_put_adapter(adapter);
  244. v4l2_warn(&fmd->v4l2_dev,
  245. "Failed to acquire subdev %s, deferring probe\n",
  246. s_info->pdata.board_info->type);
  247. return ERR_PTR(-EPROBE_DEFER);
  248. }
  249. v4l2_set_subdev_hostdata(sd, s_info);
  250. sd->grp_id = GRP_ID_SENSOR;
  251. v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
  252. sd->name);
  253. return sd;
  254. }
  255. static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
  256. {
  257. struct i2c_client *client = v4l2_get_subdevdata(sd);
  258. struct i2c_adapter *adapter;
  259. if (!client)
  260. return;
  261. v4l2_device_unregister_subdev(sd);
  262. if (!client->dev.of_node) {
  263. adapter = client->adapter;
  264. i2c_unregister_device(client);
  265. if (adapter)
  266. i2c_put_adapter(adapter);
  267. }
  268. }
  269. #ifdef CONFIG_OF
  270. /* Register I2C client subdev associated with @node. */
  271. static int fimc_md_of_add_sensor(struct fimc_md *fmd,
  272. struct device_node *node, int index)
  273. {
  274. struct fimc_sensor_info *si;
  275. struct i2c_client *client;
  276. struct v4l2_subdev *sd;
  277. int ret;
  278. if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
  279. return -EINVAL;
  280. si = &fmd->sensor[index];
  281. client = of_find_i2c_device_by_node(node);
  282. if (!client)
  283. return -EPROBE_DEFER;
  284. device_lock(&client->dev);
  285. if (!client->driver ||
  286. !try_module_get(client->driver->driver.owner)) {
  287. ret = -EPROBE_DEFER;
  288. v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n",
  289. node->full_name);
  290. goto dev_put;
  291. }
  292. /* Enable sensor's master clock */
  293. ret = __fimc_md_set_camclk(fmd, si, true);
  294. if (ret < 0)
  295. goto mod_put;
  296. sd = i2c_get_clientdata(client);
  297. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  298. __fimc_md_set_camclk(fmd, si, false);
  299. if (ret < 0)
  300. goto mod_put;
  301. v4l2_set_subdev_hostdata(sd, si);
  302. sd->grp_id = GRP_ID_SENSOR;
  303. si->subdev = sd;
  304. v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
  305. sd->name, fmd->num_sensors);
  306. fmd->num_sensors++;
  307. mod_put:
  308. module_put(client->driver->driver.owner);
  309. dev_put:
  310. device_unlock(&client->dev);
  311. put_device(&client->dev);
  312. return ret;
  313. }
  314. /* Parse port node and register as a sub-device any sensor specified there. */
  315. static int fimc_md_parse_port_node(struct fimc_md *fmd,
  316. struct device_node *port,
  317. unsigned int index)
  318. {
  319. struct device_node *rem, *ep, *np;
  320. struct fimc_source_info *pd;
  321. struct v4l2_of_endpoint endpoint;
  322. int ret;
  323. u32 val;
  324. pd = &fmd->sensor[index].pdata;
  325. /* Assume here a port node can have only one endpoint node. */
  326. ep = of_get_next_child(port, NULL);
  327. if (!ep)
  328. return 0;
  329. v4l2_of_parse_endpoint(ep, &endpoint);
  330. if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
  331. return -EINVAL;
  332. pd->mux_id = (endpoint.port - 1) & 0x1;
  333. rem = v4l2_of_get_remote_port_parent(ep);
  334. of_node_put(ep);
  335. if (rem == NULL) {
  336. v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
  337. ep->full_name);
  338. return 0;
  339. }
  340. if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
  341. pd->clk_id = val;
  342. if (!of_property_read_u32(rem, "clock-frequency", &val))
  343. pd->clk_frequency = val;
  344. if (pd->clk_frequency == 0) {
  345. v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
  346. rem->full_name);
  347. of_node_put(rem);
  348. return -EINVAL;
  349. }
  350. if (fimc_input_is_parallel(endpoint.port)) {
  351. if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
  352. pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
  353. else
  354. pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
  355. pd->flags = endpoint.bus.parallel.flags;
  356. } else if (fimc_input_is_mipi_csi(endpoint.port)) {
  357. /*
  358. * MIPI CSI-2: only input mux selection and
  359. * the sensor's clock frequency is needed.
  360. */
  361. pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
  362. } else {
  363. v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
  364. endpoint.port, rem->full_name);
  365. }
  366. /*
  367. * For FIMC-IS handled sensors, that are placed under i2c-isp device
  368. * node, FIMC is connected to the FIMC-IS through its ISP Writeback
  369. * input. Sensors are attached to the FIMC-LITE hostdata interface
  370. * directly or through MIPI-CSIS, depending on the external media bus
  371. * used. This needs to be handled in a more reliable way, not by just
  372. * checking parent's node name.
  373. */
  374. np = of_get_parent(rem);
  375. if (np && !of_node_cmp(np->name, "i2c-isp"))
  376. pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  377. else
  378. pd->fimc_bus_type = pd->sensor_bus_type;
  379. ret = fimc_md_of_add_sensor(fmd, rem, index);
  380. of_node_put(rem);
  381. return ret;
  382. }
  383. /* Register all SoC external sub-devices */
  384. static int fimc_md_of_sensors_register(struct fimc_md *fmd,
  385. struct device_node *np)
  386. {
  387. struct device_node *parent = fmd->pdev->dev.of_node;
  388. struct device_node *node, *ports;
  389. int index = 0;
  390. int ret;
  391. /* Attach sensors linked to MIPI CSI-2 receivers */
  392. for_each_available_child_of_node(parent, node) {
  393. struct device_node *port;
  394. if (of_node_cmp(node->name, "csis"))
  395. continue;
  396. /* The csis node can have only port subnode. */
  397. port = of_get_next_child(node, NULL);
  398. if (!port)
  399. continue;
  400. ret = fimc_md_parse_port_node(fmd, port, index);
  401. if (ret < 0)
  402. return ret;
  403. index++;
  404. }
  405. /* Attach sensors listed in the parallel-ports node */
  406. ports = of_get_child_by_name(parent, "parallel-ports");
  407. if (!ports)
  408. return 0;
  409. for_each_child_of_node(ports, node) {
  410. ret = fimc_md_parse_port_node(fmd, node, index);
  411. if (ret < 0)
  412. break;
  413. index++;
  414. }
  415. return 0;
  416. }
  417. static int __of_get_csis_id(struct device_node *np)
  418. {
  419. u32 reg = 0;
  420. np = of_get_child_by_name(np, "port");
  421. if (!np)
  422. return -EINVAL;
  423. of_property_read_u32(np, "reg", &reg);
  424. return reg - FIMC_INPUT_MIPI_CSI2_0;
  425. }
  426. #else
  427. #define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
  428. #define __of_get_csis_id(np) (-ENOSYS)
  429. #endif
  430. static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
  431. {
  432. struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
  433. struct device_node *of_node = fmd->pdev->dev.of_node;
  434. int num_clients = 0;
  435. int ret, i;
  436. /*
  437. * Runtime resume one of the FIMC entities to make sure
  438. * the sclk_cam clocks are not globally disabled.
  439. */
  440. if (!fmd->pmf)
  441. return -ENXIO;
  442. ret = pm_runtime_get_sync(fmd->pmf);
  443. if (ret < 0)
  444. return ret;
  445. if (of_node) {
  446. fmd->num_sensors = 0;
  447. ret = fimc_md_of_sensors_register(fmd, of_node);
  448. } else if (pdata) {
  449. WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
  450. num_clients = min_t(u32, pdata->num_clients,
  451. ARRAY_SIZE(fmd->sensor));
  452. fmd->num_sensors = num_clients;
  453. for (i = 0; i < num_clients; i++) {
  454. struct v4l2_subdev *sd;
  455. fmd->sensor[i].pdata = pdata->source_info[i];
  456. ret = __fimc_md_set_camclk(fmd, &fmd->sensor[i], true);
  457. if (ret)
  458. break;
  459. sd = fimc_md_register_sensor(fmd, &fmd->sensor[i]);
  460. ret = __fimc_md_set_camclk(fmd, &fmd->sensor[i], false);
  461. if (IS_ERR(sd)) {
  462. fmd->sensor[i].subdev = NULL;
  463. ret = PTR_ERR(sd);
  464. break;
  465. }
  466. fmd->sensor[i].subdev = sd;
  467. if (ret)
  468. break;
  469. }
  470. }
  471. pm_runtime_put(fmd->pmf);
  472. return ret;
  473. }
  474. /*
  475. * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
  476. */
  477. static int register_fimc_lite_entity(struct fimc_md *fmd,
  478. struct fimc_lite *fimc_lite)
  479. {
  480. struct v4l2_subdev *sd;
  481. int ret;
  482. if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
  483. fmd->fimc_lite[fimc_lite->index]))
  484. return -EBUSY;
  485. sd = &fimc_lite->subdev;
  486. sd->grp_id = GRP_ID_FLITE;
  487. v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
  488. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  489. if (!ret)
  490. fmd->fimc_lite[fimc_lite->index] = fimc_lite;
  491. else
  492. v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
  493. fimc_lite->index);
  494. return ret;
  495. }
  496. static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
  497. {
  498. struct v4l2_subdev *sd;
  499. int ret;
  500. if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
  501. return -EBUSY;
  502. sd = &fimc->vid_cap.subdev;
  503. sd->grp_id = GRP_ID_FIMC;
  504. v4l2_set_subdev_hostdata(sd, (void *)&fimc_pipeline_ops);
  505. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  506. if (!ret) {
  507. if (!fmd->pmf && fimc->pdev)
  508. fmd->pmf = &fimc->pdev->dev;
  509. fmd->fimc[fimc->id] = fimc;
  510. fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
  511. } else {
  512. v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
  513. fimc->id, ret);
  514. }
  515. return ret;
  516. }
  517. static int register_csis_entity(struct fimc_md *fmd,
  518. struct platform_device *pdev,
  519. struct v4l2_subdev *sd)
  520. {
  521. struct device_node *node = pdev->dev.of_node;
  522. int id, ret;
  523. id = node ? __of_get_csis_id(node) : max(0, pdev->id);
  524. if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
  525. return -ENOENT;
  526. if (WARN_ON(fmd->csis[id].sd))
  527. return -EBUSY;
  528. sd->grp_id = GRP_ID_CSIS;
  529. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  530. if (!ret)
  531. fmd->csis[id].sd = sd;
  532. else
  533. v4l2_err(&fmd->v4l2_dev,
  534. "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
  535. return ret;
  536. }
  537. static int fimc_md_register_platform_entity(struct fimc_md *fmd,
  538. struct platform_device *pdev,
  539. int plat_entity)
  540. {
  541. struct device *dev = &pdev->dev;
  542. int ret = -EPROBE_DEFER;
  543. void *drvdata;
  544. /* Lock to ensure dev->driver won't change. */
  545. device_lock(dev);
  546. if (!dev->driver || !try_module_get(dev->driver->owner))
  547. goto dev_unlock;
  548. drvdata = dev_get_drvdata(dev);
  549. /* Some subdev didn't probe succesfully id drvdata is NULL */
  550. if (drvdata) {
  551. switch (plat_entity) {
  552. case IDX_FIMC:
  553. ret = register_fimc_entity(fmd, drvdata);
  554. break;
  555. case IDX_FLITE:
  556. ret = register_fimc_lite_entity(fmd, drvdata);
  557. break;
  558. case IDX_CSIS:
  559. ret = register_csis_entity(fmd, pdev, drvdata);
  560. break;
  561. default:
  562. ret = -ENODEV;
  563. }
  564. }
  565. module_put(dev->driver->owner);
  566. dev_unlock:
  567. device_unlock(dev);
  568. if (ret == -EPROBE_DEFER)
  569. dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
  570. dev_name(dev));
  571. else if (ret < 0)
  572. dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
  573. dev_name(dev), ret);
  574. return ret;
  575. }
  576. static int fimc_md_pdev_match(struct device *dev, void *data)
  577. {
  578. struct platform_device *pdev = to_platform_device(dev);
  579. int plat_entity = -1;
  580. int ret;
  581. char *p;
  582. if (!get_device(dev))
  583. return -ENODEV;
  584. if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
  585. plat_entity = IDX_CSIS;
  586. } else if (!strcmp(pdev->name, FIMC_LITE_DRV_NAME)) {
  587. plat_entity = IDX_FLITE;
  588. } else {
  589. p = strstr(pdev->name, "fimc");
  590. if (p && *(p + 4) == 0)
  591. plat_entity = IDX_FIMC;
  592. }
  593. if (plat_entity >= 0)
  594. ret = fimc_md_register_platform_entity(data, pdev,
  595. plat_entity);
  596. put_device(dev);
  597. return 0;
  598. }
  599. /* Register FIMC, FIMC-LITE and CSIS media entities */
  600. #ifdef CONFIG_OF
  601. static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
  602. struct device_node *parent)
  603. {
  604. struct device_node *node;
  605. int ret = 0;
  606. for_each_available_child_of_node(parent, node) {
  607. struct platform_device *pdev;
  608. int plat_entity = -1;
  609. pdev = of_find_device_by_node(node);
  610. if (!pdev)
  611. continue;
  612. /* If driver of any entity isn't ready try all again later. */
  613. if (!strcmp(node->name, CSIS_OF_NODE_NAME))
  614. plat_entity = IDX_CSIS;
  615. else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
  616. plat_entity = IDX_FLITE;
  617. else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
  618. !of_property_read_bool(node, "samsung,lcd-wb"))
  619. plat_entity = IDX_FIMC;
  620. if (plat_entity >= 0)
  621. ret = fimc_md_register_platform_entity(fmd, pdev,
  622. plat_entity);
  623. put_device(&pdev->dev);
  624. if (ret < 0)
  625. break;
  626. }
  627. return ret;
  628. }
  629. #else
  630. #define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
  631. #endif
  632. static void fimc_md_unregister_entities(struct fimc_md *fmd)
  633. {
  634. int i;
  635. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  636. if (fmd->fimc[i] == NULL)
  637. continue;
  638. v4l2_device_unregister_subdev(&fmd->fimc[i]->vid_cap.subdev);
  639. fmd->fimc[i]->pipeline_ops = NULL;
  640. fmd->fimc[i] = NULL;
  641. }
  642. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  643. if (fmd->fimc_lite[i] == NULL)
  644. continue;
  645. v4l2_device_unregister_subdev(&fmd->fimc_lite[i]->subdev);
  646. fmd->fimc_lite[i]->pipeline_ops = NULL;
  647. fmd->fimc_lite[i] = NULL;
  648. }
  649. for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
  650. if (fmd->csis[i].sd == NULL)
  651. continue;
  652. v4l2_device_unregister_subdev(fmd->csis[i].sd);
  653. module_put(fmd->csis[i].sd->owner);
  654. fmd->csis[i].sd = NULL;
  655. }
  656. for (i = 0; i < fmd->num_sensors; i++) {
  657. if (fmd->sensor[i].subdev == NULL)
  658. continue;
  659. fimc_md_unregister_sensor(fmd->sensor[i].subdev);
  660. fmd->sensor[i].subdev = NULL;
  661. }
  662. v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
  663. }
  664. /**
  665. * __fimc_md_create_fimc_links - create links to all FIMC entities
  666. * @fmd: fimc media device
  667. * @source: the source entity to create links to all fimc entities from
  668. * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
  669. * @pad: the source entity pad index
  670. * @link_mask: bitmask of the fimc devices for which link should be enabled
  671. */
  672. static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
  673. struct media_entity *source,
  674. struct v4l2_subdev *sensor,
  675. int pad, int link_mask)
  676. {
  677. struct fimc_sensor_info *s_info = NULL;
  678. struct media_entity *sink;
  679. unsigned int flags = 0;
  680. int ret, i;
  681. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  682. if (!fmd->fimc[i])
  683. continue;
  684. /*
  685. * Some FIMC variants are not fitted with camera capture
  686. * interface. Skip creating a link from sensor for those.
  687. */
  688. if (!fmd->fimc[i]->variant->has_cam_if)
  689. continue;
  690. flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
  691. sink = &fmd->fimc[i]->vid_cap.subdev.entity;
  692. ret = media_entity_create_link(source, pad, sink,
  693. FIMC_SD_PAD_SINK_CAM, flags);
  694. if (ret)
  695. return ret;
  696. /* Notify FIMC capture subdev entity */
  697. ret = media_entity_call(sink, link_setup, &sink->pads[0],
  698. &source->pads[pad], flags);
  699. if (ret)
  700. break;
  701. v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
  702. source->name, flags ? '=' : '-', sink->name);
  703. if (flags == 0 || sensor == NULL)
  704. continue;
  705. s_info = v4l2_get_subdev_hostdata(sensor);
  706. if (!WARN_ON(s_info == NULL)) {
  707. unsigned long irq_flags;
  708. spin_lock_irqsave(&fmd->slock, irq_flags);
  709. s_info->host = fmd->fimc[i];
  710. spin_unlock_irqrestore(&fmd->slock, irq_flags);
  711. }
  712. }
  713. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  714. if (!fmd->fimc_lite[i])
  715. continue;
  716. if (link_mask & (1 << (i + FIMC_MAX_DEVS)))
  717. flags = MEDIA_LNK_FL_ENABLED;
  718. else
  719. flags = 0;
  720. sink = &fmd->fimc_lite[i]->subdev.entity;
  721. ret = media_entity_create_link(source, pad, sink,
  722. FLITE_SD_PAD_SINK, flags);
  723. if (ret)
  724. return ret;
  725. /* Notify FIMC-LITE subdev entity */
  726. ret = media_entity_call(sink, link_setup, &sink->pads[0],
  727. &source->pads[pad], flags);
  728. if (ret)
  729. break;
  730. v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
  731. source->name, flags ? '=' : '-', sink->name);
  732. }
  733. return 0;
  734. }
  735. /* Create links from FIMC-LITE source pads to other entities */
  736. static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
  737. {
  738. struct media_entity *source, *sink;
  739. unsigned int flags = MEDIA_LNK_FL_ENABLED;
  740. int i, ret = 0;
  741. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  742. struct fimc_lite *fimc = fmd->fimc_lite[i];
  743. if (fimc == NULL)
  744. continue;
  745. source = &fimc->subdev.entity;
  746. sink = &fimc->vfd.entity;
  747. /* FIMC-LITE's subdev and video node */
  748. ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
  749. sink, 0, flags);
  750. if (ret)
  751. break;
  752. /* TODO: create links to other entities */
  753. }
  754. return ret;
  755. }
  756. /**
  757. * fimc_md_create_links - create default links between registered entities
  758. *
  759. * Parallel interface sensor entities are connected directly to FIMC capture
  760. * entities. The sensors using MIPI CSIS bus are connected through immutable
  761. * link with CSI receiver entity specified by mux_id. Any registered CSIS
  762. * entity has a link to each registered FIMC capture entity. Enabled links
  763. * are created by default between each subsequent registered sensor and
  764. * subsequent FIMC capture entity. The number of default active links is
  765. * determined by the number of available sensors or FIMC entities,
  766. * whichever is less.
  767. */
  768. static int fimc_md_create_links(struct fimc_md *fmd)
  769. {
  770. struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
  771. struct v4l2_subdev *sensor, *csis;
  772. struct fimc_source_info *pdata;
  773. struct fimc_sensor_info *s_info;
  774. struct media_entity *source, *sink;
  775. int i, pad, fimc_id = 0, ret = 0;
  776. u32 flags, link_mask = 0;
  777. for (i = 0; i < fmd->num_sensors; i++) {
  778. if (fmd->sensor[i].subdev == NULL)
  779. continue;
  780. sensor = fmd->sensor[i].subdev;
  781. s_info = v4l2_get_subdev_hostdata(sensor);
  782. if (!s_info)
  783. continue;
  784. source = NULL;
  785. pdata = &s_info->pdata;
  786. switch (pdata->sensor_bus_type) {
  787. case FIMC_BUS_TYPE_MIPI_CSI2:
  788. if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
  789. "Wrong CSI channel id: %d\n", pdata->mux_id))
  790. return -EINVAL;
  791. csis = fmd->csis[pdata->mux_id].sd;
  792. if (WARN(csis == NULL,
  793. "MIPI-CSI interface specified "
  794. "but s5p-csis module is not loaded!\n"))
  795. return -EINVAL;
  796. pad = sensor->entity.num_pads - 1;
  797. ret = media_entity_create_link(&sensor->entity, pad,
  798. &csis->entity, CSIS_PAD_SINK,
  799. MEDIA_LNK_FL_IMMUTABLE |
  800. MEDIA_LNK_FL_ENABLED);
  801. if (ret)
  802. return ret;
  803. v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
  804. sensor->entity.name, csis->entity.name);
  805. source = NULL;
  806. csi_sensors[pdata->mux_id] = sensor;
  807. break;
  808. case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
  809. source = &sensor->entity;
  810. pad = 0;
  811. break;
  812. default:
  813. v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
  814. pdata->sensor_bus_type);
  815. return -EINVAL;
  816. }
  817. if (source == NULL)
  818. continue;
  819. link_mask = 1 << fimc_id++;
  820. ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
  821. pad, link_mask);
  822. }
  823. for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
  824. if (fmd->csis[i].sd == NULL)
  825. continue;
  826. source = &fmd->csis[i].sd->entity;
  827. pad = CSIS_PAD_SOURCE;
  828. sensor = csi_sensors[i];
  829. link_mask = 1 << fimc_id++;
  830. ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
  831. pad, link_mask);
  832. }
  833. /* Create immutable links between each FIMC's subdev and video node */
  834. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  835. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  836. if (!fmd->fimc[i])
  837. continue;
  838. source = &fmd->fimc[i]->vid_cap.subdev.entity;
  839. sink = &fmd->fimc[i]->vid_cap.vfd.entity;
  840. ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
  841. sink, 0, flags);
  842. if (ret)
  843. break;
  844. }
  845. return __fimc_md_create_flite_source_links(fmd);
  846. }
  847. /*
  848. * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
  849. */
  850. static void fimc_md_put_clocks(struct fimc_md *fmd)
  851. {
  852. int i = FIMC_MAX_CAMCLKS;
  853. while (--i >= 0) {
  854. if (IS_ERR(fmd->camclk[i].clock))
  855. continue;
  856. clk_unprepare(fmd->camclk[i].clock);
  857. clk_put(fmd->camclk[i].clock);
  858. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  859. }
  860. /* Writeback (PIXELASYNCMx) clocks */
  861. for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
  862. if (IS_ERR(fmd->wbclk[i]))
  863. continue;
  864. clk_put(fmd->wbclk[i]);
  865. fmd->wbclk[i] = ERR_PTR(-EINVAL);
  866. }
  867. }
  868. static int fimc_md_get_clocks(struct fimc_md *fmd)
  869. {
  870. struct device *dev = NULL;
  871. char clk_name[32];
  872. struct clk *clock;
  873. int ret, i;
  874. for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
  875. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  876. if (fmd->pdev->dev.of_node)
  877. dev = &fmd->pdev->dev;
  878. for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
  879. snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
  880. clock = clk_get(dev, clk_name);
  881. if (IS_ERR(clock)) {
  882. dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
  883. clk_name);
  884. ret = PTR_ERR(clock);
  885. break;
  886. }
  887. ret = clk_prepare(clock);
  888. if (ret < 0) {
  889. clk_put(clock);
  890. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  891. break;
  892. }
  893. fmd->camclk[i].clock = clock;
  894. }
  895. if (ret)
  896. fimc_md_put_clocks(fmd);
  897. if (!fmd->use_isp)
  898. return 0;
  899. /*
  900. * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
  901. * leave PIXELASYNCM0 out for the LCD Writeback driver.
  902. */
  903. fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
  904. for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
  905. snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
  906. clock = clk_get(dev, clk_name);
  907. if (IS_ERR(clock)) {
  908. v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
  909. clk_name);
  910. ret = PTR_ERR(clock);
  911. break;
  912. }
  913. fmd->wbclk[i] = clock;
  914. }
  915. if (ret)
  916. fimc_md_put_clocks(fmd);
  917. return ret;
  918. }
  919. static int __fimc_md_set_camclk(struct fimc_md *fmd,
  920. struct fimc_sensor_info *s_info,
  921. bool on)
  922. {
  923. struct fimc_source_info *pdata = &s_info->pdata;
  924. struct fimc_camclk_info *camclk;
  925. int ret = 0;
  926. if (WARN_ON(pdata->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
  927. return -EINVAL;
  928. camclk = &fmd->camclk[pdata->clk_id];
  929. dbg("camclk %d, f: %lu, use_count: %d, on: %d",
  930. pdata->clk_id, pdata->clk_frequency, camclk->use_count, on);
  931. if (on) {
  932. if (camclk->use_count > 0 &&
  933. camclk->frequency != pdata->clk_frequency)
  934. return -EINVAL;
  935. if (camclk->use_count++ == 0) {
  936. clk_set_rate(camclk->clock, pdata->clk_frequency);
  937. camclk->frequency = pdata->clk_frequency;
  938. ret = pm_runtime_get_sync(fmd->pmf);
  939. if (ret < 0)
  940. return ret;
  941. ret = clk_enable(camclk->clock);
  942. dbg("Enabled camclk %d: f: %lu", pdata->clk_id,
  943. clk_get_rate(camclk->clock));
  944. }
  945. return ret;
  946. }
  947. if (WARN_ON(camclk->use_count == 0))
  948. return 0;
  949. if (--camclk->use_count == 0) {
  950. clk_disable(camclk->clock);
  951. pm_runtime_put(fmd->pmf);
  952. dbg("Disabled camclk %d", pdata->clk_id);
  953. }
  954. return ret;
  955. }
  956. /**
  957. * fimc_md_set_camclk - peripheral sensor clock setup
  958. * @sd: sensor subdev to configure sclk_cam clock for
  959. * @on: 1 to enable or 0 to disable the clock
  960. *
  961. * There are 2 separate clock outputs available in the SoC for external
  962. * image processors. These clocks are shared between all registered FIMC
  963. * devices to which sensors can be attached, either directly or through
  964. * the MIPI CSI receiver. The clock is allowed here to be used by
  965. * multiple sensors concurrently if they use same frequency.
  966. * This function should only be called when the graph mutex is held.
  967. */
  968. int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
  969. {
  970. struct fimc_sensor_info *s_info = v4l2_get_subdev_hostdata(sd);
  971. struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
  972. return __fimc_md_set_camclk(fmd, s_info, on);
  973. }
  974. static int fimc_md_link_notify(struct media_pad *source,
  975. struct media_pad *sink, u32 flags)
  976. {
  977. struct fimc_lite *fimc_lite = NULL;
  978. struct fimc_dev *fimc = NULL;
  979. struct fimc_pipeline *pipeline;
  980. struct v4l2_subdev *sd;
  981. struct mutex *lock;
  982. int ret = 0;
  983. int ref_count;
  984. if (media_entity_type(sink->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  985. return 0;
  986. sd = media_entity_to_v4l2_subdev(sink->entity);
  987. switch (sd->grp_id) {
  988. case GRP_ID_FLITE:
  989. fimc_lite = v4l2_get_subdevdata(sd);
  990. if (WARN_ON(fimc_lite == NULL))
  991. return 0;
  992. pipeline = &fimc_lite->pipeline;
  993. lock = &fimc_lite->lock;
  994. break;
  995. case GRP_ID_FIMC:
  996. fimc = v4l2_get_subdevdata(sd);
  997. if (WARN_ON(fimc == NULL))
  998. return 0;
  999. pipeline = &fimc->pipeline;
  1000. lock = &fimc->lock;
  1001. break;
  1002. default:
  1003. return 0;
  1004. }
  1005. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1006. int i;
  1007. mutex_lock(lock);
  1008. ret = __fimc_pipeline_close(pipeline);
  1009. for (i = 0; i < IDX_MAX; i++)
  1010. pipeline->subdevs[i] = NULL;
  1011. if (fimc)
  1012. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1013. mutex_unlock(lock);
  1014. return ret;
  1015. }
  1016. /*
  1017. * Link activation. Enable power of pipeline elements only if the
  1018. * pipeline is already in use, i.e. its video node is opened.
  1019. * Recreate the controls destroyed during the link deactivation.
  1020. */
  1021. mutex_lock(lock);
  1022. ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count;
  1023. if (ref_count > 0)
  1024. ret = __fimc_pipeline_open(pipeline, source->entity, true);
  1025. if (!ret && fimc)
  1026. ret = fimc_capture_ctrls_create(fimc);
  1027. mutex_unlock(lock);
  1028. return ret ? -EPIPE : ret;
  1029. }
  1030. static ssize_t fimc_md_sysfs_show(struct device *dev,
  1031. struct device_attribute *attr, char *buf)
  1032. {
  1033. struct platform_device *pdev = to_platform_device(dev);
  1034. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1035. if (fmd->user_subdev_api)
  1036. return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
  1037. return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
  1038. }
  1039. static ssize_t fimc_md_sysfs_store(struct device *dev,
  1040. struct device_attribute *attr,
  1041. const char *buf, size_t count)
  1042. {
  1043. struct platform_device *pdev = to_platform_device(dev);
  1044. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1045. bool subdev_api;
  1046. int i;
  1047. if (!strcmp(buf, "vid-dev\n"))
  1048. subdev_api = false;
  1049. else if (!strcmp(buf, "sub-dev\n"))
  1050. subdev_api = true;
  1051. else
  1052. return count;
  1053. fmd->user_subdev_api = subdev_api;
  1054. for (i = 0; i < FIMC_MAX_DEVS; i++)
  1055. if (fmd->fimc[i])
  1056. fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
  1057. return count;
  1058. }
  1059. /*
  1060. * This device attribute is to select video pipeline configuration method.
  1061. * There are following valid values:
  1062. * vid-dev - for V4L2 video node API only, subdevice will be configured
  1063. * by the host driver.
  1064. * sub-dev - for media controller API, subdevs must be configured in user
  1065. * space before starting streaming.
  1066. */
  1067. static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
  1068. fimc_md_sysfs_show, fimc_md_sysfs_store);
  1069. static int fimc_md_get_pinctrl(struct fimc_md *fmd)
  1070. {
  1071. struct device *dev = &fmd->pdev->dev;
  1072. struct fimc_pinctrl *pctl = &fmd->pinctl;
  1073. pctl->pinctrl = devm_pinctrl_get(dev);
  1074. if (IS_ERR(pctl->pinctrl))
  1075. return PTR_ERR(pctl->pinctrl);
  1076. pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
  1077. PINCTRL_STATE_DEFAULT);
  1078. if (IS_ERR(pctl->state_default))
  1079. return PTR_ERR(pctl->state_default);
  1080. pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
  1081. PINCTRL_STATE_IDLE);
  1082. return 0;
  1083. }
  1084. static int fimc_md_probe(struct platform_device *pdev)
  1085. {
  1086. struct device *dev = &pdev->dev;
  1087. struct v4l2_device *v4l2_dev;
  1088. struct fimc_md *fmd;
  1089. int ret;
  1090. fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
  1091. if (!fmd)
  1092. return -ENOMEM;
  1093. spin_lock_init(&fmd->slock);
  1094. fmd->pdev = pdev;
  1095. strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
  1096. sizeof(fmd->media_dev.model));
  1097. fmd->media_dev.link_notify = fimc_md_link_notify;
  1098. fmd->media_dev.dev = dev;
  1099. v4l2_dev = &fmd->v4l2_dev;
  1100. v4l2_dev->mdev = &fmd->media_dev;
  1101. v4l2_dev->notify = fimc_sensor_notify;
  1102. strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
  1103. ret = v4l2_device_register(dev, &fmd->v4l2_dev);
  1104. if (ret < 0) {
  1105. v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
  1106. return ret;
  1107. }
  1108. ret = media_device_register(&fmd->media_dev);
  1109. if (ret < 0) {
  1110. v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
  1111. goto err_md;
  1112. }
  1113. ret = fimc_md_get_clocks(fmd);
  1114. if (ret)
  1115. goto err_clk;
  1116. fmd->user_subdev_api = (dev->of_node != NULL);
  1117. /* Protect the media graph while we're registering entities */
  1118. mutex_lock(&fmd->media_dev.graph_mutex);
  1119. ret = fimc_md_get_pinctrl(fmd);
  1120. if (ret < 0) {
  1121. if (ret != EPROBE_DEFER)
  1122. dev_err(dev, "Failed to get pinctrl: %d\n", ret);
  1123. goto err_unlock;
  1124. }
  1125. if (dev->of_node)
  1126. ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
  1127. else
  1128. ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
  1129. fimc_md_pdev_match);
  1130. if (ret)
  1131. goto err_unlock;
  1132. if (dev->platform_data || dev->of_node) {
  1133. ret = fimc_md_register_sensor_entities(fmd);
  1134. if (ret)
  1135. goto err_unlock;
  1136. }
  1137. ret = fimc_md_create_links(fmd);
  1138. if (ret)
  1139. goto err_unlock;
  1140. ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
  1141. if (ret)
  1142. goto err_unlock;
  1143. ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
  1144. if (ret)
  1145. goto err_unlock;
  1146. platform_set_drvdata(pdev, fmd);
  1147. mutex_unlock(&fmd->media_dev.graph_mutex);
  1148. return 0;
  1149. err_unlock:
  1150. mutex_unlock(&fmd->media_dev.graph_mutex);
  1151. err_clk:
  1152. media_device_unregister(&fmd->media_dev);
  1153. fimc_md_put_clocks(fmd);
  1154. fimc_md_unregister_entities(fmd);
  1155. err_md:
  1156. v4l2_device_unregister(&fmd->v4l2_dev);
  1157. return ret;
  1158. }
  1159. static int fimc_md_remove(struct platform_device *pdev)
  1160. {
  1161. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1162. if (!fmd)
  1163. return 0;
  1164. device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
  1165. fimc_md_unregister_entities(fmd);
  1166. media_device_unregister(&fmd->media_dev);
  1167. fimc_md_put_clocks(fmd);
  1168. return 0;
  1169. }
  1170. static struct platform_device_id fimc_driver_ids[] __always_unused = {
  1171. { .name = "s5p-fimc-md" },
  1172. { },
  1173. };
  1174. MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
  1175. static const struct of_device_id fimc_md_of_match[] = {
  1176. { .compatible = "samsung,fimc" },
  1177. { },
  1178. };
  1179. MODULE_DEVICE_TABLE(of, fimc_md_of_match);
  1180. static struct platform_driver fimc_md_driver = {
  1181. .probe = fimc_md_probe,
  1182. .remove = fimc_md_remove,
  1183. .driver = {
  1184. .of_match_table = of_match_ptr(fimc_md_of_match),
  1185. .name = "s5p-fimc-md",
  1186. .owner = THIS_MODULE,
  1187. }
  1188. };
  1189. static int __init fimc_md_init(void)
  1190. {
  1191. int ret;
  1192. request_module("s5p-csis");
  1193. ret = fimc_register_driver();
  1194. if (ret)
  1195. return ret;
  1196. return platform_driver_register(&fimc_md_driver);
  1197. }
  1198. static void __exit fimc_md_exit(void)
  1199. {
  1200. platform_driver_unregister(&fimc_md_driver);
  1201. fimc_unregister_driver();
  1202. }
  1203. module_init(fimc_md_init);
  1204. module_exit(fimc_md_exit);
  1205. MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
  1206. MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
  1207. MODULE_LICENSE("GPL");
  1208. MODULE_VERSION("2.0.1");