saa7134-dvb.c 31 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #include <media/v4l2-common.h>
  33. #include "dvb-pll.h"
  34. #ifdef HAVE_MT352
  35. # include "mt352.h"
  36. # include "mt352_priv.h" /* FIXME */
  37. #endif
  38. #ifdef HAVE_TDA1004X
  39. # include "tda1004x.h"
  40. #endif
  41. #ifdef HAVE_NXT200X
  42. # include "nxt200x.h"
  43. #endif
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. static unsigned int antenna_pwr = 0;
  47. module_param(antenna_pwr, int, 0444);
  48. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  49. /* ------------------------------------------------------------------ */
  50. #ifdef HAVE_MT352
  51. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  52. {
  53. u32 ok;
  54. if (!on) {
  55. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  56. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  57. return 0;
  58. }
  59. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  61. udelay(10);
  62. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  63. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  64. udelay(10);
  65. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  66. udelay(10);
  67. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  68. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  69. ok ? "on" : "off");
  70. if (!ok)
  71. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  72. return ok;
  73. }
  74. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  75. {
  76. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  77. static u8 reset [] = { RESET, 0x80 };
  78. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  79. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  80. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  81. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  82. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  83. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  84. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  85. struct saa7134_dev *dev= fe->dvb->priv;
  86. printk("%s: %s called\n",dev->name,__FUNCTION__);
  87. mt352_write(fe, clock_config, sizeof(clock_config));
  88. udelay(200);
  89. mt352_write(fe, reset, sizeof(reset));
  90. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  91. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  92. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  93. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  94. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  95. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  96. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  97. return 0;
  98. }
  99. static int mt352_aver777_init(struct dvb_frontend* fe)
  100. {
  101. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
  102. static u8 reset [] = { RESET, 0x80 };
  103. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  104. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  105. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
  106. mt352_write(fe, clock_config, sizeof(clock_config));
  107. udelay(200);
  108. mt352_write(fe, reset, sizeof(reset));
  109. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  110. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  111. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  112. return 0;
  113. }
  114. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  115. struct dvb_frontend_parameters* params,
  116. u8* pllbuf)
  117. {
  118. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  119. static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
  120. struct saa7134_dev *dev = fe->dvb->priv;
  121. struct v4l2_frequency f;
  122. /* set frequency (mt2050) */
  123. f.tuner = 0;
  124. f.type = V4L2_TUNER_DIGITAL_TV;
  125. f.frequency = params->frequency / 1000 * 16 / 1000;
  126. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  127. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  128. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
  129. pinnacle_antenna_pwr(dev, antenna_pwr);
  130. /* mt352 setup */
  131. mt352_pinnacle_init(fe);
  132. pllbuf[0] = 0xc2;
  133. pllbuf[1] = 0x00;
  134. pllbuf[2] = 0x00;
  135. pllbuf[3] = 0x80;
  136. pllbuf[4] = 0x00;
  137. return 0;
  138. }
  139. static int mt352_aver777_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf)
  140. {
  141. pllbuf[0] = 0xc2;
  142. dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
  143. params->frequency,
  144. params->u.ofdm.bandwidth);
  145. return 0;
  146. }
  147. static struct mt352_config pinnacle_300i = {
  148. .demod_address = 0x3c >> 1,
  149. .adc_clock = 20333,
  150. .if2 = 36150,
  151. .no_tuner = 1,
  152. .demod_init = mt352_pinnacle_init,
  153. .pll_set = mt352_pinnacle_pll_set,
  154. };
  155. static struct mt352_config avermedia_777 = {
  156. .demod_address = 0xf,
  157. .demod_init = mt352_aver777_init,
  158. .pll_set = mt352_aver777_pll_set,
  159. };
  160. #endif
  161. /* ------------------------------------------------------------------ */
  162. #ifdef HAVE_TDA1004X
  163. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  164. {
  165. struct saa7134_dev *dev = fe->dvb->priv;
  166. u8 tuner_buf[4];
  167. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  168. sizeof(tuner_buf) };
  169. int tuner_frequency = 0;
  170. u8 band, cp, filter;
  171. /* determine charge pump */
  172. tuner_frequency = params->frequency + 36166000;
  173. if (tuner_frequency < 87000000)
  174. return -EINVAL;
  175. else if (tuner_frequency < 130000000)
  176. cp = 3;
  177. else if (tuner_frequency < 160000000)
  178. cp = 5;
  179. else if (tuner_frequency < 200000000)
  180. cp = 6;
  181. else if (tuner_frequency < 290000000)
  182. cp = 3;
  183. else if (tuner_frequency < 420000000)
  184. cp = 5;
  185. else if (tuner_frequency < 480000000)
  186. cp = 6;
  187. else if (tuner_frequency < 620000000)
  188. cp = 3;
  189. else if (tuner_frequency < 830000000)
  190. cp = 5;
  191. else if (tuner_frequency < 895000000)
  192. cp = 7;
  193. else
  194. return -EINVAL;
  195. /* determine band */
  196. if (params->frequency < 49000000)
  197. return -EINVAL;
  198. else if (params->frequency < 161000000)
  199. band = 1;
  200. else if (params->frequency < 444000000)
  201. band = 2;
  202. else if (params->frequency < 861000000)
  203. band = 4;
  204. else
  205. return -EINVAL;
  206. /* setup PLL filter */
  207. switch (params->u.ofdm.bandwidth) {
  208. case BANDWIDTH_6_MHZ:
  209. filter = 0;
  210. break;
  211. case BANDWIDTH_7_MHZ:
  212. filter = 0;
  213. break;
  214. case BANDWIDTH_8_MHZ:
  215. filter = 1;
  216. break;
  217. default:
  218. return -EINVAL;
  219. }
  220. /* calculate divisor
  221. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  222. */
  223. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  224. /* setup tuner buffer */
  225. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  226. tuner_buf[1] = tuner_frequency & 0xff;
  227. tuner_buf[2] = 0xca;
  228. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  229. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  230. return -EIO;
  231. msleep(1);
  232. return 0;
  233. }
  234. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  235. {
  236. struct saa7134_dev *dev = fe->dvb->priv;
  237. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  238. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  239. /* setup PLL configuration */
  240. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  241. return -EIO;
  242. msleep(1);
  243. return 0;
  244. }
  245. /* ------------------------------------------------------------------ */
  246. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  247. {
  248. return philips_tda6651_pll_init(0x60, fe);
  249. }
  250. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  251. {
  252. return philips_tda6651_pll_set(0x60, fe, params);
  253. }
  254. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  255. const struct firmware **fw, char *name)
  256. {
  257. struct saa7134_dev *dev = fe->dvb->priv;
  258. return request_firmware(fw, name, &dev->pci->dev);
  259. }
  260. static struct tda1004x_config philips_tu1216_60_config = {
  261. .demod_address = 0x8,
  262. .invert = 1,
  263. .invert_oclk = 0,
  264. .xtal_freq = TDA10046_XTAL_4M,
  265. .agc_config = TDA10046_AGC_DEFAULT,
  266. .if_freq = TDA10046_FREQ_3617,
  267. .pll_init = philips_tu1216_pll_60_init,
  268. .pll_set = philips_tu1216_pll_60_set,
  269. .pll_sleep = NULL,
  270. .request_firmware = philips_tu1216_request_firmware,
  271. };
  272. /* ------------------------------------------------------------------ */
  273. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  274. {
  275. return philips_tda6651_pll_init(0x61, fe);
  276. }
  277. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  278. {
  279. return philips_tda6651_pll_set(0x61, fe, params);
  280. }
  281. static struct tda1004x_config philips_tu1216_61_config = {
  282. .demod_address = 0x8,
  283. .invert = 1,
  284. .invert_oclk = 0,
  285. .xtal_freq = TDA10046_XTAL_4M,
  286. .agc_config = TDA10046_AGC_DEFAULT,
  287. .if_freq = TDA10046_FREQ_3617,
  288. .pll_init = philips_tu1216_pll_61_init,
  289. .pll_set = philips_tu1216_pll_61_set,
  290. .pll_sleep = NULL,
  291. .request_firmware = philips_tu1216_request_firmware,
  292. };
  293. /* ------------------------------------------------------------------ */
  294. static int philips_europa_pll_init(struct dvb_frontend *fe)
  295. {
  296. struct saa7134_dev *dev = fe->dvb->priv;
  297. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  298. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  299. /* setup PLL configuration */
  300. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  301. return -EIO;
  302. msleep(1);
  303. /* switch the board to dvb mode */
  304. init_msg.addr = 0x43;
  305. init_msg.len = 0x02;
  306. msg[0] = 0x00;
  307. msg[1] = 0x40;
  308. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  309. return -EIO;
  310. return 0;
  311. }
  312. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  313. {
  314. return philips_tda6651_pll_set(0x61, fe, params);
  315. }
  316. static void philips_europa_analog(struct dvb_frontend *fe)
  317. {
  318. struct saa7134_dev *dev = fe->dvb->priv;
  319. /* this message actually turns the tuner back to analog mode */
  320. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  321. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  322. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  323. msleep(1);
  324. /* switch the board to analog mode */
  325. analog_msg.addr = 0x43;
  326. analog_msg.len = 0x02;
  327. msg[0] = 0x00;
  328. msg[1] = 0x14;
  329. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  330. }
  331. static struct tda1004x_config philips_europa_config = {
  332. .demod_address = 0x8,
  333. .invert = 0,
  334. .invert_oclk = 0,
  335. .xtal_freq = TDA10046_XTAL_4M,
  336. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  337. .if_freq = TDA10046_FREQ_052,
  338. .pll_init = philips_europa_pll_init,
  339. .pll_set = philips_td1316_pll_set,
  340. .pll_sleep = philips_europa_analog,
  341. .request_firmware = NULL,
  342. };
  343. /* ------------------------------------------------------------------ */
  344. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  345. {
  346. struct saa7134_dev *dev = fe->dvb->priv;
  347. /* this message is to set up ATC and ALC */
  348. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  349. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  350. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  351. return -EIO;
  352. msleep(1);
  353. return 0;
  354. }
  355. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  356. {
  357. struct saa7134_dev *dev = fe->dvb->priv;
  358. /* this message actually turns the tuner back to analog mode */
  359. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  360. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  361. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  362. msleep(1);
  363. fmd1216_init[2] = 0x86;
  364. fmd1216_init[3] = 0x54;
  365. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  366. msleep(1);
  367. }
  368. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  369. {
  370. struct saa7134_dev *dev = fe->dvb->priv;
  371. u8 tuner_buf[4];
  372. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  373. sizeof(tuner_buf) };
  374. int tuner_frequency = 0;
  375. int divider = 0;
  376. u8 band, mode, cp;
  377. /* determine charge pump */
  378. tuner_frequency = params->frequency + 36130000;
  379. if (tuner_frequency < 87000000)
  380. return -EINVAL;
  381. /* low band */
  382. else if (tuner_frequency < 180000000) {
  383. band = 1;
  384. mode = 7;
  385. cp = 0;
  386. } else if (tuner_frequency < 195000000) {
  387. band = 1;
  388. mode = 6;
  389. cp = 1;
  390. /* mid band */
  391. } else if (tuner_frequency < 366000000) {
  392. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  393. band = 10;
  394. } else {
  395. band = 2;
  396. }
  397. mode = 7;
  398. cp = 0;
  399. } else if (tuner_frequency < 478000000) {
  400. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  401. band = 10;
  402. } else {
  403. band = 2;
  404. }
  405. mode = 6;
  406. cp = 1;
  407. /* high band */
  408. } else if (tuner_frequency < 662000000) {
  409. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  410. band = 12;
  411. } else {
  412. band = 4;
  413. }
  414. mode = 7;
  415. cp = 0;
  416. } else if (tuner_frequency < 840000000) {
  417. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  418. band = 12;
  419. } else {
  420. band = 4;
  421. }
  422. mode = 6;
  423. cp = 1;
  424. } else {
  425. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  426. band = 12;
  427. } else {
  428. band = 4;
  429. }
  430. mode = 7;
  431. cp = 1;
  432. }
  433. /* calculate divisor */
  434. /* ((36166000 + Finput) / 166666) rounded! */
  435. divider = (tuner_frequency + 83333) / 166667;
  436. /* setup tuner buffer */
  437. tuner_buf[0] = (divider >> 8) & 0x7f;
  438. tuner_buf[1] = divider & 0xff;
  439. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  440. tuner_buf[3] = 0x40 | band;
  441. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  442. return -EIO;
  443. return 0;
  444. }
  445. static struct tda1004x_config medion_cardbus = {
  446. .demod_address = 0x08,
  447. .invert = 1,
  448. .invert_oclk = 0,
  449. .xtal_freq = TDA10046_XTAL_16M,
  450. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  451. .if_freq = TDA10046_FREQ_3613,
  452. .pll_init = philips_fmd1216_pll_init,
  453. .pll_set = philips_fmd1216_pll_set,
  454. .pll_sleep = philips_fmd1216_analog,
  455. .request_firmware = NULL,
  456. };
  457. /* ------------------------------------------------------------------ */
  458. struct tda827x_data {
  459. u32 lomax;
  460. u8 spd;
  461. u8 bs;
  462. u8 bp;
  463. u8 cp;
  464. u8 gc3;
  465. u8 div1p5;
  466. };
  467. static struct tda827x_data tda827x_dvbt[] = {
  468. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  469. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  470. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  471. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  472. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  473. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  474. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  475. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  476. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  477. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  478. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  479. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  480. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  481. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  482. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  483. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  484. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  485. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  486. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  487. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  488. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  489. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  490. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  491. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  492. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  493. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  494. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  495. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  496. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  497. };
  498. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  499. {
  500. return 0;
  501. }
  502. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  503. {
  504. struct saa7134_dev *dev = fe->dvb->priv;
  505. u8 tuner_buf[14];
  506. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  507. .len = sizeof(tuner_buf) };
  508. int i, tuner_freq, if_freq;
  509. u32 N;
  510. switch (params->u.ofdm.bandwidth) {
  511. case BANDWIDTH_6_MHZ:
  512. if_freq = 4000000;
  513. break;
  514. case BANDWIDTH_7_MHZ:
  515. if_freq = 4500000;
  516. break;
  517. default: /* 8 MHz or Auto */
  518. if_freq = 5000000;
  519. break;
  520. }
  521. tuner_freq = params->frequency + if_freq;
  522. i = 0;
  523. while (tda827x_dvbt[i].lomax < tuner_freq) {
  524. if(tda827x_dvbt[i + 1].lomax == 0)
  525. break;
  526. i++;
  527. }
  528. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  529. tuner_buf[0] = 0;
  530. tuner_buf[1] = (N>>8) | 0x40;
  531. tuner_buf[2] = N & 0xff;
  532. tuner_buf[3] = 0;
  533. tuner_buf[4] = 0x52;
  534. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  535. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  536. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  537. tuner_buf[7] = 0xbf;
  538. tuner_buf[8] = 0x2a;
  539. tuner_buf[9] = 0x05;
  540. tuner_buf[10] = 0xff;
  541. tuner_buf[11] = 0x00;
  542. tuner_buf[12] = 0x00;
  543. tuner_buf[13] = 0x40;
  544. tuner_msg.len = 14;
  545. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  546. return -EIO;
  547. msleep(500);
  548. /* correct CP value */
  549. tuner_buf[0] = 0x30;
  550. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  551. tuner_msg.len = 2;
  552. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  553. return 0;
  554. }
  555. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  556. {
  557. struct saa7134_dev *dev = fe->dvb->priv;
  558. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  559. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  560. .len = sizeof(tda827x_sleep) };
  561. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  562. }
  563. static struct tda1004x_config tda827x_lifeview_config = {
  564. .demod_address = 0x08,
  565. .invert = 1,
  566. .invert_oclk = 0,
  567. .xtal_freq = TDA10046_XTAL_16M,
  568. .agc_config = TDA10046_AGC_TDA827X,
  569. .if_freq = TDA10046_FREQ_045,
  570. .pll_init = philips_tda827x_pll_init,
  571. .pll_set = philips_tda827x_pll_set,
  572. .pll_sleep = philips_tda827x_pll_sleep,
  573. .request_firmware = NULL,
  574. };
  575. /* ------------------------------------------------------------------ */
  576. struct tda827xa_data {
  577. u32 lomax;
  578. u8 svco;
  579. u8 spd;
  580. u8 scr;
  581. u8 sbs;
  582. u8 gc3;
  583. };
  584. static struct tda827xa_data tda827xa_dvbt[] = {
  585. { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
  586. { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  587. { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  588. { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  589. { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
  590. { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  591. { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  592. { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  593. { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  594. { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  595. { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  596. { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  597. { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  598. { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  599. { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  600. { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  601. { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  602. { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
  603. { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  604. { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  605. { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  606. { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  607. { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  608. { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  609. { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  610. { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
  611. { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
  612. static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  613. {
  614. struct saa7134_dev *dev = fe->dvb->priv;
  615. u8 tuner_buf[14];
  616. unsigned char reg2[2];
  617. struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
  618. int i, tuner_freq, if_freq;
  619. u32 N;
  620. switch (params->u.ofdm.bandwidth) {
  621. case BANDWIDTH_6_MHZ:
  622. if_freq = 4000000;
  623. break;
  624. case BANDWIDTH_7_MHZ:
  625. if_freq = 4500000;
  626. break;
  627. default: /* 8 MHz or Auto */
  628. if_freq = 5000000;
  629. break;
  630. }
  631. tuner_freq = params->frequency + if_freq;
  632. i = 0;
  633. while (tda827xa_dvbt[i].lomax < tuner_freq) {
  634. if(tda827xa_dvbt[i + 1].lomax == 0)
  635. break;
  636. i++;
  637. }
  638. N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
  639. tuner_buf[0] = 0; // subaddress
  640. tuner_buf[1] = N >> 8;
  641. tuner_buf[2] = N & 0xff;
  642. tuner_buf[3] = 0;
  643. tuner_buf[4] = 0x16;
  644. tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
  645. tda827xa_dvbt[i].sbs;
  646. tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
  647. tuner_buf[7] = 0x0c;
  648. tuner_buf[8] = 0x06;
  649. tuner_buf[9] = 0x24;
  650. tuner_buf[10] = 0xff;
  651. tuner_buf[11] = 0x60;
  652. tuner_buf[12] = 0x00;
  653. tuner_buf[13] = 0x39; // lpsel
  654. msg.len = 14;
  655. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  656. return -EIO;
  657. msg.buf= reg2;
  658. msg.len = 2;
  659. reg2[0] = 0x60;
  660. reg2[1] = 0x3c;
  661. i2c_transfer(&dev->i2c_adap, &msg, 1);
  662. reg2[0] = 0xa0;
  663. reg2[1] = 0x40;
  664. i2c_transfer(&dev->i2c_adap, &msg, 1);
  665. msleep(2);
  666. /* correct CP value */
  667. reg2[0] = 0x30;
  668. reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
  669. msg.len = 2;
  670. i2c_transfer(&dev->i2c_adap, &msg, 1);
  671. msleep(550);
  672. reg2[0] = 0x50;
  673. reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
  674. i2c_transfer(&dev->i2c_adap, &msg, 1);
  675. return 0;
  676. }
  677. static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
  678. {
  679. struct saa7134_dev *dev = fe->dvb->priv;
  680. static u8 tda827xa_sleep[] = { 0x30, 0x90};
  681. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
  682. .len = sizeof(tda827xa_sleep) };
  683. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  684. }
  685. /* ------------------------------------------------------------------ */
  686. static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  687. {
  688. int ret;
  689. struct saa7134_dev *dev = fe->dvb->priv;
  690. static u8 tda8290_close[] = { 0x21, 0xc0};
  691. static u8 tda8290_open[] = { 0x21, 0x80};
  692. struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
  693. /* close tda8290 i2c bridge */
  694. tda8290_msg.buf = tda8290_close;
  695. ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  696. if (ret != 1)
  697. return -EIO;
  698. msleep(20);
  699. ret = philips_tda827xa_pll_set(0x61, fe, params);
  700. if (ret != 0)
  701. return ret;
  702. /* open tda8290 i2c bridge */
  703. tda8290_msg.buf = tda8290_open;
  704. i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  705. return ret;
  706. };
  707. static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
  708. {
  709. struct saa7134_dev *dev = fe->dvb->priv;
  710. static u8 data[] = { 0x3c, 0x33, 0x6a};
  711. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  712. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  713. return -EIO;
  714. return 0;
  715. }
  716. static void philips_tiger_analog_mode(struct dvb_frontend *fe)
  717. {
  718. struct saa7134_dev *dev = fe->dvb->priv;
  719. static u8 data[] = { 0x3c, 0x33, 0x68};
  720. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  721. i2c_transfer(&dev->i2c_adap, &msg, 1);
  722. philips_tda827xa_pll_sleep( 0x61, fe);
  723. }
  724. static struct tda1004x_config philips_tiger_config = {
  725. .demod_address = 0x08,
  726. .invert = 1,
  727. .invert_oclk = 0,
  728. .xtal_freq = TDA10046_XTAL_16M,
  729. .agc_config = TDA10046_AGC_TDA827X,
  730. .if_freq = TDA10046_FREQ_045,
  731. .pll_init = philips_tiger_dvb_mode,
  732. .pll_set = philips_tiger_pll_set,
  733. .pll_sleep = philips_tiger_analog_mode,
  734. .request_firmware = NULL,
  735. };
  736. /* ------------------------------------------------------------------ */
  737. static int ads_duo_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  738. {
  739. int ret;
  740. ret = philips_tda827xa_pll_set(0x61, fe, params);
  741. return ret;
  742. };
  743. static int ads_duo_dvb_mode(struct dvb_frontend *fe)
  744. {
  745. struct saa7134_dev *dev = fe->dvb->priv;
  746. /* route TDA8275a AGC input to the channel decoder */
  747. saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60);
  748. return 0;
  749. }
  750. static void ads_duo_analog_mode(struct dvb_frontend *fe)
  751. {
  752. struct saa7134_dev *dev = fe->dvb->priv;
  753. /* route TDA8275a AGC input to the analog IF chip*/
  754. saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20);
  755. philips_tda827xa_pll_sleep( 0x61, fe);
  756. }
  757. static struct tda1004x_config ads_tech_duo_config = {
  758. .demod_address = 0x08,
  759. .invert = 1,
  760. .invert_oclk = 0,
  761. .xtal_freq = TDA10046_XTAL_16M,
  762. .agc_config = TDA10046_AGC_TDA827X_GPL,
  763. .if_freq = TDA10046_FREQ_045,
  764. .pll_init = ads_duo_dvb_mode,
  765. .pll_set = ads_duo_pll_set,
  766. .pll_sleep = ads_duo_analog_mode,
  767. .request_firmware = NULL,
  768. };
  769. /* ------------------------------------------------------------------ */
  770. static int tevion_dvb220rf_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  771. {
  772. int ret;
  773. ret = philips_tda827xa_pll_set(0x60, fe, params);
  774. return ret;
  775. }
  776. static int tevion_dvb220rf_pll_init(struct dvb_frontend *fe)
  777. {
  778. return 0;
  779. }
  780. static void tevion_dvb220rf_pll_sleep(struct dvb_frontend *fe)
  781. {
  782. philips_tda827xa_pll_sleep( 0x61, fe);
  783. }
  784. static struct tda1004x_config tevion_dvbt220rf_config = {
  785. .demod_address = 0x08,
  786. .invert = 1,
  787. .invert_oclk = 0,
  788. .xtal_freq = TDA10046_XTAL_16M,
  789. .agc_config = TDA10046_AGC_TDA827X,
  790. .if_freq = TDA10046_FREQ_045,
  791. .pll_init = tevion_dvb220rf_pll_init,
  792. .pll_set = tevion_dvb220rf_pll_set,
  793. .pll_sleep = tevion_dvb220rf_pll_sleep,
  794. .request_firmware = NULL,
  795. };
  796. #endif
  797. /* ------------------------------------------------------------------ */
  798. #ifdef HAVE_NXT200X
  799. static struct nxt200x_config avertvhda180 = {
  800. .demod_address = 0x0a,
  801. .pll_address = 0x61,
  802. .pll_desc = &dvb_pll_tdhu2,
  803. };
  804. #endif
  805. /* ------------------------------------------------------------------ */
  806. static int dvb_init(struct saa7134_dev *dev)
  807. {
  808. /* init struct videobuf_dvb */
  809. dev->ts.nr_bufs = 32;
  810. dev->ts.nr_packets = 32*4;
  811. dev->dvb.name = dev->name;
  812. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  813. dev->pci, &dev->slock,
  814. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  815. V4L2_FIELD_ALTERNATE,
  816. sizeof(struct saa7134_buf),
  817. dev);
  818. switch (dev->board) {
  819. #ifdef HAVE_MT352
  820. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  821. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  822. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  823. &dev->i2c_adap);
  824. break;
  825. case SAA7134_BOARD_AVERMEDIA_777:
  826. printk("%s: avertv 777 dvb setup\n",dev->name);
  827. dev->dvb.frontend = mt352_attach(&avermedia_777,
  828. &dev->i2c_adap);
  829. break;
  830. #endif
  831. #ifdef HAVE_TDA1004X
  832. case SAA7134_BOARD_MD7134:
  833. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  834. &dev->i2c_adap);
  835. break;
  836. case SAA7134_BOARD_PHILIPS_TOUGH:
  837. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  838. &dev->i2c_adap);
  839. break;
  840. case SAA7134_BOARD_FLYDVBTDUO:
  841. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  842. &dev->i2c_adap);
  843. break;
  844. case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
  845. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  846. &dev->i2c_adap);
  847. break;
  848. case SAA7134_BOARD_PHILIPS_EUROPA:
  849. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  850. &dev->i2c_adap);
  851. break;
  852. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  853. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  854. &dev->i2c_adap);
  855. break;
  856. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  857. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  858. &dev->i2c_adap);
  859. break;
  860. case SAA7134_BOARD_PHILIPS_TIGER:
  861. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  862. &dev->i2c_adap);
  863. break;
  864. case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
  865. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  866. &dev->i2c_adap);
  867. break;
  868. case SAA7134_BOARD_FLYDVBT_LR301:
  869. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  870. &dev->i2c_adap);
  871. break;
  872. case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
  873. dev->dvb.frontend = tda10046_attach(&ads_tech_duo_config,
  874. &dev->i2c_adap);
  875. break;
  876. case SAA7134_BOARD_TEVION_DVBT_220RF:
  877. dev->dvb.frontend = tda10046_attach(&tevion_dvbt220rf_config,
  878. &dev->i2c_adap);
  879. break;
  880. #endif
  881. #ifdef HAVE_NXT200X
  882. case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
  883. dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
  884. break;
  885. #endif
  886. default:
  887. printk("%s: Huh? unknown DVB card?\n",dev->name);
  888. break;
  889. }
  890. if (NULL == dev->dvb.frontend) {
  891. printk("%s: frontend initialization failed\n",dev->name);
  892. return -1;
  893. }
  894. /* register everything else */
  895. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  896. }
  897. static int dvb_fini(struct saa7134_dev *dev)
  898. {
  899. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  900. switch (dev->board) {
  901. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  902. /* otherwise we don't detect the tuner on next insmod */
  903. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  904. break;
  905. };
  906. videobuf_dvb_unregister(&dev->dvb);
  907. return 0;
  908. }
  909. static struct saa7134_mpeg_ops dvb_ops = {
  910. .type = SAA7134_MPEG_DVB,
  911. .init = dvb_init,
  912. .fini = dvb_fini,
  913. };
  914. static int __init dvb_register(void)
  915. {
  916. return saa7134_ts_register(&dvb_ops);
  917. }
  918. static void __exit dvb_unregister(void)
  919. {
  920. saa7134_ts_unregister(&dvb_ops);
  921. }
  922. module_init(dvb_register);
  923. module_exit(dvb_unregister);
  924. /* ------------------------------------------------------------------ */
  925. /*
  926. * Local variables:
  927. * c-basic-offset: 8
  928. * End:
  929. */