libata-core.c 136 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. static unsigned int ata_dev_init_params(struct ata_device *dev,
  62. u16 heads, u16 sectors);
  63. static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
  64. static void ata_dev_xfermask(struct ata_device *dev);
  65. static unsigned int ata_unique_id = 1;
  66. static struct workqueue_struct *ata_wq;
  67. int atapi_enabled = 1;
  68. module_param(atapi_enabled, int, 0444);
  69. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  70. int atapi_dmadir = 0;
  71. module_param(atapi_dmadir, int, 0444);
  72. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  73. int libata_fua = 0;
  74. module_param_named(fua, libata_fua, int, 0444);
  75. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  76. MODULE_AUTHOR("Jeff Garzik");
  77. MODULE_DESCRIPTION("Library module for ATA devices");
  78. MODULE_LICENSE("GPL");
  79. MODULE_VERSION(DRV_VERSION);
  80. /**
  81. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  82. * @tf: Taskfile to convert
  83. * @fis: Buffer into which data will output
  84. * @pmp: Port multiplier port
  85. *
  86. * Converts a standard ATA taskfile to a Serial ATA
  87. * FIS structure (Register - Host to Device).
  88. *
  89. * LOCKING:
  90. * Inherited from caller.
  91. */
  92. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  93. {
  94. fis[0] = 0x27; /* Register - Host to Device FIS */
  95. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  96. bit 7 indicates Command FIS */
  97. fis[2] = tf->command;
  98. fis[3] = tf->feature;
  99. fis[4] = tf->lbal;
  100. fis[5] = tf->lbam;
  101. fis[6] = tf->lbah;
  102. fis[7] = tf->device;
  103. fis[8] = tf->hob_lbal;
  104. fis[9] = tf->hob_lbam;
  105. fis[10] = tf->hob_lbah;
  106. fis[11] = tf->hob_feature;
  107. fis[12] = tf->nsect;
  108. fis[13] = tf->hob_nsect;
  109. fis[14] = 0;
  110. fis[15] = tf->ctl;
  111. fis[16] = 0;
  112. fis[17] = 0;
  113. fis[18] = 0;
  114. fis[19] = 0;
  115. }
  116. /**
  117. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  118. * @fis: Buffer from which data will be input
  119. * @tf: Taskfile to output
  120. *
  121. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  122. *
  123. * LOCKING:
  124. * Inherited from caller.
  125. */
  126. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  127. {
  128. tf->command = fis[2]; /* status */
  129. tf->feature = fis[3]; /* error */
  130. tf->lbal = fis[4];
  131. tf->lbam = fis[5];
  132. tf->lbah = fis[6];
  133. tf->device = fis[7];
  134. tf->hob_lbal = fis[8];
  135. tf->hob_lbam = fis[9];
  136. tf->hob_lbah = fis[10];
  137. tf->nsect = fis[12];
  138. tf->hob_nsect = fis[13];
  139. }
  140. static const u8 ata_rw_cmds[] = {
  141. /* pio multi */
  142. ATA_CMD_READ_MULTI,
  143. ATA_CMD_WRITE_MULTI,
  144. ATA_CMD_READ_MULTI_EXT,
  145. ATA_CMD_WRITE_MULTI_EXT,
  146. 0,
  147. 0,
  148. 0,
  149. ATA_CMD_WRITE_MULTI_FUA_EXT,
  150. /* pio */
  151. ATA_CMD_PIO_READ,
  152. ATA_CMD_PIO_WRITE,
  153. ATA_CMD_PIO_READ_EXT,
  154. ATA_CMD_PIO_WRITE_EXT,
  155. 0,
  156. 0,
  157. 0,
  158. 0,
  159. /* dma */
  160. ATA_CMD_READ,
  161. ATA_CMD_WRITE,
  162. ATA_CMD_READ_EXT,
  163. ATA_CMD_WRITE_EXT,
  164. 0,
  165. 0,
  166. 0,
  167. ATA_CMD_WRITE_FUA_EXT
  168. };
  169. /**
  170. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  171. * @qc: command to examine and configure
  172. *
  173. * Examine the device configuration and tf->flags to calculate
  174. * the proper read/write commands and protocol to use.
  175. *
  176. * LOCKING:
  177. * caller.
  178. */
  179. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  180. {
  181. struct ata_taskfile *tf = &qc->tf;
  182. struct ata_device *dev = qc->dev;
  183. u8 cmd;
  184. int index, fua, lba48, write;
  185. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  186. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  187. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  188. if (dev->flags & ATA_DFLAG_PIO) {
  189. tf->protocol = ATA_PROT_PIO;
  190. index = dev->multi_count ? 0 : 8;
  191. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  192. /* Unable to use DMA due to host limitation */
  193. tf->protocol = ATA_PROT_PIO;
  194. index = dev->multi_count ? 0 : 8;
  195. } else {
  196. tf->protocol = ATA_PROT_DMA;
  197. index = 16;
  198. }
  199. cmd = ata_rw_cmds[index + fua + lba48 + write];
  200. if (cmd) {
  201. tf->command = cmd;
  202. return 0;
  203. }
  204. return -1;
  205. }
  206. /**
  207. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  208. * @pio_mask: pio_mask
  209. * @mwdma_mask: mwdma_mask
  210. * @udma_mask: udma_mask
  211. *
  212. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  213. * unsigned int xfer_mask.
  214. *
  215. * LOCKING:
  216. * None.
  217. *
  218. * RETURNS:
  219. * Packed xfer_mask.
  220. */
  221. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  222. unsigned int mwdma_mask,
  223. unsigned int udma_mask)
  224. {
  225. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  226. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  227. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  228. }
  229. /**
  230. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  231. * @xfer_mask: xfer_mask to unpack
  232. * @pio_mask: resulting pio_mask
  233. * @mwdma_mask: resulting mwdma_mask
  234. * @udma_mask: resulting udma_mask
  235. *
  236. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  237. * Any NULL distination masks will be ignored.
  238. */
  239. static void ata_unpack_xfermask(unsigned int xfer_mask,
  240. unsigned int *pio_mask,
  241. unsigned int *mwdma_mask,
  242. unsigned int *udma_mask)
  243. {
  244. if (pio_mask)
  245. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  246. if (mwdma_mask)
  247. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  248. if (udma_mask)
  249. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  250. }
  251. static const struct ata_xfer_ent {
  252. int shift, bits;
  253. u8 base;
  254. } ata_xfer_tbl[] = {
  255. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  256. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  257. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  258. { -1, },
  259. };
  260. /**
  261. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  262. * @xfer_mask: xfer_mask of interest
  263. *
  264. * Return matching XFER_* value for @xfer_mask. Only the highest
  265. * bit of @xfer_mask is considered.
  266. *
  267. * LOCKING:
  268. * None.
  269. *
  270. * RETURNS:
  271. * Matching XFER_* value, 0 if no match found.
  272. */
  273. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  274. {
  275. int highbit = fls(xfer_mask) - 1;
  276. const struct ata_xfer_ent *ent;
  277. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  278. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  279. return ent->base + highbit - ent->shift;
  280. return 0;
  281. }
  282. /**
  283. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  284. * @xfer_mode: XFER_* of interest
  285. *
  286. * Return matching xfer_mask for @xfer_mode.
  287. *
  288. * LOCKING:
  289. * None.
  290. *
  291. * RETURNS:
  292. * Matching xfer_mask, 0 if no match found.
  293. */
  294. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  295. {
  296. const struct ata_xfer_ent *ent;
  297. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  298. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  299. return 1 << (ent->shift + xfer_mode - ent->base);
  300. return 0;
  301. }
  302. /**
  303. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  304. * @xfer_mode: XFER_* of interest
  305. *
  306. * Return matching xfer_shift for @xfer_mode.
  307. *
  308. * LOCKING:
  309. * None.
  310. *
  311. * RETURNS:
  312. * Matching xfer_shift, -1 if no match found.
  313. */
  314. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  315. {
  316. const struct ata_xfer_ent *ent;
  317. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  318. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  319. return ent->shift;
  320. return -1;
  321. }
  322. /**
  323. * ata_mode_string - convert xfer_mask to string
  324. * @xfer_mask: mask of bits supported; only highest bit counts.
  325. *
  326. * Determine string which represents the highest speed
  327. * (highest bit in @modemask).
  328. *
  329. * LOCKING:
  330. * None.
  331. *
  332. * RETURNS:
  333. * Constant C string representing highest speed listed in
  334. * @mode_mask, or the constant C string "<n/a>".
  335. */
  336. static const char *ata_mode_string(unsigned int xfer_mask)
  337. {
  338. static const char * const xfer_mode_str[] = {
  339. "PIO0",
  340. "PIO1",
  341. "PIO2",
  342. "PIO3",
  343. "PIO4",
  344. "MWDMA0",
  345. "MWDMA1",
  346. "MWDMA2",
  347. "UDMA/16",
  348. "UDMA/25",
  349. "UDMA/33",
  350. "UDMA/44",
  351. "UDMA/66",
  352. "UDMA/100",
  353. "UDMA/133",
  354. "UDMA7",
  355. };
  356. int highbit;
  357. highbit = fls(xfer_mask) - 1;
  358. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  359. return xfer_mode_str[highbit];
  360. return "<n/a>";
  361. }
  362. static const char *sata_spd_string(unsigned int spd)
  363. {
  364. static const char * const spd_str[] = {
  365. "1.5 Gbps",
  366. "3.0 Gbps",
  367. };
  368. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  369. return "<unknown>";
  370. return spd_str[spd - 1];
  371. }
  372. void ata_dev_disable(struct ata_device *dev)
  373. {
  374. if (ata_dev_enabled(dev)) {
  375. ata_dev_printk(dev, KERN_WARNING, "disabled\n");
  376. dev->class++;
  377. }
  378. }
  379. /**
  380. * ata_pio_devchk - PATA device presence detection
  381. * @ap: ATA channel to examine
  382. * @device: Device to examine (starting at zero)
  383. *
  384. * This technique was originally described in
  385. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  386. * later found its way into the ATA/ATAPI spec.
  387. *
  388. * Write a pattern to the ATA shadow registers,
  389. * and if a device is present, it will respond by
  390. * correctly storing and echoing back the
  391. * ATA shadow register contents.
  392. *
  393. * LOCKING:
  394. * caller.
  395. */
  396. static unsigned int ata_pio_devchk(struct ata_port *ap,
  397. unsigned int device)
  398. {
  399. struct ata_ioports *ioaddr = &ap->ioaddr;
  400. u8 nsect, lbal;
  401. ap->ops->dev_select(ap, device);
  402. outb(0x55, ioaddr->nsect_addr);
  403. outb(0xaa, ioaddr->lbal_addr);
  404. outb(0xaa, ioaddr->nsect_addr);
  405. outb(0x55, ioaddr->lbal_addr);
  406. outb(0x55, ioaddr->nsect_addr);
  407. outb(0xaa, ioaddr->lbal_addr);
  408. nsect = inb(ioaddr->nsect_addr);
  409. lbal = inb(ioaddr->lbal_addr);
  410. if ((nsect == 0x55) && (lbal == 0xaa))
  411. return 1; /* we found a device */
  412. return 0; /* nothing found */
  413. }
  414. /**
  415. * ata_mmio_devchk - PATA device presence detection
  416. * @ap: ATA channel to examine
  417. * @device: Device to examine (starting at zero)
  418. *
  419. * This technique was originally described in
  420. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  421. * later found its way into the ATA/ATAPI spec.
  422. *
  423. * Write a pattern to the ATA shadow registers,
  424. * and if a device is present, it will respond by
  425. * correctly storing and echoing back the
  426. * ATA shadow register contents.
  427. *
  428. * LOCKING:
  429. * caller.
  430. */
  431. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  432. unsigned int device)
  433. {
  434. struct ata_ioports *ioaddr = &ap->ioaddr;
  435. u8 nsect, lbal;
  436. ap->ops->dev_select(ap, device);
  437. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  438. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  439. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  440. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  441. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  442. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  443. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  444. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  445. if ((nsect == 0x55) && (lbal == 0xaa))
  446. return 1; /* we found a device */
  447. return 0; /* nothing found */
  448. }
  449. /**
  450. * ata_devchk - PATA device presence detection
  451. * @ap: ATA channel to examine
  452. * @device: Device to examine (starting at zero)
  453. *
  454. * Dispatch ATA device presence detection, depending
  455. * on whether we are using PIO or MMIO to talk to the
  456. * ATA shadow registers.
  457. *
  458. * LOCKING:
  459. * caller.
  460. */
  461. static unsigned int ata_devchk(struct ata_port *ap,
  462. unsigned int device)
  463. {
  464. if (ap->flags & ATA_FLAG_MMIO)
  465. return ata_mmio_devchk(ap, device);
  466. return ata_pio_devchk(ap, device);
  467. }
  468. /**
  469. * ata_dev_classify - determine device type based on ATA-spec signature
  470. * @tf: ATA taskfile register set for device to be identified
  471. *
  472. * Determine from taskfile register contents whether a device is
  473. * ATA or ATAPI, as per "Signature and persistence" section
  474. * of ATA/PI spec (volume 1, sect 5.14).
  475. *
  476. * LOCKING:
  477. * None.
  478. *
  479. * RETURNS:
  480. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  481. * the event of failure.
  482. */
  483. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  484. {
  485. /* Apple's open source Darwin code hints that some devices only
  486. * put a proper signature into the LBA mid/high registers,
  487. * So, we only check those. It's sufficient for uniqueness.
  488. */
  489. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  490. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  491. DPRINTK("found ATA device by sig\n");
  492. return ATA_DEV_ATA;
  493. }
  494. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  495. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  496. DPRINTK("found ATAPI device by sig\n");
  497. return ATA_DEV_ATAPI;
  498. }
  499. DPRINTK("unknown device\n");
  500. return ATA_DEV_UNKNOWN;
  501. }
  502. /**
  503. * ata_dev_try_classify - Parse returned ATA device signature
  504. * @ap: ATA channel to examine
  505. * @device: Device to examine (starting at zero)
  506. * @r_err: Value of error register on completion
  507. *
  508. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  509. * an ATA/ATAPI-defined set of values is placed in the ATA
  510. * shadow registers, indicating the results of device detection
  511. * and diagnostics.
  512. *
  513. * Select the ATA device, and read the values from the ATA shadow
  514. * registers. Then parse according to the Error register value,
  515. * and the spec-defined values examined by ata_dev_classify().
  516. *
  517. * LOCKING:
  518. * caller.
  519. *
  520. * RETURNS:
  521. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  522. */
  523. static unsigned int
  524. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  525. {
  526. struct ata_taskfile tf;
  527. unsigned int class;
  528. u8 err;
  529. ap->ops->dev_select(ap, device);
  530. memset(&tf, 0, sizeof(tf));
  531. ap->ops->tf_read(ap, &tf);
  532. err = tf.feature;
  533. if (r_err)
  534. *r_err = err;
  535. /* see if device passed diags */
  536. if (err == 1)
  537. /* do nothing */ ;
  538. else if ((device == 0) && (err == 0x81))
  539. /* do nothing */ ;
  540. else
  541. return ATA_DEV_NONE;
  542. /* determine if device is ATA or ATAPI */
  543. class = ata_dev_classify(&tf);
  544. if (class == ATA_DEV_UNKNOWN)
  545. return ATA_DEV_NONE;
  546. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  547. return ATA_DEV_NONE;
  548. return class;
  549. }
  550. /**
  551. * ata_id_string - Convert IDENTIFY DEVICE page into string
  552. * @id: IDENTIFY DEVICE results we will examine
  553. * @s: string into which data is output
  554. * @ofs: offset into identify device page
  555. * @len: length of string to return. must be an even number.
  556. *
  557. * The strings in the IDENTIFY DEVICE page are broken up into
  558. * 16-bit chunks. Run through the string, and output each
  559. * 8-bit chunk linearly, regardless of platform.
  560. *
  561. * LOCKING:
  562. * caller.
  563. */
  564. void ata_id_string(const u16 *id, unsigned char *s,
  565. unsigned int ofs, unsigned int len)
  566. {
  567. unsigned int c;
  568. while (len > 0) {
  569. c = id[ofs] >> 8;
  570. *s = c;
  571. s++;
  572. c = id[ofs] & 0xff;
  573. *s = c;
  574. s++;
  575. ofs++;
  576. len -= 2;
  577. }
  578. }
  579. /**
  580. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  581. * @id: IDENTIFY DEVICE results we will examine
  582. * @s: string into which data is output
  583. * @ofs: offset into identify device page
  584. * @len: length of string to return. must be an odd number.
  585. *
  586. * This function is identical to ata_id_string except that it
  587. * trims trailing spaces and terminates the resulting string with
  588. * null. @len must be actual maximum length (even number) + 1.
  589. *
  590. * LOCKING:
  591. * caller.
  592. */
  593. void ata_id_c_string(const u16 *id, unsigned char *s,
  594. unsigned int ofs, unsigned int len)
  595. {
  596. unsigned char *p;
  597. WARN_ON(!(len & 1));
  598. ata_id_string(id, s, ofs, len - 1);
  599. p = s + strnlen(s, len - 1);
  600. while (p > s && p[-1] == ' ')
  601. p--;
  602. *p = '\0';
  603. }
  604. static u64 ata_id_n_sectors(const u16 *id)
  605. {
  606. if (ata_id_has_lba(id)) {
  607. if (ata_id_has_lba48(id))
  608. return ata_id_u64(id, 100);
  609. else
  610. return ata_id_u32(id, 60);
  611. } else {
  612. if (ata_id_current_chs_valid(id))
  613. return ata_id_u32(id, 57);
  614. else
  615. return id[1] * id[3] * id[6];
  616. }
  617. }
  618. /**
  619. * ata_noop_dev_select - Select device 0/1 on ATA bus
  620. * @ap: ATA channel to manipulate
  621. * @device: ATA device (numbered from zero) to select
  622. *
  623. * This function performs no actual function.
  624. *
  625. * May be used as the dev_select() entry in ata_port_operations.
  626. *
  627. * LOCKING:
  628. * caller.
  629. */
  630. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  631. {
  632. }
  633. /**
  634. * ata_std_dev_select - Select device 0/1 on ATA bus
  635. * @ap: ATA channel to manipulate
  636. * @device: ATA device (numbered from zero) to select
  637. *
  638. * Use the method defined in the ATA specification to
  639. * make either device 0, or device 1, active on the
  640. * ATA channel. Works with both PIO and MMIO.
  641. *
  642. * May be used as the dev_select() entry in ata_port_operations.
  643. *
  644. * LOCKING:
  645. * caller.
  646. */
  647. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  648. {
  649. u8 tmp;
  650. if (device == 0)
  651. tmp = ATA_DEVICE_OBS;
  652. else
  653. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  654. if (ap->flags & ATA_FLAG_MMIO) {
  655. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  656. } else {
  657. outb(tmp, ap->ioaddr.device_addr);
  658. }
  659. ata_pause(ap); /* needed; also flushes, for mmio */
  660. }
  661. /**
  662. * ata_dev_select - Select device 0/1 on ATA bus
  663. * @ap: ATA channel to manipulate
  664. * @device: ATA device (numbered from zero) to select
  665. * @wait: non-zero to wait for Status register BSY bit to clear
  666. * @can_sleep: non-zero if context allows sleeping
  667. *
  668. * Use the method defined in the ATA specification to
  669. * make either device 0, or device 1, active on the
  670. * ATA channel.
  671. *
  672. * This is a high-level version of ata_std_dev_select(),
  673. * which additionally provides the services of inserting
  674. * the proper pauses and status polling, where needed.
  675. *
  676. * LOCKING:
  677. * caller.
  678. */
  679. void ata_dev_select(struct ata_port *ap, unsigned int device,
  680. unsigned int wait, unsigned int can_sleep)
  681. {
  682. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  683. ap->id, device, wait);
  684. if (wait)
  685. ata_wait_idle(ap);
  686. ap->ops->dev_select(ap, device);
  687. if (wait) {
  688. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  689. msleep(150);
  690. ata_wait_idle(ap);
  691. }
  692. }
  693. /**
  694. * ata_dump_id - IDENTIFY DEVICE info debugging output
  695. * @id: IDENTIFY DEVICE page to dump
  696. *
  697. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  698. * page.
  699. *
  700. * LOCKING:
  701. * caller.
  702. */
  703. static inline void ata_dump_id(const u16 *id)
  704. {
  705. DPRINTK("49==0x%04x "
  706. "53==0x%04x "
  707. "63==0x%04x "
  708. "64==0x%04x "
  709. "75==0x%04x \n",
  710. id[49],
  711. id[53],
  712. id[63],
  713. id[64],
  714. id[75]);
  715. DPRINTK("80==0x%04x "
  716. "81==0x%04x "
  717. "82==0x%04x "
  718. "83==0x%04x "
  719. "84==0x%04x \n",
  720. id[80],
  721. id[81],
  722. id[82],
  723. id[83],
  724. id[84]);
  725. DPRINTK("88==0x%04x "
  726. "93==0x%04x\n",
  727. id[88],
  728. id[93]);
  729. }
  730. /**
  731. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  732. * @id: IDENTIFY data to compute xfer mask from
  733. *
  734. * Compute the xfermask for this device. This is not as trivial
  735. * as it seems if we must consider early devices correctly.
  736. *
  737. * FIXME: pre IDE drive timing (do we care ?).
  738. *
  739. * LOCKING:
  740. * None.
  741. *
  742. * RETURNS:
  743. * Computed xfermask
  744. */
  745. static unsigned int ata_id_xfermask(const u16 *id)
  746. {
  747. unsigned int pio_mask, mwdma_mask, udma_mask;
  748. /* Usual case. Word 53 indicates word 64 is valid */
  749. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  750. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  751. pio_mask <<= 3;
  752. pio_mask |= 0x7;
  753. } else {
  754. /* If word 64 isn't valid then Word 51 high byte holds
  755. * the PIO timing number for the maximum. Turn it into
  756. * a mask.
  757. */
  758. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  759. /* But wait.. there's more. Design your standards by
  760. * committee and you too can get a free iordy field to
  761. * process. However its the speeds not the modes that
  762. * are supported... Note drivers using the timing API
  763. * will get this right anyway
  764. */
  765. }
  766. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  767. udma_mask = 0;
  768. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  769. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  770. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  771. }
  772. /**
  773. * ata_port_queue_task - Queue port_task
  774. * @ap: The ata_port to queue port_task for
  775. *
  776. * Schedule @fn(@data) for execution after @delay jiffies using
  777. * port_task. There is one port_task per port and it's the
  778. * user(low level driver)'s responsibility to make sure that only
  779. * one task is active at any given time.
  780. *
  781. * libata core layer takes care of synchronization between
  782. * port_task and EH. ata_port_queue_task() may be ignored for EH
  783. * synchronization.
  784. *
  785. * LOCKING:
  786. * Inherited from caller.
  787. */
  788. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  789. unsigned long delay)
  790. {
  791. int rc;
  792. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  793. return;
  794. PREPARE_WORK(&ap->port_task, fn, data);
  795. if (!delay)
  796. rc = queue_work(ata_wq, &ap->port_task);
  797. else
  798. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  799. /* rc == 0 means that another user is using port task */
  800. WARN_ON(rc == 0);
  801. }
  802. /**
  803. * ata_port_flush_task - Flush port_task
  804. * @ap: The ata_port to flush port_task for
  805. *
  806. * After this function completes, port_task is guranteed not to
  807. * be running or scheduled.
  808. *
  809. * LOCKING:
  810. * Kernel thread context (may sleep)
  811. */
  812. void ata_port_flush_task(struct ata_port *ap)
  813. {
  814. unsigned long flags;
  815. DPRINTK("ENTER\n");
  816. spin_lock_irqsave(&ap->host_set->lock, flags);
  817. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  818. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  819. DPRINTK("flush #1\n");
  820. flush_workqueue(ata_wq);
  821. /*
  822. * At this point, if a task is running, it's guaranteed to see
  823. * the FLUSH flag; thus, it will never queue pio tasks again.
  824. * Cancel and flush.
  825. */
  826. if (!cancel_delayed_work(&ap->port_task)) {
  827. DPRINTK("flush #2\n");
  828. flush_workqueue(ata_wq);
  829. }
  830. spin_lock_irqsave(&ap->host_set->lock, flags);
  831. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  832. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  833. DPRINTK("EXIT\n");
  834. }
  835. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  836. {
  837. struct completion *waiting = qc->private_data;
  838. complete(waiting);
  839. }
  840. /**
  841. * ata_exec_internal - execute libata internal command
  842. * @dev: Device to which the command is sent
  843. * @tf: Taskfile registers for the command and the result
  844. * @cdb: CDB for packet command
  845. * @dma_dir: Data tranfer direction of the command
  846. * @buf: Data buffer of the command
  847. * @buflen: Length of data buffer
  848. *
  849. * Executes libata internal command with timeout. @tf contains
  850. * command on entry and result on return. Timeout and error
  851. * conditions are reported via return value. No recovery action
  852. * is taken after a command times out. It's caller's duty to
  853. * clean up after timeout.
  854. *
  855. * LOCKING:
  856. * None. Should be called with kernel context, might sleep.
  857. */
  858. unsigned ata_exec_internal(struct ata_device *dev,
  859. struct ata_taskfile *tf, const u8 *cdb,
  860. int dma_dir, void *buf, unsigned int buflen)
  861. {
  862. struct ata_port *ap = dev->ap;
  863. u8 command = tf->command;
  864. struct ata_queued_cmd *qc;
  865. unsigned int tag, preempted_tag;
  866. u32 preempted_sactive, preempted_qc_active;
  867. DECLARE_COMPLETION(wait);
  868. unsigned long flags;
  869. unsigned int err_mask;
  870. int rc;
  871. spin_lock_irqsave(&ap->host_set->lock, flags);
  872. /* no internal command while frozen */
  873. if (ap->flags & ATA_FLAG_FROZEN) {
  874. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  875. return AC_ERR_SYSTEM;
  876. }
  877. /* initialize internal qc */
  878. /* XXX: Tag 0 is used for drivers with legacy EH as some
  879. * drivers choke if any other tag is given. This breaks
  880. * ata_tag_internal() test for those drivers. Don't use new
  881. * EH stuff without converting to it.
  882. */
  883. if (ap->ops->error_handler)
  884. tag = ATA_TAG_INTERNAL;
  885. else
  886. tag = 0;
  887. if (test_and_set_bit(tag, &ap->qc_allocated))
  888. BUG();
  889. qc = __ata_qc_from_tag(ap, tag);
  890. qc->tag = tag;
  891. qc->scsicmd = NULL;
  892. qc->ap = ap;
  893. qc->dev = dev;
  894. ata_qc_reinit(qc);
  895. preempted_tag = ap->active_tag;
  896. preempted_sactive = ap->sactive;
  897. preempted_qc_active = ap->qc_active;
  898. ap->active_tag = ATA_TAG_POISON;
  899. ap->sactive = 0;
  900. ap->qc_active = 0;
  901. /* prepare & issue qc */
  902. qc->tf = *tf;
  903. if (cdb)
  904. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  905. qc->flags |= ATA_QCFLAG_RESULT_TF;
  906. qc->dma_dir = dma_dir;
  907. if (dma_dir != DMA_NONE) {
  908. ata_sg_init_one(qc, buf, buflen);
  909. qc->nsect = buflen / ATA_SECT_SIZE;
  910. }
  911. qc->private_data = &wait;
  912. qc->complete_fn = ata_qc_complete_internal;
  913. ata_qc_issue(qc);
  914. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  915. rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
  916. ata_port_flush_task(ap);
  917. if (!rc) {
  918. spin_lock_irqsave(&ap->host_set->lock, flags);
  919. /* We're racing with irq here. If we lose, the
  920. * following test prevents us from completing the qc
  921. * twice. If we win, the port is frozen and will be
  922. * cleaned up by ->post_internal_cmd().
  923. */
  924. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  925. qc->err_mask |= AC_ERR_TIMEOUT;
  926. if (ap->ops->error_handler)
  927. ata_port_freeze(ap);
  928. else
  929. ata_qc_complete(qc);
  930. ata_dev_printk(dev, KERN_WARNING,
  931. "qc timeout (cmd 0x%x)\n", command);
  932. }
  933. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  934. }
  935. /* do post_internal_cmd */
  936. if (ap->ops->post_internal_cmd)
  937. ap->ops->post_internal_cmd(qc);
  938. if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
  939. ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed "
  940. "internal command, assuming AC_ERR_OTHER\n");
  941. qc->err_mask |= AC_ERR_OTHER;
  942. }
  943. /* finish up */
  944. spin_lock_irqsave(&ap->host_set->lock, flags);
  945. *tf = qc->result_tf;
  946. err_mask = qc->err_mask;
  947. ata_qc_free(qc);
  948. ap->active_tag = preempted_tag;
  949. ap->sactive = preempted_sactive;
  950. ap->qc_active = preempted_qc_active;
  951. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  952. * Until those drivers are fixed, we detect the condition
  953. * here, fail the command with AC_ERR_SYSTEM and reenable the
  954. * port.
  955. *
  956. * Note that this doesn't change any behavior as internal
  957. * command failure results in disabling the device in the
  958. * higher layer for LLDDs without new reset/EH callbacks.
  959. *
  960. * Kill the following code as soon as those drivers are fixed.
  961. */
  962. if (ap->flags & ATA_FLAG_DISABLED) {
  963. err_mask |= AC_ERR_SYSTEM;
  964. ata_port_probe(ap);
  965. }
  966. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  967. return err_mask;
  968. }
  969. /**
  970. * ata_pio_need_iordy - check if iordy needed
  971. * @adev: ATA device
  972. *
  973. * Check if the current speed of the device requires IORDY. Used
  974. * by various controllers for chip configuration.
  975. */
  976. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  977. {
  978. int pio;
  979. int speed = adev->pio_mode - XFER_PIO_0;
  980. if (speed < 2)
  981. return 0;
  982. if (speed > 2)
  983. return 1;
  984. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  985. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  986. pio = adev->id[ATA_ID_EIDE_PIO];
  987. /* Is the speed faster than the drive allows non IORDY ? */
  988. if (pio) {
  989. /* This is cycle times not frequency - watch the logic! */
  990. if (pio > 240) /* PIO2 is 240nS per cycle */
  991. return 1;
  992. return 0;
  993. }
  994. }
  995. return 0;
  996. }
  997. /**
  998. * ata_dev_read_id - Read ID data from the specified device
  999. * @dev: target device
  1000. * @p_class: pointer to class of the target device (may be changed)
  1001. * @post_reset: is this read ID post-reset?
  1002. * @id: buffer to read IDENTIFY data into
  1003. *
  1004. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  1005. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  1006. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  1007. * for pre-ATA4 drives.
  1008. *
  1009. * LOCKING:
  1010. * Kernel thread context (may sleep)
  1011. *
  1012. * RETURNS:
  1013. * 0 on success, -errno otherwise.
  1014. */
  1015. static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
  1016. int post_reset, u16 *id)
  1017. {
  1018. struct ata_port *ap = dev->ap;
  1019. unsigned int class = *p_class;
  1020. struct ata_taskfile tf;
  1021. unsigned int err_mask = 0;
  1022. const char *reason;
  1023. int rc;
  1024. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1025. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  1026. retry:
  1027. ata_tf_init(dev, &tf);
  1028. switch (class) {
  1029. case ATA_DEV_ATA:
  1030. tf.command = ATA_CMD_ID_ATA;
  1031. break;
  1032. case ATA_DEV_ATAPI:
  1033. tf.command = ATA_CMD_ID_ATAPI;
  1034. break;
  1035. default:
  1036. rc = -ENODEV;
  1037. reason = "unsupported class";
  1038. goto err_out;
  1039. }
  1040. tf.protocol = ATA_PROT_PIO;
  1041. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
  1042. id, sizeof(id[0]) * ATA_ID_WORDS);
  1043. if (err_mask) {
  1044. rc = -EIO;
  1045. reason = "I/O error";
  1046. goto err_out;
  1047. }
  1048. swap_buf_le16(id, ATA_ID_WORDS);
  1049. /* sanity check */
  1050. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1051. rc = -EINVAL;
  1052. reason = "device reports illegal type";
  1053. goto err_out;
  1054. }
  1055. if (post_reset && class == ATA_DEV_ATA) {
  1056. /*
  1057. * The exact sequence expected by certain pre-ATA4 drives is:
  1058. * SRST RESET
  1059. * IDENTIFY
  1060. * INITIALIZE DEVICE PARAMETERS
  1061. * anything else..
  1062. * Some drives were very specific about that exact sequence.
  1063. */
  1064. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1065. err_mask = ata_dev_init_params(dev, id[3], id[6]);
  1066. if (err_mask) {
  1067. rc = -EIO;
  1068. reason = "INIT_DEV_PARAMS failed";
  1069. goto err_out;
  1070. }
  1071. /* current CHS translation info (id[53-58]) might be
  1072. * changed. reread the identify device info.
  1073. */
  1074. post_reset = 0;
  1075. goto retry;
  1076. }
  1077. }
  1078. *p_class = class;
  1079. return 0;
  1080. err_out:
  1081. ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
  1082. "(%s, err_mask=0x%x)\n", reason, err_mask);
  1083. return rc;
  1084. }
  1085. static inline u8 ata_dev_knobble(struct ata_device *dev)
  1086. {
  1087. return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1088. }
  1089. /**
  1090. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1091. * @dev: Target device to configure
  1092. * @print_info: Enable device info printout
  1093. *
  1094. * Configure @dev according to @dev->id. Generic and low-level
  1095. * driver specific fixups are also applied.
  1096. *
  1097. * LOCKING:
  1098. * Kernel thread context (may sleep)
  1099. *
  1100. * RETURNS:
  1101. * 0 on success, -errno otherwise
  1102. */
  1103. static int ata_dev_configure(struct ata_device *dev, int print_info)
  1104. {
  1105. struct ata_port *ap = dev->ap;
  1106. const u16 *id = dev->id;
  1107. unsigned int xfer_mask;
  1108. int i, rc;
  1109. if (!ata_dev_enabled(dev)) {
  1110. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1111. ap->id, dev->devno);
  1112. return 0;
  1113. }
  1114. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1115. /* print device capabilities */
  1116. if (print_info)
  1117. ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
  1118. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1119. id[49], id[82], id[83], id[84],
  1120. id[85], id[86], id[87], id[88]);
  1121. /* initialize to-be-configured parameters */
  1122. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1123. dev->max_sectors = 0;
  1124. dev->cdb_len = 0;
  1125. dev->n_sectors = 0;
  1126. dev->cylinders = 0;
  1127. dev->heads = 0;
  1128. dev->sectors = 0;
  1129. /*
  1130. * common ATA, ATAPI feature tests
  1131. */
  1132. /* find max transfer mode; for printk only */
  1133. xfer_mask = ata_id_xfermask(id);
  1134. ata_dump_id(id);
  1135. /* ATA-specific feature tests */
  1136. if (dev->class == ATA_DEV_ATA) {
  1137. dev->n_sectors = ata_id_n_sectors(id);
  1138. if (ata_id_has_lba(id)) {
  1139. const char *lba_desc;
  1140. lba_desc = "LBA";
  1141. dev->flags |= ATA_DFLAG_LBA;
  1142. if (ata_id_has_lba48(id)) {
  1143. dev->flags |= ATA_DFLAG_LBA48;
  1144. lba_desc = "LBA48";
  1145. }
  1146. /* print device info to dmesg */
  1147. if (print_info)
  1148. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1149. "max %s, %Lu sectors: %s\n",
  1150. ata_id_major_version(id),
  1151. ata_mode_string(xfer_mask),
  1152. (unsigned long long)dev->n_sectors,
  1153. lba_desc);
  1154. } else {
  1155. /* CHS */
  1156. /* Default translation */
  1157. dev->cylinders = id[1];
  1158. dev->heads = id[3];
  1159. dev->sectors = id[6];
  1160. if (ata_id_current_chs_valid(id)) {
  1161. /* Current CHS translation is valid. */
  1162. dev->cylinders = id[54];
  1163. dev->heads = id[55];
  1164. dev->sectors = id[56];
  1165. }
  1166. /* print device info to dmesg */
  1167. if (print_info)
  1168. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1169. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1170. ata_id_major_version(id),
  1171. ata_mode_string(xfer_mask),
  1172. (unsigned long long)dev->n_sectors,
  1173. dev->cylinders, dev->heads, dev->sectors);
  1174. }
  1175. if (dev->id[59] & 0x100) {
  1176. dev->multi_count = dev->id[59] & 0xff;
  1177. DPRINTK("ata%u: dev %u multi count %u\n",
  1178. ap->id, dev->devno, dev->multi_count);
  1179. }
  1180. dev->cdb_len = 16;
  1181. }
  1182. /* ATAPI-specific feature tests */
  1183. else if (dev->class == ATA_DEV_ATAPI) {
  1184. char *cdb_intr_string = "";
  1185. rc = atapi_cdb_len(id);
  1186. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1187. ata_dev_printk(dev, KERN_WARNING,
  1188. "unsupported CDB len\n");
  1189. rc = -EINVAL;
  1190. goto err_out_nosup;
  1191. }
  1192. dev->cdb_len = (unsigned int) rc;
  1193. if (ata_id_cdb_intr(dev->id)) {
  1194. dev->flags |= ATA_DFLAG_CDB_INTR;
  1195. cdb_intr_string = ", CDB intr";
  1196. }
  1197. /* print device info to dmesg */
  1198. if (print_info)
  1199. ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
  1200. ata_mode_string(xfer_mask),
  1201. cdb_intr_string);
  1202. }
  1203. ap->host->max_cmd_len = 0;
  1204. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1205. ap->host->max_cmd_len = max_t(unsigned int,
  1206. ap->host->max_cmd_len,
  1207. ap->device[i].cdb_len);
  1208. /* limit bridge transfers to udma5, 200 sectors */
  1209. if (ata_dev_knobble(dev)) {
  1210. if (print_info)
  1211. ata_dev_printk(dev, KERN_INFO,
  1212. "applying bridge limits\n");
  1213. dev->udma_mask &= ATA_UDMA5;
  1214. dev->max_sectors = ATA_MAX_SECTORS;
  1215. }
  1216. if (ap->ops->dev_config)
  1217. ap->ops->dev_config(ap, dev);
  1218. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1219. return 0;
  1220. err_out_nosup:
  1221. DPRINTK("EXIT, err\n");
  1222. return rc;
  1223. }
  1224. /**
  1225. * ata_bus_probe - Reset and probe ATA bus
  1226. * @ap: Bus to probe
  1227. *
  1228. * Master ATA bus probing function. Initiates a hardware-dependent
  1229. * bus reset, then attempts to identify any devices found on
  1230. * the bus.
  1231. *
  1232. * LOCKING:
  1233. * PCI/etc. bus probe sem.
  1234. *
  1235. * RETURNS:
  1236. * Zero on success, negative errno otherwise.
  1237. */
  1238. static int ata_bus_probe(struct ata_port *ap)
  1239. {
  1240. unsigned int classes[ATA_MAX_DEVICES];
  1241. int tries[ATA_MAX_DEVICES];
  1242. int i, rc, down_xfermask;
  1243. struct ata_device *dev;
  1244. ata_port_probe(ap);
  1245. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1246. tries[i] = ATA_PROBE_MAX_TRIES;
  1247. retry:
  1248. down_xfermask = 0;
  1249. /* reset and determine device classes */
  1250. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1251. classes[i] = ATA_DEV_UNKNOWN;
  1252. if (ap->ops->probe_reset) {
  1253. rc = ap->ops->probe_reset(ap, classes);
  1254. if (rc) {
  1255. ata_port_printk(ap, KERN_ERR,
  1256. "reset failed (errno=%d)\n", rc);
  1257. return rc;
  1258. }
  1259. } else {
  1260. ap->ops->phy_reset(ap);
  1261. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1262. if (!(ap->flags & ATA_FLAG_DISABLED))
  1263. classes[i] = ap->device[i].class;
  1264. ap->device[i].class = ATA_DEV_UNKNOWN;
  1265. }
  1266. ata_port_probe(ap);
  1267. }
  1268. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1269. if (classes[i] == ATA_DEV_UNKNOWN)
  1270. classes[i] = ATA_DEV_NONE;
  1271. /* read IDENTIFY page and configure devices */
  1272. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1273. dev = &ap->device[i];
  1274. if (tries[i])
  1275. dev->class = classes[i];
  1276. if (!ata_dev_enabled(dev))
  1277. continue;
  1278. rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
  1279. if (rc)
  1280. goto fail;
  1281. rc = ata_dev_configure(dev, 1);
  1282. if (rc)
  1283. goto fail;
  1284. }
  1285. /* configure transfer mode */
  1286. rc = ata_set_mode(ap, &dev);
  1287. if (rc) {
  1288. down_xfermask = 1;
  1289. goto fail;
  1290. }
  1291. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1292. if (ata_dev_enabled(&ap->device[i]))
  1293. return 0;
  1294. /* no device present, disable port */
  1295. ata_port_disable(ap);
  1296. ap->ops->port_disable(ap);
  1297. return -ENODEV;
  1298. fail:
  1299. switch (rc) {
  1300. case -EINVAL:
  1301. case -ENODEV:
  1302. tries[dev->devno] = 0;
  1303. break;
  1304. case -EIO:
  1305. sata_down_spd_limit(ap);
  1306. /* fall through */
  1307. default:
  1308. tries[dev->devno]--;
  1309. if (down_xfermask &&
  1310. ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
  1311. tries[dev->devno] = 0;
  1312. }
  1313. if (!tries[dev->devno]) {
  1314. ata_down_xfermask_limit(dev, 1);
  1315. ata_dev_disable(dev);
  1316. }
  1317. goto retry;
  1318. }
  1319. /**
  1320. * ata_port_probe - Mark port as enabled
  1321. * @ap: Port for which we indicate enablement
  1322. *
  1323. * Modify @ap data structure such that the system
  1324. * thinks that the entire port is enabled.
  1325. *
  1326. * LOCKING: host_set lock, or some other form of
  1327. * serialization.
  1328. */
  1329. void ata_port_probe(struct ata_port *ap)
  1330. {
  1331. ap->flags &= ~ATA_FLAG_DISABLED;
  1332. }
  1333. /**
  1334. * sata_print_link_status - Print SATA link status
  1335. * @ap: SATA port to printk link status about
  1336. *
  1337. * This function prints link speed and status of a SATA link.
  1338. *
  1339. * LOCKING:
  1340. * None.
  1341. */
  1342. static void sata_print_link_status(struct ata_port *ap)
  1343. {
  1344. u32 sstatus, scontrol, tmp;
  1345. if (sata_scr_read(ap, SCR_STATUS, &sstatus))
  1346. return;
  1347. sata_scr_read(ap, SCR_CONTROL, &scontrol);
  1348. if (ata_port_online(ap)) {
  1349. tmp = (sstatus >> 4) & 0xf;
  1350. ata_port_printk(ap, KERN_INFO,
  1351. "SATA link up %s (SStatus %X SControl %X)\n",
  1352. sata_spd_string(tmp), sstatus, scontrol);
  1353. } else {
  1354. ata_port_printk(ap, KERN_INFO,
  1355. "SATA link down (SStatus %X SControl %X)\n",
  1356. sstatus, scontrol);
  1357. }
  1358. }
  1359. /**
  1360. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1361. * @ap: SATA port associated with target SATA PHY.
  1362. *
  1363. * This function issues commands to standard SATA Sxxx
  1364. * PHY registers, to wake up the phy (and device), and
  1365. * clear any reset condition.
  1366. *
  1367. * LOCKING:
  1368. * PCI/etc. bus probe sem.
  1369. *
  1370. */
  1371. void __sata_phy_reset(struct ata_port *ap)
  1372. {
  1373. u32 sstatus;
  1374. unsigned long timeout = jiffies + (HZ * 5);
  1375. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1376. /* issue phy wake/reset */
  1377. sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
  1378. /* Couldn't find anything in SATA I/II specs, but
  1379. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1380. mdelay(1);
  1381. }
  1382. /* phy wake/clear reset */
  1383. sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
  1384. /* wait for phy to become ready, if necessary */
  1385. do {
  1386. msleep(200);
  1387. sata_scr_read(ap, SCR_STATUS, &sstatus);
  1388. if ((sstatus & 0xf) != 1)
  1389. break;
  1390. } while (time_before(jiffies, timeout));
  1391. /* print link status */
  1392. sata_print_link_status(ap);
  1393. /* TODO: phy layer with polling, timeouts, etc. */
  1394. if (!ata_port_offline(ap))
  1395. ata_port_probe(ap);
  1396. else
  1397. ata_port_disable(ap);
  1398. if (ap->flags & ATA_FLAG_DISABLED)
  1399. return;
  1400. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1401. ata_port_disable(ap);
  1402. return;
  1403. }
  1404. ap->cbl = ATA_CBL_SATA;
  1405. }
  1406. /**
  1407. * sata_phy_reset - Reset SATA bus.
  1408. * @ap: SATA port associated with target SATA PHY.
  1409. *
  1410. * This function resets the SATA bus, and then probes
  1411. * the bus for devices.
  1412. *
  1413. * LOCKING:
  1414. * PCI/etc. bus probe sem.
  1415. *
  1416. */
  1417. void sata_phy_reset(struct ata_port *ap)
  1418. {
  1419. __sata_phy_reset(ap);
  1420. if (ap->flags & ATA_FLAG_DISABLED)
  1421. return;
  1422. ata_bus_reset(ap);
  1423. }
  1424. /**
  1425. * ata_dev_pair - return other device on cable
  1426. * @adev: device
  1427. *
  1428. * Obtain the other device on the same cable, or if none is
  1429. * present NULL is returned
  1430. */
  1431. struct ata_device *ata_dev_pair(struct ata_device *adev)
  1432. {
  1433. struct ata_port *ap = adev->ap;
  1434. struct ata_device *pair = &ap->device[1 - adev->devno];
  1435. if (!ata_dev_enabled(pair))
  1436. return NULL;
  1437. return pair;
  1438. }
  1439. /**
  1440. * ata_port_disable - Disable port.
  1441. * @ap: Port to be disabled.
  1442. *
  1443. * Modify @ap data structure such that the system
  1444. * thinks that the entire port is disabled, and should
  1445. * never attempt to probe or communicate with devices
  1446. * on this port.
  1447. *
  1448. * LOCKING: host_set lock, or some other form of
  1449. * serialization.
  1450. */
  1451. void ata_port_disable(struct ata_port *ap)
  1452. {
  1453. ap->device[0].class = ATA_DEV_NONE;
  1454. ap->device[1].class = ATA_DEV_NONE;
  1455. ap->flags |= ATA_FLAG_DISABLED;
  1456. }
  1457. /**
  1458. * sata_down_spd_limit - adjust SATA spd limit downward
  1459. * @ap: Port to adjust SATA spd limit for
  1460. *
  1461. * Adjust SATA spd limit of @ap downward. Note that this
  1462. * function only adjusts the limit. The change must be applied
  1463. * using sata_set_spd().
  1464. *
  1465. * LOCKING:
  1466. * Inherited from caller.
  1467. *
  1468. * RETURNS:
  1469. * 0 on success, negative errno on failure
  1470. */
  1471. int sata_down_spd_limit(struct ata_port *ap)
  1472. {
  1473. u32 sstatus, spd, mask;
  1474. int rc, highbit;
  1475. rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
  1476. if (rc)
  1477. return rc;
  1478. mask = ap->sata_spd_limit;
  1479. if (mask <= 1)
  1480. return -EINVAL;
  1481. highbit = fls(mask) - 1;
  1482. mask &= ~(1 << highbit);
  1483. spd = (sstatus >> 4) & 0xf;
  1484. if (spd <= 1)
  1485. return -EINVAL;
  1486. spd--;
  1487. mask &= (1 << spd) - 1;
  1488. if (!mask)
  1489. return -EINVAL;
  1490. ap->sata_spd_limit = mask;
  1491. ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
  1492. sata_spd_string(fls(mask)));
  1493. return 0;
  1494. }
  1495. static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
  1496. {
  1497. u32 spd, limit;
  1498. if (ap->sata_spd_limit == UINT_MAX)
  1499. limit = 0;
  1500. else
  1501. limit = fls(ap->sata_spd_limit);
  1502. spd = (*scontrol >> 4) & 0xf;
  1503. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1504. return spd != limit;
  1505. }
  1506. /**
  1507. * sata_set_spd_needed - is SATA spd configuration needed
  1508. * @ap: Port in question
  1509. *
  1510. * Test whether the spd limit in SControl matches
  1511. * @ap->sata_spd_limit. This function is used to determine
  1512. * whether hardreset is necessary to apply SATA spd
  1513. * configuration.
  1514. *
  1515. * LOCKING:
  1516. * Inherited from caller.
  1517. *
  1518. * RETURNS:
  1519. * 1 if SATA spd configuration is needed, 0 otherwise.
  1520. */
  1521. int sata_set_spd_needed(struct ata_port *ap)
  1522. {
  1523. u32 scontrol;
  1524. if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
  1525. return 0;
  1526. return __sata_set_spd_needed(ap, &scontrol);
  1527. }
  1528. /**
  1529. * sata_set_spd - set SATA spd according to spd limit
  1530. * @ap: Port to set SATA spd for
  1531. *
  1532. * Set SATA spd of @ap according to sata_spd_limit.
  1533. *
  1534. * LOCKING:
  1535. * Inherited from caller.
  1536. *
  1537. * RETURNS:
  1538. * 0 if spd doesn't need to be changed, 1 if spd has been
  1539. * changed. Negative errno if SCR registers are inaccessible.
  1540. */
  1541. int sata_set_spd(struct ata_port *ap)
  1542. {
  1543. u32 scontrol;
  1544. int rc;
  1545. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  1546. return rc;
  1547. if (!__sata_set_spd_needed(ap, &scontrol))
  1548. return 0;
  1549. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  1550. return rc;
  1551. return 1;
  1552. }
  1553. /*
  1554. * This mode timing computation functionality is ported over from
  1555. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1556. */
  1557. /*
  1558. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1559. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1560. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1561. * is currently supported only by Maxtor drives.
  1562. */
  1563. static const struct ata_timing ata_timing[] = {
  1564. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1565. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1566. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1567. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1568. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1569. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1570. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1571. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1572. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1573. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1574. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1575. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1576. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1577. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1578. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1579. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1580. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1581. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1582. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1583. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1584. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1585. { 0xFF }
  1586. };
  1587. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1588. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1589. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1590. {
  1591. q->setup = EZ(t->setup * 1000, T);
  1592. q->act8b = EZ(t->act8b * 1000, T);
  1593. q->rec8b = EZ(t->rec8b * 1000, T);
  1594. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1595. q->active = EZ(t->active * 1000, T);
  1596. q->recover = EZ(t->recover * 1000, T);
  1597. q->cycle = EZ(t->cycle * 1000, T);
  1598. q->udma = EZ(t->udma * 1000, UT);
  1599. }
  1600. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1601. struct ata_timing *m, unsigned int what)
  1602. {
  1603. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1604. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1605. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1606. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1607. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1608. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1609. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1610. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1611. }
  1612. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1613. {
  1614. const struct ata_timing *t;
  1615. for (t = ata_timing; t->mode != speed; t++)
  1616. if (t->mode == 0xFF)
  1617. return NULL;
  1618. return t;
  1619. }
  1620. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1621. struct ata_timing *t, int T, int UT)
  1622. {
  1623. const struct ata_timing *s;
  1624. struct ata_timing p;
  1625. /*
  1626. * Find the mode.
  1627. */
  1628. if (!(s = ata_timing_find_mode(speed)))
  1629. return -EINVAL;
  1630. memcpy(t, s, sizeof(*s));
  1631. /*
  1632. * If the drive is an EIDE drive, it can tell us it needs extended
  1633. * PIO/MW_DMA cycle timing.
  1634. */
  1635. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1636. memset(&p, 0, sizeof(p));
  1637. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1638. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1639. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1640. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1641. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1642. }
  1643. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1644. }
  1645. /*
  1646. * Convert the timing to bus clock counts.
  1647. */
  1648. ata_timing_quantize(t, t, T, UT);
  1649. /*
  1650. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1651. * S.M.A.R.T * and some other commands. We have to ensure that the
  1652. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1653. */
  1654. if (speed > XFER_PIO_4) {
  1655. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1656. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1657. }
  1658. /*
  1659. * Lengthen active & recovery time so that cycle time is correct.
  1660. */
  1661. if (t->act8b + t->rec8b < t->cyc8b) {
  1662. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1663. t->rec8b = t->cyc8b - t->act8b;
  1664. }
  1665. if (t->active + t->recover < t->cycle) {
  1666. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1667. t->recover = t->cycle - t->active;
  1668. }
  1669. return 0;
  1670. }
  1671. /**
  1672. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1673. * @dev: Device to adjust xfer masks
  1674. * @force_pio0: Force PIO0
  1675. *
  1676. * Adjust xfer masks of @dev downward. Note that this function
  1677. * does not apply the change. Invoking ata_set_mode() afterwards
  1678. * will apply the limit.
  1679. *
  1680. * LOCKING:
  1681. * Inherited from caller.
  1682. *
  1683. * RETURNS:
  1684. * 0 on success, negative errno on failure
  1685. */
  1686. int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
  1687. {
  1688. unsigned long xfer_mask;
  1689. int highbit;
  1690. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1691. dev->udma_mask);
  1692. if (!xfer_mask)
  1693. goto fail;
  1694. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1695. if (xfer_mask & ATA_MASK_UDMA)
  1696. xfer_mask &= ~ATA_MASK_MWDMA;
  1697. highbit = fls(xfer_mask) - 1;
  1698. xfer_mask &= ~(1 << highbit);
  1699. if (force_pio0)
  1700. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1701. if (!xfer_mask)
  1702. goto fail;
  1703. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1704. &dev->udma_mask);
  1705. ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
  1706. ata_mode_string(xfer_mask));
  1707. return 0;
  1708. fail:
  1709. return -EINVAL;
  1710. }
  1711. static int ata_dev_set_mode(struct ata_device *dev)
  1712. {
  1713. unsigned int err_mask;
  1714. int rc;
  1715. dev->flags &= ~ATA_DFLAG_PIO;
  1716. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1717. dev->flags |= ATA_DFLAG_PIO;
  1718. err_mask = ata_dev_set_xfermode(dev);
  1719. if (err_mask) {
  1720. ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
  1721. "(err_mask=0x%x)\n", err_mask);
  1722. return -EIO;
  1723. }
  1724. rc = ata_dev_revalidate(dev, 0);
  1725. if (rc)
  1726. return rc;
  1727. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1728. dev->xfer_shift, (int)dev->xfer_mode);
  1729. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  1730. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1731. return 0;
  1732. }
  1733. /**
  1734. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1735. * @ap: port on which timings will be programmed
  1736. * @r_failed_dev: out paramter for failed device
  1737. *
  1738. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1739. * ata_set_mode() fails, pointer to the failing device is
  1740. * returned in @r_failed_dev.
  1741. *
  1742. * LOCKING:
  1743. * PCI/etc. bus probe sem.
  1744. *
  1745. * RETURNS:
  1746. * 0 on success, negative errno otherwise
  1747. */
  1748. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1749. {
  1750. struct ata_device *dev;
  1751. int i, rc = 0, used_dma = 0, found = 0;
  1752. /* has private set_mode? */
  1753. if (ap->ops->set_mode) {
  1754. /* FIXME: make ->set_mode handle no device case and
  1755. * return error code and failing device on failure.
  1756. */
  1757. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1758. if (ata_dev_enabled(&ap->device[i])) {
  1759. ap->ops->set_mode(ap);
  1760. break;
  1761. }
  1762. }
  1763. return 0;
  1764. }
  1765. /* step 1: calculate xfer_mask */
  1766. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1767. unsigned int pio_mask, dma_mask;
  1768. dev = &ap->device[i];
  1769. if (!ata_dev_enabled(dev))
  1770. continue;
  1771. ata_dev_xfermask(dev);
  1772. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1773. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1774. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1775. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1776. found = 1;
  1777. if (dev->dma_mode)
  1778. used_dma = 1;
  1779. }
  1780. if (!found)
  1781. goto out;
  1782. /* step 2: always set host PIO timings */
  1783. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1784. dev = &ap->device[i];
  1785. if (!ata_dev_enabled(dev))
  1786. continue;
  1787. if (!dev->pio_mode) {
  1788. ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
  1789. rc = -EINVAL;
  1790. goto out;
  1791. }
  1792. dev->xfer_mode = dev->pio_mode;
  1793. dev->xfer_shift = ATA_SHIFT_PIO;
  1794. if (ap->ops->set_piomode)
  1795. ap->ops->set_piomode(ap, dev);
  1796. }
  1797. /* step 3: set host DMA timings */
  1798. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1799. dev = &ap->device[i];
  1800. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1801. continue;
  1802. dev->xfer_mode = dev->dma_mode;
  1803. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1804. if (ap->ops->set_dmamode)
  1805. ap->ops->set_dmamode(ap, dev);
  1806. }
  1807. /* step 4: update devices' xfer mode */
  1808. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1809. dev = &ap->device[i];
  1810. if (!ata_dev_enabled(dev))
  1811. continue;
  1812. rc = ata_dev_set_mode(dev);
  1813. if (rc)
  1814. goto out;
  1815. }
  1816. /* Record simplex status. If we selected DMA then the other
  1817. * host channels are not permitted to do so.
  1818. */
  1819. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1820. ap->host_set->simplex_claimed = 1;
  1821. /* step5: chip specific finalisation */
  1822. if (ap->ops->post_set_mode)
  1823. ap->ops->post_set_mode(ap);
  1824. out:
  1825. if (rc)
  1826. *r_failed_dev = dev;
  1827. return rc;
  1828. }
  1829. /**
  1830. * ata_tf_to_host - issue ATA taskfile to host controller
  1831. * @ap: port to which command is being issued
  1832. * @tf: ATA taskfile register set
  1833. *
  1834. * Issues ATA taskfile register set to ATA host controller,
  1835. * with proper synchronization with interrupt handler and
  1836. * other threads.
  1837. *
  1838. * LOCKING:
  1839. * spin_lock_irqsave(host_set lock)
  1840. */
  1841. static inline void ata_tf_to_host(struct ata_port *ap,
  1842. const struct ata_taskfile *tf)
  1843. {
  1844. ap->ops->tf_load(ap, tf);
  1845. ap->ops->exec_command(ap, tf);
  1846. }
  1847. /**
  1848. * ata_busy_sleep - sleep until BSY clears, or timeout
  1849. * @ap: port containing status register to be polled
  1850. * @tmout_pat: impatience timeout
  1851. * @tmout: overall timeout
  1852. *
  1853. * Sleep until ATA Status register bit BSY clears,
  1854. * or a timeout occurs.
  1855. *
  1856. * LOCKING: None.
  1857. */
  1858. unsigned int ata_busy_sleep (struct ata_port *ap,
  1859. unsigned long tmout_pat, unsigned long tmout)
  1860. {
  1861. unsigned long timer_start, timeout;
  1862. u8 status;
  1863. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1864. timer_start = jiffies;
  1865. timeout = timer_start + tmout_pat;
  1866. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1867. msleep(50);
  1868. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1869. }
  1870. if (status & ATA_BUSY)
  1871. ata_port_printk(ap, KERN_WARNING,
  1872. "port is slow to respond, please be patient\n");
  1873. timeout = timer_start + tmout;
  1874. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1875. msleep(50);
  1876. status = ata_chk_status(ap);
  1877. }
  1878. if (status & ATA_BUSY) {
  1879. ata_port_printk(ap, KERN_ERR, "port failed to respond "
  1880. "(%lu secs)\n", tmout / HZ);
  1881. return 1;
  1882. }
  1883. return 0;
  1884. }
  1885. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1886. {
  1887. struct ata_ioports *ioaddr = &ap->ioaddr;
  1888. unsigned int dev0 = devmask & (1 << 0);
  1889. unsigned int dev1 = devmask & (1 << 1);
  1890. unsigned long timeout;
  1891. /* if device 0 was found in ata_devchk, wait for its
  1892. * BSY bit to clear
  1893. */
  1894. if (dev0)
  1895. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1896. /* if device 1 was found in ata_devchk, wait for
  1897. * register access, then wait for BSY to clear
  1898. */
  1899. timeout = jiffies + ATA_TMOUT_BOOT;
  1900. while (dev1) {
  1901. u8 nsect, lbal;
  1902. ap->ops->dev_select(ap, 1);
  1903. if (ap->flags & ATA_FLAG_MMIO) {
  1904. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1905. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1906. } else {
  1907. nsect = inb(ioaddr->nsect_addr);
  1908. lbal = inb(ioaddr->lbal_addr);
  1909. }
  1910. if ((nsect == 1) && (lbal == 1))
  1911. break;
  1912. if (time_after(jiffies, timeout)) {
  1913. dev1 = 0;
  1914. break;
  1915. }
  1916. msleep(50); /* give drive a breather */
  1917. }
  1918. if (dev1)
  1919. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1920. /* is all this really necessary? */
  1921. ap->ops->dev_select(ap, 0);
  1922. if (dev1)
  1923. ap->ops->dev_select(ap, 1);
  1924. if (dev0)
  1925. ap->ops->dev_select(ap, 0);
  1926. }
  1927. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1928. unsigned int devmask)
  1929. {
  1930. struct ata_ioports *ioaddr = &ap->ioaddr;
  1931. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1932. /* software reset. causes dev0 to be selected */
  1933. if (ap->flags & ATA_FLAG_MMIO) {
  1934. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1935. udelay(20); /* FIXME: flush */
  1936. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1937. udelay(20); /* FIXME: flush */
  1938. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1939. } else {
  1940. outb(ap->ctl, ioaddr->ctl_addr);
  1941. udelay(10);
  1942. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1943. udelay(10);
  1944. outb(ap->ctl, ioaddr->ctl_addr);
  1945. }
  1946. /* spec mandates ">= 2ms" before checking status.
  1947. * We wait 150ms, because that was the magic delay used for
  1948. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1949. * between when the ATA command register is written, and then
  1950. * status is checked. Because waiting for "a while" before
  1951. * checking status is fine, post SRST, we perform this magic
  1952. * delay here as well.
  1953. *
  1954. * Old drivers/ide uses the 2mS rule and then waits for ready
  1955. */
  1956. msleep(150);
  1957. /* Before we perform post reset processing we want to see if
  1958. * the bus shows 0xFF because the odd clown forgets the D7
  1959. * pulldown resistor.
  1960. */
  1961. if (ata_check_status(ap) == 0xFF) {
  1962. ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
  1963. return AC_ERR_OTHER;
  1964. }
  1965. ata_bus_post_reset(ap, devmask);
  1966. return 0;
  1967. }
  1968. /**
  1969. * ata_bus_reset - reset host port and associated ATA channel
  1970. * @ap: port to reset
  1971. *
  1972. * This is typically the first time we actually start issuing
  1973. * commands to the ATA channel. We wait for BSY to clear, then
  1974. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1975. * result. Determine what devices, if any, are on the channel
  1976. * by looking at the device 0/1 error register. Look at the signature
  1977. * stored in each device's taskfile registers, to determine if
  1978. * the device is ATA or ATAPI.
  1979. *
  1980. * LOCKING:
  1981. * PCI/etc. bus probe sem.
  1982. * Obtains host_set lock.
  1983. *
  1984. * SIDE EFFECTS:
  1985. * Sets ATA_FLAG_DISABLED if bus reset fails.
  1986. */
  1987. void ata_bus_reset(struct ata_port *ap)
  1988. {
  1989. struct ata_ioports *ioaddr = &ap->ioaddr;
  1990. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1991. u8 err;
  1992. unsigned int dev0, dev1 = 0, devmask = 0;
  1993. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  1994. /* determine if device 0/1 are present */
  1995. if (ap->flags & ATA_FLAG_SATA_RESET)
  1996. dev0 = 1;
  1997. else {
  1998. dev0 = ata_devchk(ap, 0);
  1999. if (slave_possible)
  2000. dev1 = ata_devchk(ap, 1);
  2001. }
  2002. if (dev0)
  2003. devmask |= (1 << 0);
  2004. if (dev1)
  2005. devmask |= (1 << 1);
  2006. /* select device 0 again */
  2007. ap->ops->dev_select(ap, 0);
  2008. /* issue bus reset */
  2009. if (ap->flags & ATA_FLAG_SRST)
  2010. if (ata_bus_softreset(ap, devmask))
  2011. goto err_out;
  2012. /*
  2013. * determine by signature whether we have ATA or ATAPI devices
  2014. */
  2015. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  2016. if ((slave_possible) && (err != 0x81))
  2017. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  2018. /* re-enable interrupts */
  2019. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2020. ata_irq_on(ap);
  2021. /* is double-select really necessary? */
  2022. if (ap->device[1].class != ATA_DEV_NONE)
  2023. ap->ops->dev_select(ap, 1);
  2024. if (ap->device[0].class != ATA_DEV_NONE)
  2025. ap->ops->dev_select(ap, 0);
  2026. /* if no devices were detected, disable this port */
  2027. if ((ap->device[0].class == ATA_DEV_NONE) &&
  2028. (ap->device[1].class == ATA_DEV_NONE))
  2029. goto err_out;
  2030. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  2031. /* set up device control for ATA_FLAG_SATA_RESET */
  2032. if (ap->flags & ATA_FLAG_MMIO)
  2033. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2034. else
  2035. outb(ap->ctl, ioaddr->ctl_addr);
  2036. }
  2037. DPRINTK("EXIT\n");
  2038. return;
  2039. err_out:
  2040. ata_port_printk(ap, KERN_ERR, "disabling port\n");
  2041. ap->ops->port_disable(ap);
  2042. DPRINTK("EXIT\n");
  2043. }
  2044. static int sata_phy_resume(struct ata_port *ap)
  2045. {
  2046. unsigned long timeout = jiffies + (HZ * 5);
  2047. u32 scontrol, sstatus;
  2048. int rc;
  2049. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2050. return rc;
  2051. scontrol = (scontrol & 0x0f0) | 0x300;
  2052. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2053. return rc;
  2054. /* Wait for phy to become ready, if necessary. */
  2055. do {
  2056. msleep(200);
  2057. if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus)))
  2058. return rc;
  2059. if ((sstatus & 0xf) != 1)
  2060. return 0;
  2061. } while (time_before(jiffies, timeout));
  2062. return -EBUSY;
  2063. }
  2064. /**
  2065. * ata_std_probeinit - initialize probing
  2066. * @ap: port to be probed
  2067. *
  2068. * @ap is about to be probed. Initialize it. This function is
  2069. * to be used as standard callback for ata_drive_probe_reset().
  2070. *
  2071. * NOTE!!! Do not use this function as probeinit if a low level
  2072. * driver implements only hardreset. Just pass NULL as probeinit
  2073. * in that case. Using this function is probably okay but doing
  2074. * so makes reset sequence different from the original
  2075. * ->phy_reset implementation and Jeff nervous. :-P
  2076. */
  2077. void ata_std_probeinit(struct ata_port *ap)
  2078. {
  2079. u32 scontrol;
  2080. /* resume link */
  2081. sata_phy_resume(ap);
  2082. /* init sata_spd_limit to the current value */
  2083. if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
  2084. int spd = (scontrol >> 4) & 0xf;
  2085. ap->sata_spd_limit &= (1 << spd) - 1;
  2086. }
  2087. /* wait for device */
  2088. if (ata_port_online(ap))
  2089. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2090. }
  2091. /**
  2092. * ata_std_softreset - reset host port via ATA SRST
  2093. * @ap: port to reset
  2094. * @classes: resulting classes of attached devices
  2095. *
  2096. * Reset host port using ATA SRST. This function is to be used
  2097. * as standard callback for ata_drive_*_reset() functions.
  2098. *
  2099. * LOCKING:
  2100. * Kernel thread context (may sleep)
  2101. *
  2102. * RETURNS:
  2103. * 0 on success, -errno otherwise.
  2104. */
  2105. int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
  2106. {
  2107. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2108. unsigned int devmask = 0, err_mask;
  2109. u8 err;
  2110. DPRINTK("ENTER\n");
  2111. if (ata_port_offline(ap)) {
  2112. classes[0] = ATA_DEV_NONE;
  2113. goto out;
  2114. }
  2115. /* determine if device 0/1 are present */
  2116. if (ata_devchk(ap, 0))
  2117. devmask |= (1 << 0);
  2118. if (slave_possible && ata_devchk(ap, 1))
  2119. devmask |= (1 << 1);
  2120. /* select device 0 again */
  2121. ap->ops->dev_select(ap, 0);
  2122. /* issue bus reset */
  2123. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2124. err_mask = ata_bus_softreset(ap, devmask);
  2125. if (err_mask) {
  2126. ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
  2127. err_mask);
  2128. return -EIO;
  2129. }
  2130. /* determine by signature whether we have ATA or ATAPI devices */
  2131. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2132. if (slave_possible && err != 0x81)
  2133. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2134. out:
  2135. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2136. return 0;
  2137. }
  2138. /**
  2139. * sata_std_hardreset - reset host port via SATA phy reset
  2140. * @ap: port to reset
  2141. * @class: resulting class of attached device
  2142. *
  2143. * SATA phy-reset host port using DET bits of SControl register.
  2144. * This function is to be used as standard callback for
  2145. * ata_drive_*_reset().
  2146. *
  2147. * LOCKING:
  2148. * Kernel thread context (may sleep)
  2149. *
  2150. * RETURNS:
  2151. * 0 on success, -errno otherwise.
  2152. */
  2153. int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
  2154. {
  2155. u32 scontrol;
  2156. int rc;
  2157. DPRINTK("ENTER\n");
  2158. if (sata_set_spd_needed(ap)) {
  2159. /* SATA spec says nothing about how to reconfigure
  2160. * spd. To be on the safe side, turn off phy during
  2161. * reconfiguration. This works for at least ICH7 AHCI
  2162. * and Sil3124.
  2163. */
  2164. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2165. return rc;
  2166. scontrol = (scontrol & 0x0f0) | 0x302;
  2167. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2168. return rc;
  2169. sata_set_spd(ap);
  2170. }
  2171. /* issue phy wake/reset */
  2172. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2173. return rc;
  2174. scontrol = (scontrol & 0x0f0) | 0x301;
  2175. if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
  2176. return rc;
  2177. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2178. * 10.4.2 says at least 1 ms.
  2179. */
  2180. msleep(1);
  2181. /* bring phy back */
  2182. sata_phy_resume(ap);
  2183. /* TODO: phy layer with polling, timeouts, etc. */
  2184. if (ata_port_offline(ap)) {
  2185. *class = ATA_DEV_NONE;
  2186. DPRINTK("EXIT, link offline\n");
  2187. return 0;
  2188. }
  2189. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2190. ata_port_printk(ap, KERN_ERR,
  2191. "COMRESET failed (device not ready)\n");
  2192. return -EIO;
  2193. }
  2194. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2195. *class = ata_dev_try_classify(ap, 0, NULL);
  2196. DPRINTK("EXIT, class=%u\n", *class);
  2197. return 0;
  2198. }
  2199. /**
  2200. * ata_std_postreset - standard postreset callback
  2201. * @ap: the target ata_port
  2202. * @classes: classes of attached devices
  2203. *
  2204. * This function is invoked after a successful reset. Note that
  2205. * the device might have been reset more than once using
  2206. * different reset methods before postreset is invoked.
  2207. *
  2208. * This function is to be used as standard callback for
  2209. * ata_drive_*_reset().
  2210. *
  2211. * LOCKING:
  2212. * Kernel thread context (may sleep)
  2213. */
  2214. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2215. {
  2216. u32 serror;
  2217. DPRINTK("ENTER\n");
  2218. /* print link status */
  2219. sata_print_link_status(ap);
  2220. /* clear SError */
  2221. if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
  2222. sata_scr_write(ap, SCR_ERROR, serror);
  2223. /* re-enable interrupts */
  2224. if (!ap->ops->error_handler) {
  2225. /* FIXME: hack. create a hook instead */
  2226. if (ap->ioaddr.ctl_addr)
  2227. ata_irq_on(ap);
  2228. }
  2229. /* is double-select really necessary? */
  2230. if (classes[0] != ATA_DEV_NONE)
  2231. ap->ops->dev_select(ap, 1);
  2232. if (classes[1] != ATA_DEV_NONE)
  2233. ap->ops->dev_select(ap, 0);
  2234. /* bail out if no device is present */
  2235. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2236. DPRINTK("EXIT, no device\n");
  2237. return;
  2238. }
  2239. /* set up device control */
  2240. if (ap->ioaddr.ctl_addr) {
  2241. if (ap->flags & ATA_FLAG_MMIO)
  2242. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2243. else
  2244. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2245. }
  2246. DPRINTK("EXIT\n");
  2247. }
  2248. /**
  2249. * ata_std_probe_reset - standard probe reset method
  2250. * @ap: prot to perform probe-reset
  2251. * @classes: resulting classes of attached devices
  2252. *
  2253. * The stock off-the-shelf ->probe_reset method.
  2254. *
  2255. * LOCKING:
  2256. * Kernel thread context (may sleep)
  2257. *
  2258. * RETURNS:
  2259. * 0 on success, -errno otherwise.
  2260. */
  2261. int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
  2262. {
  2263. ata_reset_fn_t hardreset;
  2264. hardreset = NULL;
  2265. if (sata_scr_valid(ap))
  2266. hardreset = sata_std_hardreset;
  2267. return ata_drive_probe_reset(ap, ata_std_probeinit,
  2268. ata_std_softreset, hardreset,
  2269. ata_std_postreset, classes);
  2270. }
  2271. int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
  2272. unsigned int *classes)
  2273. {
  2274. int i, rc;
  2275. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2276. classes[i] = ATA_DEV_UNKNOWN;
  2277. rc = reset(ap, classes);
  2278. if (rc)
  2279. return rc;
  2280. /* If any class isn't ATA_DEV_UNKNOWN, consider classification
  2281. * is complete and convert all ATA_DEV_UNKNOWN to
  2282. * ATA_DEV_NONE.
  2283. */
  2284. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2285. if (classes[i] != ATA_DEV_UNKNOWN)
  2286. break;
  2287. if (i < ATA_MAX_DEVICES)
  2288. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2289. if (classes[i] == ATA_DEV_UNKNOWN)
  2290. classes[i] = ATA_DEV_NONE;
  2291. return 0;
  2292. }
  2293. /**
  2294. * ata_drive_probe_reset - Perform probe reset with given methods
  2295. * @ap: port to reset
  2296. * @probeinit: probeinit method (can be NULL)
  2297. * @softreset: softreset method (can be NULL)
  2298. * @hardreset: hardreset method (can be NULL)
  2299. * @postreset: postreset method (can be NULL)
  2300. * @classes: resulting classes of attached devices
  2301. *
  2302. * Reset the specified port and classify attached devices using
  2303. * given methods. This function prefers softreset but tries all
  2304. * possible reset sequences to reset and classify devices. This
  2305. * function is intended to be used for constructing ->probe_reset
  2306. * callback by low level drivers.
  2307. *
  2308. * Reset methods should follow the following rules.
  2309. *
  2310. * - Return 0 on sucess, -errno on failure.
  2311. * - If classification is supported, fill classes[] with
  2312. * recognized class codes.
  2313. * - If classification is not supported, leave classes[] alone.
  2314. *
  2315. * LOCKING:
  2316. * Kernel thread context (may sleep)
  2317. *
  2318. * RETURNS:
  2319. * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
  2320. * if classification fails, and any error code from reset
  2321. * methods.
  2322. */
  2323. int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
  2324. ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
  2325. ata_postreset_fn_t postreset, unsigned int *classes)
  2326. {
  2327. int rc = -EINVAL;
  2328. ata_eh_freeze_port(ap);
  2329. if (probeinit)
  2330. probeinit(ap);
  2331. if (softreset && !sata_set_spd_needed(ap)) {
  2332. rc = ata_do_reset(ap, softreset, classes);
  2333. if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
  2334. goto done;
  2335. ata_port_printk(ap, KERN_INFO, "softreset failed, "
  2336. "will try hardreset in 5 secs\n");
  2337. ssleep(5);
  2338. }
  2339. if (!hardreset)
  2340. goto done;
  2341. while (1) {
  2342. rc = ata_do_reset(ap, hardreset, classes);
  2343. if (rc == 0) {
  2344. if (classes[0] != ATA_DEV_UNKNOWN)
  2345. goto done;
  2346. break;
  2347. }
  2348. if (sata_down_spd_limit(ap))
  2349. goto done;
  2350. ata_port_printk(ap, KERN_INFO, "hardreset failed, "
  2351. "will retry in 5 secs\n");
  2352. ssleep(5);
  2353. }
  2354. if (softreset) {
  2355. ata_port_printk(ap, KERN_INFO,
  2356. "hardreset succeeded without classification, "
  2357. "will retry softreset in 5 secs\n");
  2358. ssleep(5);
  2359. rc = ata_do_reset(ap, softreset, classes);
  2360. }
  2361. done:
  2362. if (rc == 0) {
  2363. if (postreset)
  2364. postreset(ap, classes);
  2365. ata_eh_thaw_port(ap);
  2366. if (classes[0] == ATA_DEV_UNKNOWN)
  2367. rc = -ENODEV;
  2368. }
  2369. return rc;
  2370. }
  2371. /**
  2372. * ata_dev_same_device - Determine whether new ID matches configured device
  2373. * @dev: device to compare against
  2374. * @new_class: class of the new device
  2375. * @new_id: IDENTIFY page of the new device
  2376. *
  2377. * Compare @new_class and @new_id against @dev and determine
  2378. * whether @dev is the device indicated by @new_class and
  2379. * @new_id.
  2380. *
  2381. * LOCKING:
  2382. * None.
  2383. *
  2384. * RETURNS:
  2385. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2386. */
  2387. static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
  2388. const u16 *new_id)
  2389. {
  2390. const u16 *old_id = dev->id;
  2391. unsigned char model[2][41], serial[2][21];
  2392. u64 new_n_sectors;
  2393. if (dev->class != new_class) {
  2394. ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
  2395. dev->class, new_class);
  2396. return 0;
  2397. }
  2398. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2399. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2400. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2401. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2402. new_n_sectors = ata_id_n_sectors(new_id);
  2403. if (strcmp(model[0], model[1])) {
  2404. ata_dev_printk(dev, KERN_INFO, "model number mismatch "
  2405. "'%s' != '%s'\n", model[0], model[1]);
  2406. return 0;
  2407. }
  2408. if (strcmp(serial[0], serial[1])) {
  2409. ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
  2410. "'%s' != '%s'\n", serial[0], serial[1]);
  2411. return 0;
  2412. }
  2413. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2414. ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
  2415. "%llu != %llu\n",
  2416. (unsigned long long)dev->n_sectors,
  2417. (unsigned long long)new_n_sectors);
  2418. return 0;
  2419. }
  2420. return 1;
  2421. }
  2422. /**
  2423. * ata_dev_revalidate - Revalidate ATA device
  2424. * @dev: device to revalidate
  2425. * @post_reset: is this revalidation after reset?
  2426. *
  2427. * Re-read IDENTIFY page and make sure @dev is still attached to
  2428. * the port.
  2429. *
  2430. * LOCKING:
  2431. * Kernel thread context (may sleep)
  2432. *
  2433. * RETURNS:
  2434. * 0 on success, negative errno otherwise
  2435. */
  2436. int ata_dev_revalidate(struct ata_device *dev, int post_reset)
  2437. {
  2438. unsigned int class = dev->class;
  2439. u16 *id = (void *)dev->ap->sector_buf;
  2440. int rc;
  2441. if (!ata_dev_enabled(dev)) {
  2442. rc = -ENODEV;
  2443. goto fail;
  2444. }
  2445. /* read ID data */
  2446. rc = ata_dev_read_id(dev, &class, post_reset, id);
  2447. if (rc)
  2448. goto fail;
  2449. /* is the device still there? */
  2450. if (!ata_dev_same_device(dev, class, id)) {
  2451. rc = -ENODEV;
  2452. goto fail;
  2453. }
  2454. memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
  2455. /* configure device according to the new ID */
  2456. rc = ata_dev_configure(dev, 0);
  2457. if (rc == 0)
  2458. return 0;
  2459. fail:
  2460. ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
  2461. return rc;
  2462. }
  2463. static const char * const ata_dma_blacklist [] = {
  2464. "WDC AC11000H", NULL,
  2465. "WDC AC22100H", NULL,
  2466. "WDC AC32500H", NULL,
  2467. "WDC AC33100H", NULL,
  2468. "WDC AC31600H", NULL,
  2469. "WDC AC32100H", "24.09P07",
  2470. "WDC AC23200L", "21.10N21",
  2471. "Compaq CRD-8241B", NULL,
  2472. "CRD-8400B", NULL,
  2473. "CRD-8480B", NULL,
  2474. "CRD-8482B", NULL,
  2475. "CRD-84", NULL,
  2476. "SanDisk SDP3B", NULL,
  2477. "SanDisk SDP3B-64", NULL,
  2478. "SANYO CD-ROM CRD", NULL,
  2479. "HITACHI CDR-8", NULL,
  2480. "HITACHI CDR-8335", NULL,
  2481. "HITACHI CDR-8435", NULL,
  2482. "Toshiba CD-ROM XM-6202B", NULL,
  2483. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2484. "CD-532E-A", NULL,
  2485. "E-IDE CD-ROM CR-840", NULL,
  2486. "CD-ROM Drive/F5A", NULL,
  2487. "WPI CDD-820", NULL,
  2488. "SAMSUNG CD-ROM SC-148C", NULL,
  2489. "SAMSUNG CD-ROM SC", NULL,
  2490. "SanDisk SDP3B-64", NULL,
  2491. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2492. "_NEC DV5800A", NULL,
  2493. "SAMSUNG CD-ROM SN-124", "N001"
  2494. };
  2495. static int ata_strim(char *s, size_t len)
  2496. {
  2497. len = strnlen(s, len);
  2498. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2499. while ((len > 0) && (s[len - 1] == ' ')) {
  2500. len--;
  2501. s[len] = 0;
  2502. }
  2503. return len;
  2504. }
  2505. static int ata_dma_blacklisted(const struct ata_device *dev)
  2506. {
  2507. unsigned char model_num[40];
  2508. unsigned char model_rev[16];
  2509. unsigned int nlen, rlen;
  2510. int i;
  2511. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2512. sizeof(model_num));
  2513. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2514. sizeof(model_rev));
  2515. nlen = ata_strim(model_num, sizeof(model_num));
  2516. rlen = ata_strim(model_rev, sizeof(model_rev));
  2517. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2518. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2519. if (ata_dma_blacklist[i+1] == NULL)
  2520. return 1;
  2521. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2522. return 1;
  2523. }
  2524. }
  2525. return 0;
  2526. }
  2527. /**
  2528. * ata_dev_xfermask - Compute supported xfermask of the given device
  2529. * @dev: Device to compute xfermask for
  2530. *
  2531. * Compute supported xfermask of @dev and store it in
  2532. * dev->*_mask. This function is responsible for applying all
  2533. * known limits including host controller limits, device
  2534. * blacklist, etc...
  2535. *
  2536. * FIXME: The current implementation limits all transfer modes to
  2537. * the fastest of the lowested device on the port. This is not
  2538. * required on most controllers.
  2539. *
  2540. * LOCKING:
  2541. * None.
  2542. */
  2543. static void ata_dev_xfermask(struct ata_device *dev)
  2544. {
  2545. struct ata_port *ap = dev->ap;
  2546. struct ata_host_set *hs = ap->host_set;
  2547. unsigned long xfer_mask;
  2548. int i;
  2549. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2550. ap->mwdma_mask, ap->udma_mask);
  2551. /* Apply cable rule here. Don't apply it early because when
  2552. * we handle hot plug the cable type can itself change.
  2553. */
  2554. if (ap->cbl == ATA_CBL_PATA40)
  2555. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2556. /* FIXME: Use port-wide xfermask for now */
  2557. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2558. struct ata_device *d = &ap->device[i];
  2559. if (ata_dev_absent(d))
  2560. continue;
  2561. if (ata_dev_disabled(d)) {
  2562. /* to avoid violating device selection timing */
  2563. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2564. UINT_MAX, UINT_MAX);
  2565. continue;
  2566. }
  2567. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2568. d->mwdma_mask, d->udma_mask);
  2569. xfer_mask &= ata_id_xfermask(d->id);
  2570. if (ata_dma_blacklisted(d))
  2571. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2572. }
  2573. if (ata_dma_blacklisted(dev))
  2574. ata_dev_printk(dev, KERN_WARNING,
  2575. "device is on DMA blacklist, disabling DMA\n");
  2576. if (hs->flags & ATA_HOST_SIMPLEX) {
  2577. if (hs->simplex_claimed)
  2578. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2579. }
  2580. if (ap->ops->mode_filter)
  2581. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2582. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2583. &dev->mwdma_mask, &dev->udma_mask);
  2584. }
  2585. /**
  2586. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2587. * @dev: Device to which command will be sent
  2588. *
  2589. * Issue SET FEATURES - XFER MODE command to device @dev
  2590. * on port @ap.
  2591. *
  2592. * LOCKING:
  2593. * PCI/etc. bus probe sem.
  2594. *
  2595. * RETURNS:
  2596. * 0 on success, AC_ERR_* mask otherwise.
  2597. */
  2598. static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
  2599. {
  2600. struct ata_taskfile tf;
  2601. unsigned int err_mask;
  2602. /* set up set-features taskfile */
  2603. DPRINTK("set features - xfer mode\n");
  2604. ata_tf_init(dev, &tf);
  2605. tf.command = ATA_CMD_SET_FEATURES;
  2606. tf.feature = SETFEATURES_XFER;
  2607. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2608. tf.protocol = ATA_PROT_NODATA;
  2609. tf.nsect = dev->xfer_mode;
  2610. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2611. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2612. return err_mask;
  2613. }
  2614. /**
  2615. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2616. * @dev: Device to which command will be sent
  2617. * @heads: Number of heads
  2618. * @sectors: Number of sectors
  2619. *
  2620. * LOCKING:
  2621. * Kernel thread context (may sleep)
  2622. *
  2623. * RETURNS:
  2624. * 0 on success, AC_ERR_* mask otherwise.
  2625. */
  2626. static unsigned int ata_dev_init_params(struct ata_device *dev,
  2627. u16 heads, u16 sectors)
  2628. {
  2629. struct ata_taskfile tf;
  2630. unsigned int err_mask;
  2631. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2632. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2633. return AC_ERR_INVALID;
  2634. /* set up init dev params taskfile */
  2635. DPRINTK("init dev params \n");
  2636. ata_tf_init(dev, &tf);
  2637. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2638. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2639. tf.protocol = ATA_PROT_NODATA;
  2640. tf.nsect = sectors;
  2641. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2642. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2643. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2644. return err_mask;
  2645. }
  2646. /**
  2647. * ata_sg_clean - Unmap DMA memory associated with command
  2648. * @qc: Command containing DMA memory to be released
  2649. *
  2650. * Unmap all mapped DMA memory associated with this command.
  2651. *
  2652. * LOCKING:
  2653. * spin_lock_irqsave(host_set lock)
  2654. */
  2655. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2656. {
  2657. struct ata_port *ap = qc->ap;
  2658. struct scatterlist *sg = qc->__sg;
  2659. int dir = qc->dma_dir;
  2660. void *pad_buf = NULL;
  2661. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2662. WARN_ON(sg == NULL);
  2663. if (qc->flags & ATA_QCFLAG_SINGLE)
  2664. WARN_ON(qc->n_elem > 1);
  2665. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2666. /* if we padded the buffer out to 32-bit bound, and data
  2667. * xfer direction is from-device, we must copy from the
  2668. * pad buffer back into the supplied buffer
  2669. */
  2670. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2671. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2672. if (qc->flags & ATA_QCFLAG_SG) {
  2673. if (qc->n_elem)
  2674. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2675. /* restore last sg */
  2676. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2677. if (pad_buf) {
  2678. struct scatterlist *psg = &qc->pad_sgent;
  2679. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2680. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2681. kunmap_atomic(addr, KM_IRQ0);
  2682. }
  2683. } else {
  2684. if (qc->n_elem)
  2685. dma_unmap_single(ap->dev,
  2686. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2687. dir);
  2688. /* restore sg */
  2689. sg->length += qc->pad_len;
  2690. if (pad_buf)
  2691. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2692. pad_buf, qc->pad_len);
  2693. }
  2694. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2695. qc->__sg = NULL;
  2696. }
  2697. /**
  2698. * ata_fill_sg - Fill PCI IDE PRD table
  2699. * @qc: Metadata associated with taskfile to be transferred
  2700. *
  2701. * Fill PCI IDE PRD (scatter-gather) table with segments
  2702. * associated with the current disk command.
  2703. *
  2704. * LOCKING:
  2705. * spin_lock_irqsave(host_set lock)
  2706. *
  2707. */
  2708. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2709. {
  2710. struct ata_port *ap = qc->ap;
  2711. struct scatterlist *sg;
  2712. unsigned int idx;
  2713. WARN_ON(qc->__sg == NULL);
  2714. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2715. idx = 0;
  2716. ata_for_each_sg(sg, qc) {
  2717. u32 addr, offset;
  2718. u32 sg_len, len;
  2719. /* determine if physical DMA addr spans 64K boundary.
  2720. * Note h/w doesn't support 64-bit, so we unconditionally
  2721. * truncate dma_addr_t to u32.
  2722. */
  2723. addr = (u32) sg_dma_address(sg);
  2724. sg_len = sg_dma_len(sg);
  2725. while (sg_len) {
  2726. offset = addr & 0xffff;
  2727. len = sg_len;
  2728. if ((offset + sg_len) > 0x10000)
  2729. len = 0x10000 - offset;
  2730. ap->prd[idx].addr = cpu_to_le32(addr);
  2731. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2732. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2733. idx++;
  2734. sg_len -= len;
  2735. addr += len;
  2736. }
  2737. }
  2738. if (idx)
  2739. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2740. }
  2741. /**
  2742. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2743. * @qc: Metadata associated with taskfile to check
  2744. *
  2745. * Allow low-level driver to filter ATA PACKET commands, returning
  2746. * a status indicating whether or not it is OK to use DMA for the
  2747. * supplied PACKET command.
  2748. *
  2749. * LOCKING:
  2750. * spin_lock_irqsave(host_set lock)
  2751. *
  2752. * RETURNS: 0 when ATAPI DMA can be used
  2753. * nonzero otherwise
  2754. */
  2755. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2756. {
  2757. struct ata_port *ap = qc->ap;
  2758. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2759. if (ap->ops->check_atapi_dma)
  2760. rc = ap->ops->check_atapi_dma(qc);
  2761. /* We don't support polling DMA.
  2762. * Use PIO if the LLDD handles only interrupts in
  2763. * the HSM_ST_LAST state and the ATAPI device
  2764. * generates CDB interrupts.
  2765. */
  2766. if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
  2767. (qc->dev->flags & ATA_DFLAG_CDB_INTR))
  2768. rc = 1;
  2769. return rc;
  2770. }
  2771. /**
  2772. * ata_qc_prep - Prepare taskfile for submission
  2773. * @qc: Metadata associated with taskfile to be prepared
  2774. *
  2775. * Prepare ATA taskfile for submission.
  2776. *
  2777. * LOCKING:
  2778. * spin_lock_irqsave(host_set lock)
  2779. */
  2780. void ata_qc_prep(struct ata_queued_cmd *qc)
  2781. {
  2782. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2783. return;
  2784. ata_fill_sg(qc);
  2785. }
  2786. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2787. /**
  2788. * ata_sg_init_one - Associate command with memory buffer
  2789. * @qc: Command to be associated
  2790. * @buf: Memory buffer
  2791. * @buflen: Length of memory buffer, in bytes.
  2792. *
  2793. * Initialize the data-related elements of queued_cmd @qc
  2794. * to point to a single memory buffer, @buf of byte length @buflen.
  2795. *
  2796. * LOCKING:
  2797. * spin_lock_irqsave(host_set lock)
  2798. */
  2799. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2800. {
  2801. struct scatterlist *sg;
  2802. qc->flags |= ATA_QCFLAG_SINGLE;
  2803. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2804. qc->__sg = &qc->sgent;
  2805. qc->n_elem = 1;
  2806. qc->orig_n_elem = 1;
  2807. qc->buf_virt = buf;
  2808. sg = qc->__sg;
  2809. sg_init_one(sg, buf, buflen);
  2810. }
  2811. /**
  2812. * ata_sg_init - Associate command with scatter-gather table.
  2813. * @qc: Command to be associated
  2814. * @sg: Scatter-gather table.
  2815. * @n_elem: Number of elements in s/g table.
  2816. *
  2817. * Initialize the data-related elements of queued_cmd @qc
  2818. * to point to a scatter-gather table @sg, containing @n_elem
  2819. * elements.
  2820. *
  2821. * LOCKING:
  2822. * spin_lock_irqsave(host_set lock)
  2823. */
  2824. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2825. unsigned int n_elem)
  2826. {
  2827. qc->flags |= ATA_QCFLAG_SG;
  2828. qc->__sg = sg;
  2829. qc->n_elem = n_elem;
  2830. qc->orig_n_elem = n_elem;
  2831. }
  2832. /**
  2833. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2834. * @qc: Command with memory buffer to be mapped.
  2835. *
  2836. * DMA-map the memory buffer associated with queued_cmd @qc.
  2837. *
  2838. * LOCKING:
  2839. * spin_lock_irqsave(host_set lock)
  2840. *
  2841. * RETURNS:
  2842. * Zero on success, negative on error.
  2843. */
  2844. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2845. {
  2846. struct ata_port *ap = qc->ap;
  2847. int dir = qc->dma_dir;
  2848. struct scatterlist *sg = qc->__sg;
  2849. dma_addr_t dma_address;
  2850. int trim_sg = 0;
  2851. /* we must lengthen transfers to end on a 32-bit boundary */
  2852. qc->pad_len = sg->length & 3;
  2853. if (qc->pad_len) {
  2854. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2855. struct scatterlist *psg = &qc->pad_sgent;
  2856. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2857. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2858. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2859. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2860. qc->pad_len);
  2861. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2862. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2863. /* trim sg */
  2864. sg->length -= qc->pad_len;
  2865. if (sg->length == 0)
  2866. trim_sg = 1;
  2867. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2868. sg->length, qc->pad_len);
  2869. }
  2870. if (trim_sg) {
  2871. qc->n_elem--;
  2872. goto skip_map;
  2873. }
  2874. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2875. sg->length, dir);
  2876. if (dma_mapping_error(dma_address)) {
  2877. /* restore sg */
  2878. sg->length += qc->pad_len;
  2879. return -1;
  2880. }
  2881. sg_dma_address(sg) = dma_address;
  2882. sg_dma_len(sg) = sg->length;
  2883. skip_map:
  2884. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2885. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2886. return 0;
  2887. }
  2888. /**
  2889. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2890. * @qc: Command with scatter-gather table to be mapped.
  2891. *
  2892. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2893. *
  2894. * LOCKING:
  2895. * spin_lock_irqsave(host_set lock)
  2896. *
  2897. * RETURNS:
  2898. * Zero on success, negative on error.
  2899. *
  2900. */
  2901. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2902. {
  2903. struct ata_port *ap = qc->ap;
  2904. struct scatterlist *sg = qc->__sg;
  2905. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2906. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2907. VPRINTK("ENTER, ata%u\n", ap->id);
  2908. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2909. /* we must lengthen transfers to end on a 32-bit boundary */
  2910. qc->pad_len = lsg->length & 3;
  2911. if (qc->pad_len) {
  2912. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2913. struct scatterlist *psg = &qc->pad_sgent;
  2914. unsigned int offset;
  2915. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2916. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2917. /*
  2918. * psg->page/offset are used to copy to-be-written
  2919. * data in this function or read data in ata_sg_clean.
  2920. */
  2921. offset = lsg->offset + lsg->length - qc->pad_len;
  2922. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2923. psg->offset = offset_in_page(offset);
  2924. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2925. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2926. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2927. kunmap_atomic(addr, KM_IRQ0);
  2928. }
  2929. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2930. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2931. /* trim last sg */
  2932. lsg->length -= qc->pad_len;
  2933. if (lsg->length == 0)
  2934. trim_sg = 1;
  2935. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2936. qc->n_elem - 1, lsg->length, qc->pad_len);
  2937. }
  2938. pre_n_elem = qc->n_elem;
  2939. if (trim_sg && pre_n_elem)
  2940. pre_n_elem--;
  2941. if (!pre_n_elem) {
  2942. n_elem = 0;
  2943. goto skip_map;
  2944. }
  2945. dir = qc->dma_dir;
  2946. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2947. if (n_elem < 1) {
  2948. /* restore last sg */
  2949. lsg->length += qc->pad_len;
  2950. return -1;
  2951. }
  2952. DPRINTK("%d sg elements mapped\n", n_elem);
  2953. skip_map:
  2954. qc->n_elem = n_elem;
  2955. return 0;
  2956. }
  2957. /**
  2958. * swap_buf_le16 - swap halves of 16-bit words in place
  2959. * @buf: Buffer to swap
  2960. * @buf_words: Number of 16-bit words in buffer.
  2961. *
  2962. * Swap halves of 16-bit words if needed to convert from
  2963. * little-endian byte order to native cpu byte order, or
  2964. * vice-versa.
  2965. *
  2966. * LOCKING:
  2967. * Inherited from caller.
  2968. */
  2969. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  2970. {
  2971. #ifdef __BIG_ENDIAN
  2972. unsigned int i;
  2973. for (i = 0; i < buf_words; i++)
  2974. buf[i] = le16_to_cpu(buf[i]);
  2975. #endif /* __BIG_ENDIAN */
  2976. }
  2977. /**
  2978. * ata_mmio_data_xfer - Transfer data by MMIO
  2979. * @ap: port to read/write
  2980. * @buf: data buffer
  2981. * @buflen: buffer length
  2982. * @write_data: read/write
  2983. *
  2984. * Transfer data from/to the device data register by MMIO.
  2985. *
  2986. * LOCKING:
  2987. * Inherited from caller.
  2988. */
  2989. static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
  2990. unsigned int buflen, int write_data)
  2991. {
  2992. unsigned int i;
  2993. unsigned int words = buflen >> 1;
  2994. u16 *buf16 = (u16 *) buf;
  2995. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  2996. /* Transfer multiple of 2 bytes */
  2997. if (write_data) {
  2998. for (i = 0; i < words; i++)
  2999. writew(le16_to_cpu(buf16[i]), mmio);
  3000. } else {
  3001. for (i = 0; i < words; i++)
  3002. buf16[i] = cpu_to_le16(readw(mmio));
  3003. }
  3004. /* Transfer trailing 1 byte, if any. */
  3005. if (unlikely(buflen & 0x01)) {
  3006. u16 align_buf[1] = { 0 };
  3007. unsigned char *trailing_buf = buf + buflen - 1;
  3008. if (write_data) {
  3009. memcpy(align_buf, trailing_buf, 1);
  3010. writew(le16_to_cpu(align_buf[0]), mmio);
  3011. } else {
  3012. align_buf[0] = cpu_to_le16(readw(mmio));
  3013. memcpy(trailing_buf, align_buf, 1);
  3014. }
  3015. }
  3016. }
  3017. /**
  3018. * ata_pio_data_xfer - Transfer data by PIO
  3019. * @ap: port to read/write
  3020. * @buf: data buffer
  3021. * @buflen: buffer length
  3022. * @write_data: read/write
  3023. *
  3024. * Transfer data from/to the device data register by PIO.
  3025. *
  3026. * LOCKING:
  3027. * Inherited from caller.
  3028. */
  3029. static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3030. unsigned int buflen, int write_data)
  3031. {
  3032. unsigned int words = buflen >> 1;
  3033. /* Transfer multiple of 2 bytes */
  3034. if (write_data)
  3035. outsw(ap->ioaddr.data_addr, buf, words);
  3036. else
  3037. insw(ap->ioaddr.data_addr, buf, words);
  3038. /* Transfer trailing 1 byte, if any. */
  3039. if (unlikely(buflen & 0x01)) {
  3040. u16 align_buf[1] = { 0 };
  3041. unsigned char *trailing_buf = buf + buflen - 1;
  3042. if (write_data) {
  3043. memcpy(align_buf, trailing_buf, 1);
  3044. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3045. } else {
  3046. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3047. memcpy(trailing_buf, align_buf, 1);
  3048. }
  3049. }
  3050. }
  3051. /**
  3052. * ata_data_xfer - Transfer data from/to the data register.
  3053. * @ap: port to read/write
  3054. * @buf: data buffer
  3055. * @buflen: buffer length
  3056. * @do_write: read/write
  3057. *
  3058. * Transfer data from/to the device data register.
  3059. *
  3060. * LOCKING:
  3061. * Inherited from caller.
  3062. */
  3063. static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
  3064. unsigned int buflen, int do_write)
  3065. {
  3066. /* Make the crap hardware pay the costs not the good stuff */
  3067. if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
  3068. unsigned long flags;
  3069. local_irq_save(flags);
  3070. if (ap->flags & ATA_FLAG_MMIO)
  3071. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3072. else
  3073. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3074. local_irq_restore(flags);
  3075. } else {
  3076. if (ap->flags & ATA_FLAG_MMIO)
  3077. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3078. else
  3079. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3080. }
  3081. }
  3082. /**
  3083. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3084. * @qc: Command on going
  3085. *
  3086. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3087. *
  3088. * LOCKING:
  3089. * Inherited from caller.
  3090. */
  3091. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3092. {
  3093. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3094. struct scatterlist *sg = qc->__sg;
  3095. struct ata_port *ap = qc->ap;
  3096. struct page *page;
  3097. unsigned int offset;
  3098. unsigned char *buf;
  3099. if (qc->cursect == (qc->nsect - 1))
  3100. ap->hsm_task_state = HSM_ST_LAST;
  3101. page = sg[qc->cursg].page;
  3102. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3103. /* get the current page and offset */
  3104. page = nth_page(page, (offset >> PAGE_SHIFT));
  3105. offset %= PAGE_SIZE;
  3106. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3107. if (PageHighMem(page)) {
  3108. unsigned long flags;
  3109. local_irq_save(flags);
  3110. buf = kmap_atomic(page, KM_IRQ0);
  3111. /* do the actual data transfer */
  3112. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  3113. kunmap_atomic(buf, KM_IRQ0);
  3114. local_irq_restore(flags);
  3115. } else {
  3116. buf = page_address(page);
  3117. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  3118. }
  3119. qc->cursect++;
  3120. qc->cursg_ofs++;
  3121. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3122. qc->cursg++;
  3123. qc->cursg_ofs = 0;
  3124. }
  3125. }
  3126. /**
  3127. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  3128. * @qc: Command on going
  3129. *
  3130. * Transfer one or many ATA_SECT_SIZE of data from/to the
  3131. * ATA device for the DRQ request.
  3132. *
  3133. * LOCKING:
  3134. * Inherited from caller.
  3135. */
  3136. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  3137. {
  3138. if (is_multi_taskfile(&qc->tf)) {
  3139. /* READ/WRITE MULTIPLE */
  3140. unsigned int nsect;
  3141. WARN_ON(qc->dev->multi_count == 0);
  3142. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  3143. while (nsect--)
  3144. ata_pio_sector(qc);
  3145. } else
  3146. ata_pio_sector(qc);
  3147. }
  3148. /**
  3149. * atapi_send_cdb - Write CDB bytes to hardware
  3150. * @ap: Port to which ATAPI device is attached.
  3151. * @qc: Taskfile currently active
  3152. *
  3153. * When device has indicated its readiness to accept
  3154. * a CDB, this function is called. Send the CDB.
  3155. *
  3156. * LOCKING:
  3157. * caller.
  3158. */
  3159. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  3160. {
  3161. /* send SCSI cdb */
  3162. DPRINTK("send cdb\n");
  3163. WARN_ON(qc->dev->cdb_len < 12);
  3164. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3165. ata_altstatus(ap); /* flush */
  3166. switch (qc->tf.protocol) {
  3167. case ATA_PROT_ATAPI:
  3168. ap->hsm_task_state = HSM_ST;
  3169. break;
  3170. case ATA_PROT_ATAPI_NODATA:
  3171. ap->hsm_task_state = HSM_ST_LAST;
  3172. break;
  3173. case ATA_PROT_ATAPI_DMA:
  3174. ap->hsm_task_state = HSM_ST_LAST;
  3175. /* initiate bmdma */
  3176. ap->ops->bmdma_start(qc);
  3177. break;
  3178. }
  3179. }
  3180. /**
  3181. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3182. * @qc: Command on going
  3183. * @bytes: number of bytes
  3184. *
  3185. * Transfer Transfer data from/to the ATAPI device.
  3186. *
  3187. * LOCKING:
  3188. * Inherited from caller.
  3189. *
  3190. */
  3191. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3192. {
  3193. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3194. struct scatterlist *sg = qc->__sg;
  3195. struct ata_port *ap = qc->ap;
  3196. struct page *page;
  3197. unsigned char *buf;
  3198. unsigned int offset, count;
  3199. if (qc->curbytes + bytes >= qc->nbytes)
  3200. ap->hsm_task_state = HSM_ST_LAST;
  3201. next_sg:
  3202. if (unlikely(qc->cursg >= qc->n_elem)) {
  3203. /*
  3204. * The end of qc->sg is reached and the device expects
  3205. * more data to transfer. In order not to overrun qc->sg
  3206. * and fulfill length specified in the byte count register,
  3207. * - for read case, discard trailing data from the device
  3208. * - for write case, padding zero data to the device
  3209. */
  3210. u16 pad_buf[1] = { 0 };
  3211. unsigned int words = bytes >> 1;
  3212. unsigned int i;
  3213. if (words) /* warning if bytes > 1 */
  3214. ata_dev_printk(qc->dev, KERN_WARNING,
  3215. "%u bytes trailing data\n", bytes);
  3216. for (i = 0; i < words; i++)
  3217. ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
  3218. ap->hsm_task_state = HSM_ST_LAST;
  3219. return;
  3220. }
  3221. sg = &qc->__sg[qc->cursg];
  3222. page = sg->page;
  3223. offset = sg->offset + qc->cursg_ofs;
  3224. /* get the current page and offset */
  3225. page = nth_page(page, (offset >> PAGE_SHIFT));
  3226. offset %= PAGE_SIZE;
  3227. /* don't overrun current sg */
  3228. count = min(sg->length - qc->cursg_ofs, bytes);
  3229. /* don't cross page boundaries */
  3230. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3231. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3232. if (PageHighMem(page)) {
  3233. unsigned long flags;
  3234. local_irq_save(flags);
  3235. buf = kmap_atomic(page, KM_IRQ0);
  3236. /* do the actual data transfer */
  3237. ata_data_xfer(ap, buf + offset, count, do_write);
  3238. kunmap_atomic(buf, KM_IRQ0);
  3239. local_irq_restore(flags);
  3240. } else {
  3241. buf = page_address(page);
  3242. ata_data_xfer(ap, buf + offset, count, do_write);
  3243. }
  3244. bytes -= count;
  3245. qc->curbytes += count;
  3246. qc->cursg_ofs += count;
  3247. if (qc->cursg_ofs == sg->length) {
  3248. qc->cursg++;
  3249. qc->cursg_ofs = 0;
  3250. }
  3251. if (bytes)
  3252. goto next_sg;
  3253. }
  3254. /**
  3255. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3256. * @qc: Command on going
  3257. *
  3258. * Transfer Transfer data from/to the ATAPI device.
  3259. *
  3260. * LOCKING:
  3261. * Inherited from caller.
  3262. */
  3263. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3264. {
  3265. struct ata_port *ap = qc->ap;
  3266. struct ata_device *dev = qc->dev;
  3267. unsigned int ireason, bc_lo, bc_hi, bytes;
  3268. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3269. ap->ops->tf_read(ap, &qc->tf);
  3270. ireason = qc->tf.nsect;
  3271. bc_lo = qc->tf.lbam;
  3272. bc_hi = qc->tf.lbah;
  3273. bytes = (bc_hi << 8) | bc_lo;
  3274. /* shall be cleared to zero, indicating xfer of data */
  3275. if (ireason & (1 << 0))
  3276. goto err_out;
  3277. /* make sure transfer direction matches expected */
  3278. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3279. if (do_write != i_write)
  3280. goto err_out;
  3281. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3282. __atapi_pio_bytes(qc, bytes);
  3283. return;
  3284. err_out:
  3285. ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
  3286. qc->err_mask |= AC_ERR_HSM;
  3287. ap->hsm_task_state = HSM_ST_ERR;
  3288. }
  3289. /**
  3290. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  3291. * @ap: the target ata_port
  3292. * @qc: qc on going
  3293. *
  3294. * RETURNS:
  3295. * 1 if ok in workqueue, 0 otherwise.
  3296. */
  3297. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  3298. {
  3299. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3300. return 1;
  3301. if (ap->hsm_task_state == HSM_ST_FIRST) {
  3302. if (qc->tf.protocol == ATA_PROT_PIO &&
  3303. (qc->tf.flags & ATA_TFLAG_WRITE))
  3304. return 1;
  3305. if (is_atapi_taskfile(&qc->tf) &&
  3306. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3307. return 1;
  3308. }
  3309. return 0;
  3310. }
  3311. /**
  3312. * ata_hsm_qc_complete - finish a qc running on standard HSM
  3313. * @qc: Command to complete
  3314. * @in_wq: 1 if called from workqueue, 0 otherwise
  3315. *
  3316. * Finish @qc which is running on standard HSM.
  3317. *
  3318. * LOCKING:
  3319. * If @in_wq is zero, spin_lock_irqsave(host_set lock).
  3320. * Otherwise, none on entry and grabs host lock.
  3321. */
  3322. static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
  3323. {
  3324. struct ata_port *ap = qc->ap;
  3325. unsigned long flags;
  3326. if (ap->ops->error_handler) {
  3327. if (in_wq) {
  3328. spin_lock_irqsave(&ap->host_set->lock, flags);
  3329. /* EH might have kicked in while host_set lock
  3330. * is released.
  3331. */
  3332. qc = ata_qc_from_tag(ap, qc->tag);
  3333. if (qc) {
  3334. if (likely(!(qc->err_mask & AC_ERR_HSM))) {
  3335. ata_irq_on(ap);
  3336. ata_qc_complete(qc);
  3337. } else
  3338. ata_port_freeze(ap);
  3339. }
  3340. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3341. } else {
  3342. if (likely(!(qc->err_mask & AC_ERR_HSM)))
  3343. ata_qc_complete(qc);
  3344. else
  3345. ata_port_freeze(ap);
  3346. }
  3347. } else {
  3348. if (in_wq) {
  3349. spin_lock_irqsave(&ap->host_set->lock, flags);
  3350. ata_irq_on(ap);
  3351. ata_qc_complete(qc);
  3352. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3353. } else
  3354. ata_qc_complete(qc);
  3355. }
  3356. }
  3357. /**
  3358. * ata_hsm_move - move the HSM to the next state.
  3359. * @ap: the target ata_port
  3360. * @qc: qc on going
  3361. * @status: current device status
  3362. * @in_wq: 1 if called from workqueue, 0 otherwise
  3363. *
  3364. * RETURNS:
  3365. * 1 when poll next status needed, 0 otherwise.
  3366. */
  3367. static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3368. u8 status, int in_wq)
  3369. {
  3370. unsigned long flags = 0;
  3371. int poll_next;
  3372. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3373. /* Make sure ata_qc_issue_prot() does not throw things
  3374. * like DMA polling into the workqueue. Notice that
  3375. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3376. */
  3377. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  3378. fsm_start:
  3379. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3380. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3381. switch (ap->hsm_task_state) {
  3382. case HSM_ST_FIRST:
  3383. /* Send first data block or PACKET CDB */
  3384. /* If polling, we will stay in the work queue after
  3385. * sending the data. Otherwise, interrupt handler
  3386. * takes over after sending the data.
  3387. */
  3388. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3389. /* check device status */
  3390. if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
  3391. /* Wrong status. Let EH handle this */
  3392. qc->err_mask |= AC_ERR_HSM;
  3393. ap->hsm_task_state = HSM_ST_ERR;
  3394. goto fsm_start;
  3395. }
  3396. /* Device should not ask for data transfer (DRQ=1)
  3397. * when it finds something wrong.
  3398. * We ignore DRQ here and stop the HSM by
  3399. * changing hsm_task_state to HSM_ST_ERR and
  3400. * let the EH abort the command or reset the device.
  3401. */
  3402. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3403. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3404. ap->id, status);
  3405. qc->err_mask |= AC_ERR_DEV;
  3406. ap->hsm_task_state = HSM_ST_ERR;
  3407. goto fsm_start;
  3408. }
  3409. /* Send the CDB (atapi) or the first data block (ata pio out).
  3410. * During the state transition, interrupt handler shouldn't
  3411. * be invoked before the data transfer is complete and
  3412. * hsm_task_state is changed. Hence, the following locking.
  3413. */
  3414. if (in_wq)
  3415. spin_lock_irqsave(&ap->host_set->lock, flags);
  3416. if (qc->tf.protocol == ATA_PROT_PIO) {
  3417. /* PIO data out protocol.
  3418. * send first data block.
  3419. */
  3420. /* ata_pio_sectors() might change the state
  3421. * to HSM_ST_LAST. so, the state is changed here
  3422. * before ata_pio_sectors().
  3423. */
  3424. ap->hsm_task_state = HSM_ST;
  3425. ata_pio_sectors(qc);
  3426. ata_altstatus(ap); /* flush */
  3427. } else
  3428. /* send CDB */
  3429. atapi_send_cdb(ap, qc);
  3430. if (in_wq)
  3431. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3432. /* if polling, ata_pio_task() handles the rest.
  3433. * otherwise, interrupt handler takes over from here.
  3434. */
  3435. break;
  3436. case HSM_ST:
  3437. /* complete command or read/write the data register */
  3438. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3439. /* ATAPI PIO protocol */
  3440. if ((status & ATA_DRQ) == 0) {
  3441. /* no more data to transfer */
  3442. ap->hsm_task_state = HSM_ST_LAST;
  3443. goto fsm_start;
  3444. }
  3445. /* Device should not ask for data transfer (DRQ=1)
  3446. * when it finds something wrong.
  3447. * We ignore DRQ here and stop the HSM by
  3448. * changing hsm_task_state to HSM_ST_ERR and
  3449. * let the EH abort the command or reset the device.
  3450. */
  3451. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3452. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3453. ap->id, status);
  3454. qc->err_mask |= AC_ERR_DEV;
  3455. ap->hsm_task_state = HSM_ST_ERR;
  3456. goto fsm_start;
  3457. }
  3458. atapi_pio_bytes(qc);
  3459. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3460. /* bad ireason reported by device */
  3461. goto fsm_start;
  3462. } else {
  3463. /* ATA PIO protocol */
  3464. if (unlikely((status & ATA_DRQ) == 0)) {
  3465. /* handle BSY=0, DRQ=0 as error */
  3466. qc->err_mask |= AC_ERR_HSM;
  3467. ap->hsm_task_state = HSM_ST_ERR;
  3468. goto fsm_start;
  3469. }
  3470. /* For PIO reads, some devices may ask for
  3471. * data transfer (DRQ=1) alone with ERR=1.
  3472. * We respect DRQ here and transfer one
  3473. * block of junk data before changing the
  3474. * hsm_task_state to HSM_ST_ERR.
  3475. *
  3476. * For PIO writes, ERR=1 DRQ=1 doesn't make
  3477. * sense since the data block has been
  3478. * transferred to the device.
  3479. */
  3480. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3481. /* data might be corrputed */
  3482. qc->err_mask |= AC_ERR_DEV;
  3483. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  3484. ata_pio_sectors(qc);
  3485. ata_altstatus(ap);
  3486. status = ata_wait_idle(ap);
  3487. }
  3488. /* ata_pio_sectors() might change the
  3489. * state to HSM_ST_LAST. so, the state
  3490. * is changed after ata_pio_sectors().
  3491. */
  3492. ap->hsm_task_state = HSM_ST_ERR;
  3493. goto fsm_start;
  3494. }
  3495. ata_pio_sectors(qc);
  3496. if (ap->hsm_task_state == HSM_ST_LAST &&
  3497. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3498. /* all data read */
  3499. ata_altstatus(ap);
  3500. status = ata_wait_idle(ap);
  3501. goto fsm_start;
  3502. }
  3503. }
  3504. ata_altstatus(ap); /* flush */
  3505. poll_next = 1;
  3506. break;
  3507. case HSM_ST_LAST:
  3508. if (unlikely(!ata_ok(status))) {
  3509. qc->err_mask |= __ac_err_mask(status);
  3510. ap->hsm_task_state = HSM_ST_ERR;
  3511. goto fsm_start;
  3512. }
  3513. /* no more data to transfer */
  3514. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  3515. ap->id, qc->dev->devno, status);
  3516. WARN_ON(qc->err_mask);
  3517. ap->hsm_task_state = HSM_ST_IDLE;
  3518. /* complete taskfile transaction */
  3519. ata_hsm_qc_complete(qc, in_wq);
  3520. poll_next = 0;
  3521. break;
  3522. case HSM_ST_ERR:
  3523. /* make sure qc->err_mask is available to
  3524. * know what's wrong and recover
  3525. */
  3526. WARN_ON(qc->err_mask == 0);
  3527. ap->hsm_task_state = HSM_ST_IDLE;
  3528. /* complete taskfile transaction */
  3529. ata_hsm_qc_complete(qc, in_wq);
  3530. poll_next = 0;
  3531. break;
  3532. default:
  3533. poll_next = 0;
  3534. BUG();
  3535. }
  3536. return poll_next;
  3537. }
  3538. static void ata_pio_task(void *_data)
  3539. {
  3540. struct ata_queued_cmd *qc = _data;
  3541. struct ata_port *ap = qc->ap;
  3542. u8 status;
  3543. int poll_next;
  3544. fsm_start:
  3545. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  3546. /*
  3547. * This is purely heuristic. This is a fast path.
  3548. * Sometimes when we enter, BSY will be cleared in
  3549. * a chk-status or two. If not, the drive is probably seeking
  3550. * or something. Snooze for a couple msecs, then
  3551. * chk-status again. If still busy, queue delayed work.
  3552. */
  3553. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3554. if (status & ATA_BUSY) {
  3555. msleep(2);
  3556. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3557. if (status & ATA_BUSY) {
  3558. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  3559. return;
  3560. }
  3561. }
  3562. /* move the HSM */
  3563. poll_next = ata_hsm_move(ap, qc, status, 1);
  3564. /* another command or interrupt handler
  3565. * may be running at this point.
  3566. */
  3567. if (poll_next)
  3568. goto fsm_start;
  3569. }
  3570. /**
  3571. * ata_qc_new - Request an available ATA command, for queueing
  3572. * @ap: Port associated with device @dev
  3573. * @dev: Device from whom we request an available command structure
  3574. *
  3575. * LOCKING:
  3576. * None.
  3577. */
  3578. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3579. {
  3580. struct ata_queued_cmd *qc = NULL;
  3581. unsigned int i;
  3582. /* no command while frozen */
  3583. if (unlikely(ap->flags & ATA_FLAG_FROZEN))
  3584. return NULL;
  3585. /* the last tag is reserved for internal command. */
  3586. for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
  3587. if (!test_and_set_bit(i, &ap->qc_allocated)) {
  3588. qc = __ata_qc_from_tag(ap, i);
  3589. break;
  3590. }
  3591. if (qc)
  3592. qc->tag = i;
  3593. return qc;
  3594. }
  3595. /**
  3596. * ata_qc_new_init - Request an available ATA command, and initialize it
  3597. * @dev: Device from whom we request an available command structure
  3598. *
  3599. * LOCKING:
  3600. * None.
  3601. */
  3602. struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
  3603. {
  3604. struct ata_port *ap = dev->ap;
  3605. struct ata_queued_cmd *qc;
  3606. qc = ata_qc_new(ap);
  3607. if (qc) {
  3608. qc->scsicmd = NULL;
  3609. qc->ap = ap;
  3610. qc->dev = dev;
  3611. ata_qc_reinit(qc);
  3612. }
  3613. return qc;
  3614. }
  3615. /**
  3616. * ata_qc_free - free unused ata_queued_cmd
  3617. * @qc: Command to complete
  3618. *
  3619. * Designed to free unused ata_queued_cmd object
  3620. * in case something prevents using it.
  3621. *
  3622. * LOCKING:
  3623. * spin_lock_irqsave(host_set lock)
  3624. */
  3625. void ata_qc_free(struct ata_queued_cmd *qc)
  3626. {
  3627. struct ata_port *ap = qc->ap;
  3628. unsigned int tag;
  3629. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3630. qc->flags = 0;
  3631. tag = qc->tag;
  3632. if (likely(ata_tag_valid(tag))) {
  3633. qc->tag = ATA_TAG_POISON;
  3634. clear_bit(tag, &ap->qc_allocated);
  3635. }
  3636. }
  3637. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3638. {
  3639. struct ata_port *ap = qc->ap;
  3640. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3641. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3642. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3643. ata_sg_clean(qc);
  3644. /* command should be marked inactive atomically with qc completion */
  3645. if (qc->tf.protocol == ATA_PROT_NCQ)
  3646. ap->sactive &= ~(1 << qc->tag);
  3647. else
  3648. ap->active_tag = ATA_TAG_POISON;
  3649. /* atapi: mark qc as inactive to prevent the interrupt handler
  3650. * from completing the command twice later, before the error handler
  3651. * is called. (when rc != 0 and atapi request sense is needed)
  3652. */
  3653. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3654. ap->qc_active &= ~(1 << qc->tag);
  3655. /* call completion callback */
  3656. qc->complete_fn(qc);
  3657. }
  3658. /**
  3659. * ata_qc_complete - Complete an active ATA command
  3660. * @qc: Command to complete
  3661. * @err_mask: ATA Status register contents
  3662. *
  3663. * Indicate to the mid and upper layers that an ATA
  3664. * command has completed, with either an ok or not-ok status.
  3665. *
  3666. * LOCKING:
  3667. * spin_lock_irqsave(host_set lock)
  3668. */
  3669. void ata_qc_complete(struct ata_queued_cmd *qc)
  3670. {
  3671. struct ata_port *ap = qc->ap;
  3672. /* XXX: New EH and old EH use different mechanisms to
  3673. * synchronize EH with regular execution path.
  3674. *
  3675. * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
  3676. * Normal execution path is responsible for not accessing a
  3677. * failed qc. libata core enforces the rule by returning NULL
  3678. * from ata_qc_from_tag() for failed qcs.
  3679. *
  3680. * Old EH depends on ata_qc_complete() nullifying completion
  3681. * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
  3682. * not synchronize with interrupt handler. Only PIO task is
  3683. * taken care of.
  3684. */
  3685. if (ap->ops->error_handler) {
  3686. WARN_ON(ap->flags & ATA_FLAG_FROZEN);
  3687. if (unlikely(qc->err_mask))
  3688. qc->flags |= ATA_QCFLAG_FAILED;
  3689. if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
  3690. if (!ata_tag_internal(qc->tag)) {
  3691. /* always fill result TF for failed qc */
  3692. ap->ops->tf_read(ap, &qc->result_tf);
  3693. ata_qc_schedule_eh(qc);
  3694. return;
  3695. }
  3696. }
  3697. /* read result TF if requested */
  3698. if (qc->flags & ATA_QCFLAG_RESULT_TF)
  3699. ap->ops->tf_read(ap, &qc->result_tf);
  3700. __ata_qc_complete(qc);
  3701. } else {
  3702. if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
  3703. return;
  3704. /* read result TF if failed or requested */
  3705. if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
  3706. ap->ops->tf_read(ap, &qc->result_tf);
  3707. __ata_qc_complete(qc);
  3708. }
  3709. }
  3710. /**
  3711. * ata_qc_complete_multiple - Complete multiple qcs successfully
  3712. * @ap: port in question
  3713. * @qc_active: new qc_active mask
  3714. * @finish_qc: LLDD callback invoked before completing a qc
  3715. *
  3716. * Complete in-flight commands. This functions is meant to be
  3717. * called from low-level driver's interrupt routine to complete
  3718. * requests normally. ap->qc_active and @qc_active is compared
  3719. * and commands are completed accordingly.
  3720. *
  3721. * LOCKING:
  3722. * spin_lock_irqsave(host_set lock)
  3723. *
  3724. * RETURNS:
  3725. * Number of completed commands on success, -errno otherwise.
  3726. */
  3727. int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
  3728. void (*finish_qc)(struct ata_queued_cmd *))
  3729. {
  3730. int nr_done = 0;
  3731. u32 done_mask;
  3732. int i;
  3733. done_mask = ap->qc_active ^ qc_active;
  3734. if (unlikely(done_mask & qc_active)) {
  3735. ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
  3736. "(%08x->%08x)\n", ap->qc_active, qc_active);
  3737. return -EINVAL;
  3738. }
  3739. for (i = 0; i < ATA_MAX_QUEUE; i++) {
  3740. struct ata_queued_cmd *qc;
  3741. if (!(done_mask & (1 << i)))
  3742. continue;
  3743. if ((qc = ata_qc_from_tag(ap, i))) {
  3744. if (finish_qc)
  3745. finish_qc(qc);
  3746. ata_qc_complete(qc);
  3747. nr_done++;
  3748. }
  3749. }
  3750. return nr_done;
  3751. }
  3752. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3753. {
  3754. struct ata_port *ap = qc->ap;
  3755. switch (qc->tf.protocol) {
  3756. case ATA_PROT_NCQ:
  3757. case ATA_PROT_DMA:
  3758. case ATA_PROT_ATAPI_DMA:
  3759. return 1;
  3760. case ATA_PROT_ATAPI:
  3761. case ATA_PROT_PIO:
  3762. if (ap->flags & ATA_FLAG_PIO_DMA)
  3763. return 1;
  3764. /* fall through */
  3765. default:
  3766. return 0;
  3767. }
  3768. /* never reached */
  3769. }
  3770. /**
  3771. * ata_qc_issue - issue taskfile to device
  3772. * @qc: command to issue to device
  3773. *
  3774. * Prepare an ATA command to submission to device.
  3775. * This includes mapping the data into a DMA-able
  3776. * area, filling in the S/G table, and finally
  3777. * writing the taskfile to hardware, starting the command.
  3778. *
  3779. * LOCKING:
  3780. * spin_lock_irqsave(host_set lock)
  3781. */
  3782. void ata_qc_issue(struct ata_queued_cmd *qc)
  3783. {
  3784. struct ata_port *ap = qc->ap;
  3785. /* Make sure only one non-NCQ command is outstanding. The
  3786. * check is skipped for old EH because it reuses active qc to
  3787. * request ATAPI sense.
  3788. */
  3789. WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
  3790. if (qc->tf.protocol == ATA_PROT_NCQ) {
  3791. WARN_ON(ap->sactive & (1 << qc->tag));
  3792. ap->sactive |= 1 << qc->tag;
  3793. } else {
  3794. WARN_ON(ap->sactive);
  3795. ap->active_tag = qc->tag;
  3796. }
  3797. qc->flags |= ATA_QCFLAG_ACTIVE;
  3798. ap->qc_active |= 1 << qc->tag;
  3799. if (ata_should_dma_map(qc)) {
  3800. if (qc->flags & ATA_QCFLAG_SG) {
  3801. if (ata_sg_setup(qc))
  3802. goto sg_err;
  3803. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3804. if (ata_sg_setup_one(qc))
  3805. goto sg_err;
  3806. }
  3807. } else {
  3808. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3809. }
  3810. ap->ops->qc_prep(qc);
  3811. qc->err_mask |= ap->ops->qc_issue(qc);
  3812. if (unlikely(qc->err_mask))
  3813. goto err;
  3814. return;
  3815. sg_err:
  3816. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3817. qc->err_mask |= AC_ERR_SYSTEM;
  3818. err:
  3819. ata_qc_complete(qc);
  3820. }
  3821. /**
  3822. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3823. * @qc: command to issue to device
  3824. *
  3825. * Using various libata functions and hooks, this function
  3826. * starts an ATA command. ATA commands are grouped into
  3827. * classes called "protocols", and issuing each type of protocol
  3828. * is slightly different.
  3829. *
  3830. * May be used as the qc_issue() entry in ata_port_operations.
  3831. *
  3832. * LOCKING:
  3833. * spin_lock_irqsave(host_set lock)
  3834. *
  3835. * RETURNS:
  3836. * Zero on success, AC_ERR_* mask on failure
  3837. */
  3838. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3839. {
  3840. struct ata_port *ap = qc->ap;
  3841. /* Use polling pio if the LLD doesn't handle
  3842. * interrupt driven pio and atapi CDB interrupt.
  3843. */
  3844. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3845. switch (qc->tf.protocol) {
  3846. case ATA_PROT_PIO:
  3847. case ATA_PROT_ATAPI:
  3848. case ATA_PROT_ATAPI_NODATA:
  3849. qc->tf.flags |= ATA_TFLAG_POLLING;
  3850. break;
  3851. case ATA_PROT_ATAPI_DMA:
  3852. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3853. /* see ata_check_atapi_dma() */
  3854. BUG();
  3855. break;
  3856. default:
  3857. break;
  3858. }
  3859. }
  3860. /* select the device */
  3861. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3862. /* start the command */
  3863. switch (qc->tf.protocol) {
  3864. case ATA_PROT_NODATA:
  3865. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3866. ata_qc_set_polling(qc);
  3867. ata_tf_to_host(ap, &qc->tf);
  3868. ap->hsm_task_state = HSM_ST_LAST;
  3869. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3870. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3871. break;
  3872. case ATA_PROT_DMA:
  3873. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3874. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3875. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3876. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3877. ap->hsm_task_state = HSM_ST_LAST;
  3878. break;
  3879. case ATA_PROT_PIO:
  3880. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3881. ata_qc_set_polling(qc);
  3882. ata_tf_to_host(ap, &qc->tf);
  3883. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3884. /* PIO data out protocol */
  3885. ap->hsm_task_state = HSM_ST_FIRST;
  3886. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3887. /* always send first data block using
  3888. * the ata_pio_task() codepath.
  3889. */
  3890. } else {
  3891. /* PIO data in protocol */
  3892. ap->hsm_task_state = HSM_ST;
  3893. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3894. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3895. /* if polling, ata_pio_task() handles the rest.
  3896. * otherwise, interrupt handler takes over from here.
  3897. */
  3898. }
  3899. break;
  3900. case ATA_PROT_ATAPI:
  3901. case ATA_PROT_ATAPI_NODATA:
  3902. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3903. ata_qc_set_polling(qc);
  3904. ata_tf_to_host(ap, &qc->tf);
  3905. ap->hsm_task_state = HSM_ST_FIRST;
  3906. /* send cdb by polling if no cdb interrupt */
  3907. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  3908. (qc->tf.flags & ATA_TFLAG_POLLING))
  3909. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3910. break;
  3911. case ATA_PROT_ATAPI_DMA:
  3912. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3913. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3914. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3915. ap->hsm_task_state = HSM_ST_FIRST;
  3916. /* send cdb by polling if no cdb interrupt */
  3917. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3918. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3919. break;
  3920. default:
  3921. WARN_ON(1);
  3922. return AC_ERR_SYSTEM;
  3923. }
  3924. return 0;
  3925. }
  3926. /**
  3927. * ata_host_intr - Handle host interrupt for given (port, task)
  3928. * @ap: Port on which interrupt arrived (possibly...)
  3929. * @qc: Taskfile currently active in engine
  3930. *
  3931. * Handle host interrupt for given queued command. Currently,
  3932. * only DMA interrupts are handled. All other commands are
  3933. * handled via polling with interrupts disabled (nIEN bit).
  3934. *
  3935. * LOCKING:
  3936. * spin_lock_irqsave(host_set lock)
  3937. *
  3938. * RETURNS:
  3939. * One if interrupt was handled, zero if not (shared irq).
  3940. */
  3941. inline unsigned int ata_host_intr (struct ata_port *ap,
  3942. struct ata_queued_cmd *qc)
  3943. {
  3944. u8 status, host_stat = 0;
  3945. VPRINTK("ata%u: protocol %d task_state %d\n",
  3946. ap->id, qc->tf.protocol, ap->hsm_task_state);
  3947. /* Check whether we are expecting interrupt in this state */
  3948. switch (ap->hsm_task_state) {
  3949. case HSM_ST_FIRST:
  3950. /* Some pre-ATAPI-4 devices assert INTRQ
  3951. * at this state when ready to receive CDB.
  3952. */
  3953. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  3954. * The flag was turned on only for atapi devices.
  3955. * No need to check is_atapi_taskfile(&qc->tf) again.
  3956. */
  3957. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3958. goto idle_irq;
  3959. break;
  3960. case HSM_ST_LAST:
  3961. if (qc->tf.protocol == ATA_PROT_DMA ||
  3962. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  3963. /* check status of DMA engine */
  3964. host_stat = ap->ops->bmdma_status(ap);
  3965. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3966. /* if it's not our irq... */
  3967. if (!(host_stat & ATA_DMA_INTR))
  3968. goto idle_irq;
  3969. /* before we do anything else, clear DMA-Start bit */
  3970. ap->ops->bmdma_stop(qc);
  3971. if (unlikely(host_stat & ATA_DMA_ERR)) {
  3972. /* error when transfering data to/from memory */
  3973. qc->err_mask |= AC_ERR_HOST_BUS;
  3974. ap->hsm_task_state = HSM_ST_ERR;
  3975. }
  3976. }
  3977. break;
  3978. case HSM_ST:
  3979. break;
  3980. default:
  3981. goto idle_irq;
  3982. }
  3983. /* check altstatus */
  3984. status = ata_altstatus(ap);
  3985. if (status & ATA_BUSY)
  3986. goto idle_irq;
  3987. /* check main status, clearing INTRQ */
  3988. status = ata_chk_status(ap);
  3989. if (unlikely(status & ATA_BUSY))
  3990. goto idle_irq;
  3991. /* ack bmdma irq events */
  3992. ap->ops->irq_clear(ap);
  3993. ata_hsm_move(ap, qc, status, 0);
  3994. return 1; /* irq handled */
  3995. idle_irq:
  3996. ap->stats.idle_irq++;
  3997. #ifdef ATA_IRQ_TRAP
  3998. if ((ap->stats.idle_irq % 1000) == 0) {
  3999. ata_irq_ack(ap, 0); /* debug trap */
  4000. ata_port_printk(ap, KERN_WARNING, "irq trap\n");
  4001. return 1;
  4002. }
  4003. #endif
  4004. return 0; /* irq not handled */
  4005. }
  4006. /**
  4007. * ata_interrupt - Default ATA host interrupt handler
  4008. * @irq: irq line (unused)
  4009. * @dev_instance: pointer to our ata_host_set information structure
  4010. * @regs: unused
  4011. *
  4012. * Default interrupt handler for PCI IDE devices. Calls
  4013. * ata_host_intr() for each port that is not disabled.
  4014. *
  4015. * LOCKING:
  4016. * Obtains host_set lock during operation.
  4017. *
  4018. * RETURNS:
  4019. * IRQ_NONE or IRQ_HANDLED.
  4020. */
  4021. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  4022. {
  4023. struct ata_host_set *host_set = dev_instance;
  4024. unsigned int i;
  4025. unsigned int handled = 0;
  4026. unsigned long flags;
  4027. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  4028. spin_lock_irqsave(&host_set->lock, flags);
  4029. for (i = 0; i < host_set->n_ports; i++) {
  4030. struct ata_port *ap;
  4031. ap = host_set->ports[i];
  4032. if (ap &&
  4033. !(ap->flags & ATA_FLAG_DISABLED)) {
  4034. struct ata_queued_cmd *qc;
  4035. qc = ata_qc_from_tag(ap, ap->active_tag);
  4036. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  4037. (qc->flags & ATA_QCFLAG_ACTIVE))
  4038. handled |= ata_host_intr(ap, qc);
  4039. }
  4040. }
  4041. spin_unlock_irqrestore(&host_set->lock, flags);
  4042. return IRQ_RETVAL(handled);
  4043. }
  4044. /**
  4045. * sata_scr_valid - test whether SCRs are accessible
  4046. * @ap: ATA port to test SCR accessibility for
  4047. *
  4048. * Test whether SCRs are accessible for @ap.
  4049. *
  4050. * LOCKING:
  4051. * None.
  4052. *
  4053. * RETURNS:
  4054. * 1 if SCRs are accessible, 0 otherwise.
  4055. */
  4056. int sata_scr_valid(struct ata_port *ap)
  4057. {
  4058. return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
  4059. }
  4060. /**
  4061. * sata_scr_read - read SCR register of the specified port
  4062. * @ap: ATA port to read SCR for
  4063. * @reg: SCR to read
  4064. * @val: Place to store read value
  4065. *
  4066. * Read SCR register @reg of @ap into *@val. This function is
  4067. * guaranteed to succeed if the cable type of the port is SATA
  4068. * and the port implements ->scr_read.
  4069. *
  4070. * LOCKING:
  4071. * None.
  4072. *
  4073. * RETURNS:
  4074. * 0 on success, negative errno on failure.
  4075. */
  4076. int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
  4077. {
  4078. if (sata_scr_valid(ap)) {
  4079. *val = ap->ops->scr_read(ap, reg);
  4080. return 0;
  4081. }
  4082. return -EOPNOTSUPP;
  4083. }
  4084. /**
  4085. * sata_scr_write - write SCR register of the specified port
  4086. * @ap: ATA port to write SCR for
  4087. * @reg: SCR to write
  4088. * @val: value to write
  4089. *
  4090. * Write @val to SCR register @reg of @ap. This function is
  4091. * guaranteed to succeed if the cable type of the port is SATA
  4092. * and the port implements ->scr_read.
  4093. *
  4094. * LOCKING:
  4095. * None.
  4096. *
  4097. * RETURNS:
  4098. * 0 on success, negative errno on failure.
  4099. */
  4100. int sata_scr_write(struct ata_port *ap, int reg, u32 val)
  4101. {
  4102. if (sata_scr_valid(ap)) {
  4103. ap->ops->scr_write(ap, reg, val);
  4104. return 0;
  4105. }
  4106. return -EOPNOTSUPP;
  4107. }
  4108. /**
  4109. * sata_scr_write_flush - write SCR register of the specified port and flush
  4110. * @ap: ATA port to write SCR for
  4111. * @reg: SCR to write
  4112. * @val: value to write
  4113. *
  4114. * This function is identical to sata_scr_write() except that this
  4115. * function performs flush after writing to the register.
  4116. *
  4117. * LOCKING:
  4118. * None.
  4119. *
  4120. * RETURNS:
  4121. * 0 on success, negative errno on failure.
  4122. */
  4123. int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
  4124. {
  4125. if (sata_scr_valid(ap)) {
  4126. ap->ops->scr_write(ap, reg, val);
  4127. ap->ops->scr_read(ap, reg);
  4128. return 0;
  4129. }
  4130. return -EOPNOTSUPP;
  4131. }
  4132. /**
  4133. * ata_port_online - test whether the given port is online
  4134. * @ap: ATA port to test
  4135. *
  4136. * Test whether @ap is online. Note that this function returns 0
  4137. * if online status of @ap cannot be obtained, so
  4138. * ata_port_online(ap) != !ata_port_offline(ap).
  4139. *
  4140. * LOCKING:
  4141. * None.
  4142. *
  4143. * RETURNS:
  4144. * 1 if the port online status is available and online.
  4145. */
  4146. int ata_port_online(struct ata_port *ap)
  4147. {
  4148. u32 sstatus;
  4149. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
  4150. return 1;
  4151. return 0;
  4152. }
  4153. /**
  4154. * ata_port_offline - test whether the given port is offline
  4155. * @ap: ATA port to test
  4156. *
  4157. * Test whether @ap is offline. Note that this function returns
  4158. * 0 if offline status of @ap cannot be obtained, so
  4159. * ata_port_online(ap) != !ata_port_offline(ap).
  4160. *
  4161. * LOCKING:
  4162. * None.
  4163. *
  4164. * RETURNS:
  4165. * 1 if the port offline status is available and offline.
  4166. */
  4167. int ata_port_offline(struct ata_port *ap)
  4168. {
  4169. u32 sstatus;
  4170. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
  4171. return 1;
  4172. return 0;
  4173. }
  4174. /*
  4175. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  4176. * without filling any other registers
  4177. */
  4178. static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
  4179. {
  4180. struct ata_taskfile tf;
  4181. int err;
  4182. ata_tf_init(dev, &tf);
  4183. tf.command = cmd;
  4184. tf.flags |= ATA_TFLAG_DEVICE;
  4185. tf.protocol = ATA_PROT_NODATA;
  4186. err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  4187. if (err)
  4188. ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
  4189. __FUNCTION__, err);
  4190. return err;
  4191. }
  4192. static int ata_flush_cache(struct ata_device *dev)
  4193. {
  4194. u8 cmd;
  4195. if (!ata_try_flush_cache(dev))
  4196. return 0;
  4197. if (ata_id_has_flush_ext(dev->id))
  4198. cmd = ATA_CMD_FLUSH_EXT;
  4199. else
  4200. cmd = ATA_CMD_FLUSH;
  4201. return ata_do_simple_cmd(dev, cmd);
  4202. }
  4203. static int ata_standby_drive(struct ata_device *dev)
  4204. {
  4205. return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
  4206. }
  4207. static int ata_start_drive(struct ata_device *dev)
  4208. {
  4209. return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
  4210. }
  4211. /**
  4212. * ata_device_resume - wakeup a previously suspended devices
  4213. * @dev: the device to resume
  4214. *
  4215. * Kick the drive back into action, by sending it an idle immediate
  4216. * command and making sure its transfer mode matches between drive
  4217. * and host.
  4218. *
  4219. */
  4220. int ata_device_resume(struct ata_device *dev)
  4221. {
  4222. struct ata_port *ap = dev->ap;
  4223. if (ap->flags & ATA_FLAG_SUSPENDED) {
  4224. struct ata_device *failed_dev;
  4225. ap->flags &= ~ATA_FLAG_SUSPENDED;
  4226. while (ata_set_mode(ap, &failed_dev))
  4227. ata_dev_disable(failed_dev);
  4228. }
  4229. if (!ata_dev_enabled(dev))
  4230. return 0;
  4231. if (dev->class == ATA_DEV_ATA)
  4232. ata_start_drive(dev);
  4233. return 0;
  4234. }
  4235. /**
  4236. * ata_device_suspend - prepare a device for suspend
  4237. * @dev: the device to suspend
  4238. *
  4239. * Flush the cache on the drive, if appropriate, then issue a
  4240. * standbynow command.
  4241. */
  4242. int ata_device_suspend(struct ata_device *dev, pm_message_t state)
  4243. {
  4244. struct ata_port *ap = dev->ap;
  4245. if (!ata_dev_enabled(dev))
  4246. return 0;
  4247. if (dev->class == ATA_DEV_ATA)
  4248. ata_flush_cache(dev);
  4249. if (state.event != PM_EVENT_FREEZE)
  4250. ata_standby_drive(dev);
  4251. ap->flags |= ATA_FLAG_SUSPENDED;
  4252. return 0;
  4253. }
  4254. /**
  4255. * ata_port_start - Set port up for dma.
  4256. * @ap: Port to initialize
  4257. *
  4258. * Called just after data structures for each port are
  4259. * initialized. Allocates space for PRD table.
  4260. *
  4261. * May be used as the port_start() entry in ata_port_operations.
  4262. *
  4263. * LOCKING:
  4264. * Inherited from caller.
  4265. */
  4266. int ata_port_start (struct ata_port *ap)
  4267. {
  4268. struct device *dev = ap->dev;
  4269. int rc;
  4270. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  4271. if (!ap->prd)
  4272. return -ENOMEM;
  4273. rc = ata_pad_alloc(ap, dev);
  4274. if (rc) {
  4275. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4276. return rc;
  4277. }
  4278. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  4279. return 0;
  4280. }
  4281. /**
  4282. * ata_port_stop - Undo ata_port_start()
  4283. * @ap: Port to shut down
  4284. *
  4285. * Frees the PRD table.
  4286. *
  4287. * May be used as the port_stop() entry in ata_port_operations.
  4288. *
  4289. * LOCKING:
  4290. * Inherited from caller.
  4291. */
  4292. void ata_port_stop (struct ata_port *ap)
  4293. {
  4294. struct device *dev = ap->dev;
  4295. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4296. ata_pad_free(ap, dev);
  4297. }
  4298. void ata_host_stop (struct ata_host_set *host_set)
  4299. {
  4300. if (host_set->mmio_base)
  4301. iounmap(host_set->mmio_base);
  4302. }
  4303. /**
  4304. * ata_host_remove - Unregister SCSI host structure with upper layers
  4305. * @ap: Port to unregister
  4306. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  4307. *
  4308. * LOCKING:
  4309. * Inherited from caller.
  4310. */
  4311. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  4312. {
  4313. struct Scsi_Host *sh = ap->host;
  4314. DPRINTK("ENTER\n");
  4315. if (do_unregister)
  4316. scsi_remove_host(sh);
  4317. ap->ops->port_stop(ap);
  4318. }
  4319. /**
  4320. * ata_host_init - Initialize an ata_port structure
  4321. * @ap: Structure to initialize
  4322. * @host: associated SCSI mid-layer structure
  4323. * @host_set: Collection of hosts to which @ap belongs
  4324. * @ent: Probe information provided by low-level driver
  4325. * @port_no: Port number associated with this ata_port
  4326. *
  4327. * Initialize a new ata_port structure, and its associated
  4328. * scsi_host.
  4329. *
  4330. * LOCKING:
  4331. * Inherited from caller.
  4332. */
  4333. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  4334. struct ata_host_set *host_set,
  4335. const struct ata_probe_ent *ent, unsigned int port_no)
  4336. {
  4337. unsigned int i;
  4338. host->max_id = 16;
  4339. host->max_lun = 1;
  4340. host->max_channel = 1;
  4341. host->unique_id = ata_unique_id++;
  4342. host->max_cmd_len = 12;
  4343. ap->flags = ATA_FLAG_DISABLED;
  4344. ap->id = host->unique_id;
  4345. ap->host = host;
  4346. ap->ctl = ATA_DEVCTL_OBS;
  4347. ap->host_set = host_set;
  4348. ap->dev = ent->dev;
  4349. ap->port_no = port_no;
  4350. ap->hard_port_no =
  4351. ent->legacy_mode ? ent->hard_port_no : port_no;
  4352. ap->pio_mask = ent->pio_mask;
  4353. ap->mwdma_mask = ent->mwdma_mask;
  4354. ap->udma_mask = ent->udma_mask;
  4355. ap->flags |= ent->host_flags;
  4356. ap->ops = ent->port_ops;
  4357. ap->sata_spd_limit = UINT_MAX;
  4358. ap->active_tag = ATA_TAG_POISON;
  4359. ap->last_ctl = 0xFF;
  4360. INIT_WORK(&ap->port_task, NULL, NULL);
  4361. INIT_LIST_HEAD(&ap->eh_done_q);
  4362. /* set cable type */
  4363. ap->cbl = ATA_CBL_NONE;
  4364. if (ap->flags & ATA_FLAG_SATA)
  4365. ap->cbl = ATA_CBL_SATA;
  4366. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4367. struct ata_device *dev = &ap->device[i];
  4368. dev->ap = ap;
  4369. dev->devno = i;
  4370. dev->pio_mask = UINT_MAX;
  4371. dev->mwdma_mask = UINT_MAX;
  4372. dev->udma_mask = UINT_MAX;
  4373. }
  4374. #ifdef ATA_IRQ_TRAP
  4375. ap->stats.unhandled_irq = 1;
  4376. ap->stats.idle_irq = 1;
  4377. #endif
  4378. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4379. }
  4380. /**
  4381. * ata_host_add - Attach low-level ATA driver to system
  4382. * @ent: Information provided by low-level driver
  4383. * @host_set: Collections of ports to which we add
  4384. * @port_no: Port number associated with this host
  4385. *
  4386. * Attach low-level ATA driver to system.
  4387. *
  4388. * LOCKING:
  4389. * PCI/etc. bus probe sem.
  4390. *
  4391. * RETURNS:
  4392. * New ata_port on success, for NULL on error.
  4393. */
  4394. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4395. struct ata_host_set *host_set,
  4396. unsigned int port_no)
  4397. {
  4398. struct Scsi_Host *host;
  4399. struct ata_port *ap;
  4400. int rc;
  4401. DPRINTK("ENTER\n");
  4402. if (!ent->port_ops->probe_reset &&
  4403. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4404. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4405. port_no);
  4406. return NULL;
  4407. }
  4408. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4409. if (!host)
  4410. return NULL;
  4411. host->transportt = &ata_scsi_transport_template;
  4412. ap = ata_shost_to_port(host);
  4413. ata_host_init(ap, host, host_set, ent, port_no);
  4414. rc = ap->ops->port_start(ap);
  4415. if (rc)
  4416. goto err_out;
  4417. return ap;
  4418. err_out:
  4419. scsi_host_put(host);
  4420. return NULL;
  4421. }
  4422. /**
  4423. * ata_device_add - Register hardware device with ATA and SCSI layers
  4424. * @ent: Probe information describing hardware device to be registered
  4425. *
  4426. * This function processes the information provided in the probe
  4427. * information struct @ent, allocates the necessary ATA and SCSI
  4428. * host information structures, initializes them, and registers
  4429. * everything with requisite kernel subsystems.
  4430. *
  4431. * This function requests irqs, probes the ATA bus, and probes
  4432. * the SCSI bus.
  4433. *
  4434. * LOCKING:
  4435. * PCI/etc. bus probe sem.
  4436. *
  4437. * RETURNS:
  4438. * Number of ports registered. Zero on error (no ports registered).
  4439. */
  4440. int ata_device_add(const struct ata_probe_ent *ent)
  4441. {
  4442. unsigned int count = 0, i;
  4443. struct device *dev = ent->dev;
  4444. struct ata_host_set *host_set;
  4445. DPRINTK("ENTER\n");
  4446. /* alloc a container for our list of ATA ports (buses) */
  4447. host_set = kzalloc(sizeof(struct ata_host_set) +
  4448. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4449. if (!host_set)
  4450. return 0;
  4451. spin_lock_init(&host_set->lock);
  4452. host_set->dev = dev;
  4453. host_set->n_ports = ent->n_ports;
  4454. host_set->irq = ent->irq;
  4455. host_set->mmio_base = ent->mmio_base;
  4456. host_set->private_data = ent->private_data;
  4457. host_set->ops = ent->port_ops;
  4458. host_set->flags = ent->host_set_flags;
  4459. /* register each port bound to this device */
  4460. for (i = 0; i < ent->n_ports; i++) {
  4461. struct ata_port *ap;
  4462. unsigned long xfer_mode_mask;
  4463. ap = ata_host_add(ent, host_set, i);
  4464. if (!ap)
  4465. goto err_out;
  4466. host_set->ports[i] = ap;
  4467. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4468. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4469. (ap->pio_mask << ATA_SHIFT_PIO);
  4470. /* print per-port info to dmesg */
  4471. ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
  4472. "ctl 0x%lX bmdma 0x%lX irq %lu\n",
  4473. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4474. ata_mode_string(xfer_mode_mask),
  4475. ap->ioaddr.cmd_addr,
  4476. ap->ioaddr.ctl_addr,
  4477. ap->ioaddr.bmdma_addr,
  4478. ent->irq);
  4479. ata_chk_status(ap);
  4480. host_set->ops->irq_clear(ap);
  4481. ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
  4482. count++;
  4483. }
  4484. if (!count)
  4485. goto err_free_ret;
  4486. /* obtain irq, that is shared between channels */
  4487. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4488. DRV_NAME, host_set))
  4489. goto err_out;
  4490. /* perform each probe synchronously */
  4491. DPRINTK("probe begin\n");
  4492. for (i = 0; i < count; i++) {
  4493. struct ata_port *ap;
  4494. int rc;
  4495. ap = host_set->ports[i];
  4496. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4497. rc = ata_bus_probe(ap);
  4498. DPRINTK("ata%u: bus probe end\n", ap->id);
  4499. if (rc) {
  4500. /* FIXME: do something useful here?
  4501. * Current libata behavior will
  4502. * tear down everything when
  4503. * the module is removed
  4504. * or the h/w is unplugged.
  4505. */
  4506. }
  4507. rc = scsi_add_host(ap->host, dev);
  4508. if (rc) {
  4509. ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
  4510. /* FIXME: do something useful here */
  4511. /* FIXME: handle unconditional calls to
  4512. * scsi_scan_host and ata_host_remove, below,
  4513. * at the very least
  4514. */
  4515. }
  4516. }
  4517. /* probes are done, now scan each port's disk(s) */
  4518. DPRINTK("host probe begin\n");
  4519. for (i = 0; i < count; i++) {
  4520. struct ata_port *ap = host_set->ports[i];
  4521. ata_scsi_scan_host(ap);
  4522. }
  4523. dev_set_drvdata(dev, host_set);
  4524. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4525. return ent->n_ports; /* success */
  4526. err_out:
  4527. for (i = 0; i < count; i++) {
  4528. ata_host_remove(host_set->ports[i], 1);
  4529. scsi_host_put(host_set->ports[i]->host);
  4530. }
  4531. err_free_ret:
  4532. kfree(host_set);
  4533. VPRINTK("EXIT, returning 0\n");
  4534. return 0;
  4535. }
  4536. /**
  4537. * ata_host_set_remove - PCI layer callback for device removal
  4538. * @host_set: ATA host set that was removed
  4539. *
  4540. * Unregister all objects associated with this host set. Free those
  4541. * objects.
  4542. *
  4543. * LOCKING:
  4544. * Inherited from calling layer (may sleep).
  4545. */
  4546. void ata_host_set_remove(struct ata_host_set *host_set)
  4547. {
  4548. struct ata_port *ap;
  4549. unsigned int i;
  4550. for (i = 0; i < host_set->n_ports; i++) {
  4551. ap = host_set->ports[i];
  4552. scsi_remove_host(ap->host);
  4553. }
  4554. free_irq(host_set->irq, host_set);
  4555. for (i = 0; i < host_set->n_ports; i++) {
  4556. ap = host_set->ports[i];
  4557. ata_scsi_release(ap->host);
  4558. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4559. struct ata_ioports *ioaddr = &ap->ioaddr;
  4560. if (ioaddr->cmd_addr == 0x1f0)
  4561. release_region(0x1f0, 8);
  4562. else if (ioaddr->cmd_addr == 0x170)
  4563. release_region(0x170, 8);
  4564. }
  4565. scsi_host_put(ap->host);
  4566. }
  4567. if (host_set->ops->host_stop)
  4568. host_set->ops->host_stop(host_set);
  4569. kfree(host_set);
  4570. }
  4571. /**
  4572. * ata_scsi_release - SCSI layer callback hook for host unload
  4573. * @host: libata host to be unloaded
  4574. *
  4575. * Performs all duties necessary to shut down a libata port...
  4576. * Kill port kthread, disable port, and release resources.
  4577. *
  4578. * LOCKING:
  4579. * Inherited from SCSI layer.
  4580. *
  4581. * RETURNS:
  4582. * One.
  4583. */
  4584. int ata_scsi_release(struct Scsi_Host *host)
  4585. {
  4586. struct ata_port *ap = ata_shost_to_port(host);
  4587. DPRINTK("ENTER\n");
  4588. ap->ops->port_disable(ap);
  4589. ata_host_remove(ap, 0);
  4590. DPRINTK("EXIT\n");
  4591. return 1;
  4592. }
  4593. /**
  4594. * ata_std_ports - initialize ioaddr with standard port offsets.
  4595. * @ioaddr: IO address structure to be initialized
  4596. *
  4597. * Utility function which initializes data_addr, error_addr,
  4598. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4599. * device_addr, status_addr, and command_addr to standard offsets
  4600. * relative to cmd_addr.
  4601. *
  4602. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4603. */
  4604. void ata_std_ports(struct ata_ioports *ioaddr)
  4605. {
  4606. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4607. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4608. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4609. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4610. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4611. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4612. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4613. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4614. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4615. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4616. }
  4617. #ifdef CONFIG_PCI
  4618. void ata_pci_host_stop (struct ata_host_set *host_set)
  4619. {
  4620. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4621. pci_iounmap(pdev, host_set->mmio_base);
  4622. }
  4623. /**
  4624. * ata_pci_remove_one - PCI layer callback for device removal
  4625. * @pdev: PCI device that was removed
  4626. *
  4627. * PCI layer indicates to libata via this hook that
  4628. * hot-unplug or module unload event has occurred.
  4629. * Handle this by unregistering all objects associated
  4630. * with this PCI device. Free those objects. Then finally
  4631. * release PCI resources and disable device.
  4632. *
  4633. * LOCKING:
  4634. * Inherited from PCI layer (may sleep).
  4635. */
  4636. void ata_pci_remove_one (struct pci_dev *pdev)
  4637. {
  4638. struct device *dev = pci_dev_to_dev(pdev);
  4639. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4640. ata_host_set_remove(host_set);
  4641. pci_release_regions(pdev);
  4642. pci_disable_device(pdev);
  4643. dev_set_drvdata(dev, NULL);
  4644. }
  4645. /* move to PCI subsystem */
  4646. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4647. {
  4648. unsigned long tmp = 0;
  4649. switch (bits->width) {
  4650. case 1: {
  4651. u8 tmp8 = 0;
  4652. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4653. tmp = tmp8;
  4654. break;
  4655. }
  4656. case 2: {
  4657. u16 tmp16 = 0;
  4658. pci_read_config_word(pdev, bits->reg, &tmp16);
  4659. tmp = tmp16;
  4660. break;
  4661. }
  4662. case 4: {
  4663. u32 tmp32 = 0;
  4664. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4665. tmp = tmp32;
  4666. break;
  4667. }
  4668. default:
  4669. return -EINVAL;
  4670. }
  4671. tmp &= bits->mask;
  4672. return (tmp == bits->val) ? 1 : 0;
  4673. }
  4674. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4675. {
  4676. pci_save_state(pdev);
  4677. pci_disable_device(pdev);
  4678. pci_set_power_state(pdev, PCI_D3hot);
  4679. return 0;
  4680. }
  4681. int ata_pci_device_resume(struct pci_dev *pdev)
  4682. {
  4683. pci_set_power_state(pdev, PCI_D0);
  4684. pci_restore_state(pdev);
  4685. pci_enable_device(pdev);
  4686. pci_set_master(pdev);
  4687. return 0;
  4688. }
  4689. #endif /* CONFIG_PCI */
  4690. static int __init ata_init(void)
  4691. {
  4692. ata_wq = create_workqueue("ata");
  4693. if (!ata_wq)
  4694. return -ENOMEM;
  4695. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4696. return 0;
  4697. }
  4698. static void __exit ata_exit(void)
  4699. {
  4700. destroy_workqueue(ata_wq);
  4701. }
  4702. module_init(ata_init);
  4703. module_exit(ata_exit);
  4704. static unsigned long ratelimit_time;
  4705. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4706. int ata_ratelimit(void)
  4707. {
  4708. int rc;
  4709. unsigned long flags;
  4710. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4711. if (time_after(jiffies, ratelimit_time)) {
  4712. rc = 1;
  4713. ratelimit_time = jiffies + (HZ/5);
  4714. } else
  4715. rc = 0;
  4716. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4717. return rc;
  4718. }
  4719. /**
  4720. * ata_wait_register - wait until register value changes
  4721. * @reg: IO-mapped register
  4722. * @mask: Mask to apply to read register value
  4723. * @val: Wait condition
  4724. * @interval_msec: polling interval in milliseconds
  4725. * @timeout_msec: timeout in milliseconds
  4726. *
  4727. * Waiting for some bits of register to change is a common
  4728. * operation for ATA controllers. This function reads 32bit LE
  4729. * IO-mapped register @reg and tests for the following condition.
  4730. *
  4731. * (*@reg & mask) != val
  4732. *
  4733. * If the condition is met, it returns; otherwise, the process is
  4734. * repeated after @interval_msec until timeout.
  4735. *
  4736. * LOCKING:
  4737. * Kernel thread context (may sleep)
  4738. *
  4739. * RETURNS:
  4740. * The final register value.
  4741. */
  4742. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  4743. unsigned long interval_msec,
  4744. unsigned long timeout_msec)
  4745. {
  4746. unsigned long timeout;
  4747. u32 tmp;
  4748. tmp = ioread32(reg);
  4749. /* Calculate timeout _after_ the first read to make sure
  4750. * preceding writes reach the controller before starting to
  4751. * eat away the timeout.
  4752. */
  4753. timeout = jiffies + (timeout_msec * HZ) / 1000;
  4754. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  4755. msleep(interval_msec);
  4756. tmp = ioread32(reg);
  4757. }
  4758. return tmp;
  4759. }
  4760. /*
  4761. * libata is essentially a library of internal helper functions for
  4762. * low-level ATA host controller drivers. As such, the API/ABI is
  4763. * likely to change as new drivers are added and updated.
  4764. * Do not depend on ABI/API stability.
  4765. */
  4766. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4767. EXPORT_SYMBOL_GPL(ata_std_ports);
  4768. EXPORT_SYMBOL_GPL(ata_device_add);
  4769. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4770. EXPORT_SYMBOL_GPL(ata_sg_init);
  4771. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4772. EXPORT_SYMBOL_GPL(ata_qc_complete);
  4773. EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
  4774. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4775. EXPORT_SYMBOL_GPL(ata_tf_load);
  4776. EXPORT_SYMBOL_GPL(ata_tf_read);
  4777. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4778. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4779. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4780. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4781. EXPORT_SYMBOL_GPL(ata_check_status);
  4782. EXPORT_SYMBOL_GPL(ata_altstatus);
  4783. EXPORT_SYMBOL_GPL(ata_exec_command);
  4784. EXPORT_SYMBOL_GPL(ata_port_start);
  4785. EXPORT_SYMBOL_GPL(ata_port_stop);
  4786. EXPORT_SYMBOL_GPL(ata_host_stop);
  4787. EXPORT_SYMBOL_GPL(ata_interrupt);
  4788. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4789. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4790. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4791. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4792. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4793. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4794. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4795. EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
  4796. EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
  4797. EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
  4798. EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
  4799. EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
  4800. EXPORT_SYMBOL_GPL(ata_port_probe);
  4801. EXPORT_SYMBOL_GPL(sata_set_spd);
  4802. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4803. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4804. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4805. EXPORT_SYMBOL_GPL(ata_std_probeinit);
  4806. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4807. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4808. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4809. EXPORT_SYMBOL_GPL(ata_std_probe_reset);
  4810. EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
  4811. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4812. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4813. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4814. EXPORT_SYMBOL_GPL(ata_port_disable);
  4815. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4816. EXPORT_SYMBOL_GPL(ata_wait_register);
  4817. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4818. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4819. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4820. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4821. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4822. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4823. EXPORT_SYMBOL_GPL(ata_host_intr);
  4824. EXPORT_SYMBOL_GPL(sata_scr_valid);
  4825. EXPORT_SYMBOL_GPL(sata_scr_read);
  4826. EXPORT_SYMBOL_GPL(sata_scr_write);
  4827. EXPORT_SYMBOL_GPL(sata_scr_write_flush);
  4828. EXPORT_SYMBOL_GPL(ata_port_online);
  4829. EXPORT_SYMBOL_GPL(ata_port_offline);
  4830. EXPORT_SYMBOL_GPL(ata_id_string);
  4831. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4832. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4833. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4834. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4835. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4836. #ifdef CONFIG_PCI
  4837. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4838. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4839. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4840. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4841. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4842. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4843. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4844. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4845. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4846. #endif /* CONFIG_PCI */
  4847. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4848. EXPORT_SYMBOL_GPL(ata_device_resume);
  4849. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4850. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  4851. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4852. EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
  4853. EXPORT_SYMBOL_GPL(ata_port_abort);
  4854. EXPORT_SYMBOL_GPL(ata_port_freeze);
  4855. EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
  4856. EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
  4857. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4858. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  4859. EXPORT_SYMBOL_GPL(ata_do_eh);